Power consumption parameter acquisition method and device, electronic equipment and storage medium

Abstract

The invention discloses a power consumption parameter obtaining method and device, electronic equipment and a storage medium, and relates to the technical field of integrated circuits, and the method comprises the steps: obtaining the performance parameter information of a plurality of target logic units in a target integrated circuit module; determining a target logic unit library corresponding to the target logic unit based on the performance parameter information of the target logic unit; dividing the same target logic units of the corresponding target logic unit libraries into a target logic unit set to obtain a plurality of target logic unit sets; for any target logic unit set, the power consumption parameter of each target logic unit in the target logic unit set is obtained from the target logic unit library corresponding to the target logic unit set, and the power consumption parameters are stored in the target text file, so that the power consumption parameters of the target logic units are automatically and rapidly obtained; the technical problem of long time consumption of power consumption parameter collection is solved, and the technical effect of shortening the time consumption of power consumption parameter collection is achieved.

Description

Technical Field

[0001] The present application relates to the field of integrated circuit technology, and in particular to a method, device, electronic device, and storage medium for obtaining power consumption parameters. Background Art

[0002] With the development of integrated circuits, the integration level and integration scale of single integrated circuit chips are constantly improving, and the division of logic unit modules becomes necessary, which increases the complexity of the power consumption calculation of integrated circuit chips. In order to accurately guide chip design and power supply planning on the board, when the chip does not use power consumption analysis or even when it is not tape-out, it is necessary to ensure that the estimated power consumption value of the chip is as close to the actual power consumption value as possible. However, in the related art, the power consumption parameters of a logic unit composed of a single logic gate under a certain logic unit type are selected based on experience, and then multiplied by the ratio of the empirical voltage threshold (Votage Threshold, abbreviated as: VT) to determine the estimated power consumption value of the chip. This method causes the estimated power consumption value of the chip to differ greatly from the actual power consumption value, and cannot accurately guide the chip design and power supply planning on the board.

[0003] In order to accurately guide chip design and power supply planning on the board, related technologies manually collect the power consumption parameters of each logic unit in the chip from multiple standard logic unit libraries, so as to make the estimated power consumption value of the chip as close as possible to the actual power consumption value. However, this manual acquisition method makes the collection of power consumption parameters time-consuming. Summary of the Invention

[0004] The present application provides a method, device, electronic information and storage medium for obtaining power consumption parameters, in order to at least solve the problem in the related art that the collection of power consumption parameters takes a long time due to manual acquisition.

[0005] This application provides a method for obtaining power consumption parameters, including:

[0006] Acquiring performance parameter information of a plurality of target logic units in a target integrated circuit module;

[0007] Determining a target logical unit library corresponding to the target logical unit based on the performance parameter information of the target logical unit;

[0008] Grouping the target logical units with the same corresponding target logical unit libraries into a target logical unit set to obtain multiple target logical unit sets;

[0009] For any target logic unit set, the power consumption parameters of each target logic unit in the target logic unit set are obtained from the target logic unit library corresponding to the target logic unit set, and the power consumption parameters are saved to a target text file to determine the power consumption value of the target integrated circuit module based on the target text file.

[0010] The present application also provides a power consumption parameter acquisition device, comprising:

[0011] A first acquisition module is used to acquire performance parameter information of multiple target logic units in a target integrated circuit module;

[0012] a determination module, configured to determine a target logical unit library corresponding to the target logical unit based on the performance parameter information of the target logical unit;

[0013] A second acquisition module is used to group the same target logical units in the corresponding target logical unit library into a target logical unit set to obtain multiple target logical unit sets;

[0014] A saving module is used to obtain, for any target logic unit set, the power consumption parameters of each target logic unit in the target logic unit set from the target logic unit library corresponding to the target logic unit set, and save the power consumption parameters to a target text file to determine the power consumption value of the target integrated circuit module based on the target text file.

[0015] The present application also provides an electronic device, comprising: a memory for storing a computer program; and a processor for implementing the steps of any of the above-mentioned power consumption parameter acquisition methods when executing the computer program.

[0016] The present application also provides a computer-readable storage medium, in which a computer program is stored. When the computer program is executed by a processor, the steps of any of the above-mentioned power consumption parameter acquisition methods are implemented.

[0017] The present application also provides a computer program product, including a computer program, which implements the steps of any of the above-mentioned power consumption parameter acquisition methods when executed by a processor.

[0018] Through the present application, performance parameter information of multiple target logic units in a target integrated circuit module is obtained; based on the performance parameter information of the target logic units, a target logic unit library corresponding to the target logic unit is determined; target logic units with the same corresponding target logic unit library are divided into a target logic unit set to obtain multiple target logic unit sets; for any target logic unit set, power consumption parameters of each target logic unit in the target logic unit set are obtained from the target logic unit library corresponding to the target logic unit set, and the power consumption parameters are saved to a target text file to determine the power consumption value of the target integrated circuit module based on the target text file. This achieves automatic and rapid acquisition of power consumption parameters of multiple target logic units in the target integrated circuit module, thereby solving the problem of time-consuming collection of power consumption parameters caused by manual acquisition methods in related technologies, thereby achieving the technical effect of shortening the time for collecting power consumption parameters of target logic units and reducing the workload of acquiring power consumption parameters of target logic units. BRIEF DESCRIPTION OF THE DRAWINGS

[0019] In order to more clearly illustrate the embodiments of the present application, the following is a brief introduction to the drawings required for use in the embodiments. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without any creative work.

[0020] Figure 1 A schematic diagram of the structure of a power consumption parameter acquisition system provided in an embodiment of the present application;

[0021] Figure 2 A schematic diagram of the format of a power consumption parameter collection instruction provided in an embodiment of the present application;

[0022] Figure 3 A flowchart of a method for obtaining power consumption parameters provided in an embodiment of the present application;

[0023] Figure 4 A flowchart of another method for obtaining power consumption parameters provided in an embodiment of the present application;

[0024] Figure 5 A schematic diagram of a process for determining a target logical unit information file provided in an embodiment of the present application;

[0025] Figure 6 A flowchart of obtaining the power consumption parameters of a target logic unit from a target logic unit information file provided in an embodiment of the present application;

[0026] Figure 7 A flowchart of another method for obtaining power consumption parameters provided in an embodiment of the present application;

[0027] Figure 8 A schematic diagram of the structure of a power consumption parameter acquisition device provided in an embodiment of the present application;

[0028] Figure 9 A schematic diagram of the structure of an electronic device provided in an embodiment of the present application. DETAILED DESCRIPTION

[0029] The following will be combined with the accompanying drawings in the embodiments of this application to clearly and completely describe the technical solutions in the embodiments of this application. Obviously, the embodiments described are only part of the embodiments of this application, not all of them. Based on the embodiments in this application, all other embodiments obtained by ordinary technicians in this field without making creative efforts are within the scope of protection of this application.

[0030] It should be noted that, in the description of this application, the terms "comprises," "includes," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or device comprising a series of elements includes not only those elements, but also other elements not explicitly listed, or elements inherent to such process, method, article, or device. The terms "first," "second," etc., in this application are used to distinguish similar objects, and are not used to describe a particular order or sequence.

[0031] In order to enable those skilled in the art to better understand the present application, the present application is further described in detail below with reference to the accompanying drawings and specific implementation methods.

[0032] With the development of integrated circuits, the integration level and scale of single integrated circuit chips continue to increase. This trend has triggered a chain reaction at the logic unit module level. The larger the chip scale, the finer the modular division of the logic unit. The increase in the number of logic unit modules directly leads to an explosive growth in the calculation dimension of the chip's power consumption value. Specifically, not only do we need to consider more logic unit modules, but we also need to accurately track the VT ratio and logic unit type distribution of each logic unit module at different levels, and the data complexity increases exponentially. Among them, the logic unit is the most basic functional unit in the integrated circuit, used to implement specific logical operations or data processing functions. Each logic unit is usually composed of one or more transistors and can perform basic logical operations in Boolean algebra, such as AND, OR, NOT, XOR, etc. The logic unit module contains multiple logic units, which work together to complete specific functions.

[0033] In the early stages of chip design, if power analysis tools aren't used or tape-out has not yet begun, ensuring the chip's estimated power consumption is as close to the actual power consumption as possible is crucial for accurately guiding chip design and board power planning. A significant discrepancy between the chip's estimated and actual power consumption can significantly impact the chip's thermal design and may even prevent the chip from initializing properly due to insufficient board power supply capacity. Alternatively, overly conservative chip design can result in an estimated power consumption that exceeds the board's power supply component selection requirements, making it impossible to accurately guide chip design and board power planning. Chip power consumption varies at different stages of chip development. In the early stages of chip development, significant discrepancies in power consumption data can be tolerated because accurate logic unit power parameters are unavailable and evaluations rely on empirical data from different manufacturing processes or power parameters contained in relevant IP datasheets. However, to accurately guide chip design and board power planning, ensuring the chip's estimated power consumption is as close to the actual power consumption as possible is crucial in the early stages of chip development. Prime TimePX (PTPX) can be a useful power analysis tool.

[0034] In related technologies, chip power consumption estimates are typically calculated by multiplying the empirical power consumption of a single logic cell type (consisting of a single logic gate) by the chip's empirical VT ratio. This sweeping estimation method seriously ignores the diversity of logic cell libraries and the complexity of logic cell types in large-scale integration scenarios. This results in a significant discrepancy between the calculated chip power consumption and the actual power consumption, making it inaccurate for chip design and board power supply planning.

[0035] In order to accurately guide chip design and power supply planning on the board, the relevant technology manually collects the power consumption parameters of each logic unit in the chip from multiple standard logic unit libraries, so as to make the estimated power consumption value of the chip as close as possible to the actual power consumption value. However, this manual acquisition method requires traversing different standard logic unit libraries, which is cumbersome, redundant and very mechanical. As a result, the collection of power consumption parameters takes a long time, and it is easy to miss power parameters or obtain incorrect power parameters, which leads to a large difference between the calculated estimated power consumption value of the chip and the actual power consumption value, and cannot accurately guide the chip design and power supply planning on the board.

[0036] To address the above problems, embodiments of the present application provide a method, device, electronic device, and storage medium for obtaining power consumption parameters. The method comprises: obtaining performance parameter information of multiple target logic units in a target integrated circuit module; determining a target logic unit library corresponding to the target logic unit based on the performance parameter information of the target logic unit; grouping target logic units with the same corresponding target logic unit library into a target logic unit set to obtain multiple target logic unit sets; and, for any target logic unit set, obtaining power consumption parameters of each target logic unit in the target logic unit set from the target logic unit library corresponding to the target logic unit set, saving the power consumption parameters to a target text file, and determining the power consumption value of the target integrated circuit module based on the target text file. The method provided by the above solution realizes automatic and rapid acquisition of power consumption parameters of target logic units based on the performance parameter information of multiple target logic units in the target integrated circuit module, solving the technical problem of time-consuming and error-prone power consumption parameter collection in related technologies, thereby shortening the time consumption for power consumption parameter collection and improving the accuracy of the obtained power consumption parameters, thereby ensuring that the estimated power consumption value of the chip is as close as possible to the actual power consumption value, and achieving the technical effect of accurately guiding chip design and power supply planning on the board.

[0037] In conjunction with the specific application environment architecture or specific hardware architecture on which the execution of the power consumption parameter acquisition method depends, the specific application environment architecture or specific hardware architecture is described herein.

[0038] The power consumption parameter acquisition method, device, electronic device and storage medium provided in the embodiments of the present application are suitable for acquiring the power consumption parameters of the logic unit in the integrated circuit chip, and then determining the power consumption value of the integrated circuit chip. Figure 1 The figure shows a schematic diagram of the structure of a power consumption parameter acquisition system provided by an embodiment of the present application. The power consumption parameter acquisition system includes a client and a target platform. The client is used to send a power consumption parameter collection command to the target platform, wherein the power consumption parameter collection command includes performance parameter information of multiple target logic units in a target integrated circuit chip. The target platform receives the power consumption parameter collection command and obtains the performance parameter information of multiple target logic units in the target integrated circuit module in the power consumption parameter collection command; based on the performance parameter information of the target logic units, the target logic unit library corresponding to the target logic unit is determined; the target logic units with the same corresponding target logic unit library are divided into a target logic unit set to obtain multiple target logic unit sets; for any target logic unit set, the power consumption parameters of each target logic unit in the target logic unit set are obtained from the target logic unit library corresponding to the target logic unit set, and the power consumption parameters are saved to a target text file to determine the power consumption value of the target integrated circuit module based on the target text file.

[0039] It can be understood that the embodiment of the present application adopts a one-click execution method, which completes data input, target designation and information output operations by defining power consumption parameter collection instructions, and then automatically completes the specified data acquisition operation. Figure 2 A schematic diagram of the format of a power consumption parameter collection instruction provided in an embodiment of the present application is shown as follows: Figure 2 As shown, the power consumption parameter collection instruction consists of four parts: instruction keyword, platform, data requirements, and target specification. The instruction keyword indicates the data processing tools and software, or self-developed software tool platforms, that will execute the power consumption parameter collection instruction. The platform is the primary vehicle for executing the power consumption parameter collection instruction, enabling data acquisition and processing. The data requirements specify the requirements for obtaining specified data from the standard logic cell library. Specifically, they specify the type of standard logic cell library to be extracted. Currently, the data requirements only constrain this requirement; other data requirements will be constrained individually during the data extraction process. The target specification specifies the location of the standard logic cell library to be obtained, specifically the starting location of the logic cell information file within the standard logic cell library to be obtained. Typically, other data is located at the location of the standard logic cell library, and the purpose of the target specification is to confirm the starting location of the logic cell information file. It should be noted that the power consumption parameter collection instruction also includes performance parameter information for multiple target logic cells in the target integrated circuit chip. The data requirements in the power consumption parameter collection instruction are determined based on this performance parameter information for multiple target logic cells in the target integrated circuit chip.

[0040] The embodiment of the present application provides a method for obtaining power consumption parameters, which is applied to a target platform. Figure 3 A flow chart of a method for obtaining power consumption parameters provided in an embodiment of the present application is shown in FIG. Figure 3 As shown, the process includes:

[0041] Step S301: Acquire performance parameter information of multiple target logic units in a target integrated circuit module.

[0042] The target integrated circuit module is an integrated circuit chip whose power consumption value is to be determined. The performance parameter information includes manufacturer information of the target logic unit.

[0043] Step S302 : determining a target logical unit library corresponding to the target logical unit based on the performance parameter information of the target logical unit.

[0044] Specifically, for any target logical unit, based on the manufacturer information of the target logical unit, a target logical unit library of the target logical unit is determined, wherein the logical unit library is a standard logical unit library.

[0045] It is understandable that target logic units produced by different manufacturers have different power consumption parameters. Therefore, it is necessary to determine the target logic unit library corresponding to the target logic unit based on the manufacturer information of the target logic unit.

[0046] Step S303 : Grouping the target logical units with the same corresponding target logical unit library into a target logical unit set to obtain a plurality of target logical unit sets.

[0047] After determining the target logical unit library corresponding to each target logical unit, the target logical units with the same corresponding target logical unit library are grouped into a target logical unit set to obtain a plurality of target logical unit sets.

[0048] Step S304: for any target logic unit set, obtain the power consumption parameters of each target logic unit in the target logic unit set from the target logic unit library corresponding to the target logic unit set, save the power consumption parameters to the target text file, and determine the power consumption value of the target integrated circuit module based on the target text file.

[0049] It is understandable that the target logic units in a target logic unit set correspond to the same target logic unit library. The power consumption parameters of the target logic units in different target logic unit sets can be saved to the same target text file or to different target text files, without any specific limitation.

[0050] Optionally, the power consumption parameters of the target logic units in each target logic unit set may be organized into a database table and saved in a corresponding target text file.

[0051] It should be noted that the initial power consumption parameters of each target logic unit can be obtained from the target logic unit library, including the number of logic gates, static power consumption, capacitance value of each pin and edge flip power consumption value of each input pin. The initial power consumption parameters are processed to obtain the power consumption parameters of the target logic unit.

[0052] The power consumption parameter acquisition method provided in an embodiment of the present application obtains performance parameter information of multiple target logic units in a target integrated circuit module; determines a target logic unit library corresponding to the target logic unit based on the performance parameter information of the target logic units; groups the target logic units with the same properties in the corresponding target logic unit library into a target logic unit set to obtain multiple target logic unit sets; and for any target logic unit set, obtains the power consumption parameter of each target logic unit in the target logic unit set from the target logic unit library corresponding to the target logic unit set, saves the power consumption parameter to a target text file, and determines the power consumption value of the target integrated circuit module based on the target text file, thereby achieving automatic and rapid acquisition of the power consumption parameters of multiple target logic units in the target integrated circuit module. Therefore, the problem of manual acquisition methods in related technologies causing the collection of power consumption parameters to be time-consuming is solved, achieving the technical effect of shortening the collection time of the power consumption parameters of the target logic units and reducing the workload of acquiring the power consumption parameters of the target logic units.

[0053] The embodiment of the present application provides a method for obtaining power consumption parameters. Figure 4 A flow chart of a method for obtaining power consumption parameters provided in an embodiment of the present application is shown in FIG. Figure 4 As shown, the process includes:

[0054] Step S401: Obtain performance parameter information of multiple target logic units in the target integrated circuit module. Figure 3 Step S301 of the illustrated embodiment will not be described in detail here.

[0055] Step S402: Determine the target logical unit library corresponding to the target logical unit based on the performance parameter information of the target logical unit. Figure 3 Step S302 of the illustrated embodiment will not be described in detail here.

[0056] Step S403: group the target logical units with the same corresponding target logical unit library into a target logical unit set to obtain multiple target logical unit sets. Figure 3 Step S303 of the illustrated embodiment will not be described in detail here.

[0057] Step S404: for any target logic unit set, obtain the power consumption parameters of each target logic unit in the target logic unit set from the target logic unit library corresponding to the target logic unit set, save the power consumption parameters to a target text file, and determine the power consumption value of the target integrated circuit module based on the target text file.

[0058] Specifically, the above step S404 includes:

[0059] Step S4041 : Based on the target logical unit library corresponding to the target logical unit set, determine the starting position of the logical unit information file of the target logical unit library corresponding to the target logical unit set.

[0060] It is understandable that the target logical unit library includes other data in addition to the logical unit information file. In order to determine the target logical unit information file of the target logical unit, it is first necessary to determine the starting position of the logical unit information file in the target logical unit library.

[0061] Step S4042 : Based on the starting position of the logical unit information file of the target logical unit library, determine the target logical unit information file corresponding to each target logical unit in the target logical unit set from the target logical unit library corresponding to the target logical unit set.

[0062] Step S4043: Determine the power consumption parameters of the target logic unit based on the target logic unit information file.

[0063] After the target logic unit information file corresponding to each target logic unit is determined, for any target logic unit, the power consumption parameter of the target logic unit is determined based on the target logic unit information file corresponding to the target logic unit.

[0064] The power consumption parameter acquisition method provided in the embodiment of the present application determines the starting position of the logic unit information file in the target logic unit library, determines the target logic unit information file corresponding to the target logic unit based on the starting position of the logic unit information file in the target logic unit library, and then determines the power consumption parameters of the target logic unit, thereby shortening the search time of the target logic unit information file and thus shortening the time spent on collecting the power consumption parameters of the target logic unit.

[0065] In some optional implementations, the above step S4042 includes:

[0066] Step a1: determining all logical unit information files included in the target logical unit library corresponding to the target logical unit set based on the starting position of the logical unit information file of the target logical unit library.

[0067] Step a2: for any target logical unit in the target logical unit set, based on the performance parameter information of the target logical unit, select the target logical unit information file corresponding to the target logical unit from all logical unit information files included in the target logical unit library corresponding to the target logical unit set.

[0068] In some optional implementations, the above step a2 includes:

[0069] Step a21 : Based on the transistor type of the target logic cell, a first logic cell information file matching the transistor type of the target logic cell is screened out from all logic cell information files included in the target logic cell library corresponding to the target logic cell set.

[0070] Figure 5 This is a flow chart of determining the target logical unit information file provided by the embodiment of the present application. Figure 5 As shown, the VT / process, voltage, temperature (PVT) condition judgment module of the target platform first performs VT judgment on all logic cell information files included in the target logic cell library. That is, based on the path information of all logic cell information files included in the target logic cell library, all logic cell information files are polled, that is, path polling is performed to screen out the first logic cell information file that matches the transistor type of the target logic cell.

[0071] Among them, the transistor type of the target logic unit can be an ultra low voltage threshold transistor (ulvt), a low voltage threshold transistor (lvt), a standard voltage threshold transistor (svt), or a high voltage threshold transistor (hvt).

[0072] It can be understood that screening out the first logic unit information file that matches the transistor type of the target logic unit includes: based on the path information of all logic unit information files included in the target logic unit library, obtaining the information contained in each logic unit information file, and determining that the logic unit information file whose transistor type in the information contained in the logic unit information file is consistent with the transistor type of the target logic unit is the first logic unit information file.

[0073] Step a22: Based on the performance indicator information of the target logical unit, a second logical unit information file that matches the performance indicator information of the target logical unit is screened out from the first logical unit information file.

[0074] Among them, after completing the screening of the first logical unit information file, the VT / PVT condition judgment module performs path polling, i.e., polls the first logical unit information file based on the path information of the first logical unit information file, and performs PVT condition judgment, i.e., based on the performance indicator information of the target logical unit, screens out a second logical unit information file that matches the performance indicator information of the target logical unit from the first logical unit information file.

[0075] It should be noted that the performance indicator information is PVT information.

[0076] Step a23: Based on the function type of the target logical unit, select a target logical unit information file that matches the function type of the target logical unit from the second logical unit information file.

[0077] The performance parameter information includes transistor type, performance index information and function type.

[0078] It should be noted that the functional type of the target logic unit is determined according to the type of logic gates included therein.

[0079] like Figure 5 As shown, after determining that the second logic unit information file has passed both VT and PVT determinations, the power consumption parameters of the target logic unit are obtained. Specifically, after determining the second logic unit information file, based on the function type of the target logic unit, each function type is compared with the function type in the second logic unit information file. If the comparison passes, the corresponding second logic unit information file is determined to be the target logic unit information file. If the comparison fails, the function type is compared with the next second logic unit information file until all second logic unit information files are compared or the target logic unit information file is determined.

[0080] It should be noted that the process of obtaining power consumption parameters of target logical units in multiple target logical unit sets can be executed in parallel or serially. Serial execution means that after determining the target logical unit information files and obtaining the corresponding power consumption parameters for all target logical units in one target logical unit set, the target logical unit information files and obtaining the corresponding power consumption parameters for all target logical units in the next target logical unit set are determined.

[0081] The power consumption parameter acquisition method provided in the embodiment of the present application gradually narrows the range of candidate logic unit information files through phased screening, and finally determines the information file that completely matches the target logic unit, thereby ensuring the accuracy of the target logic unit information file.

[0082] In some optional implementations, the above step S4043 includes:

[0083] Step b1, based on the standard format of the target logic unit library corresponding to the target logic unit set, extract the number of logic gates, static power consumption, capacitance value of each pin and edge flip power consumption value of each input pin of the target logic unit corresponding to the target logic unit information file from the target logic unit information file.

[0084] It is understandable that different target logic unit libraries store the power consumption parameters of the logic units in different ways. Therefore, the initial power consumption parameters of the target logic units are extracted from the target logic unit information file according to the standard format of the target logic unit library.

[0085] Figure 6 The flowchart of obtaining the power consumption parameters of the target logic unit from the target logic unit information file provided in the embodiment of the present application is as follows: Figure 6 As shown, the power consumption parameter storage order in the target logic unit information file according to the number of logic gates, static power consumption, capacitance value of each pin, and edge flip power consumption value of each input pin is described as an example.

[0086] After completing information processing and determining the target logic unit information file, the power consumption parameters of the target logic unit are extracted. The power consumption parameter extraction process is as follows: first, the number of logic gates is extracted. Polling begins at the beginning of the target logic unit information file and the logic gate count is determined. That is, the logic gate count is determined to determine whether the current polled position corresponds to the logic gate count. If the current polled position is the corresponding position, the logic gate count is obtained and the information is transferred to a specified data structure in a specified format. Polling is continued until all initial power consumption parameters are obtained. This logic gate count serves as basic data for calculating the number of gates included in the logic unit and the number of logic gates included in different logic unit modules.

[0087] If the current polling location is not the location corresponding to the number of logic gates, a static power consumption determination is performed. This determination determines whether the current polling location is the location corresponding to the static power consumption. If the current polling location is the location corresponding to the static power consumption, the static power consumption is obtained and the information is transferred to the specified data structure in the specified format. Polling is continued until all initial power consumption parameters are obtained. The static power consumption includes maximum, typical, and minimum values.

[0088] If the currently polled location is not the location corresponding to the static power consumption, a capacitance value determination is performed, i.e., determining whether the currently polled location is the location corresponding to the capacitance value. If the currently polled location is the location corresponding to the capacitance value, the capacitance value is obtained and the information is transferred to the specified data structure according to the specified format. Polling is continued until all initial power consumption parameters are obtained. The capacitance values ​​obtained here include the capacitance values ​​of each pin of the target logic unit, because different target logic units have different numbers of input pins and output pins.

[0089] If the currently polled position is not the position corresponding to the capacitance value, an edge flip judgment is performed to determine whether the currently polled position is the position corresponding to the edge flip power consumption value. If the currently polled position is the position corresponding to the edge flip power consumption value, the edge flip power consumption value is obtained and the information is transferred to the specified data structure according to the specified format. Polling is continued until all initial power consumption parameters are obtained. The edge flip power consumption values ​​obtained here include the edge flip power consumption values ​​of each input pin of the target logic unit on the rising and falling edges.

[0090] At this point, the acquisition of the initial power consumption parameters of the target logic unit is completed.

[0091] Step b2: Based on the capacitance values ​​of the respective pins of the target logic unit, summing the capacitance values ​​of the respective pins of the target logic unit to obtain the capacitance value of the target logic unit.

[0092] like Figure 6 As shown, after obtaining the initial power consumption parameters of the target logic unit, the initial power consumption parameters need to be processed before being written into the target text file.

[0093] The information processing of the initial power consumption parameters includes processing the capacitance value of each pin and the edge flip power consumption value of each input pin in the initial power consumption parameters to obtain processed data. The information processing of the initial power consumption parameters is specifically implemented based on steps b2 to b4.

[0094] The capacitance value of the target logic unit may be used as an input for calculating the dynamic power consumption value of the target logic unit.

[0095] Step b3: determining a calculation formula for the edge flip power consumption value of the target logic unit based on the capacitance value of each pin of the target logic unit.

[0096] Among them, the capacitance value of each pin of the target logic unit determines the digital parameter part of the edge-flip power consumption value of each input pin in the calculation formula of the edge-flip power consumption value of the target logic unit, thereby determining the calculation formula of the edge-flip power consumption value of the target logic unit.

[0097] Step b4: determining the edge flip power consumption value of the target logic unit based on the edge flip power consumption value of each input pin of the target logic unit and the calculation formula of the edge flip power consumption value of the target logic unit.

[0098] Substituting the edge flip power consumption value of each input pin of the target logic unit into the calculation formula of the edge flip power consumption value of the target logic unit, performing addition and subtraction processing on the data, the edge flip power consumption value of the target logic unit is obtained.

[0099] The power consumption parameters of the target logic unit include the number of logic gates, static power consumption, capacitance value and edge flip power consumption value of the target logic unit.

[0100] It can be understood that when determining the power consumption value of the target integrated circuit module, the power consumption parameters of each target logic unit are obtained from the target text file, and the power consumption value of the chip is calculated using the power consumption model. The power consumption value includes static power consumption value and dynamic power consumption value. The power consumption value is only related to the number of logic units, flip rate and operating frequency.

[0101] It should be noted that when saving the power consumption parameters to the target text file, the power consumption parameters can be converted into a data format that meets the requirements of the power consumption model and then saved to the target text file to capture data for the power consumption model.

[0102] The power consumption parameter acquisition method provided in the embodiment of the present application obtains the power consumption data of the target logic unit by extracting initial power consumption data from the target logic unit information file and processing the initial power consumption data. This ensures an accurate description of the power consumption characteristics of the target logic unit, provides accurate data support for subsequent calculation of the power consumption value of the chip, and shortens the time spent on calculating the power consumption value of the chip.

[0103] In some optional implementations, the above step S304 includes:

[0104] Step c1 : encrypting the power consumption parameter of each target logic unit in the target logic unit set to obtain the encrypted power consumption parameter of each target logic unit in the target logic unit set.

[0105] Step c2: compressing the encrypted power consumption parameters of all target logical units in the target logical unit set to obtain compressed power consumption parameters of all target logical units in the target logical unit set.

[0106] Step c3: Save the compressed power consumption parameters of the target logical unit set to a target text file.

[0107] The power consumption parameter acquisition method provided in the embodiments of the present application encrypts the power consumption parameters of each target logical unit, ensuring that the power consumption parameters of the target logical unit cannot be accessed or tampered with by unauthorized users during transmission or storage, thereby ensuring the data security of the power consumption parameters. By compressing the encrypted power consumption parameters of all target logical units, the storage space required for the target text file is reduced and the transmission efficiency of the power consumption parameters is improved.

[0108] In some optional implementations, the above power consumption parameter acquisition method further includes:

[0109] Step d1: when any target logical unit library is updated, determine the target logical unit set corresponding to the target logical unit library.

[0110] Step d2: Based on the updated target logic unit library, obtain updated power consumption parameters of each target logic unit in the target logic unit set corresponding to the target logic unit library.

[0111] Step d3: based on the updated power consumption parameters of each target logic unit in the target logic unit set corresponding to the target logic unit library, update the corresponding power consumption parameters in the target text file.

[0112] The power consumption parameter acquisition method provided in the embodiment of the present application detects whether the target logic unit library is updated. When the target logic unit library is updated, the corresponding power consumption parameters in the target text file are updated, thereby ensuring the accuracy of the power consumption parameters in the target text file.

[0113] In some optional implementations, the above power consumption parameter acquisition method further includes:

[0114] In step e1 , for any target logic unit, an integrity check is performed on the acquired power consumption parameters of the target logic unit.

[0115] The integrity check is to determine whether there is any missing data in the acquired power consumption parameters.

[0116] Step e2: If the power consumption parameter of the target logic unit fails the integrity check, the power consumption parameter of the target logic unit is reacquired from the target logic unit library corresponding to the target logic unit, and the process returns to the step of performing integrity check on the acquired power consumption parameter of the target logic unit.

[0117] In step e3, if the number of times the power consumption parameters of the target logic unit are re-acquired exceeds a preset threshold, and the power consumption parameters of the target logic unit still fail the integrity check, an alarm is issued. The preset threshold is set by the technician and is not specifically limited here.

[0118] It should be noted that if the power consumption parameter of the target logic unit passes the integrity check, the power consumption parameter of the target logic unit is saved to the target text file.

[0119] The power consumption parameter acquisition method provided in the embodiments of the present application can effectively determine whether there is any data missing from the power consumption parameters of the target logic unit through an integrity verification mechanism. This verification mechanism ensures that the power consumption parameters saved to the target text file have complete data content, avoiding subsequent design or analysis problems caused by missing data and ensuring that the power consumption value of the chip can be accurately calculated.

[0120] The embodiment of the present application provides a method for obtaining power consumption parameters, which is applied to a target platform. Figure 7 A flow chart of a method for obtaining power consumption parameters provided in an embodiment of the present application is shown in FIG. Figure 7 As shown, the process includes:

[0121] The first step is to determine a target logic cell library corresponding to each target logic cell based on performance parameter information of multiple target logic cells in the target integrated circuit module. The performance parameter information of the multiple target logic cells in the target integrated circuit module is stored in a basic data mark or text format for subsequent use.

[0122] In the second step, the VT / PVT condition judgment module performs VT judgment and PVT judgment on all logical unit information files included in the target logical unit library to obtain a second logical unit information file. Please refer to the description of the corresponding part above for details and will not be repeated here.

[0123] In the third step, after determining the second logic unit information file in the target logic unit library, the logic unit library unit information acquisition module of the target platform will determine the target logic unit information file from the second logic unit information file, and obtain and determine the power consumption parameters of the target logic unit from the target logic unit information file, namely the number of logic gates, static power consumption, capacitance value and edge flip power consumption value of the target logic unit.

[0124] It can be understood that the logic unit library unit information acquisition module is mainly used to achieve information calibration and data file alignment. Specifically, after determining the target logic unit information file, the module extracts the initial power consumption parameters of the target logic unit from the target logic unit information file, then processes the initial power consumption parameters to obtain power consumption parameters, and converts the power consumption parameters into data that meets the specified data format requirements and transfers them to the target text file. Among them, after completing the storage of the power consumption parameters of a target logic unit, the power consumption parameters of the next target logic unit are extracted and stored until the power consumption parameters of all target logic units are completed or the polling of all target logic unit libraries is completed.

[0125] The power consumption parameter acquisition method provided in the embodiment of the present application can extract information such as the number of logic gates, static power consumption, logic cell capacitance value, and edge flip power consumption value of different logic cells in different standard logic cell libraries provided by different manufacturers according to pre-defined data requirements, and output various types of data that meet the requirements according to specified rules based on the power consumption model data requirements, generate a database table of power consumption parameters of the target logic cell, and support the calculation of power consumption values ​​of logic cells in the power consumption model and the power consumption value calculation of chips based on this database table. Through path routing and polling of standard logic cell libraries, the database table of power consumption parameters of target logic cells in target logic cell libraries under different projects and different process steps is automatically generated, reducing the time and workload of obtaining power consumption parameters of target logic cells, greatly improving the accuracy and speed of the power consumption model in calculating the power consumption value of the chip, and making the early power consumption value assessment more accurate.

[0126] Through the description of the above implementation methods, those skilled in the art can clearly understand that the method according to the above embodiment can be implemented by means of software plus the necessary general hardware platform, and of course it can also be implemented by hardware, but in many cases the former is a better implementation method.

[0127] The embodiment of the present application also provides a power consumption parameter acquisition device, such as Figure 8 As shown, the power consumption parameter acquisition device includes:

[0128] The first acquisition module 801 is configured to acquire performance parameter information of multiple target logic units in a target integrated circuit module.

[0129] The determination module 802 is configured to determine a target logical unit library corresponding to the target logical unit based on the performance parameter information of the target logical unit.

[0130] The second acquisition module 803 is configured to group the same target logical units in the corresponding target logical unit library into a target logical unit set to obtain multiple target logical unit sets.

[0131] The saving module 804 is used to obtain the power consumption parameters of each target logic unit in any target logic unit set from the target logic unit library corresponding to the target logic unit set, and save the power consumption parameters to a target text file to determine the power consumption value of the target integrated circuit module based on the target text file.

[0132] In some optional implementations, the saving module 804 includes:

[0133] The first determining unit is configured to determine, based on a target logical unit library corresponding to the target logical unit set, a starting position of a logical unit information file of a target logical unit library corresponding to the target logical unit set.

[0134] The second determining unit is configured to determine, based on a start position of the logical unit information file of the target logical unit library, a target logical unit information file corresponding to each target logical unit in the target logical unit set from the target logical unit library corresponding to the target logical unit set.

[0135] The third determining unit is configured to determine the power consumption parameter of the target logic unit based on the target logic unit information file.

[0136] In some optional implementations, the second determining unit includes:

[0137] The fourth determining unit is configured to determine all logical unit information files included in the target logical unit library corresponding to the target logical unit set based on the starting position of the logical unit information file of the target logical unit library.

[0138] The first screening unit is configured to screen out, for any target logical unit in the target logical unit set, a target logical unit information file corresponding to the target logical unit from all logical unit information files included in a target logical unit library corresponding to the target logical unit set based on performance parameter information of the target logical unit.

[0139] In some optional embodiments, the first screening unit includes:

[0140] The second screening unit is configured to screen out a first logic unit information file that matches the transistor type of the target logic unit from all logic unit information files included in the target logic unit library corresponding to the target logic unit set based on the transistor type of the target logic unit.

[0141] The third screening unit is configured to screen out a second logical unit information file that matches the performance indicator information of the target logical unit from the first logical unit information file based on the performance indicator information of the target logical unit.

[0142] The fourth screening unit is configured to screen out a target logical unit information file that matches the function type of the target logical unit from the second logical unit information file based on the function type of the target logical unit.

[0143] The performance parameter information includes transistor type, performance index information and function type.

[0144] In some optional implementations, the third determining unit includes:

[0145] The extraction unit is used to extract the number of logic gates, static power consumption, capacitance value of each pin and edge flip power consumption value of each input pin of the target logic unit corresponding to the target logic unit information file from the target logic unit information file based on the standard format of the target logic unit library corresponding to the target logic unit set.

[0146] The first acquiring unit is configured to sum the capacitance values ​​of the respective pins of the target logic unit based on the capacitance values ​​of the respective pins of the target logic unit to obtain the capacitance value of the target logic unit.

[0147] The fifth determining unit is configured to determine a calculation formula for the edge flip power consumption value of the target logic unit based on the capacitance values ​​of the respective pins of the target logic unit.

[0148] The sixth determining unit is configured to determine the edge flip power consumption value of the target logic unit based on the edge flip power consumption values ​​of the input pins of the target logic unit and a calculation formula of the edge flip power consumption value of the target logic unit.

[0149] The power consumption parameters of the target logic unit include the number of logic gates, static power consumption, capacitance value and edge flip power consumption value of the target logic unit.

[0150] In some optional implementations, the saving module 804 includes:

[0151] The second acquiring unit is configured to encrypt the power consumption parameter of each target logic unit in the target logic unit set to obtain the encrypted power consumption parameter of each target logic unit in the target logic unit set.

[0152] The third acquiring unit is configured to compress the encrypted power consumption parameters of all target logical units in the target logical unit set to obtain the compressed power consumption parameters of all target logical units in the target logical unit set.

[0153] The saving unit is used to save the compressed power consumption parameters of the target logical unit set to a target text file.

[0154] In some optional implementations, the power consumption parameter acquisition device further includes:

[0155] The seventh determining unit is configured to determine a target logical unit set corresponding to any target logical unit library when the target logical unit library is updated.

[0156] The fourth acquiring unit is configured to acquire, based on the updated target logical unit library, an updated power consumption parameter of each target logical unit in the target logical unit set corresponding to the target logical unit library.

[0157] The updating unit is configured to update the corresponding power consumption parameter in the target text file based on the updated power consumption parameter of each target logic unit in the target logic unit set corresponding to the target logic unit library.

[0158] For the description of the features in the embodiment corresponding to the power consumption parameter acquisition device, please refer to the relevant description of the embodiment corresponding to the power consumption parameter acquisition method, and no further details will be given here.

[0159] The embodiment of the present application also provides an electronic device, such as Figure 9 As shown, it includes a processor 901 and a memory 902, wherein the memory 902 stores a computer program, and the processor 901 is configured to run the computer program to execute the steps in any of the above power consumption parameter acquisition method embodiments.

[0160] An embodiment of the present application further provides a computer-readable storage medium, in which a computer program is stored. The computer program is configured to execute the steps of any of the above-mentioned power consumption parameter acquisition method embodiments when running.

[0161] In an exemplary embodiment, the computer-readable storage medium may include, but is not limited to, various media that can store computer programs, such as a USB flash drive, a read-only memory (ROM), a random access memory (RAM), a mobile hard disk, a magnetic disk, or an optical disk.

[0162] An embodiment of the present application further provides a computer program product, which includes a computer program. When the computer program is executed by a processor, the steps in any of the above-mentioned power consumption parameter acquisition method embodiments are implemented.

[0163] An embodiment of the present application also provides another computer program product, including a non-volatile computer-readable storage medium, the non-volatile computer-readable storage medium storing a computer program, and when the computer program is executed by a processor, implementing the steps in any of the above-mentioned power consumption parameter acquisition method embodiments.

[0164] Professionals may further appreciate that the units and algorithm steps of each example described in conjunction with the embodiments disclosed herein can be implemented in electronic hardware, computer software, or a combination of the two. In order to clearly illustrate the interchangeability of hardware and software, the above description has generally described the components and steps of each example according to their functions. Whether these functions are performed in hardware or software depends on the specific application and design constraints of the technical solution. Professionals and technicians may use different methods to implement the described functions for each specific application, but such implementation should not be considered beyond the scope of this application.

[0165] The above is a detailed introduction to a power consumption parameter acquisition method, device, electronic device and storage medium provided by the present application. This article uses specific examples to illustrate the principles and implementation methods of the present application. The description of the above embodiments is only used to help understand the method of the present application and its core idea. It should be pointed out that for ordinary technicians in this technical field, without departing from the principles of the present application, several improvements and modifications can be made to the present application, and these improvements and modifications also fall within the scope of protection of the claims of the present application.

Claims

1. A method for obtaining power consumption parameters, characterized in that: include: Acquiring performance parameter information of a plurality of target logic units in a target integrated circuit module; Determining a target logical unit library corresponding to the target logical unit based on the performance parameter information of the target logical unit; Grouping the target logical units with the same corresponding target logical unit libraries into a target logical unit set to obtain multiple target logical unit sets; For any target logic unit set, the power consumption parameters of each target logic unit in the target logic unit set are obtained from the target logic unit library corresponding to the target logic unit set, and the power consumption parameters are saved to a target text file to determine the power consumption value of the target integrated circuit module based on the target text file.

2. The method according to claim 1, characterized in that The acquiring, from a target logic unit library corresponding to the target logic unit set, the power consumption parameter of each target logic unit in the target logic unit set includes: Determine, based on a target logical unit library corresponding to the target logical unit set, a starting position of a logical unit information file of the target logical unit library corresponding to the target logical unit set; Based on the starting position of the logical unit information file of the target logical unit library, determining the target logical unit information file corresponding to each target logical unit in the target logical unit set from the target logical unit library corresponding to the target logical unit set; Based on the target logic unit information file, a power consumption parameter of the target logic unit is determined.

3. The method according to claim 2, characterized in that The determining, based on the starting position of the logical unit information file of the target logical unit library, the target logical unit information file corresponding to each target logical unit in the target logical unit set from the target logical unit library corresponding to the target logical unit set includes: Determining all logical unit information files included in the target logical unit library corresponding to the target logical unit set based on the starting position of the logical unit information file of the target logical unit library; For any target logical unit in the target logical unit set, based on the performance parameter information of the target logical unit, the target logical unit information file corresponding to the target logical unit is screened out from all logical unit information files included in the target logical unit library corresponding to the target logical unit set.

4. The method according to claim 3, characterized in that The step of selecting the target logical unit information file corresponding to the target logical unit from all logical unit information files included in the target logical unit library corresponding to the target logical unit set based on the performance parameter information of the target logical unit includes: Based on the transistor type of the target logic cell, screening out a first logic cell information file that matches the transistor type of the target logic cell from all logic cell information files included in the target logic cell library corresponding to the target logic cell set; Based on the performance indicator information of the target logical unit, filtering out a second logical unit information file that matches the performance indicator information of the target logical unit from the first logical unit information file; Based on the function type of the target logical unit, filtering out a target logical unit information file that matches the function type of the target logical unit from the second logical unit information file; The performance parameter information includes transistor type, performance index information and function type.

5. The method according to claim 2, characterized in that The determining, based on the target logic unit information file, the power consumption parameter of the target logic unit includes: Extracting, from the target logic unit information file, the number of logic gates, static power consumption, capacitance value of each pin, and edge flip power consumption value of each input pin of the target logic unit corresponding to the target logic unit information file based on a standard format of the target logic unit library corresponding to the target logic unit set; Based on the capacitance values ​​of the respective pins of the target logic unit, summing the capacitance values ​​of the respective pins of the target logic unit to obtain the capacitance value of the target logic unit; Determining a calculation formula for an edge flip power consumption value of the target logic unit based on capacitance values ​​of respective pins of the target logic unit; Determining the edge flip power consumption value of the target logic unit based on the edge flip power consumption value of each input pin of the target logic unit and a calculation formula of the edge flip power consumption value of the target logic unit; The power consumption parameters of the target logic unit include the number of logic gates, static power consumption, capacitance value and edge flip power consumption value of the target logic unit.

6. The method according to claim 1, characterized in that Saving the power consumption parameters to a target text file includes: Encrypting the power consumption parameter of each target logic unit in the target logic unit set to obtain the encrypted power consumption parameter of each target logic unit in the target logic unit set; Compressing the encrypted power consumption parameters of all target logical units in the target logical unit set to obtain compressed power consumption parameters of all target logical units in the target logical unit set; The compressed power consumption parameters of the target logic unit set are saved to a target text file.

7. The method according to claim 1, characterized in that The method further comprises: When any target logical unit library is updated, determining a target logical unit set corresponding to the target logical unit library; Based on the updated target logic unit library, obtaining updated power consumption parameters of each target logic unit in the target logic unit set corresponding to the target logic unit library; Based on the updated power consumption parameter of each target logic unit in the target logic unit set corresponding to the target logic unit library, the corresponding power consumption parameter in the target text file is updated.

8. A power consumption parameter acquisition device, characterized in that: include: A first acquisition module is used to acquire performance parameter information of multiple target logic units in a target integrated circuit module; a determination module, configured to determine a target logical unit library corresponding to the target logical unit based on the performance parameter information of the target logical unit; A second acquisition module is used to group the same target logical units in the corresponding target logical unit library into a target logical unit set to obtain multiple target logical unit sets; A saving module is used to obtain, for any target logic unit set, the power consumption parameters of each target logic unit in the target logic unit set from the target logic unit library corresponding to the target logic unit set, and save the power consumption parameters to a target text file, so as to determine the power consumption value of the target integrated circuit module based on the target text file.

9. An electronic device, characterized in that: include: memory for storing computer programs; A processor, configured to implement the steps of the method for obtaining power consumption parameters according to any one of claims 1 to 7 when executing the computer program.

10. A computer-readable storage medium, characterized in that The computer-readable storage medium stores a computer program, wherein when the computer program is executed by a processor, the steps of the method for obtaining power consumption parameters according to any one of claims 1 to 7 are implemented.

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