Multi-layer circuit substrate high-fidelity monoclinic homogenization method and device, storage medium and electronic equipment

Abstract

The embodiment of the invention provides a multi-layer circuit substrate high-fidelity monoclinic homogenization method and device, a storage medium and electronic equipment, and relates to the technical field of microelectronics, and the method comprises the steps: carrying out the layering processing, pixelation processing and unitization processing of a circuit substrate structure model, and obtaining a monoclinic macroscopic unit of a cuboid structure; boundary conditions are applied to the monoclinic macroscopic unit to solve monoclinic homogenization equivalent material parameters, and the monoclinic homogenization equivalent material parameters comprise a stiffness matrix composed of a plurality of independent parameters and a thermal expansion coefficient matrix composed of a plurality of independent parameters; and replacing each monoclinic macroscopic unit in the circuit substrate structure model based on the monoclinic homogenization equivalent material parameters. According to the method, any anisotropy of structures such as a wiring layer and a via hole layer of the substrate on a wiring plane and symmetry in the layer in the thickness direction can be accurately described.

Description

Technical Field

[0001] The present application relates to the field of microelectronics technology, and more specifically, to a method, device, storage medium, and electronic device for high-fidelity monoclinic homogenization of a multi-layer circuit substrate. Background Art

[0002] Circuit substrates play a crucial role in electronic products, providing electrical interconnects, mechanical support, and chip protection. They are widely used in electronic assemblies and chip packaging. Their technical forms include traditional printed circuit boards (PCBs), ceramic substrates (such as HTCC and LTCC), organic packaging substrates (BT substrates), as well as newer silicon interposers (TSV interposers) and glass substrates (TGV substrates). The thermomechanical properties of substrates during manufacturing and use have a critical impact on the manufacturability and reliability of electronic products. Excessive warpage, for example, can lead to poor soldering during electronic product assembly, wafer / panel cracking and scrap during packaging manufacturing, and excessive stress / strain during product service, leading to delamination or solder joint fatigue failure. To ensure optimal thermomechanical performance of substrates, the finite element method (FEM) is primarily used during the design phase to simulate, evaluate, and optimize the thermomechanical performance of packaging. However, high-end circuit substrates feature high wiring density, large dimensions, and typical cross-scale structural characteristics, which pose significant challenges to their thermomechanical simulation. For example, the typical line width / spacing (L / S) of TSV adapter board wiring is ~1μm, and the length and width dimensions are >30mm, spanning four orders of magnitude. If traditional finite element simulation methods are used, the number of cells and nodes in the divided grid will be huge, making it unfeasible.

[0003] To address these simulation challenges, the homogenized reduced-order modeling method for materials has become a key engineering tool for addressing these cross-scale simulation challenges. This method divides the substrate into a series of microscopic representative volume elements (RVEs). Finite element simulation (see Chinese patent CN 115713059A, "Method and system for calculating equivalent performance parameters of wiring areas of integrated circuit products") or further machine learning-based rapid prediction (see conference paper M. Shevchuk et al., "Prediction of thermo-mechanical properties of PCB conductive layers using convolutional neural networks," EuroSimE, Graz, Austria: IEEE, April 2023, pp. 1–6) is used to obtain the homogenized constitutive material parameters of the RVEs. Based on the RVEs, a macroscopic model of the substrate is constructed, thereby significantly reducing the size of the substrate thermo-mechanical simulation model. However, current research usually uses an orthotropic equivalent material constitutive model for RVE, which cannot correctly reflect the anisotropic characteristics such as tension-shear coupling and thermal expansion-shear coupling brought about by the complex wiring structure of the substrate. Therefore, when these homogenization methods are applied to the thermomechanical simulation of the substrate, their fidelity is low, which seriously affects the application effect of the homogenization reduced-order modeling method in the thermomechanical simulation of circuit substrates. Summary of the Invention

[0004] The embodiments of the present application provide a high-fidelity monoclinic homogenization method, device, storage medium and electronic device for a multi-layer circuit substrate to solve the technical problems existing in the prior art. The method can accurately describe the arbitrary anisotropy of structures such as the substrate wiring layer and the via layer in the wiring plane, as well as the symmetry within the layer in the thickness direction.

[0005] Other features and advantages of the present application will become apparent from the following detailed description, or may be learned in part by practice of the present application.

[0006] According to a first aspect of an embodiment of the present application, a method for high-fidelity monoclinic homogenization of a multilayer circuit substrate is provided, comprising:

[0007] The circuit substrate structure model is subjected to layering, pixelation and unitization processing to obtain a monoclinic macro unit with a rectangular parallelepiped structure;

[0008] Applying boundary conditions to the monoclinic macro-element to solve the monoclinic homogenized equivalent material parameters, wherein the monoclinic homogenized equivalent material parameters include a stiffness matrix composed of multiple independent parameters and a thermal expansion coefficient matrix composed of multiple independent parameters;

[0009] Each monoclinic macro unit in the circuit substrate structure model is replaced based on the monoclinic homogenized equivalent material parameters.

[0010] In some embodiments of the present application, based on the above solution, the process of performing layered processing includes:

[0011] The circuit substrate structure model is virtually cut and layered in the thickness direction, and the cut layers are ensured to have uniform material in the thickness direction.

[0012] In some embodiments of the present application, based on the above-mentioned solution, the process of performing pixelation processing includes:

[0013] Each layer obtained after the layering process is pixelated according to the pattern formed by different materials;

[0014] Binary encoding is performed for each pixel according to the substrate material corresponding to the layer where the pixel is located, where 0 represents the conductor material in the substrate and 1 represents the dielectric material in the substrate.

[0015] In some embodiments of the present application, based on the above scheme, the process of unitization includes:

[0016] Each pixelated layer is divided into cuboids of the same size, which are referred to as monoclinic macro units.

[0017] In some embodiments of the present application, based on the above solution, applying boundary conditions to the monoclinic macro-unit to solve the monoclinic homogenization equivalent material parameters includes:

[0018] Divide the FEM grid by the monoclinic macro unit according to the xy plane pixels;

[0019] Apply one periodic boundary condition constraint on the six faces of the monoclinic macro unit, and apply displacement boundary conditions separately six times;

[0020] The FEM solution of the monoclinic macro unit with 7-order boundary conditions is performed, and the solution results are numbered 1 to 7;

[0021] The arithmetic mean stress [σ x , σ y , σ z , τ xy , τ xz , τ yz ] T and the arithmetic mean strain [ε x , ε y , ε z , γ xy , γ xz , γ yz ]T ;

[0022] The six groups of arithmetic mean stresses [σ x , σ y , σ z , τ xy , τ xz , τ yz ] T and the arithmetic mean strain [ε x , ε y , ε z , γ xy , γ xz , γ yz ] T , calculate the equivalent stiffness matrix of the monoclinic macroelement;

[0023] The arithmetic mean strain [ε x , ε y , ε z , γ xy , γ xz , γ yz ] T ;

[0024] The arithmetic mean strain [ε x , ε y , ε z , γ xy , γ xz , γ yz ] T , calculate the equivalent thermal expansion coefficient matrix of the monoclinic macroelement.

[0025] In some embodiments of the present application, based on the above solution, the six groups of arithmetic mean stresses [σ x , σ y , σ z , τ xy , τ xz , τ yz ] T and the arithmetic mean strain [ε x , ε y , ε z , γ xy , γ xz , γ yz ] T , calculate the equivalent stiffness matrix of the monoclinic macroelement, including:

[0026] Get the arithmetic mean stress of 6 groups [σ x , σ y , σ z, τ xy , τ xz , τ yz ] T and the arithmetic mean strain [ε x , ε y , ε z , γ xy , γ xz , γ yz ] T , calculated based on the following formula:

[0027]

[0028] According to the construction of stiffness matrix The elements in are set to zero to obtain the equivalent stiffness matrix C of the monoclinic macro element. eff .

[0029] In some embodiments of the present application, based on the above solution, the average strain [ε x , ε y , ε z , γ xy , γ xz , γ yz ] T , calculate the equivalent thermal expansion coefficient matrix of the monoclinic macro unit, including:

[0030] Get the arithmetic mean strain [ε x , ε y , ε z , γ xy , γ xz , γ yz ] T , calculated based on the following formula:

[0031]

[0032] According to the construction of the thermal expansion coefficient matrix The elements in are set to zero to obtain the equivalent thermal expansion coefficient matrix CTE of the monoclinic macro unit. eff .

[0033] In some embodiments of the present application, based on the above scheme, the displacement boundary condition is applied separately six times, including:

[0034] Uniaxial tensile displacements are applied to the monoclinic macro unit in the x, y, and z directions, and shear displacements are applied to the monoclinic macro unit in the xy, xz, and yz directions, respectively; and a uniform temperature field is applied separately, with a temperature rise of Δt.

[0035] In some embodiments of the present application, based on the aforementioned solution, replacing each monoclinic macro unit in the circuit substrate structure model based on the monoclinic homogenized equivalent material parameters includes:

[0036] Each monoclinic macro unit in the circuit substrate structure model is replaced by a rectangular parallelepiped equivalent monoclinic homogeneous material of the same shape, and each rectangular parallelepiped equivalent monoclinic homogeneous material is used as a FEM finite element unit in the substrate model;

[0037] The equivalent stiffness matrix of the monoclinic macro unit is set as the linear elastic constitutive model parameters of the FEM finite element unit, and the equivalent thermal expansion coefficient matrix of the monoclinic macro unit is set as the linear thermal expansion coefficient of the FEM finite element unit.

[0038] According to a second aspect of an embodiment of the present application, a high-fidelity monoclinic homogenization device for a multi-layer circuit substrate is provided, comprising:

[0039] a processing unit for performing layering, pixelation, and unitization processing on the circuit substrate structure model to obtain a monoclinic macro unit with a rectangular parallelepiped structure;

[0040] A calculation unit, used to apply boundary conditions to the monoclinic macro unit to solve the monoclinic homogenization equivalent material parameters;

[0041] A replacement unit is used to replace each monoclinic macro unit in the circuit substrate structure model based on the monoclinic homogenized equivalent material parameters.

[0042] According to a third aspect of an embodiment of the present application, a computer-readable storage medium is provided, wherein the storage medium stores computer instructions. When the computer instructions are executed on a computer, the computer executes the method according to the first aspect.

[0043] According to a fourth aspect of the embodiments of the present application, there is provided an electronic device, including: a memory and a processor;

[0044] The memory is used to store computer instructions;

[0045] The processor is configured to call the computer instructions stored in the memory so that the electronic device executes the method according to the first aspect.

[0046] Compared with the prior art, the technical solution of this application has the following beneficial effects:

[0047] 1) By layering, pixelating, and unitizing the circuit substrate structure, and characterizing the thermomechanical properties of the divided units using monoclinic homogenized equivalent material parameters, the fidelity of the substrate thermomechanical simulation is significantly improved;

[0048] 2) Monoclinic homogenized equivalent stiffness matrix (C eff ) and the equivalent thermal expansion coefficient matrix (CTE eff ) is a simple and efficient calculation method, and the extracted stiffness matrix conforms to the strict form required by monoclinic anisotropy;

[0049] 3) The order reduction effect of substrate thermomechanical modeling is significant, and the number of FEM units is reduced to 1 / n compared with the traditional pixel-by-pixel modeling method 2 , with a reduction of 2 to 4 orders of magnitude. It has the advantages of high fidelity and high efficiency, and has good application prospects in the simulation of thermal mechanical properties of complex electronic components and advanced packaging.

[0050] 4) A complete method and implementation process for the monoclinic homogenization of circuit substrate structures are provided, and a computer software system adapted thereto is designed, which provides clear guidance for the engineering implementation of the method of the present invention.

[0051] It should be understood that the foregoing general description and the following detailed description are exemplary and explanatory only and are not restrictive of the present application. BRIEF DESCRIPTION OF THE DRAWINGS

[0052] The accompanying drawings are incorporated into and constitute a part of the specification, illustrating embodiments consistent with the present application and, together with the specification, explaining the principles of the present application. Obviously, the drawings described below are only some embodiments of the present application, and those skilled in the art can derive other drawings based on these drawings without inventive effort. In the drawings:

[0053] Figure 1 A schematic flow chart of a method for high-fidelity monoclinic homogenization of a multi-layer circuit substrate according to one embodiment of the present application is shown;

[0054] Figure 2 A schematic diagram showing a layered process of a circuit substrate structure according to an embodiment of the present application is shown;

[0055] Figure 3 A schematic diagram of pixelation and unitization processing according to one embodiment of the present application is shown;

[0056] Figure 4 A schematic diagram of thermomechanical reduced-order modeling of a circuit substrate according to one embodiment of the present application is shown;

[0057] Figure 5 A schematic diagram of pixel-by-pixel modeling simulation results of a substrate (Z-direction displacement cloud diagram) according to one embodiment of the present application is shown;

[0058] Figure 6 A schematic diagram of thermal deformation simulation using a reduced-order modeling method using a monoclinic homogenization method according to one embodiment of the present application (displacement cloud diagram in the Z direction) is shown;

[0059] Figure 7 A schematic diagram of thermal deformation simulation (Z-direction displacement cloud diagram) using the orthogonal homogenization method for reduced-order modeling according to one embodiment of the present application is shown;

[0060] Figure 8 A block diagram of a high-fidelity monoclinic homogenization device for a multi-layer circuit substrate according to one embodiment of the present application is shown;

[0061] Figure 9 A block diagram of an electronic device according to an embodiment of the present application is shown;

[0062] Figure 10 A schematic diagram of the structure of a computer system suitable for implementing an electronic device according to an embodiment of the present application is shown.

[0063] Description of Reference Numerals

[0064] 1-circuit substrate; 2-dielectric material; 3-conductor material; L1-L5-wiring layers; V1-V4-via layers; 201-virtual cutting layer; 202-unitized layer; 203-pixelated layer; 301-FEM finite element unit. DETAILED DESCRIPTION

[0065] Example embodiments will now be described more fully with reference to the accompanying drawings. However, example embodiments can be implemented in many forms and should not be construed as limited to the examples set forth herein; rather, these embodiments are provided so that this application will be thorough and complete and will fully convey the concepts of the example embodiments to those skilled in the art.

[0066] In addition, described feature, structure or characteristic can be combined in one or more embodiments in any suitable manner.In the following description, many specific details are provided so as to provide a full understanding of the embodiments of the present application. However, it will be appreciated by those skilled in the art that the technical scheme of the present application can be put into practice without one or more of the specific details, or other methods, components, devices, steps etc. can be adopted. In other cases, known methods, devices, implementations or operations are not shown or described in detail to avoid blurring the various aspects of the application.

[0067] The block diagrams shown in the accompanying drawings are merely functional entities and do not necessarily correspond to physically separate entities. That is, these functional entities may be implemented in software, in one or more hardware modules or integrated circuits, or in different networks and / or processor devices and / or microcontroller devices.

[0068] The flowcharts shown in the accompanying drawings are for illustrative purposes only and do not necessarily include all contents and operations / steps, nor must they be executed in the order described. For example, some operations / steps may be decomposed, while others may be combined or partially combined. Therefore, the actual execution order may vary depending on the actual situation.

[0069] To make the objectives, technical solutions, and advantages of the present invention more clear, the technical solutions in the embodiments of the present invention will be clearly and completely described below in conjunction with the accompanying drawings in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without making creative efforts shall fall within the scope of protection of the present invention.

[0070] The following will describe some embodiments of the present application in detail with reference to the accompanying drawings. In the absence of conflict, the following embodiments and features therein may be combined with each other.

[0071] See also Figure 1 , shows a flow chart of a high-fidelity monoclinic homogenization method for a multi-layer circuit substrate according to an embodiment of the present application.

[0072] like Figure 1 As shown, a high-fidelity monoclinic homogenization method for a multi-layer circuit substrate is presented, which specifically includes steps S100 to S300.

[0073] It should be noted that before starting this method, it is necessary to assume that the xy coordinate axes of the Cartesian coordinate system O-xyz are parallel to the sides of the rectangular circuit substrate, and the thickness direction is set to z. Based on this coordinate system, this method is described as follows:

[0074] refer to Figure 1 In step S100 , the circuit substrate structure model is subjected to layering, pixelation and unitization processing to obtain a monoclinic macro unit with a rectangular parallelepiped structure.

[0075] It should be noted that, in this embodiment, the monoclinic macro unit is characterized by monoclinic homogenized equivalent material parameters, which include the stiffness matrix C of 13 independent parameters. eff and the coefficient of thermal expansion matrix CTE of 4 independent parameters eff , the specific structure is as follows (subscripts 1, 2, and 3 represent the x, y, and z directions respectively):

[0076]

[0077] Or in Voigt notation:

[0078]

[0079] In some feasible embodiments, based on the above solution, the process of performing layered processing includes:

[0080] The circuit substrate structure model is virtually cut and layered in the thickness direction, and the material of the layers obtained by cutting is uniform in the thickness direction.

[0081] In some feasible embodiments, based on the above solution, the process of performing pixelation processing includes:

[0082] Each layer obtained after the layering process is pixelated according to the pattern formed by different materials;

[0083] Binary encoding is performed for each pixel according to the substrate material corresponding to the layer where the pixel is located, where 0 represents the conductor material in the substrate and 1 represents the dielectric material in the substrate.

[0084] It should be noted that, in this embodiment, the size p of a single pixel is 1 / k times the minimum characteristic size c of the substrate, where k is 2-10.

[0085] In some feasible embodiments, based on the above solution, the process of unitization includes:

[0086] Each pixelated layer is divided into cuboids of the same size, which are referred to as monoclinic macro units.

[0087] It should be noted that, in this embodiment, the monoclinic macro unit includes n×n pixels in the xy plane, the z direction is the thickness of the monoclinic macro unit, and n ranges from 10 to 200.

[0088] Continue to refer Figure 1 , step S200, applying boundary conditions to the monoclinic macro unit to solve the monoclinic homogenization equivalent material parameters.

[0089] In some feasible embodiments, based on the above solution, applying boundary conditions to the monoclinic macro-unit to solve the monoclinic homogenized equivalent material parameters includes:

[0090] Divide the FEM grid by the monoclinic macro unit according to the xy plane pixels;

[0091] Apply one periodic boundary condition constraint on the six faces of the monoclinic macro unit, and apply displacement boundary conditions separately six times;

[0092] The FEM solution of the monoclinic macro unit with 7-order boundary conditions is performed, and the solution results are numbered 1 to 7;

[0093] In solution results 1 to 6, the arithmetic mean stress and arithmetic mean strain of the grid corresponding to the monoclinic macro unit are extracted respectively;

[0094] Calculate the equivalent stiffness matrix of the monoclinic macroelement based on the calculated arithmetic mean stress and arithmetic mean strain;

[0095] Extract the average strain of the grid corresponding to the monoclinic macroelement in solution 7;

[0096] The equivalent thermal expansion coefficient matrix of the monoclinic macroelement is calculated based on the calculated average strain.

[0097] In some feasible embodiments, based on the above solution, the six groups of arithmetic mean stresses [σ x , σ y , σ z , τ xy , τ xz , τ yz ] T and the arithmetic mean strain [ε x , ε y , ε z , γ xy , γ xz , γ yz ] T , calculate the equivalent stiffness matrix of the monoclinic macroelement, including:

[0098] Get the arithmetic mean stress of 6 groups [σ x , σ y , σ z , τ xy , τ xz , τ yz ] T and the arithmetic mean strain [ε x , ε y , ε z , γ xy , γ xz , γ yz ] T , calculated based on the following formula:

[0099]

[0100] According to the construction of stiffness matrix The elements in are set to zero to obtain the equivalent stiffness matrix C of the monoclinic macro element. eff .

[0101] In some feasible embodiments, based on the above solution, the average strain [ε x , ε y , ε z , γ xy , γ xz, γ yz ] T , calculate the equivalent thermal expansion coefficient matrix of the monoclinic macro unit, including:

[0102] Get the arithmetic mean strain [ε x , ε y , ε z , γ xy , γ xz , γ yz ] T , calculated based on the following formula:

[0103]

[0104] According to the construction of the thermal expansion coefficient matrix The elements in are set to zero to obtain the equivalent thermal expansion coefficient matrix CTE of the monoclinic macro unit. eff .

[0105] In some feasible embodiments, based on the above scheme, the displacement boundary condition is applied separately six times, including:

[0106] Uniaxial tensile displacements are applied to the monoclinic macro unit in the x, y, and z directions, and shear displacements are applied to the monoclinic macro unit in the xy, xz, and yz directions, respectively; and a uniform temperature field is applied separately, with a temperature rise of Δt.

[0107] Exemplarily, the specific process of step S200 is as follows:

[0108] ① Divide the FEM grid based on the xy plane pixels of the monoclinic macro unit. The number of xy plane grids is n×n, and the number of z direction grids is q, q ≥ 1. The total number of monoclinic macro unit grids is n×n×q;

[0109] ② Apply one periodic boundary condition constraint to the six faces of the monoclinic macro unit, and apply the following displacement boundary conditions separately six times, including: applying uniaxial tensile displacement in the x, y, and z directions, and applying shear displacement in the xy, xz, and yz directions; and then apply a uniform temperature field with a temperature rise of Δt.

[0110] ③ Perform FEM solutions on the seven groups of monoclinic macroscopic elements with applied boundary conditions, and the solution results are numbered 1 to 7 respectively;

[0111] ④ In the solution results 1 to 6, the arithmetic mean stress [σ x , σ y , σ z , τ xy , τ xz , τyz ] T and the arithmetic mean strain [ε x , ε y , ε z , γ xy , γ xz , γ yz ] T The six solution results give a total of six sets of average stress and average strain;

[0112] ⑤ Calculate the equivalent stiffness matrix C of the monoclinic macro element eff , the calculation formula is (the superscript is the number of the above solution):

[0113]

[0114] Comparing the matrix elements marked as zero in equation (1), The corresponding elements in are set to zero to obtain the final monoclinic macroelement equivalent stiffness matrix C eff .

[0115] ⑥ Extract the average strain [ε] of the grid (n×n in total) corresponding to the monoclinic macro unit in solution 7 x , ε y , ε z , γ xy , γ xz , γ yz ] T ;

[0116] ⑦ Calculate the equivalent anisotropic thermal expansion coefficient CTE of the monoclinic macro unit eff , the calculation formula is:

[0117]

[0118] Comparing the matrix elements marked as zero in equation (2), Set the corresponding elements in zero to obtain the final monoclinic macro unit equivalent thermal expansion coefficient matrix CTE eff .

[0119] Continue to refer Figure 1 , step S300, replacing each monoclinic macro unit in the circuit substrate structure model based on the monoclinic homogenized equivalent material parameters.

[0120] In some feasible embodiments, based on the above solution, replacing each monoclinic macro unit in the circuit substrate structure model based on the monoclinic homogenized equivalent material parameters includes:

[0121] Each monoclinic macro unit in the circuit substrate structure model is replaced by a rectangular parallelepiped equivalent monoclinic homogeneous material of the same shape, and each rectangular parallelepiped equivalent monoclinic homogeneous material is used as a FEM finite element unit in the substrate model;

[0122] The equivalent stiffness matrix of the monoclinic macro unit is set as the linear elastic constitutive model parameters of the FEM finite element unit, and the equivalent thermal expansion coefficient matrix of the monoclinic macro unit is set as the linear thermal expansion coefficient of the FEM finite element unit.

[0123] It should be noted that the substrate model obtained after replacement based on this step can be further used to carry out thermomechanical simulation of electronic products containing the substrate to obtain the response of the product under external stress, strain, and thermal field conditions.

[0124] Below, a specific example of this method is provided.

[0125] Assume that the xy coordinate axes of the Cartesian coordinate system O-xyz are parallel to the sides of the rectangular circuit substrate, and the thickness direction is z.

[0126] (1) Preprocessing of circuit substrate structure model.

[0127] Before starting preprocessing, prepare the circuit design data files (such as Gerber, GDS and other file formats), including the layout of the wiring, vias and other structures of each layer of the circuit substrate, such as Figure 2 shown.

[0128] Preprocessing includes three parts: layer processing, pixel processing, and unit processing.

[0129] First, the above-mentioned layering process is performed to virtually cut and layer the circuit substrate structure in the thickness direction. Figure 2 The substrate shown has 5 layers of wiring and 4 layers of vias. Through virtual cutting, 9 layers (L1 to L5 and V1 to V4) are obtained. All layers meet the requirement that the material of the layers obtained by cutting is uniform in the z direction.

[0130] Then, the pixelation process is performed to transform the pattern formed by each layer according to the different materials obtained by the layering process into pixels. Figure 3 In the example of , the virtual cutting layer (201) is a wiring layer of the substrate, which is composed of a wiring conductor material (3) and a dielectric material (2) between the wirings. Figure 3 The two materials are represented by dark and light pixels respectively. The minimum feature size of the substrate is the minimum wiring width c = 20μm, so the size of a single pixel is set to p = c × 1 / k = 20 × 1 / 5 = 4μm, where k is 5. Figure 3In the pixelation layer (203), each pixel is binary-coded, and the conductor material is assigned a code of 0, and the dielectric material is assigned a code of 1. Exchanging the codes of the conductor and dielectric materials does not affect the final result.

[0131] Finally, the unitization process is performed to divide each layer of graphics obtained by the pixelization process into monoclinic macroscopic units of rectangular parallelepipeds of the same size, such as Figure 3 As shown, the unitized layer (202) in this example includes 5×5 monoclinic macro units, and each monoclinic macro unit includes 64×64 pixels.

[0132] (2) Calculation of monoclinic homogenization equivalent material parameters.

[0133] In this example, the sub-steps for calculating the monoclinic homogenized equivalent material parameters are:

[0134] ① The monoclinic macrocell is divided into FEM grids based on the xy plane pixels. The xy plane grid number is 64×64, and the z direction grid number is 1. Therefore, the total number of grids per monoclinic macrocell is 64×64×1=4096. In addition, the elastic modulus of the material (copper conductor) of code 0 is set to 120 GPa, the Poisson's ratio is 0.33, and the thermal expansion coefficient is 17×10 -6 / ℃; the elastic modulus of the material (insulating medium) of code 1 is set to 6.0GPa, Poisson's ratio is 0.25, and thermal expansion coefficient is 35×10 -6 / ℃. And assign the above material parameters to the corresponding grid according to the material code of the pixel.

[0135] ② Apply periodic boundary conditions to the six faces of the monoclinic macro unit and apply the following displacement boundary conditions six times: uniaxial tensile displacement in the x, y, and z directions, and shear displacement in the xy, xz, and yz directions; and then apply a uniform temperature field with a temperature rise of Δt.

[0136] ③ The 7 groups of models with boundary conditions are solved by FEM separately, and the solution results are numbered 1 to 7 respectively;

[0137] ④ In the solution results 1 to 6, the arithmetic mean stress [σ x , σ y , σ z , τ xy , τ xz , τ yz ] T and the arithmetic mean strain [ε x , ε y , ε z , γ xy , γ xz , γyz ] T The six solution results give a total of six sets of average stress and average strain;

[0138] ⑤ Calculate the equivalent stiffness matrix C of the macro unit eff The calculation process of a typical monoclinic macro unit is as follows:

[0139]

[0140] Comparing the matrix elements marked as zero in equation (1), The corresponding elements in are set to zero to obtain the final monoclinic macroelement equivalent stiffness matrix:

[0141]

[0142] ⑦ Calculate the equivalent anisotropic thermal expansion coefficient CTE of the macro unit eff (Coefficient of Thermal Expansion, CTE), the calculation results of a typical macro unit are as follows:

[0143]

[0144] Comparing the matrix elements marked as zero in equation (2), The corresponding elements in are set to zero to obtain the final monoclinic macro-element equivalent thermal expansion coefficient matrix (expressed in Voigt notation):

[0145]

[0146] (3) Thermomechanical modeling of circuit substrate

[0147] The circuit substrate thermomechanical modeling is to replace each monoclinic macro unit in the substrate structure with a rectangular equivalent monoclinic homogeneous material of the same shape, and use each rectangular equivalent monoclinic homogeneous material as a FEM finite element unit in the substrate model. Figure 4 , a monoclinic macro unit located in layer L5 is replaced by a rectangular homogeneous material in the shape of a phase diagram and serves as a FEM finite element unit (301) of the substrate layer L5. The linear elastic constitutive model parameters of the FEM finite element unit are set to the equivalent stiffness matrix C calculated by the corresponding monoclinic macro unit eff , the linear thermal expansion coefficient is set to the equivalent thermal expansion coefficient matrix CTE calculated for the corresponding monoclinic macro unit eff .

[0148] In this example, based on the monoclinic homogenized reduced-order model of the circuit substrate constructed in this step, the thermal deformation of the circuit substrate is simulated by applying a uniform temperature field of 100°C. Figure 6As shown in the figure, a Z-direction displacement simulation cloud diagram is given. In addition, in order to compare the fidelity of the thermomechanical simulation of the method of the present invention, the pixel-by-pixel modeling of the substrate ( Figure 5 ) and orthogonal homogenization method for reduced-order modeling ( Figure 7 ) simulation results.

[0149] pass Figure 5-Figure 7 As can be seen, the monoclinic homogenization method of the present invention has extremely high fidelity compared to the reference method of pixel-by-pixel modeling (non-reduced-order model, considered as the reference gold standard), and the maximum warp point Z-direction displacement value differs by only 3.4%. Compared with the 24.4% difference of the orthogonal homogenization method studied previously, the simulation accuracy is improved exponentially. At the same time, the number of substrate model units constructed by the monoclinic homogenization method of the present invention is only 1 / 4096 of that of pixel-by-pixel modeling, while maintaining simulation accuracy while reducing simulation time by orders of magnitude, reflecting excellent performance.

[0150] The following describes an apparatus embodiment of the present application, which can be used to perform a high-fidelity monoclinic homogenization method for a multilayer circuit substrate described in the above-mentioned embodiment of the present application. For details not disclosed in the apparatus embodiment of the present application, please refer to the above-mentioned method embodiment of the present application.

[0151] Reference Figure 8 As shown, a high-fidelity monoclinic homogenization device 800 for a multi-layer circuit substrate according to one embodiment of the present application includes:

[0152] The processing unit 801 is used to perform layering, pixelation, and unitization processing on the circuit substrate structure model to obtain a monoclinic macro unit with a rectangular parallelepiped structure;

[0153] A calculation unit 802 is used to apply boundary conditions to the monoclinic macro unit to solve the monoclinic homogenization equivalent material parameters;

[0154] The replacing unit 803 is configured to replace each monoclinic macro unit in the circuit substrate structure model based on the monoclinic homogenized equivalent material parameters.

[0155] like Figure 9 As shown, an embodiment of the present application further provides an electronic device 900, comprising a memory 910, a processor 920, and a computer program 911 stored in the memory 910 and executable on the processor. When the processor 920 executes the computer program 911, the steps of the above-mentioned method for high-fidelity monoclinic homogenization of a multi-layer circuit substrate are implemented.

[0156] Since the electronic device introduced in this embodiment is a device used to implement a high-fidelity monoclinic homogenization device for a multi-layer circuit substrate in the embodiment of this application, based on the method introduced in the embodiment of this application, those skilled in the art can understand the specific implementation of the electronic device of this embodiment and its various variations. Therefore, how the electronic device implements the method in the embodiment of this application will not be described in detail here. As long as the equipment used by those skilled in the art to implement the method in the embodiment of this application falls within the scope of protection to be provided by this application.

[0157] During the specific implementation process, when the computer program 911 is executed by the processor, any implementation method of the embodiments corresponding to the first aspect can be implemented.

[0158] Figure 10 A schematic diagram of the structure of a computer system suitable for implementing an electronic device according to an embodiment of the present application is shown.

[0159] It should be noted that Figure 10 The computer system 1000 of the electronic device shown is only an example and should not bring any limitation to the functions and scope of use of the embodiments of the present application.

[0160] like Figure 10 As shown, the computer system 1000 includes a central processing unit (CPU) 1001, which can perform various appropriate actions and processes according to the program stored in the read-only memory (ROM) 1002 or the program loaded from the storage part 1008 into the random access memory (RAM) 1003, such as executing the method described in the above embodiment. Various programs and data required for system operation are also stored in the RAM 1003. The CPU 1001, ROM 1002 and RAM 1003 are connected to each other via a bus 1004. An input / output (I / O) interface 1005 is also connected to the bus 1004.

[0161] The following components are connected to the I / O interface 1005: an input section 1006 including a keyboard, a mouse, and the like; an output section 1007 including devices such as a cathode ray tube (CRT), a liquid crystal display (LCD), and a speaker; a storage section 1008 including a hard disk and the like; and a communication section 1009 including a network interface card such as a LAN (Local Area Network) card or a modem. The communication section 1009 performs communication processing via a network such as the Internet. A drive 1010 is also connected to the I / O interface 1005 as needed. Removable media 1011, such as a magnetic disk, an optical disk, a magneto-optical disk, or a semiconductor memory, is installed in the drive 1010 as needed, so that computer programs read therefrom can be installed into the storage section 1008 as needed.

[0162] In particular, according to an embodiment of the present application, the process described above with reference to the flowchart can be implemented as a computer software program. For example, an embodiment of the present application includes a computer program product, which includes a computer program carried on a computer-readable medium, and the computer program includes program code for executing the method shown in the flowchart. In such an embodiment, the computer program can be downloaded and installed from a network via the communication section 1009, and / or installed from a removable medium 1011. When the computer program is executed by the central processing unit (CPU) 1001, the various functions defined in the system of the present application are executed.

[0163] It should be noted that the computer-readable medium shown in the embodiments of the present application can be a computer-readable signal medium or a computer-readable storage medium or any combination of the above two. The computer-readable storage medium can be, for example, but not limited to, an electrical, magnetic, optical, electromagnetic, infrared, or semiconductor system, device or device, or any combination of the above. More specific examples of computer-readable storage media can include, but are not limited to: an electrical connection with one or more wires, a portable computer disk, a hard disk, a random access memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM), a flash memory, an optical fiber, a portable compact disk read-only memory (CD-ROM), an optical storage device, a magnetic storage device, or any suitable combination of the above. In the present application, a computer-readable storage medium can be any tangible medium containing or storing a program that can be used by or in combination with an instruction execution system, device or device. In the present application, a computer-readable signal medium can include a data signal propagated in baseband or as part of a carrier wave, which carries a computer-readable program code. Such propagated data signals may take various forms, including but not limited to electromagnetic signals, optical signals, or any suitable combination thereof. A computer-readable signal medium may also be any computer-readable medium other than a computer-readable storage medium that can transmit, propagate, or transport a program for use by or in connection with an instruction execution system, apparatus, or device. Program code embodied on a computer-readable medium may be transmitted using any suitable medium, including but not limited to wireless, wired, or any suitable combination thereof.

[0164] The flowcharts and block diagrams in the accompanying drawings illustrate the possible implementation architecture, functions and operations of the systems, methods and computer program products according to various embodiments of the present application. Among them, each box in the flowchart or block diagram can represent a module, program segment, or part of the code, and the above-mentioned module, program segment, or part of the code contains one or more executable instructions for implementing the specified logical function. It should also be noted that in some alternative implementations, the functions marked in the box can also occur in an order different from that marked in the accompanying drawings. For example, two boxes represented in succession can actually be executed substantially in parallel, and they can sometimes be executed in the opposite order, depending on the functions involved. It should also be noted that each box in the block diagram or flowchart, and the combination of boxes in the block diagram or flowchart, can be implemented with a dedicated hardware-based system that performs the specified function or operation, or can be implemented with a combination of dedicated hardware and computer instructions.

[0165] The units involved in the embodiments described in this application may be implemented by software or hardware, and the units described may also be set in a processor. In some cases, the names of these units do not constitute limitations on the units themselves.

[0166] As another aspect, the present application further provides a computer program product or computer program, comprising computer instructions stored in a computer-readable storage medium. A processor of a computer device reads the computer instructions from the computer-readable storage medium and executes the computer instructions, causing the computer device to perform the high-fidelity monoclinic homogenization method for a multilayer circuit substrate described in the above-described embodiment.

[0167] As another aspect, the present application also provides a computer-readable medium, which may be included in the electronic device described in the above embodiments, or may exist independently and not incorporated into the electronic device. The computer-readable medium carries one or more programs, which, when executed by the electronic device, enable the electronic device to implement the high-fidelity monoclinic homogenization method for a multilayer circuit substrate described in the above embodiments.

[0168] It should be noted that, although several modules or units of the device for action execution are mentioned in the above detailed description, this division is not mandatory. In fact, according to the embodiment of the application, the features and functions of two or more modules or units described above can be concretized in one module or unit. On the contrary, the features and functions of one module or unit described above can be further divided into multiple modules or units to be concretized.

[0169] Through the description of the above embodiments, it is easy for those skilled in the art to understand that the example embodiments described herein can be implemented by software or by combining software with necessary hardware. Therefore, the technical solution according to the embodiments of the present application can be embodied in the form of a software product, which can be stored in a non-volatile storage medium (which can be a CD-ROM, a USB flash drive, a mobile hard disk, etc.) or on a network, and includes several instructions to enable a computing device (which can be a personal computer, a server, a touch terminal, or a network device, etc.) to execute the method according to the embodiments of the present application.

[0170] Those skilled in the art will readily appreciate other embodiments of the present application after considering the specification and practicing the embodiments disclosed herein. This application is intended to cover any variations, uses, or adaptations of the present application that follow the general principles of the present application and include common knowledge or customary techniques in the art that are not disclosed in this application. It should be understood that this application is not limited to the precise structures described above and shown in the accompanying drawings, and various modifications and changes can be made without departing from the scope thereof. The scope of this application is limited only by the appended claims.

Claims

1. A high-fidelity monoclinic homogenization method for a multi-layer circuit substrate, characterized in that: include: The circuit substrate structure model is subjected to layering, pixelation and unitization processing to obtain a monoclinic macro unit with a rectangular parallelepiped structure; Applying boundary conditions to the monoclinic macro-element to solve the monoclinic homogenized equivalent material parameters, wherein the monoclinic homogenized equivalent material parameters include a stiffness matrix composed of multiple independent parameters and a thermal expansion coefficient matrix composed of multiple independent parameters; Each monoclinic macro unit in the circuit substrate structure model is replaced based on the monoclinic homogenized equivalent material parameters.

2. The method according to claim 1, characterized in that The process of layering includes: The circuit substrate structure model is virtually cut and layered in the thickness direction, and the cut layers are ensured to have uniform material in the thickness direction.

3. The method according to claim 2, characterized in that The pixelation process includes: Each layer obtained after the layering process is pixelated according to the pattern formed by different materials; Binary encoding is performed for each pixel according to the substrate material corresponding to the layer where the pixel is located, where 0 represents the conductor material in the substrate and 1 represents the dielectric material in the substrate.

4. The method according to claim 3, characterized in that The unitization process includes: Each pixelated layer is divided into cuboids of the same size, which are referred to as monoclinic macro units.

5. The method according to claim 1, wherein The applying boundary conditions to the monoclinic macro unit to solve the monoclinic homogenization equivalent material parameters includes: Divide the FEM grid by the monoclinic macro unit according to the xy plane pixels; Apply one periodic boundary condition constraint on the six faces of the monoclinic macro unit, and apply displacement boundary conditions separately six times; The FEM solution of the monoclinic macro unit with 7-order boundary conditions is performed, and the solution results are numbered 1 to 7; The arithmetic mean stress [σ x , σ y , σ z , τ xy , τ xz , τ yz ] T and the arithmetic mean strain [ε x , ε y , ε z , γ xy , γ xz , γ yz ] T ; The six groups of arithmetic mean stresses [σ x , σ y , σ z , τ xy , τ xz , τ yz ] T and the arithmetic mean strain [ε x , ε y , ε z , γ xy , γ xz , γ yz ] T , calculate the equivalent stiffness matrix of the monoclinic macroelement; The arithmetic mean strain [ε x , ε y , ε z , γ xy , γ xz , γ yz ] T ; The arithmetic mean strain [ε x , ε y , ε z , γ xy , γ xz , γ yz ] T , calculate the equivalent thermal expansion coefficient matrix of the monoclinic macroelement.

6. The method according to claim 5, characterized in that The six groups of arithmetic mean stresses [σ x , σ y , σ z , τ xy , τ xz , τ yz ] T and the arithmetic mean strain [ε x , ε y , ε z , γ xy , γ xz , γ yz ] T , calculate the equivalent stiffness matrix of the monoclinic macroelement, including: Get the arithmetic mean stress of 6 groups [σ x , σ y , σ z , τ xy , τ xz , τ yz ] T and the arithmetic mean strain [ε x , ε y , ε z , γ xy , γ xz , γ yz ] T , calculated based on the following formula: According to the construction of stiffness matrix The elements in are set to zero to obtain the equivalent stiffness matrix C of the monoclinic macro element. eff .

7. The method according to claim 5, characterized in that The average strain [ε x , ε y , ε z , γ xy , γ xz , γ yz ] T , calculate the equivalent thermal expansion coefficient matrix of the monoclinic macro unit, including: Get the arithmetic mean strain [ε x , ε y , ε z , γ xy , γ xz , γ yz ] T , calculated based on the following formula: According to the construction of the thermal expansion coefficient matrix The elements in are set to zero to obtain the equivalent thermal expansion coefficient matrix CTE of the monoclinic macro unit. eff .

8. The method according to claim 5, characterized in that The displacement boundary conditions were applied separately in 6 steps, including: Uniaxial tensile displacements are applied to the monoclinic macro unit in the x, y, and z directions, and shear displacements are applied to the monoclinic macro unit in the xy, xz, and yz directions, respectively; and a uniform temperature field is applied separately, with a temperature rise of Δt.

9. The method according to claim 1, characterized in that The replacing each monoclinic macro unit in the circuit substrate structure model based on the monoclinic homogenized equivalent material parameters includes: Each monoclinic macro unit in the circuit substrate structure model is replaced by a rectangular parallelepiped equivalent monoclinic homogeneous material of the same shape, and each rectangular parallelepiped equivalent monoclinic homogeneous material is used as a FEM finite element unit in the substrate model; The equivalent stiffness matrix of the monoclinic macro unit is set as the linear elastic constitutive model parameters of the FEM finite element unit, and the equivalent thermal expansion coefficient matrix of the monoclinic macro unit is set as the linear thermal expansion coefficient of the FEM finite element unit.

10. A high-fidelity monoclinic homogenization device for multi-layer circuit substrates, characterized in that: include: a processing unit for performing layering, pixelation, and unitization processing on the circuit substrate structure model to obtain a monoclinic macro unit with a rectangular parallelepiped structure; A calculation unit, used to apply boundary conditions to the monoclinic macro unit to solve the monoclinic homogenization equivalent material parameters; A replacement unit is used to replace each monoclinic macro unit in the circuit substrate structure model based on the monoclinic homogenized equivalent material parameters.

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