Reconfigurable superconducting digital logic circuit based on memristor

Abstract

The invention discloses a reconfigurable superconducting digital logic circuit based on a memristor, and belongs to the field of semiconductor design. Comprising two memristors and a superconductor, the memristor comprises a middle layer and a top layer, and the superconductor is connected with the top layer of the memristor through the middle layer; the power generated by the two memristors under the action of the two direct-current voltage sources can act on the superconductor at the same time, so that the critical current of the superconductor is reduced, when the bias current Ib flowing through the superconductor exceeds the critical current of the superconductor, the superconductor is converted into a normal state from a superconductive state, the circuit can achieve the functions of a logic AND gate and an OR gate at the same time, and the circuit can be applied to the superconductor. And reconfigurability is realized. The circuit structure is simple in composition, does not need a large number of circuit elements, occupies a small area, and can solve the problems that a large number of circuit elements are needed and a large circuit area is occupied when various logic operation functions are realized; and the superconductor is used as the bottom electrode, so that the structure has higher read-write speed and lower power consumption.

Description

Technical Field

[0001] The present invention belongs to the field of semiconductor design, and in particular relates to a reconfigurable superconducting digital logic circuit based on a memristor. Background Art

[0002] Most existing logic gate circuits are designed using CMOS. CMOS-based logic circuits use level logic, which is susceptible to data loss. Memristor-based logic circuits, on the other hand, perform logical operations by changing the resistance state of a memristor and store the results of the logical operations in the memristor as resistance states. Compared to CMOS-based logic gate circuits, memristors offer numerous advantages, including non-volatility, fast switching speeds, compact size, and low energy consumption. Therefore, the design of memristor-based logic gate circuits holds significant research value in the field of digital logic circuits.

[0003] Currently, the design of memristor-based logic circuits has been widely researched. However, typical memristor logic circuits can only implement one logical operation function within a single circuit, making them complex to implement. Implementing multiple logical operations requires a large number of circuit elements, occupying a large circuit area. Furthermore, these circuits suffer from high energy consumption and insufficient operating speed. For example, Chinese patent publication CN107564565A describes a memristor logic circuit with three-input AND logic functions. This design does not require additional storage circuits, and the logic stored in the memristor is non-volatile. However, the large number of circuit elements used results in a large circuit area, potentially leading to excessive power consumption. Summary of the Invention

[0004] In view of the deficiencies in the prior art, the present invention aims to provide a reconfigurable superconducting digital logic circuit based on memristors, which solves the problems in the prior art.

[0005] The purpose of the present invention can be achieved through the following technical solutions:

[0006] A reconfigurable superconducting digital logic circuit based on memristors includes two memristors and a superconductor. The memristors include a middle layer and a top layer, and the superconductor is connected to the top layer of the memristor via the middle layer. Under the action of two DC voltage sources, the power generated by the two memristors can act on the superconductor simultaneously, reducing the critical current of the superconductor.

[0007] Furthermore, the superconducting circuit material used in the superconductor is titanium.

[0008] Furthermore, the top layer of the memristor includes a top electrode, and the material of the top electrode is platinum.

[0009] Furthermore, the intermediate layer material of the memristor is metal oxide.

[0010] Furthermore, the material of the intermediate layer is hafnium oxide.

[0011] Furthermore, the reconfigurable superconducting digital logic circuit further includes a current source I1 to provide a bias current I for the superconductor. b , when the bias current I b When the critical current of the superconductor is exceeded, the superconductor changes from the superconducting state to the normal state. At this time, the superconductor has resistance and generates an output voltage.

[0012] Furthermore, when the superconductor changes to the normal state, the output voltage V and the bias current I b The relationship conforms to the formula:

[0013]

[0014] Among them, I c is the critical current of the superconductor, and R is the total parallel resistance.

[0015] A computing chip includes the above-mentioned reconfigurable superconducting digital logic circuit based on memristor.

[0016] A superconducting digital circuit architecture includes the above-mentioned memristor-based reconfigurable superconducting digital logic circuit.

[0017] An edge computing device includes the above-mentioned reconfigurable superconducting digital logic circuit based on a memristor.

[0018] Beneficial effects of the present invention:

[0019] 1. This invention proposes a superconducting coupled memristor structure that can simultaneously implement the functions of a logical AND gate and an OR gate, offering reconfigurability. Furthermore, this structure is simple, consisting only of a superconductor and two memristors. It does not require a large number of circuit components and occupies a small area, thus resolving the problem of requiring a large number of circuit components and occupying a large circuit area when implementing multiple logical operations.

[0020] 2. The superconducting coupled memristor structure of the present invention uses a superconductor as the bottom electrode, which enables the structure to have a faster read and write speed and lower power consumption, thereby reducing the power consumption required to implement logic operation functions. BRIEF DESCRIPTION OF THE DRAWINGS

[0021] In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the following briefly introduces the drawings required for use in the embodiments or the description of the prior art. Obviously, for ordinary technicians in this field, other drawings can be obtained based on these drawings without any creative work.

[0022] Figure 1Schematic diagram of the structure and circuit symbols of the reconfigurable superconducting digital logic circuit based on memristor of the present invention;

[0023] Figure 2 is a characteristic diagram of voltage and bias current of the superconductor in the superconducting coupled memristor of the present invention;

[0024] Figure 3 is a graph showing the relationship between the resistance of the memristor and the number of voltage pulses of the present invention;

[0025] Figure 4 Schematic diagram of simulation test results of implementing the OR gate according to the present invention;

[0026] Figure 5 It is a schematic diagram of the simulation test results of the AND gate implemented by the present invention. DETAILED DESCRIPTION

[0027] The following will clearly and completely describe the technical solutions in the embodiments of the present invention in conjunction with the accompanying drawings. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without making any creative efforts shall fall within the scope of protection of the present invention.

[0028] Example 1

[0029] A reconfigurable superconducting digital logic circuit based on memristors, such as Figure 1 As shown, Figure 1 (a) and (b) in the figure respectively represent the structure and circuit symbol diagram of the reconfigurable superconducting digital logic circuit based on memristor.

[0030] like Figure 1 As shown in (a), the reconfigurable superconducting digital logic circuit based on memristors includes a superconducting coupled memristor structure, which includes: two memristors and a superconductor; the memristor includes a middle layer and a top layer, and the superconductor is connected to the top layer of the memristor through the middle layer; under the action of two DC voltage sources, the power generated by the two memristors can act on the superconductor simultaneously, so that the critical current of the superconductor is reduced.

[0031] The superconducting circuit material used by the superconductor is titanium. The top layer of the memristor includes a top electrode, the material of which is platinum. The middle layer of the memristor is a metal oxide layer, and the material of the middle layer is hafnium oxide.

[0032] Specifically, if Figure 1 As shown in (b), the reconfigurable superconducting digital logic circuit based on memristor includes: memristor M1, memristor M2 and a resistor R nAs a superconductor; two DC voltage sources V1 and V2 provide input signals V to two memristors M1 and M2 respectively. in1 and V in2 , the power generated by the two memristors will act on the superconductor at the same time, and the generated power will reduce the critical current of the superconductor;

[0033] The reconfigurable superconducting digital logic circuit based on memristor also includes a current source I1 to provide a bias current I for the superconductor. b , when the current source I1 provides the bias current I b When the critical current of a superconductor is exceeded, the superconductor changes from a superconducting state to a normal state, in which the superconductor has a resistance, so the superconductor generates an output voltage.

[0034] The superconductor and memristor in the superconducting coupled memristor structure each have their own characteristics; specifically, they are as follows:

[0035] 1) Superconducting properties of superconductors:

[0036] A superconductor is a superconductor that possesses two independent properties, absolute zero resistance and perfect diamagnetism, below a certain temperature. Superconductors exist in two states: the superconducting state and the normal state. In the superconducting state, the DC resistance is strictly zero, allowing current to flow without dissipation. In the normal state, a superconductor exhibits finite resistance and obeys Ohm's law. Conditions for a superconductor to transition from the superconducting state to the normal state include: the temperature exceeding the critical temperature, the magnetic field exceeding the critical magnetic field, and the current exceeding the critical current.

[0037] In this embodiment, the total power generated by the two memristors will affect the critical current of the superconductor. The greater the total power generated, the smaller the critical current of the superconductor. When the bias current I flowing through the superconductor is b When the current is greater than the critical current, the superconductor will change from the superconducting state to the normal state, in which the superconductor will generate voltage. The generated voltage V is related to the bias current I b The relationship conforms to the formula:

[0038]

[0039] Among them, I c is the critical current of the superconductor, R is the total parallel resistance, I b is the bias current provided; Figure 2This graph shows the voltage and bias current characteristics of the superconductor in a superconducting coupled memristor structure. The figure shows that the bias current corresponding to the turning point of the superconducting IV curve is the superconductor's critical current, 38.8uA. As the bias current increases from 20uA, when the bias current exceeds the superconductor's critical current, the superconductor transitions from a superconducting state to a normal state, generating an output voltage. Therefore, based on the superconducting properties of the superconductor, the superconductor can be switched between the superconducting and normal states by varying the critical current and bias current.

[0040] 2) Memristor resistance and voltage characteristics

[0041] A memristor is typically initially in a high-resistance state. Applying voltage pulses can change its resistance. Positive voltage pulses reduce the resistance of the memristor, while negative voltage pulses increase it. The number of pulses affects the resistance of the memristor; applying multiple positive voltage pulses gradually decreases the resistance. Figure 3 The graph below shows the relationship between the resistance of the memristor and the number of voltage pulses. It shows that when no pulses are applied, the memristor is in a high-resistance state. As the number of applied forward voltage pulses increases from 0 to 50, the resistance of the memristor gradually decreases, from a high-resistance state to a low-resistance state, demonstrating the adjustability of the memristor's resistance. By varying the resistance of the memristor, the power generated by the memristor can be adjusted, and thus the critical current of the superconductor can be changed.

[0042] Example 2

[0043] In this embodiment, a simulation test is performed on the reconfigurable superconducting digital logic circuit based on memristors in Embodiment 1, including: a simulation test of an OR gate and a simulation test of an AND gate.

[0044] 1) Simulation of OR gate implementation scheme;

[0045] By applying a voltage pulse, the resistance of both memristors is set to 1MΩ, and the current source I1 provides a bias current of 38.8uA I b (lower than the initial critical current of the superconductor), the input voltage V provided by the voltage sources V1 and V2 in1 and V in2 The high state is set to 5mV, and the low state is set to 0V. When the input voltage of one voltage source is in the high state, the total power generated by the two memristors will reduce the critical current of the superconductor and be lower than the bias current. Therefore, the superconductor switches from the superconducting state to the normal state, generating an output voltage. The output voltage calculation formula is

[0046] V=I b *R n

[0047] Among them, Rn It is the resistance of a superconductor in its normal state, which is 100Ω.

[0048] When the input voltages of the two DC voltage sources are both at a low level, the power generated by the two memristors is zero, which has no effect on the critical current of the superconductor. Therefore, the critical current of the superconductor is greater than the bias current, and the superconductor is still in a superconducting state. Therefore, the superconductor has no voltage output.

[0049] Figure 4 The simulation test results diagram for the OR gate shows that: in LTspice, the voltage source V1 is set to a duration of 10s, with the first second set to 0V, the second, third, and fourth seconds set to 5mV, the fifth and sixth seconds set to 0V, the seventh second set to 5mV, and the eighth, ninth, and tenth seconds set to 0V; the voltage source V2 is set to a duration of 10s, with the first and second seconds set to 0V, the third second set to 5mV, the fourth and fifth seconds set to 0V, the sixth, seventh, and eighth seconds set to 5mV, and the ninth and tenth seconds set to 0V.

[0050] It can be seen that when the input voltage V in1 5mV, input voltage V in2 When the superconductor output voltage is 0V, V out is 3.88mV; when the input voltage V in1 and V in2 When both are 5mV, the superconductor output voltage V out is 3.88mV; when the input voltage V in1 is 0V, input voltage V in2 When the superconductor output voltage V out is 3.88mV; when the input voltage V in1 and V in2 When both are 0V, the superconductor output voltage V out is 0V; therefore, when the input voltage of any voltage source is in a high level state, the output voltage of the superconductor is high, and when the input voltages of the two voltage sources are both in a low level state, the output voltage of the superconductor is low, thereby realizing the OR gate function.

[0051] 2) AND gate implementation solution

[0052] By applying a voltage pulse, the resistance of both memristors is set to 3MΩ, and the current source I1 provides a bias current of 38.8uA. b (lower than the initial critical current of the superconductor), the input voltage V provided by the voltage sources V1 and V2 in1 and V in2The high state of both memristors is set to 5mV, and the low state is set to 0V. Only when the input voltages of both voltage sources are simultaneously high does the total power generated by the two memristors cause the superconductor's critical current to fall below the bias current. Consequently, the superconductor switches from a superconducting state to a normal state, generating an output voltage. When only one voltage source is high, or both voltage sources are low, the total power generated by the two memristors is insufficient to cause the superconductor's critical current to fall below the bias current. Consequently, the superconductor experiences no voltage output.

[0053] Figure 5 The simulation test results of the AND gate are shown in the figure. It can be seen that in LTspice, the voltage sources V1 and V2 are set to last for 10s and operate the OR gate. It can be seen that when the input voltage V in1 5mV, input voltage V in2 When the superconductor output voltage is 0V, V out is 0V; when the input voltage V in1 and V in2 When both are 5mV, the superconductor output voltage V out is 3.88mV; when the input voltage V in1 is 0V, input voltage V in2 When the superconductor output voltage V out is 0V; when the input voltage V in1 and V in2 When both are 0V, the superconductor output voltage V out is 0V; therefore, when the input voltage of any voltage source is in a low level state, the output voltage of the superconductor is low, and when the input voltages of the two voltage sources are both in a high level state, the output voltage of the superconductor is high, thereby realizing the AND gate function.

[0054] Throughout this specification, references to terms such as "one embodiment," "example," or "specific example" indicate that the specific features, structures, materials, or characteristics described in conjunction with that embodiment or example are included in at least one embodiment or example of the present invention. In this specification, schematic representations of these terms do not necessarily refer to the same embodiment or example. Furthermore, the specific features, structures, materials, or characteristics described may be combined in any suitable manner in any one or more embodiments or examples.

[0055] The basic principles, main features, and advantages of the present invention are shown and described above. Those skilled in the art should understand that the present invention is not limited to the above embodiments. The above embodiments and descriptions are merely illustrative of the principles of the present invention. Various changes and modifications may be made to the present invention without departing from the spirit and scope of the present invention, and such changes and modifications fall within the scope of the invention as claimed.

Claims

1. A reconfigurable superconducting digital logic circuit based on a memristor, characterized in that: include: Two memristors and a superconductor; the memristor includes a middle layer and a top layer, and the superconductor is connected to the top layer of the memristor through the middle layer; Under the action of two DC voltage sources, the power generated by the two memristors can act on the superconductor at the same time, reducing the critical current of the superconductor.

2. The reconfigurable superconducting digital logic circuit based on memristor according to claim 1, characterized in that: The superconducting circuit material used by the superconductor is titanium.

3. The reconfigurable superconducting digital logic circuit based on memristor according to claim 1, characterized in that: The top layer of the memristor includes a top electrode, and the material of the top electrode is platinum.

4. The reconfigurable superconducting digital logic circuit based on memristor according to claim 1, characterized in that: The middle layer material of the memristor is metal oxide.

5. A memristor-based reconfigurable superconducting digital logic circuit according to claim 1 or 4, characterized in that: The material of the intermediate layer is hafnium oxide.

6. The reconfigurable superconducting digital logic circuit based on memristor according to claim 1, characterized in that: The reconfigurable superconducting digital logic circuit further includes a current source I1 to provide a bias current I for the superconductor. b , when the bias current I b When the critical current of the superconductor is exceeded, the superconductor changes from the superconducting state to the normal state. At this time, the superconductor has resistance and generates an output voltage.

7. The reconfigurable superconducting digital logic circuit based on memristor according to claim 6, characterized in that: When the superconductor changes to the normal state, the output voltage V and the bias current I b The relationship conforms to the formula: Among them, I c is the critical current of the superconductor, and R is the total parallel resistance.

8. A computing chip, characterized in that: A reconfigurable superconducting digital logic circuit based on a memristor comprising the method according to any one of claims 1 to 7.

9. A superconducting digital circuit architecture, characterized in that: A reconfigurable superconducting digital logic circuit based on a memristor comprising the method according to any one of claims 1 to 7.

10. An edge computing device, characterized in that: A reconfigurable superconducting digital logic circuit based on a memristor comprising the method according to any one of claims 1 to 7.

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