Chip packaging structure

Abstract

In order to solve the problems that an existing multi-layer chip packaging structure is insufficient in temperature resistance, reliability and service life, the invention provides a chip packaging structure which comprises a substrate, a chip and a packaging layer, the packaging layer and the chip are located on the substrate, the packaging layer wraps the chip, the chip comprises a plurality of storage chips, and the storage chips are arranged on the substrate. The plurality of memory chips are stacked in a stepped staggered manner, so that a stepped surface is formed on one side of each of the plurality of memory chips, at least one bonding pad is arranged at the position of the stepped surface of each memory chip, the bonding pads of two adjacent memory chips are connected with each other through a lead wire, and the bonding pads of the two adjacent memory chips are connected with each other through the lead wire. The glass transition temperature of the packaging layer is 210 DEG C to 250 DEG C, the dielectric constant is 2.8 to 3.2, the tensile strength is 115 to 141 MPa, and the elongation at break is 5.7 percent to 8 percent.

Description

Technical Field

[0001] The present invention belongs to the technical field of semiconductor chips, and in particular relates to a chip packaging structure. Background Art

[0002] With the rapid development of electronic information technology, especially the continuous advancement of chip mounting technology and fifth-generation mobile communications (5G) technology, the requirements for chip packaging materials are becoming increasingly stringent. Stepped multi-layer chip packaging is becoming increasingly popular in consumer electronics, data centers, and other fields because it can effectively increase storage capacity and integration. This packaging structure integrates multiple chips in a stepped stacking manner, achieving efficient space utilization and meeting the urgent needs of modern electronic devices for miniaturization and high performance. Currently, most chip packages use epoxy resin as the primary packaging material. Epoxy resin has been widely used in traditional electronic packaging due to its good bonding strength with the substrate and excellent weather resistance.

[0003] However, faced with the higher performance requirements of multi-layer chip packaging, epoxy resin has gradually exposed its limitations. First, the temperature resistance of epoxy resin can generally only reach more than 100 degrees Celsius, and some advanced chip mounting processes such as wave soldering require higher temperature resistance, which makes epoxy resin appear inadequate in these application scenarios. Secondly, with the development of 5G communication technology, more stringent requirements are placed on the dielectric constant of the chip packaging layer. Due to the high dielectric constant of the packaging layer itself, its application effect in high-frequency signal transmission is limited, and it cannot meet the low-loss and high-speed requirements of 5G communication.

[0004] Furthermore, existing packaging layers generally exhibit high rigidity, which presents a potential risk for multi-layer chip packaging. During actual operation, chips experience volume expansion and contraction due to temperature fluctuations. In a multi-layer chip packaging structure, these volume changes can easily generate thermal stress. If the packaging material is too rigid, this can cause cracks in the packaging material or create gaps between the packaging material and the substrate, weakening its ability to block moisture. This can also increase the risk of lead wire breakage between the chips, further impacting chip reliability and lifespan. Summary of the Invention

[0005] Aiming at the problems of insufficient temperature resistance, reliability and service life of the existing multi-layer chip packaging structure, the present invention provides a chip packaging structure.

[0006] The technical solutions adopted by the present invention to solve the above technical problems are as follows: On the one hand, the present invention provides a chip packaging structure, comprising a substrate, a chip and a packaging layer, wherein the packaging layer and the chip are located on the substrate, and the packaging layer covers the chip, the chip comprises a plurality of memory chips, and the plurality of memory chips are stacked in a stepped manner to form a stepped surface on one side of the plurality of memory chips, respectively, the memory chip is provided with at least one solder pad at the position of the stepped surface, and the solder pads of two adjacent memory chips are connected to each other by a lead, the glass transition temperature of the packaging layer is 210°C~250°C, the dielectric constant is 2.8~3.2, the tensile strength is 115~141MPa, and the elongation at break is 5.7%~8%.

[0007] Optionally, the chip further includes a control chip, which is located on the substrate and below the plurality of memory chips, and is electrically connected to at least one of the memory chips.

[0008] Optionally, the encapsulation layer is obtained by curing a chip encapsulation material, wherein the chip encapsulation material comprises a combination of the following components by weight: 58-67 parts of bisphenol A epoxy resin, 9-19 parts of polyether-modified polyamic acid, 9-16 parts of anhydride curing agent, 0.5-2 parts of imidazole accelerator, 2-10 parts of filler and 2-5 parts of reactive diluent; The polyether-modified polyamic acid includes a block-copolymerized polyamic acid segment and a polyether segment, and the polyether-modified polyamic acid has a terminal amino group.

[0009] Optionally, the polyether-modified polyamic acid is prepared by the following method: preparing anhydride-terminated polyimide acid; The polyether diamine is mixed with anhydride-terminated polyimide acid to carry out block polymerization, wherein the amount of the polyether diamine is greater than the amount of the anhydride-terminated polyimide acid to obtain a polyether-modified polyamic acid with terminal amino groups.

[0010] Optionally, the anhydride-terminated polyimide acid is prepared by the following method: The dibasic acid anhydride and the diamine are polymerized, and the amount of the dibasic acid anhydride is greater than the amount of the diamine, to obtain an anhydride-terminated polyimide acid.

[0011] Optionally, the diamine includes at least one of 4,4-diaminodiphenyl ether, 4,4'-diamino-2,2'-bis(trifluoromethyl)biphenyl and 2-(4-aminophenyl)-5-aminobenzimidazole; the dibasic acid anhydride includes at least one of 4,4'-(hexafluoroisopropylene)phthalic anhydride, 3,3',4,4'-dibenzophenone tetracarboxylic dianhydride or 2,3,3',4'-diphenyl ether tetracarboxylic dianhydride.

[0012] Optionally, the acid anhydride curing agent includes one or more of methyl nadic anhydride, methyltetrahydrophthalic anhydride, methyltetrahydrophthalic anhydride, trimellitic anhydride, polyazetaedioic anhydride and dodecenylsuccinic anhydride, the imidazole accelerator includes one or more of 2-methylimidazole, 2-ethyl-4-methylimidazole, 2-phenylimidazole, the filler includes one or more of nano-silica, alumina, calcium carbonate, talc, glass microbeads, and the reactive diluent includes phenyl glycidyl ether.

[0013] Optionally, the filler is selected from nano-silica, and the surface of the nano-silica is treated with a silane coupling agent.

[0014] Optionally, the chip packaging material further includes 20 to 100 parts by weight of a solvent, wherein the solvent includes one or more of N-methylpyrrolidone, dimethylacetamide, dimethylformamide, and γ-butyrolactone.

[0015] Optionally, the chip packaging material further includes 2 to 5 parts by weight of hexamethylene diisocyanate trimer.

[0016] According to the chip packaging structure provided by the present invention, a packaging layer with a glass transition temperature of 210°C~250°C, a dielectric constant of 2.8~3.2, a tensile strength of 115~141MPa, and an elongation at break of 5.7%~8% is designed for a multi-chip stacking structure. The glass transition temperature of the packaging layer reaches 210°C~250°C. Compared with traditional epoxy resin packaging materials, it can better adapt to the high temperature environment of multiple memory chips in a stepped staggered stacking arrangement during manufacturing and use. Whether it is multiple welding processes or advanced installation processes such as wave soldering, the packaging layer can maintain stable performance, avoid material degradation due to high temperature, effectively ensure the stability of the stepped multi-layer memory chip packaging structure, and extend its service life under high temperature conditions. Secondly, the dielectric constant of the packaging layer is controlled at 2.8~3.2, which meets the low loss requirements of 5G communication technology for high-frequency signal transmission. Furthermore, the encapsulation layer boasts a tensile strength of 115-141 MPa and an elongation at break of 5.7%-8%. This layer combines high strength with a degree of flexibility. This effectively buffers and releases the thermal stresses caused by the varying degrees of volume expansion and contraction of the stepped, staggered stacked memory chips during operation due to temperature fluctuations. This prevents cracks caused by excessive material rigidity and gaps between the encapsulation layer and the substrate, as well as between the memory chip layers. This not only enhances the encapsulation layer's ability to block moisture but also further improves the reliability of the entire stepped, multi-layer memory chip packaging structure, ensuring the long-term, stable operation of the chips. BRIEF DESCRIPTION OF THE DRAWINGS

[0017] Figure 1It is a structural schematic diagram of the substrate chip packaging structure provided by the present invention.

[0018] The reference numerals in the drawings of the specification are as follows: 1. Substrate; 2. Control chip; 3. Memory chip; 4. Pad; 5. Lead; 6. Packaging layer. DETAILED DESCRIPTION

[0019] In order to make the technical problems, technical solutions and beneficial effects solved by the present invention more clearly understood, the present invention is further described in detail below in conjunction with the embodiments. It should be understood that the specific embodiments described herein are only used to explain the present invention and are not intended to limit the present invention.

[0020] like Figure 1 As shown, an embodiment of the present invention provides a chip packaging structure, including a substrate 1, a chip and a packaging layer 6, wherein the packaging layer 6 and the chip are located on the substrate 1, and the packaging layer 6 covers the chip, the chip includes a plurality of memory chips 3, and the plurality of memory chips 3 are stacked in a stepped manner to form a stepped surface on one side of the plurality of memory chips 3, and the memory chip 3 is provided with at least one solder pad 4 at the position of the stepped surface, and the solder pads 4 of two adjacent memory chips 3 are connected to each other by a lead 5. The glass transition temperature of the packaging layer 6 is 210°C~250°C, the dielectric constant is 2.8~3.2, the tensile strength is 115~141MPa, and the elongation at break is 5.7%~8%.

[0021] For multi-chip stacked structures, a packaging layer 6 with a glass transition temperature of 210°C to 250°C, a dielectric constant of 2.8 to 3.2, a tensile strength of 115 to 141 MPa, and an elongation at break of 5.7% to 8% was designed. The glass transition temperature of this packaging layer 6 reaches 210°C to 250°C. Compared with traditional epoxy resin packaging materials, it can better adapt to the high-temperature environment during the manufacturing and use of multiple memory chips 3 in a stepped staggered stack. Whether using multiple soldering processes or advanced installation processes such as wave soldering, this packaging layer 6 can maintain stable performance, avoiding material degradation due to high temperatures, effectively ensuring the stability of the stepped multi-layer memory chip 3 packaging structure and extending its service life under high-temperature conditions. Secondly, the dielectric constant of the packaging layer 6 is controlled at 2.8 to 3.2, meeting the low-loss requirements of 5G communication technology for high-frequency signal transmission. Furthermore, the encapsulation layer 6 has a tensile strength of 115-141 MPa and an elongation at break of 5.7%-8%. This combines high strength with a certain degree of flexibility. This effectively buffers and releases the thermal stress caused by the varying degrees of volume expansion and contraction of the stepped, offset stacked memory chips 3 during operation due to temperature fluctuations. This prevents cracks caused by excessive material rigidity and the formation of gaps between the encapsulation layer 6 and the substrate 1, as well as the individual memory chips 3. This not only enhances the encapsulation layer 6's ability to block moisture but also further improves the reliability of the entire stepped, multi-layer memory chip 3 packaging structure, ensuring the long-term stable operation of the chips.

[0022] In one embodiment, the chip further includes a control chip 2 . The control chip 2 is located on the substrate 1 and below the plurality of memory chips 3 . The control chip 2 is electrically connected to at least one of the memory chips 3 .

[0023] In one embodiment, the encapsulation layer 6 is obtained by curing a chip encapsulation material, wherein the chip encapsulation material comprises a combination of raw materials having the following weight components: 58-67 parts of bisphenol A epoxy resin, 9-19 parts of polyether-modified polyamic acid, 9-16 parts of anhydride curing agent, 0.5-2 parts of imidazole accelerator, 2-10 parts of filler and 2-5 parts of reactive diluent; The polyether-modified polyamic acid includes a block-copolymerized polyamic acid segment and a polyether segment, and the polyether-modified polyamic acid has a terminal amino group.

[0024] Among them, the bisphenol A epoxy resin gives the chip packaging material better bonding performance with the chip or substrate 1, and the polyamic acid chain segments in the polyether modified polyamic acid are isomerized in the subsequent curing process to obtain polyimide, which has high high-temperature stability and low dielectric constant, and can effectively improve the high-temperature resistance of the packaging material, and increase the Tg of the chip packaging material from about 140°C to about 230°C. At the same time, the dielectric loss of the chip packaging material at 1GHz is <0.008, which is suitable for high-frequency electronic packaging; at the same time, the polyether chain segments in the polyether modified polyamic acid have high flexibility, and cooperate with the epoxy resin to form a rigid network, which can effectively reduce the rigidity of the chip packaging material after curing, and can adapt to its volume deformation when the chip temperature changes, inhibit the generation of cracks, and improve the water vapor barrier effect. Furthermore, in order to solve the problem caused by insufficient affinity between different resin chain segments, the present application uses polyether chain segments and polyamic acid chain segments to form a block copolymer to achieve dispersion at the molecular level. At the same time, a terminal amino group with arc-pair electrons is formed at the end of the polyether-modified polyamic acid. Before curing, the active hydrogen of the terminal amino group can attack the epoxy group of the bisphenol A epoxy resin, triggering a ring-opening reaction, thereby achieving cross-linking between the polyether-modified polyamic acid and the bisphenol A epoxy resin, avoiding material stratification, and further improving the cross-linking density between each chain segment to form a network-like cross-linked network, thereby improving the high temperature resistance and mechanical properties of the chip packaging material.

[0025] In some embodiments, the polyether-modified polyamic acid is prepared by the following method: preparing anhydride-terminated polyimide acid; The polyether diamine is mixed with anhydride-terminated polyimide acid to carry out block polymerization, wherein the amount of the polyether diamine is greater than the amount of the anhydride-terminated polyimide acid to obtain a polyether-modified polyamic acid with terminal amino groups.

[0026] By first preparing anhydride-terminated polyimide acid and then performing a block polymerization reaction with an excess of polyether diamine, a polyether-modified polyamic acid with terminal amino groups is generated. This method precisely controls the molecular structure, ensuring the ratio of polyether segments to polyamic acid segments and the presence of terminal amino groups in the polyether-modified polyamic acid, thereby achieving a stable modification effect on epoxy resins and further ensuring the performance consistency and stability of the packaging material.

[0027] In the above reaction, the polyimide acid exists in the form of a solution, and the polyether diamine is added in batches to the polyimide acid solution and stirred for reaction.

[0028] In some embodiments, the polyetherdiamine is selected from Jeffamine D-230 or Jeffamine D-400.

[0029] In some embodiments, the anhydride-terminated polyimide acid is prepared by the following method: The dibasic acid anhydride and the diamine are polymerized, and the amount of the dibasic acid anhydride is greater than the amount of the diamine, to obtain an anhydride-terminated polyimide acid.

[0030] The polymerization reaction of the dibasic acid anhydride and the diamine is carried out in a solvent. Specifically, the dibasic acid anhydride and the diamine are dissolved in a solvent to form a solution, and then the dibasic acid anhydride solution is added dropwise to the diamine solution.

[0031] By controlling the amount of dibasic acid anhydride and diamine, the polyimide acid is terminated with anhydride, providing active sites for the subsequent block polymerization reaction with polyether diamine, ensuring the controllable structure of the polyether-modified polyamic acid, and thereby effectively controlling the flexibility, high temperature resistance, low dielectric properties and other properties of the packaging material.

[0032] In some embodiments, the diamine includes at least one of 4,4-diaminodiphenyl ether, 4,4'-diamino-2,2'-bis(trifluoromethyl)biphenyl, and 2-(4-aminophenyl)-5-aminobenzimidazole; and the dibasic acid anhydride includes at least one of 4,4'-(hexafluoroisopropylene)diphthalic anhydride, 3,3',4,4'-dibenzophenone tetracarboxylic dianhydride, or 2,3,3',4'-diphenyl ether tetracarboxylic dianhydride.

[0033] When the diamine is selected from 4,4'-diamino-2,2'-bis(trifluoromethyl)biphenyl or 2-(4-aminophenyl)-5-aminobenzimidazole, or when the dibasic acid anhydride is selected from 4,4'-(hexafluoroisopropylene)diphthalic anhydride, the special groups contained in its molecular structure (such as fluorine atoms, benzimidazole structures, etc.) help to reduce the dielectric constant of the polyimide acid, improve heat resistance and chemical stability, so that the prepared polyether-modified polyamic acid can more significantly improve the dielectric properties and high temperature resistance of the packaging material, meeting the requirements of 5G communications and high-temperature chip installation processes.

[0034] In some embodiments, the anhydride curing agent includes one or more of methyl nadic anhydride, methyltetrahydrophthalic anhydride, methyltetrahydrophthalic anhydride, trimellitic anhydride, polyazelaic anhydride, and dodecenylsuccinic anhydride.

[0035] Anhydride curing agents react with epoxy groups to form a cross-linked network, thereby converting linear or branched epoxy resins into three-dimensional polymer networks with high strength, heat resistance and chemical stability.

[0036] In some embodiments, the imidazole accelerator includes one or more of 2-methylimidazole, 2-ethyl-4-methylimidazole, and 2-phenylimidazole.

[0037] During the curing process of the chip packaging material, the imidazole accelerator can accelerate the reaction efficiency of bisphenol A epoxy resin with the terminal amino group of polyether-modified polyamic acid and other reactive groups (such as carboxyl groups), which is beneficial to lowering the reaction temperature, forming a denser three-dimensional network structure, and ensuring cross-linking between different polymer chain segments.

[0038] In some embodiments, the filler includes one or more of nano-silica, alumina, calcium carbonate, talc, and glass microspheres.

[0039] The addition of fillers can enhance the mechanical properties of the packaging material, such as hardness, wear resistance and thermal conductivity. Different fillers can also bring different additional properties (such as alumina can improve thermal conductivity).

[0040] In some embodiments, the reactive diluent comprises phenyl glycidyl ether.

[0041] The active diluent phenyl glycidyl ether can effectively reduce the viscosity of the system, making the packaging material easier to coat and fill during processing, improving production efficiency and product quality without affecting the curing properties and final performance of the material.

[0042] In some embodiments, the filler is selected from nano-silica, and the surface of the nano-silica is treated with a silane coupling agent.

[0043] Nano-silica has a high specific surface area and excellent reinforcement effect. After being treated with a silane coupling agent, its surface compatibility with epoxy resin and polyether-modified polyamic acid is greatly improved, and it can be more evenly dispersed in the system, enhancing the mechanical properties and water vapor barrier properties of the material while avoiding the performance degradation caused by filler agglomeration, further improving the comprehensive performance of the packaging material.

[0044] In some embodiments, the chip packaging material further comprises 20 to 100 parts by weight of a solvent, wherein the solvent comprises one or more of N-methylpyrrolidone, dimethylacetamide, dimethylformamide, and γ-butyrolactone.

[0045] The presence of solvents can improve the dispersibility of the components, make the raw materials more uniform during the mixing process, help form a uniform and stable system, and at the same time adjust the viscosity of the material so that it has better operating performance in coating, printing and other processing technologies, facilitating the molding and application of packaging materials.

[0046] In some embodiments, the chip packaging material further includes 2 to 5 parts by weight of hexamethylene diisocyanate trimer.

[0047] The hexamethylene diisocyanate trimer contains multiple isocyanate groups, which can react with the terminal amino groups of polyether-modified polyamic acid, the hydroxyl groups of epoxy resin, etc., further strengthening the cross-linked network inside the material, improving the strength and toughness of the packaging material, and at the same time helping to improve the water vapor barrier performance and long-term stability of the material.

[0048] The curing method of the chip packaging material is as follows: the first stage: 120° C. / 2 hours to promote the reaction of epoxy groups with amino groups, carboxyl groups, hydroxyl groups, etc.; the second stage: 150° C. / 2 hours to promote the imidization reaction of polyimide.

[0049] The present invention is further described below with reference to the following examples.

[0050] Example 1 This embodiment is used to illustrate the chip packaging structure and preparation method disclosed in the present invention, and includes the following steps: Step 1: Preparation of anhydride-terminated polyimide acid 4,4'-(Hexafluoroisopropylene) diphthalic anhydride (6FDA, 5.00 mol) and 4,4-diaminodiphenyl ether (ODA, 4.80 mol) were added to a four-necked flask equipped with a mechanical stirrer, a thermometer, and a nitrogen inlet, and N-methylpyrrolidone (NMP, 1500 mL) was added and stirred to dissolve to obtain a dibasic anhydride solution and a diamine solution, respectively; Under nitrogen protection, the dibasic acid anhydride solution was added dropwise to the diamine solution, and the mixture was stirred at 0° C. for 4 hours to form an anhydride-terminated polyimide acid solution.

[0051] Step 2: Preparation of polyether-modified polyamic acid by block polymerization The polyether diamine (Jeffamine D-230) was slowly added dropwise to the above anhydride-terminated polyimide acid solution, keeping the temperature below 25°C. The reaction intermediate was detected by infrared spectroscopy (FTIR), and the anhydride characteristic peak was at 1780 cm -1 and 1850cm -1 When the characteristic peak disappears, the addition is terminated, and the temperature is raised to 50°C and the reaction is continued for 6 hours to generate amino-terminated polyether-modified polyamic acid; After the reaction was completed, part of the solvent was evaporated under reduced pressure to make the solid content of the polyether-modified polyamic acid solution 20%.

[0052] Step 3: Preparation of chip packaging materials Bisphenol A epoxy resin (E-51) 62g Polyether modified polyamic acid solution 60g Methylnadic anhydride (MNA) 10g 2-Ethyl-4-methylimidazole 1.2g Nano-silicon dioxide (treated with KH-560) 6g Phenyl glycidyl ether 3g Hexamethylene diisocyanate trimer 3g Steps: Add bisphenol A epoxy resin and polyether modified polyamic acid solution into the reactor and continue stirring at 60°C for 2 hours to ensure uniform dispersion; Add methyl nadic anhydride, 2-ethyl-4-methylimidazole and phenyl glycidyl ether in sequence, and stir at 50°C for 1 hour; Add nano-silica treated with silane coupling agent (KH-560) and disperse at high speed (2000 rpm) for 2 hours; Finally, add hexamethylene diisocyanate trimer and stir at low speed for 30 minutes; Vacuum degassing (-0.1 MPa, 30 minutes) was performed to obtain a uniform chip packaging material. Part of the chip packaging material was taken for testing, and the remaining packaging material was used for packaging in step 4.

[0053] Step 4: Chip Packaging The control chip and the multi-layer memory chip are staggered and stacked on the substrate in a stepped manner, and electrical leads are set on the control chip, the memory chip and the substrate. The chip packaging material is filled on the substrate through a mold and the packaging material is covered with the control chip and the memory chip, and a curing operation is performed. The curing method is: the first stage: 120℃ / 2 hours to promote the reaction of epoxy groups with amino groups, carboxyl groups, hydroxyl groups, etc.; the second stage: 150℃ / 2 hours to promote the imidization reaction of polyimide.

[0054] A chip packaging structure is obtained.

[0055] Example 2 This embodiment is used to illustrate the chip packaging material and preparation method disclosed in the present invention, including the following steps: Step 1: Preparation of anhydride-terminated polyimide acid 4,4'-(Hexafluoroisopropylene) diphthalic anhydride (6FDA, 5.00 mol) and 4,4-diaminodiphenyl ether (ODA, 4.80 mol) were added to a four-necked flask equipped with a mechanical stirrer, a thermometer, and a nitrogen inlet, and N-methylpyrrolidone (NMP, 1500 mL) was added and stirred to dissolve to obtain a dibasic anhydride solution and a diamine solution, respectively; Under nitrogen protection, the dibasic acid anhydride solution was added dropwise to the diamine solution, and the mixture was stirred at 0° C. for 4 hours to form an anhydride-terminated polyimide acid solution.

[0056] Step 2: Preparation of polyether-modified polyamic acid by block polymerization The polyether diamine (Jeffamine D-230) was slowly added dropwise to the above anhydride-terminated polyimide acid solution, keeping the temperature below 25°C. The reaction intermediate was detected by infrared spectroscopy (FTIR), and the anhydride characteristic peak was at 1780 cm -1 and 1850cm -1 When the characteristic peak disappears, the addition is terminated, and the temperature is raised to 50°C and the reaction is continued for 6 hours to generate amino-terminated polyether-modified polyamic acid; After the reaction was completed, part of the solvent was evaporated under reduced pressure to make the solid content of the polyether-modified polyamic acid solution 20%.

[0057] Step 3: Preparation of chip packaging materials Bisphenol A epoxy resin (E-51) 58g Polyether modified polyamic acid solution 50g Methylnadic anhydride (MNA) 16g 2-Ethyl-4-methylimidazole 0.5g Nano-silicon dioxide (treated with KH-560) 5g Phenyl glycidyl ether 5g Hexamethylene diisocyanate trimer 5g Steps: Add bisphenol A epoxy resin and polyether modified polyamic acid solution into the reactor and continue stirring at 60°C for 2 hours to ensure uniform dispersion; Add methyl nadic anhydride, 2-ethyl-4-methylimidazole and phenyl glycidyl ether in sequence, and stir at 50°C for 1 hour; Add nano-silica treated with silane coupling agent (KH-560) and disperse at high speed (2000 rpm) for 2 hours; Finally, add hexamethylene diisocyanate trimer and stir at low speed for 30 minutes; Vacuum degassing (-0.1 MPa, 30 minutes) was performed to obtain a uniform chip packaging material. Part of the chip packaging material was taken for testing, and the remaining packaging material was used for packaging in step 4.

[0058] Step 4: Chip Packaging The control chip and the multi-layer memory chip are staggered and stacked on the substrate in a stepped manner. Leads are set on the control chip, the memory chip and the substrate for electrical connection. The chip packaging material is filled on the substrate through a mold and the packaging material is covered with the control chip and the memory chip. After vacuum degassing, the curing operation is performed. The curing method is: first stage: 120℃ / 2 hours; second stage: 150℃ / 2 hours.

[0059] A chip packaging structure is obtained.

[0060] Example 3 This embodiment is used to illustrate the chip packaging material and preparation method disclosed in the present invention, including the following steps: Step 1: Preparation of anhydride-terminated polyimide acid 4,4'-(Hexafluoroisopropylene) diphthalic anhydride (6FDA, 5.00 mol) and 4,4-diaminodiphenyl ether (ODA, 4.80 mol) were added to a four-necked flask equipped with a mechanical stirrer, a thermometer, and a nitrogen inlet, and N-methylpyrrolidone (NMP, 1500 mL) was added and stirred to dissolve to obtain a dibasic anhydride solution and a diamine solution, respectively; Under nitrogen protection, the dibasic acid anhydride solution was added dropwise to the diamine solution, and the mixture was stirred at 0° C. for 4 hours to form an anhydride-terminated polyimide acid solution.

[0061] Step 2: Preparation of polyether-modified polyamic acid by block polymerization The polyether diamine (Jeffamine D-230) was slowly added dropwise to the above anhydride-terminated polyimide acid solution, keeping the temperature below 25°C. The reaction intermediate was detected by infrared spectroscopy (FTIR), and the anhydride characteristic peak was at 1780 cm -1 and 1850cm -1 When the characteristic peak disappears, the addition is terminated, and the temperature is raised to 50°C and the reaction is continued for 6 hours to generate amino-terminated polyether-modified polyamic acid; After the reaction was completed, part of the solvent was evaporated under reduced pressure to make the solid content of the polyether-modified polyamic acid solution 20%.

[0062] Step 3: Preparation of chip packaging materials Bisphenol A epoxy resin (E-51) 65g Polyether modified polyamic acid solution 70g Methylnadic anhydride (MNA) 12g 2-Ethyl-4-methylimidazole 1g Nano-silicon dioxide (treated with KH-560) 4g Phenyl glycidyl ether 3g Hexamethylene diisocyanate trimer 3g Steps: Add bisphenol A epoxy resin and polyether modified polyamic acid solution into the reactor and continue stirring at 60°C for 2 hours to ensure uniform dispersion; Add methyl nadic anhydride, 2-ethyl-4-methylimidazole and phenyl glycidyl ether in sequence, and stir at 50°C for 1 hour; Add nano-silica treated with silane coupling agent (KH-560) and disperse at high speed (2000 rpm) for 2 hours; Finally, add hexamethylene diisocyanate trimer and stir at low speed for 30 minutes; Vacuum degassing (-0.1 MPa, 30 minutes) was performed to obtain a uniform chip packaging material. Part of the chip packaging material was taken for testing, and the remaining packaging material was used for packaging in step 4.

[0063] Step 4: Chip Packaging The control chip and the multi-layer memory chip are staggered and stacked on the substrate in a stepped manner. Leads are set on the control chip, the memory chip and the substrate for electrical connection. The chip packaging material is filled on the substrate through a mold and the packaging material is covered with the control chip and the memory chip. After vacuum degassing, the curing operation is performed. The curing method is: first stage: 120℃ / 2 hours; second stage: 150℃ / 2 hours.

[0064] A chip packaging structure is obtained.

[0065] Example 4 This embodiment is used to illustrate the chip packaging material and preparation method disclosed in the present invention, including the following steps: Step 1: Preparation of anhydride-terminated polyimide acid 3,3',4,4'-Benzophenone tetracarboxylic dianhydride (5.00 mol) and 4,4-diaminodiphenyl ether (ODA, 4.80 mol) were added to a four-necked flask equipped with a mechanical stirrer, a thermometer, and a nitrogen inlet, and N-methylpyrrolidone (NMP, 1500 mL) was added and stirred to dissolve to obtain a dibasic acid anhydride solution and a diamine solution, respectively; Under nitrogen protection, the dibasic acid anhydride solution was added dropwise to the diamine solution, and the mixture was stirred at 0° C. for 4 hours to form an anhydride-terminated polyimide acid solution.

[0066] Step 2: Preparation of polyether-modified polyamic acid by block polymerization The polyether diamine (Jeffamine D-230) was slowly added dropwise to the above anhydride-terminated polyimide acid solution, keeping the temperature below 25°C. The reaction intermediate was detected by infrared spectroscopy (FTIR), and the anhydride characteristic peak was at 1780 cm -1 and 1850cm -1 When the characteristic peak disappears, the addition is terminated, and the temperature is raised to 50°C and the reaction is continued for 6 hours to generate amino-terminated polyether-modified polyamic acid; After the reaction was completed, part of the solvent was evaporated under reduced pressure to make the solid content of the polyether-modified polyamic acid solution 20%.

[0067] Step 3: Preparation of chip packaging materials Bisphenol A epoxy resin (E-51) 62g Polyether modified polyamic acid solution 60g Methylnadic anhydride (MNA) 10g 2-Ethyl-4-methylimidazole 1.2g Nano-silicon dioxide (treated with KH-560) 6g Phenyl glycidyl ether 3g Hexamethylene diisocyanate trimer 3g Steps: Add bisphenol A epoxy resin and polyether modified polyamic acid solution into the reactor and continue stirring at 60°C for 2 hours to ensure uniform dispersion; Add methyl nadic anhydride, 2-ethyl-4-methylimidazole and phenyl glycidyl ether in sequence, and stir at 50°C for 1 hour; Add nano-silica treated with silane coupling agent (KH-560) and disperse at high speed (2000 rpm) for 2 hours; Finally, add hexamethylene diisocyanate trimer and stir at low speed for 30 minutes; Vacuum degassing (-0.1 MPa, 30 minutes) was performed to obtain a uniform chip packaging material. Part of the chip packaging material was taken for testing, and the remaining packaging material was used for packaging in step 4.

[0068] Step 4: Chip Packaging The control chip and the multi-layer memory chip are staggered and stacked on the substrate in a stepped manner. Leads are set on the control chip, the memory chip and the substrate for electrical connection. The chip packaging material is filled on the substrate through a mold and the packaging material is covered with the control chip and the memory chip. After vacuum degassing, the curing operation is performed. The curing method is: first stage: 120℃ / 2 hours; second stage: 150℃ / 2 hours.

[0069] A chip packaging structure is obtained.

[0070] Example 5 This embodiment is used to illustrate the chip packaging material and preparation method disclosed in the present invention, including the following steps: Step 1: Preparation of anhydride-terminated polyimide acid 4,4'-(Hexafluoroisopropylene) diphthalic anhydride (6FDA, 5.00 mol) and 4,4-diaminodiphenyl ether (ODA, 4.80 mol) were added to a four-necked flask equipped with a mechanical stirrer, a thermometer, and a nitrogen inlet, and N-methylpyrrolidone (NMP, 1500 mL) was added and stirred to dissolve to obtain a dibasic anhydride solution and a diamine solution, respectively; Under nitrogen protection, the dibasic acid anhydride solution was added dropwise to the diamine solution, and the mixture was stirred at 0° C. for 4 hours to form an anhydride-terminated polyimide acid solution.

[0071] Step 2: Preparation of polyether-modified polyamic acid by block polymerization The polyether diamine (Jeffamine D-230) was slowly added dropwise to the above anhydride-terminated polyimide acid solution, keeping the temperature below 25°C. The reaction intermediate was detected by infrared spectroscopy (FTIR), and the anhydride characteristic peak was at 1780 cm -1 and 1850cm -1 When the characteristic peak disappears, the addition is terminated, and the temperature is raised to 50°C and the reaction is continued for 6 hours to generate amino-terminated polyether-modified polyamic acid; After the reaction was completed, part of the solvent was evaporated under reduced pressure to make the solid content of the polyether-modified polyamic acid solution 20%.

[0072] Step 3: Preparation of chip packaging materials Bisphenol A epoxy resin (E-51) 62g Polyether modified polyamic acid solution 60g Methylnadic anhydride (MNA) 10g 2-Ethyl-4-methylimidazole 1.2g Nano-silicon dioxide (treated with KH-560) 6g Phenyl glycidyl ether 3g Steps: Add bisphenol A epoxy resin and polyether modified polyamic acid solution into the reactor and continue stirring at 60°C for 2 hours to ensure uniform dispersion; Add methyl nadic anhydride, 2-ethyl-4-methylimidazole and phenyl glycidyl ether in sequence, and stir at 50°C for 1 hour; Add nano-silica treated with silane coupling agent (KH-560) and disperse at high speed (2000 rpm) for 2 hours; Vacuum degassing (-0.1 MPa, 30 minutes) was performed to obtain a uniform chip packaging material. Part of the chip packaging material was taken for testing, and the remaining packaging material was used for packaging in step 4.

[0073] Step 4: Chip Packaging The control chip and the multi-layer memory chip are staggered and stacked on the substrate in a stepped manner. Leads are set on the control chip, the memory chip and the substrate for electrical connection. The chip packaging material is filled on the substrate through a mold and the packaging material is covered with the control chip and the memory chip. After vacuum degassing, the curing operation is performed. The curing method is: first stage: 120℃ / 2 hours; second stage: 150℃ / 2 hours.

[0074] A chip packaging structure is obtained.

[0075] Comparative Example 1 This comparative example is used to illustrate the chip packaging material and preparation method disclosed in the present invention, and includes the following steps: Preparation of chip packaging materials Bisphenol A epoxy resin (E-51) 62g N-Methylpyrrolidone 50g Methylnadic anhydride (MNA) 10g 2-Ethyl-4-methylimidazole 1.2g Nano-silicon dioxide (treated with KH-560) 6g Phenyl glycidyl ether 3g Steps: Add bisphenol A epoxy resin and N-methylpyrrolidone into the reactor and continue stirring at 60°C for 2 hours to ensure uniform dispersion; Add methyl nadic anhydride, 2-ethyl-4-methylimidazole and phenyl glycidyl ether in sequence, and stir at 50°C for 1 hour; Add nano-silica treated with silane coupling agent (KH-560) and disperse at high speed (2000 rpm) for 2 hours; Vacuum degassing (-0.1 MPa, 30 minutes) was performed to obtain a uniform chip packaging material. Part of the chip packaging material was taken for testing, and the remaining packaging material was used for packaging.

[0076] The control chip and the multi-layer memory chip are staggered and stacked on the substrate in a stepped manner. Leads are set on the control chip, the memory chip and the substrate for electrical connection. The chip packaging material is filled on the substrate through a mold and the packaging material is covered with the control chip and the memory chip. After vacuum degassing, the curing operation is performed. The curing method is: first stage: 120℃ / 2 hours; second stage: 150℃ / 2 hours.

[0077] A chip packaging structure is obtained.

[0078] Comparative Example 2 This comparative example is used to illustrate the chip packaging material and preparation method disclosed in the present invention, and includes the following steps: Step 1: Preparation of anhydride-terminated polyimide acid 4,4'-(Hexafluoroisopropylene) diphthalic anhydride (6FDA, 5.00 mol) and 4,4-diaminodiphenyl ether (ODA, 4.80 mol) were added to a four-necked flask equipped with a mechanical stirrer, a thermometer, and a nitrogen inlet, and N-methylpyrrolidone (NMP, 1500 mL) was added and stirred to dissolve to obtain a dibasic anhydride solution and a diamine solution, respectively; Under nitrogen protection, the dibasic acid anhydride solution was added dropwise to the diamine solution, and the mixture was stirred at 0°C for 4 hours to form an anhydride-terminated polyimide acid solution. After the reaction was completed, part of the solvent was evaporated under reduced pressure to make the solid content of the polyimide acid solution 20%.

[0079] Step 2: Preparation of chip packaging materials Bisphenol A epoxy resin (E-51) 62g 60g polyamic acid solution Methylnadic anhydride (MNA) 10g 2-Ethyl-4-methylimidazole 1.2g Nano-silicon dioxide (treated with KH-560) 6g Phenyl glycidyl ether 3g Hexamethylene diisocyanate trimer 3g Steps: Add bisphenol A epoxy resin and polyamic acid solution into the reactor and continue stirring at 60°C for 2 hours to ensure uniform dispersion; Add methyl nadic anhydride, 2-ethyl-4-methylimidazole and phenyl glycidyl ether in sequence, and stir at 50°C for 1 hour; Add nano-silica treated with silane coupling agent (KH-560) and disperse at high speed (2000 rpm) for 2 hours; Finally, add hexamethylene diisocyanate trimer and stir at low speed for 30 minutes; Vacuum degassing (-0.1 MPa, 30 minutes) was performed to obtain a uniform chip packaging material. Part of the chip packaging material was taken for testing, and the remaining packaging material was used for packaging in step 3.

[0080] Step 3: Chip Packaging The control chip and the multi-layer memory chip are staggered and stacked on the substrate in a stepped manner. Leads are set on the control chip, the memory chip and the substrate for electrical connection. The chip packaging material is filled on the substrate through a mold and the packaging material is covered with the control chip and the memory chip. After vacuum degassing, the curing operation is performed. The curing method is: first stage: 120℃ / 2 hours; second stage: 150℃ / 2 hours.

[0081] A chip packaging structure is obtained.

[0082] Comparative Example 3 This comparative example is used to illustrate the chip packaging material and preparation method disclosed in the present invention, and includes the following steps: Step 1: Preparation of anhydride-terminated polyimide acid 4,4'-(Hexafluoroisopropylene) diphthalic anhydride (6FDA, 5.00 mol) and 4,4-diaminodiphenyl ether (ODA, 4.80 mol) were added to a four-necked flask equipped with a mechanical stirrer, a thermometer, and a nitrogen inlet, and N-methylpyrrolidone (NMP, 1500 mL) was added and stirred to dissolve to obtain a dibasic anhydride solution and a diamine solution, respectively; Under nitrogen protection, the dibasic acid anhydride solution was added dropwise to the diamine solution, and the mixture was stirred at 0° C. for 4 hours to form an anhydride-terminated polyimide acid solution.

[0083] Step 2: Prepare the polyimide acid and polyether mixture Polyethylene glycol 200 (PEG200) (0.50 mol) was added to the above anhydride-terminated polyimide acid solution to obtain a polyimide acid and polyether mixture, and a portion of the solvent was evaporated under reduced pressure to adjust the solid content of the polyimide acid and polyether mixture solution to 20%.

[0084] Step 3: Preparation of chip packaging materials Bisphenol A epoxy resin (E-51) 62g 60g of polyimide acid and polyether mixture solution Methylnadic anhydride (MNA) 10g 2-Ethyl-4-methylimidazole 1.2g Nano-silicon dioxide (treated with KH-560) 6g Phenyl glycidyl ether 3g Hexamethylene diisocyanate trimer 3g Steps: Add the mixture solution of bisphenol A epoxy resin, polyimide acid and polyether into the reactor and continue stirring at 60°C for 2 hours to ensure uniform dispersion; Add methyl nadic anhydride, 2-ethyl-4-methylimidazole and phenyl glycidyl ether in sequence, and stir at 50°C for 1 hour; Add nano-silica treated with silane coupling agent (KH-560) and disperse at high speed (2000 rpm) for 2 hours; Finally, add hexamethylene diisocyanate trimer and stir at low speed for 30 minutes; Vacuum degassing (-0.1 MPa, 30 minutes) was performed to obtain a uniform chip packaging material. Part of the chip packaging material was taken for testing, and the remaining packaging material was used for packaging in step 4.

[0085] Step 4: Chip Packaging The control chip and the multi-layer memory chip are staggered and stacked on the substrate in a stepped manner. Leads are set on the control chip, the memory chip and the substrate for electrical connection. The chip packaging material is filled on the substrate through a mold and the packaging material is covered with the control chip and the memory chip. After vacuum degassing, the curing operation is performed. The curing method is: first stage: 120℃ / 2 hours; second stage: 150℃ / 2 hours.

[0086] A chip packaging structure is obtained.

[0087] Comparative Example 4 This comparative example is used to illustrate the chip packaging material and preparation method disclosed in the present invention, and includes the following steps: Step 1: Preparation of anhydride-terminated polyimide acid 4,4'-(Hexafluoroisopropylene) diphthalic anhydride (6FDA, 5.00 mol) and 4,4-diaminodiphenyl ether (ODA, 4.80 mol) were added to a four-necked flask equipped with a mechanical stirrer, a thermometer, and a nitrogen inlet, and N-methylpyrrolidone (NMP, 1500 mL) was added and stirred to dissolve to obtain a dibasic anhydride solution and a diamine solution, respectively; Under nitrogen protection, the dibasic acid anhydride solution was added dropwise to the diamine solution, and the mixture was stirred at 0° C. for 4 hours to form an anhydride-terminated polyimide acid solution.

[0088] Step 2: Preparation of polyether-modified polyamic acid by block polymerization The polyether diamine (Jeffamine D-230) was slowly added dropwise to the above anhydride-terminated polyimide acid solution, keeping the temperature below 25°C. The reaction intermediate was detected by infrared spectroscopy (FTIR), and the anhydride characteristic peak was at 1780 cm -1 and 1850cm -1 Before the characteristic peak disappears, the addition is stopped, the temperature is raised to 50°C and the reaction is continued for 6 hours to generate anhydride-terminated polyether-modified polyamic acid. The sample is taken for infrared spectroscopy (FTIR) detection, and the anhydride characteristic peak (1780 cm -1 and 1850cm -1 ); After the reaction was completed, part of the solvent was evaporated under reduced pressure to make the solid content of the polyether-modified polyamic acid solution 20%.

[0089] Step 3: Preparation of chip packaging materials Bisphenol A epoxy resin (E-51) 62g Polyether modified polyamic acid solution 60g Methylnadic anhydride (MNA) 10g 2-Ethyl-4-methylimidazole 1.2g Nano-silicon dioxide (treated with KH-560) 6g Phenyl glycidyl ether 3g Hexamethylene diisocyanate trimer 3g Steps: Add bisphenol A epoxy resin and polyether modified polyamic acid solution into the reactor and continue stirring at 60°C for 2 hours to ensure uniform dispersion; Add methyl nadic anhydride, 2-ethyl-4-methylimidazole and phenyl glycidyl ether in sequence, and stir at 50°C for 1 hour; Add nano-silica treated with silane coupling agent (KH-560) and disperse at high speed (2000 rpm) for 2 hours; Finally, add hexamethylene diisocyanate trimer and stir at low speed for 30 minutes; Vacuum degassing (-0.1 MPa, 30 minutes) was performed to obtain a uniform chip packaging material. Part of the chip packaging material was taken for testing, and the remaining packaging material was used for packaging in step 4.

[0090] Step 4: Chip Packaging The control chip and the multi-layer memory chip are staggered and stacked on the substrate in a stepped manner. Leads are set on the control chip, the memory chip and the substrate for electrical connection. The chip packaging material is filled on the substrate through a mold and the packaging material is covered with the control chip and the memory chip. After vacuum degassing, the curing operation is performed. The curing method is: first stage: 120℃ / 2 hours; second stage: 150℃ / 2 hours.

[0091] A chip packaging structure is obtained.

[0092] Performance Testing After thermal curing, the chip packaging material prepared above was subjected to the following performance tests: 1. Glass transition temperature (Tg) test Sample preparation: Take 5-10 mg of the encapsulation material solid and cut into thin slices; Test conditions: Differential scanning calorimeter, nitrogen atmosphere (50 mL / min); heating rate: 10°C / min; temperature range: 30°C to 300°C, two temperature scans; the inflection point (midpoint) of the second scan curve is taken as the Tg value.

[0093] 2. Dielectric constant test Refer to standard ASTM D2520 to test the dielectric constant of cured packaging materials.

[0094] 3. Tensile strength and elongation at break test Refer to standard ASTM D638 to test the tensile strength and elongation at break of the cured packaging material.

[0095] The test results are entered in Table 1.

[0096] Table 1 It can be seen from the test results in Table 1 that the chip packaging material provided by the present invention has a higher glass transition temperature, indicating that it has excellent high-temperature resistance and is conducive to maintaining stability at high temperatures. It is suitable for chip packaging in complex application environments and high-end processes such as wave soldering. At the same time, the chip packaging material has a low dielectric constant, which can reduce signal loss in high-frequency environments and is suitable for 5G high-frequency chips. In addition, the chip packaging material has good mechanical properties, mainly in its improved elongation at break, indicating that it has high flexibility, can avoid material fatigue caused by volume expansion and contraction, reduce the occurrence of cracks, and ensure its packaging performance.

[0097] Comparing the test results of Example 1 and Example 4, it can be seen that the use of fluorine-containing dibasic acid anhydride (such as 6FDA) as the polymerization monomer of polyamic acid in Example 1 is beneficial to reducing the dielectric constant of the material, while Example 4, which does not contain fluorine, will lead to an increase in the dielectric constant due to the influence of material polarity.

[0098] Comparing the test results of Example 1 and Example 5, it can be seen that the addition of hexamethylene diisocyanate trimer promotes the formation of multi-branched crosslinks between bisphenol A epoxy resin and polyether modified polyamic acid, which is beneficial to further improve the high temperature resistance and mechanical properties of the material.

[0099] The above description is only a preferred embodiment of the present invention and is not intended to limit the present invention. Any modifications, equivalent substitutions and improvements made within the spirit and principles of the present invention should be included in the scope of protection of the present invention.

Claims

1. A chip packaging structure, characterized in that: The present invention comprises a substrate, a chip and a packaging layer, wherein the packaging layer and the chip are located on the substrate, and the packaging layer covers the chip. The chip comprises a plurality of memory chips, and the plurality of memory chips are stacked in a stepped manner to form a stepped surface on one side of each of the plurality of memory chips. The memory chip is provided with at least one soldering pad at the position of the stepped surface, and the soldering pads of two adjacent memory chips are connected to each other by a lead. The glass transition temperature of the packaging layer is 210°C~250°C, the dielectric constant is 2.8~3.2, the tensile strength is 115~141MPa, and the elongation at break is 5.7%~8%.

2. The chip packaging structure according to claim 1, wherein: The chip further includes a control chip. The control chip is located on the substrate and below the plurality of memory chips. The control chip is electrically connected to at least one of the memory chips.

3. The chip packaging structure according to claim 1, wherein: The encapsulation layer is obtained by curing the chip encapsulation material, and the chip encapsulation material includes the following components by weight: 58-67 parts of bisphenol A epoxy resin, 9-19 parts of polyether-modified polyamic acid, 9-16 parts of anhydride curing agent, 0.5-2 parts of imidazole accelerator, 2-10 parts of filler and 2-5 parts of reactive diluent; The polyether-modified polyamic acid includes a block-copolymerized polyamic acid segment and a polyether segment, and the polyether-modified polyamic acid has a terminal amino group.

4. The chip packaging structure according to claim 1, wherein: The polyether-modified polyamic acid is prepared by the following method: preparing anhydride-terminated polyimide acid; The polyether diamine is mixed with anhydride-terminated polyimide acid to carry out block polymerization, wherein the amount of the polyether diamine is greater than the amount of the anhydride-terminated polyimide acid to obtain a polyether-modified polyamic acid with terminal amino groups.

5. The chip packaging structure according to claim 4, wherein: The anhydride-terminated polyimide acid is prepared by the following method: The dibasic acid anhydride and the diamine are polymerized, and the amount of the dibasic acid anhydride is greater than the amount of the diamine, to obtain an anhydride-terminated polyimide acid.

6. The chip packaging structure according to claim 5, characterized in that: The diamine includes at least one of 4,4-diaminodiphenyl ether, 4,4'-diamino-2,2'-bis(trifluoromethyl)biphenyl and 2-(4-aminophenyl)-5-aminobenzimidazole; the dibasic acid anhydride includes at least one of 4,4'-(hexafluoroisopropylene)diphthalic anhydride, 3,3',4,4'-dibenzophenone tetracarboxylic dianhydride or 2,3,3',4'-diphenyl ether tetracarboxylic dianhydride.

7. The chip packaging structure according to claim 1, wherein: The acid anhydride curing agent includes one or more of methyl nadic anhydride, methyltetrahydrophthalic anhydride, methyltetrahydrophthalic anhydride, trimellitic anhydride, polyazetaedioic anhydride and dodecenylsuccinic anhydride; the imidazole accelerator includes one or more of 2-methylimidazole, 2-ethyl-4-methylimidazole and 2-phenylimidazole; the filler includes one or more of nano-silica, alumina, calcium carbonate, talc and glass microbeads; and the reactive diluent includes phenyl glycidyl ether.

8. The chip packaging structure according to claim 7, wherein: The filler is selected from nano-silicon dioxide, and the surface of the nano-silicon dioxide is treated with a silane coupling agent.

9. The chip packaging structure according to claim 1, wherein: The chip packaging material further comprises 20 to 100 parts by weight of a solvent, wherein the solvent comprises one or more of N-methylpyrrolidone, dimethylacetamide, dimethylformamide, and gamma-butyrolactone.

10. The chip packaging structure according to claim 1, wherein: The chip packaging material further includes 2 to 5 parts by weight of hexamethylene diisocyanate trimer.

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