Multi-channel neural signal recorder front-end circuit and method with pseudo-wave suppression effect

Abstract

The application discloses a multi-channel neural signal recorder front-end circuit and method with pseudo-wave suppression effect, and belongs to the technical field of integrated circuits. The circuit comprises an implantable neural recording array chip, the implantable neural recording array chip comprises a plurality of acquisition array units, each channel comprises a chopper operational amplifier for suppressing pseudo-wave, the output ends of the plurality of chopper operational amplifiers are connected with a programmable adjustable gain operational amplifier, and the programmable adjustable gain operational amplifier is connected with an analog-to-digital converter. The application also discloses a multi-point neural signal acquisition method based on the above circuit, and the acquisition of multi-channel neural signals is realized. Each acquisition array unit is connected with a chopper operational amplifier for suppressing pseudo-wave, the suppression of noise and pseudo-wave is realized, the accuracy of neural signal acquisition is improved, the same adjustable gain amplifier and analog-to-digital converter circuit are shared by each channel, the area of a layout and power consumption are saved, more information can be acquired, and cost is saved.

Description

Technical Field

[0001] This invention relates to the field of integrated circuit technology, and in particular to a front-end circuit and method for a multi-channel neural signal recorder with spurious wave suppression effect. Background Technology

[0002] Currently, the main method for achieving multi-channel acquisition is single-column multi-row decoding technology, with each channel using an adjustable gain amplifier and an analog-to-digital converter. The drawback of this method is that if more neural signals need to be acquired, multiple chips are required. Using an adjustable gain amplifier and analog-to-digital converter for each channel increases the layout area and power consumption, making it unsuitable for miniaturized, economical, multi-channel neural signal recording systems. Furthermore, noise and artifacts are severe during multi-channel neural signal acquisition, directly affecting the accuracy of the acquired signals. Summary of the Invention

[0003] The purpose of this invention is to provide a front-end circuit and method for a multi-channel neural signal recorder with spurious wave suppression effect, thereby solving the above-mentioned technical problems.

[0004] To achieve the above objectives, the present invention provides a multi-channel neural signal recorder front-end circuit with spurious wave suppression effect, including an implantable neural recording array chip. The implantable neural recording array chip includes several acquisition array units. Each channel in the implantable neural recording array chip includes a chopper operational amplifier for suppressing spurious waves. The output terminals of the multiple chopper operational amplifiers are connected to a programmable adjustable gain operational amplifier, which is connected to an analog-to-digital converter.

[0005] Preferably, the implantable neural recording array chip further includes a row decoder and a column decoder;

[0006] The row decoder generates a row decoding signal by inputting row digital codes, and the column decoder generates a column decoding signal by inputting column digital codes. The row decoder and column decoder are connected to a signal selection and conversion module. The signal selection and conversion module includes a channel selection submodule and a conversion submodule. The channel selection submodule is used to select the corresponding channel for signal transmission and includes a NOR gate and a first analog switch. The two input terminals of the NOR gate are connected to the output terminals of the row decoder and the column decoder, respectively. The output terminal of the NOR gate is connected to the control pin of the first analog switch. The corresponding acquisition array unit is selected by time-division multiplexing using the address scanning method.

[0007] The conversion submodule includes a single-ended to differential converter, which is connected to a first analog switch to convert a single-ended signal into a differential signal.

[0008] Preferably, the chopper operational amplifier includes an input coupling capacitor, a first operational transconductance amplifier, a second operational transconductance amplifier, and a low-pass filter connected in series; the output of the single-ended to differential converter is connected to the input of the chopper operational amplifier.

[0009] Preferably, the chopper operational amplifier also includes a feedforward spurious wave suppression module, an input impedance boosting module, a ripple suppression module, and a high-pass filter module.

[0010] Preferably, the feedforward spurious wave suppression module includes an operational amplifier. The negative input terminal of the operational amplifier is connected to the two input terminals of the chopper operational amplifier through two parallel input capacitors. A feedback capacitor is connected between the output terminal of the operational amplifier and the negative input terminal of the operational amplifier. The positive input terminal of the operational amplifier is connected to a power supply. The output terminal of the operational amplifier is connected to two parallel output capacitors, which are respectively connected to the positive and negative input terminals of the first operational transconductance amplifier.

[0011] Preferably, the input impedance boosting module includes two impedance capacitors connected in parallel. The two ends of the two impedance capacitors are respectively connected to the input terminals of two chopper operational amplifiers, and the other two ends of the two impedance capacitors are respectively connected to the two output terminals of the second operational transconductance amplifier.

[0012] Preferably, the ripple suppression module includes a ripple feedback circuit, the positive and negative input terminals of which are connected to the positive and negative output terminals of the second operational transconductance amplifier, respectively, and the positive and negative output terminals of the ripple feedback circuit are connected to the positive and negative output terminals of the operational transconductance amplifier, respectively.

[0013] Preferably, the high-pass filter module includes two high-pass filter feedback circuits. One end of each high-pass filter feedback circuit is connected to the positive input terminal and the negative input terminal of the first operational transconductance amplifier, respectively, and the other end of each high-pass filter feedback circuit is connected to the positive output terminal and the negative output terminal of the second operational transconductance amplifier, respectively.

[0014] Preferably, the output of the chopper operational amplifier is connected to a programmable variable gain amplifier via a second analog switch.

[0015] The specific steps of the method for a multi-channel neural signal recorder front-end circuit with spurious wave suppression effect described above are as follows:

[0016] Step S1: Select the corresponding acquisition array unit using time-division multiplexing via address scanning, and then acquire and read data from the selected acquisition array unit.

[0017] Step S2: The read signal is processed by a corresponding chopper operational amplifier to suppress power frequency common-mode interference, high-frequency interference, high-frequency noise, and spurious waves;

[0018] The feedforward spurious wave suppression module suppresses spurious waves and common-mode interference.

[0019] The ripple suppression module is used to suppress the triangular ripple and offset generated by the first operational transconductance amplifier.

[0020] The input impedance of the circuit is increased by using an input impedance boosting module, which reduces the load effect of the signal source.

[0021] The high-pass filter module, combined with the feedback circuit in the second operational transconductance amplifier, is used to suppress high-frequency noise interference in the signal and provide bias.

[0022] Simultaneously, the second analog switch of the corresponding chopper operational amplifier is turned on to output the corresponding chopper operational amplifier;

[0023] Step S3: The chopper operational amplifier output undergoes gain level adjustment and analog-to-digital conversion through a shared programmable adjustable gain operational amplifier and analog-to-digital converter. The output digital signal is encoded with redundant bits and contains neural signals, row information, and column information.

[0024] Therefore, the present invention employs the aforementioned multi-channel neural signal recorder front-end circuit and method with spurious wave suppression effect, which has the following beneficial effects:

[0025] (1) An implantable neural recording array chip is used. Each acquisition array unit in the implantable neural recording array chip is connected to a chopper operational amplifier for suppressing pseudo-waves. Multiple chopper operational amplifiers share a programmable adjustable gain operational amplifier and an analog-to-digital converter to realize the acquisition of multi-channel and multi-point neural signals. Each channel shares the same adjustable gain amplifier and analog-to-digital converter circuit, which saves the layout area and power consumption, can acquire more information, and saves more costs.

[0026] (2) Each acquisition array unit is connected to a chopper operational amplifier for suppressing spurious waves, thereby suppressing noise and spurious waves and improving the accuracy of neural signal acquisition.

[0027] The technical solution of the present invention will be further described in detail below with reference to the accompanying drawings and embodiments. Attached Figure Description

[0028] Figure 1 This is a schematic diagram of the front-end circuit of a multi-channel neural signal recorder with spurious wave suppression effect according to the present invention;

[0029] Figure 2 This is a schematic diagram of the chopper operational amplifier circuit of the present invention.

[0030] Figure Labels

[0031] 1. Implantable neural recording array chip; 101. Acquisition array unit; 102. Row decoder; 103. Column decoder; 104. NOR gate; 105. First analog switch; 106. Single-ended to differential converter; 2. Chopper operational amplifier; 201. Input coupling capacitor; 202. First operational transconductance amplifier; 203. Second operational transconductance amplifier; 204. Low-pass filter; 205. Feedforward spurious wave suppression module; 2051. Operational amplifier; 2052. Input capacitor; 2053. Feedback capacitor; 2054. Output capacitor; 206. Input impedance boosting module; 2061. Impedance capacitor; 207. Ripple suppression module; 208. High-pass filter module; 2081. High-pass filter feedback circuit; 209. Second analog switch; 3. Programmable adjustable gain operational amplifier; 4. Analog-to-digital converter. Detailed Implementation

[0032] In the description of this invention, it should be noted that the terms "upper," "lower," "inner," and "outer," etc., indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings, or the orientation or positional relationship commonly used when the product is in use. They are used only for the convenience of describing the invention and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation. Therefore, they should not be construed as limitations on the invention. In the description of this invention, it should also be noted that, unless otherwise explicitly specified and limited, the terms "set," "install," and "connect" should be interpreted broadly. For example, they can refer to a fixed connection, a detachable connection, or an integral connection; they can refer to a mechanical connection or an electrical connection; they can refer to a direct connection or an indirect connection through an intermediate medium; and they can refer to the internal communication between two components. Those skilled in the art can understand the specific meaning of the above terms in this invention based on the specific circumstances.

[0033] The embodiments of the present invention will now be described in detail with reference to the accompanying drawings.

[0034] like Figure 1As shown, a front-end circuit for a multi-channel neural signal recorder with spurious wave suppression includes an implantable neural recording array chip 1. This embodiment uses an 8*8 array chip. The implantable neural recording array chip 1 includes 64 acquisition array units 101, which can simultaneously acquire neural signals from 64 nerve endings. The number of acquisition array units 101 can be adjusted according to actual acquisition needs. Each channel in the implantable neural recording array chip 1 includes a chopper operational amplifier 2 for spurious wave suppression. The chopper operational amplifier 2 acquires the neural signal and reduces power frequency common-mode interference, high-frequency interference, high-frequency noise, and spurious waves in the neural signal. The outputs of multiple chopper operational amplifiers 2 are all connected to a programmable adjustable gain operational amplifier 3. The programmable adjustable gain operational amplifier 3 is connected to an analog-to-digital converter 4. Multiple chopper operational amplifiers 2 share one programmable adjustable gain operational amplifier 3 and one analog-to-digital converter 4, achieving a smaller layout area and reducing manufacturing costs.

[0035] Using the 0.18μm process SMIC18BCD provided by SMIC, a circuit structure was built in Cadence Virtuoso. Simulation results verified the high feasibility of the design. The simulation results show that the method can realize the acquisition of multi-channel neural signals, and the chopper operational amplifier has good suppression of common-mode and differential-mode spurious signals. Under a low voltage supply of 1.2V, the single chopper operational amplifier has a bandpass gain of about 20dB, a high-pass cutoff frequency of about 750mHz, a low-pass cutoff frequency of about 7.5kHz, a phase margin of about -16dB, and an equivalent input root mean square noise of about 2.56μVrms within the complete neural signal band, which is about 90% lower than the equivalent input root mean square noise when the chopper circuit is turned off.

[0036] The implantable neural recording array chip 1 also includes a row decoder 102 and a column decoder 103. Both the row decoder 102 and the column decoder 103 are 3-input 3-to-8 decoders, which generate 8 different decoding signals through three binary numbers to select the corresponding row and column. The row decoder 102 generates row decoding signals by inputting row digital codes (A1, A2, and A3), and the column decoder 103 generates column decoding signals by inputting column digital codes (B1, B2, and B3) to achieve row and column selection. The row decoder 102 and the column decoder 103 are connected to a signal selection and conversion module. The signal selection and conversion module includes a channel selection submodule and a conversion submodule. The channel selection submodule is used to select the corresponding channel for signal transmission and includes a NOR gate 104 and a first analog switch 105. The two input terminals of the NOR gate 104 are connected to the output terminals of the row decoder 102 and the column decoder 103, respectively. The truth table of the NOR gate 104 is shown in Table 1.

[0037] Table 1 Truth table of NOR gate 104

[0038] Row decode signal Column decode signal NOR gate 104 output 1 1 0 1 0 0 0 1 0 0 0 1

[0039] The output of NOR gate 104 is connected to the control pin of the first analog switch 105. As shown in the table above, when both the row decoding signal and the column decoding signal are low, NOR gate 104 will output a high level. The first analog switch 105 is turned on when the control pin is high and turned off when the control pin is low. The corresponding acquisition array unit 101 is selected using time-division multiplexing via address scanning, enabling the acquisition and reading of neural signals from different positions in the 8*8 acquisition array unit 101. The conversion submodule includes a single-ended to differential converter 106, which is connected to the first analog switch 105 and is used to convert single-ended signals into differential signals.

[0040] like Figure 2 As shown, the chopper operational amplifier 2 includes an input coupling capacitor 201, a first operational transconductance amplifier 202, a second operational transconductance amplifier 203, and a low-pass filter 204 connected in series. The input coupling capacitor 201 is used to set the intermediate frequency gain and suppress DC offset and interference from the skin electrodes. The output of the single-ended to differential converter 106 is connected to the input of the chopper operational amplifier 2, which has AC gain and neural signal amplification functions. The chopper operational amplifier 2 has a built-in 20dB gain, which can achieve accurate extraction and amplification of neural signals, and suppress noise interference and spurious signals in other frequency bands.

[0041] To improve the performance of the chopper operational amplifier 2, the chopper operational amplifier 2 also includes a feedforward spurious wave suppression module 205, an input impedance boosting module 206, a ripple suppression module 207, and a high-pass filter module 208.

[0042] The feedforward spurious wave suppression module 205 includes an operational amplifier 2051. The negative input terminal of the operational amplifier 2051 is connected to the two input terminals of the chopper operational amplifier 2 through two parallel input capacitors 2052. A feedback capacitor 2053 is connected between the output terminal and the negative input terminal of the operational amplifier 2051. The input capacitors 2052 and the feedback capacitors 2053 form an AC adder circuit. The positive input terminal of the operational amplifier 2051 is connected to the power supply. The output terminal of the operational amplifier 2051 is connected to two parallel output capacitors 2054. The two output capacitors 2054 are respectively connected to the positive and negative input terminals of the first operational transconductance amplifier 202, forming a front feedback structure to improve the common-mode rejection effect and suppress the influence of common-mode spurious waves.

[0043] The input impedance boosting module 206 includes two parallel impedance capacitors 2061. The two ends of the two impedance capacitors 2061 are respectively connected to the input terminals of the two chopper operational amplifiers 2, and the other two ends of the two impedance capacitors 2061 are respectively connected to the two output terminals of the second operational transconductance amplifier 203.

[0044] The ripple suppression module 207 includes a ripple feedback circuit. The positive and negative input terminals of the ripple feedback circuit are connected to the positive and negative output terminals of the second operational transconductance amplifier 203, respectively. The positive and negative output terminals of the ripple feedback circuit are also connected to the positive and negative output terminals of the operational transconductance amplifier, respectively, to suppress the offset and output triangular ripple of the first operational transconductance amplifier 202.

[0045] The high-pass filter module 208 includes two high-pass filter feedback circuits 2081. One end of each high-pass filter feedback circuit 2081 is connected to the positive and negative input terminals of the first operational transconductance amplifier 202, respectively. The other end of each high-pass filter feedback circuit 2081 is connected to the positive and negative output terminals of the second operational transconductance amplifier 203, respectively. This is used to suppress the offset generated by the second operational transconductance amplifier 203, provides bias, and increases the input impedance of the first operational transconductance amplifier 202.

[0046] Based on the above additional functional modules and a comparison with a conventional chopper operational amplifier, simulation results demonstrate that the conventional chopper operational amplifier still contains spurious signals in its output when a large-swing input spurious signal is added. However, the chopper operational amplifier with the added feedforward spurious signal suppression circuit effectively suppresses the spurious signal, as can be seen from the waveform. The first operational transconductance amplifier 202 of the conventional chopper operational amplifier is affected by the input offset voltage, causing the input compensation capacitor of the first operational transconductance amplifier to generate a constant current. This results in a linear change in the voltage across the input compensation capacitor, producing a triangular ripple voltage. For an input offset voltage of 10mV, the amplitude of the output ripple is approximately 352mV. However, after adding the ripple suppression module 207, for an input offset voltage of 10mV, the triangular ripple of the output signal is clearly suppressed by observing the simulation waveform. The input impedance of a conventional chopper operational amplifier is affected by the chopping frequency and the size of the input capacitor. For a chopper operational amplifier with a chopping frequency of 25KHz and an input capacitor of 4pF, the input resistance is only 5MΩ, while the input impedance of the chopper operational amplifier after adding the input impedance boosting module 207 is about 40GΩ.

[0047] The output of the chopper operational amplifier 2 is connected to the programmable variable gain amplifier via the second analog switch 209. The programmable variable gain amplifier achieves AC amplification at different swing levels by changing the gain level (this embodiment has four different levels). The opening and closing principle of the second analog switch 209 is the same as that of the first analog switch 105, and will not be described again here. The analog-to-digital converter 4 is a successive approximation (SAR) analog-to-digital converter with a resolution of 10 bits and an input range close to full quantization range. The analog-to-digital converter 4 can convert the voltage value of the input neural signal into a digital quantity and output it in parallel. In order to distinguish the corresponding sampling channels, "row bits" and "column bits" are added to the output serial data to mark the sampling channels. In practical applications, some crosstalk will be generated during the switching of different channels. This is because the capacitor charge on the corresponding channel is not completely released before the switching, causing the charge to flow back into the channel, resulting in the sampled voltage being different from the actual voltage to be sampled. In order to solve this problem, the technical solution of this embodiment combines the programmable variable gain amplifier and the analog-to-digital converter 4. By using a switched capacitor amplifier circuit, the three functions of variable gain, amplification and sample-and-hold are combined, which not only eliminates the discharge problem during the channel switching process, but also reduces the overall chip area and reduces costs.

[0048] Therefore, the neural recorder circuit constructed with the above structure can accurately extract neural signals from 50uV to 500uV and amplify them to the range that the analog-to-digital converter 4 can quantize. Switching channels and changing the gain will not cause signal distortion or significant crosstalk.

[0049] The specific steps of the method for a multi-channel neural signal recorder front-end circuit with spurious wave suppression effect described above are as follows:

[0050] Step S1: Select the corresponding acquisition array unit 101 by time division multiplexing using the address scanning method, and perform data acquisition and reading on the selected acquisition array unit 101.

[0051] Step S2: The read signal is passed through the corresponding chopper operational amplifier 2 to suppress power frequency common-mode interference, high-frequency interference, high-frequency noise and spurious waves.

[0052] The feedforward spurious wave suppression module 205 suppresses spurious waves and common-mode interference.

[0053] The ripple suppression module 207 is used to suppress the triangular ripple and offset generated by the first operational transconductance amplifier 202.

[0054] The input impedance of the circuit is increased by the input impedance boosting module 206, thereby reducing the load effect of the signal source.

[0055] The high-pass filter module 208, in conjunction with the feedback circuit in the second operational transconductance amplifier 203, is used to suppress high-frequency noise interference in the signal and provides bias.

[0056] At the same time, the second analog switch 209 of the corresponding chopper operational amplifier 2 is turned on for the output of the corresponding chopper operational amplifier 2.

[0057] Step S3: The output of the chopper operational amplifier 2 is adjusted in gain and converted to digital by the shared programmable adjustable gain operational amplifier 3 and analog-to-digital converter 4. The digital signal is output through redundant bit encoding. The digital signal contains neural signals, row information and column information. That is, the lower 10 bits are the 10-bit digital signal output by the analog-to-digital converter 4, bits 11-13 are the column information of the selected array unit, and bits 14-16 are the row information of the selected array unit. The row information and column information are obtained through the input terminals of the row decoder 102 and the column decoder 103, respectively. This realizes the calibration of the corresponding channel, distinguishes the neural signals acquired by multiple channels, improves the overall utilization of the circuit, and reduces the layout area.

[0058] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention and not to limit them. Although the present invention has been described in detail with reference to preferred embodiments, those skilled in the art should understand that modifications or equivalent substitutions can still be made to the technical solutions of the present invention, and these modifications or equivalent substitutions cannot cause the modified technical solutions to deviate from the spirit and scope of the technical solutions of the present invention.

Claims

1. A front-end circuit for a multi-channel neural signal recorder with spurious wave suppression effect, characterized in that: The device includes an implantable neural recording array chip, which comprises several acquisition array units. Each channel in the implantable neural recording array chip contains a chopper operational amplifier for suppressing spurious signals. The outputs of multiple chopper operational amplifiers are connected to a programmable adjustable gain operational amplifier. The programmable adjustable gain operational amplifier is connected to an analog-to-digital converter. The outputs of the chopper operational amplifiers are adjusted for gain level and converted to analog-to-digital signals through a shared programmable adjustable gain operational amplifier and analog-to-digital converter. Implantable neural recording array chips also include row decoders and column decoders; The row decoder generates a row decoding signal by inputting row digital codes, and the column decoder generates a column decoding signal by inputting column digital codes. The row decoder and column decoder are connected to a signal selection and conversion module. The signal selection and conversion module includes a channel selection submodule and a conversion submodule. The channel selection submodule is used to select the corresponding channel for signal transmission and includes a NOR gate and a first analog switch. The two input terminals of the NOR gate are connected to the output terminals of the row decoder and the column decoder, respectively. The output terminal of the NOR gate is connected to the control pin of the first analog switch. The corresponding acquisition array unit is selected by time-division multiplexing using the address scanning method. The conversion submodule includes a single-ended to differential converter, which is connected to a first analog switch to convert a single-ended signal into a differential signal.

2. The front-end circuit of a multi-channel neural signal recorder with spurious wave suppression effect according to claim 1, characterized in that: The chopper operational amplifier includes an input coupling capacitor, a first operational transconductance amplifier, a second operational transconductance amplifier, and a low-pass filter connected in series; the output of the single-ended to differential converter is connected to the input of the chopper operational amplifier.

3. The front-end circuit of a multi-channel neural signal recorder with spurious wave suppression effect according to claim 2, characterized in that: The chopper operational amplifier also includes a feedforward spurious wave suppression module, an input impedance boosting module, a ripple suppression module, and a high-pass filter module.

4. The front-end circuit of a multi-channel neural signal recorder with spurious wave suppression effect according to claim 3, characterized in that: The feedforward spurious wave suppression module includes an operational amplifier. The negative input terminal of the operational amplifier is connected to the two input terminals of the chopper operational amplifier through two parallel input capacitors. A feedback capacitor is connected between the output terminal of the operational amplifier and the negative input terminal of the operational amplifier. The positive input terminal of the operational amplifier is connected to the power supply. The output terminal of the operational amplifier is connected to two parallel output capacitors, which are respectively connected to the positive and negative input terminals of the first operational transconductance amplifier.

5. The front-end circuit of a multi-channel neural signal recorder with spurious wave suppression effect according to claim 4, characterized in that: The input impedance boosting module includes two parallel impedance capacitors. The two ends of the two impedance capacitors are respectively connected to the input terminals of two chopper operational amplifiers, and the other two ends of the two impedance capacitors are respectively connected to the two output terminals of the second operational transconductance amplifier.

6. The front-end circuit of a multi-channel neural signal recorder with spurious wave suppression effect according to claim 5, characterized in that: The ripple suppression module includes a ripple feedback circuit. The positive and negative input terminals of the ripple feedback circuit are connected to the positive and negative output terminals of the second operational transconductance amplifier, respectively. The positive and negative output terminals of the ripple feedback circuit are connected to the positive and negative output terminals of the first operational transconductance amplifier, respectively.

7. The front-end circuit of a multi-channel neural signal recorder with spurious wave suppression effect according to claim 6, characterized in that: The high-pass filter module includes two high-pass filter feedback circuits. One end of each high-pass filter feedback circuit is connected to the positive and negative input terminals of the first operational transconductance amplifier, respectively. The other end of each high-pass filter feedback circuit is connected to the positive and negative output terminals of the second operational transconductance amplifier, respectively.

8. The front-end circuit of a multi-channel neural signal recorder with spurious wave suppression effect according to claim 7, characterized in that: The output of the chopper operational amplifier is connected to a programmable adjustable gain operational amplifier via a second analog switch.

9. A method for a multi-channel neural signal recorder front-end circuit with spurious wave suppression effect based on claim 8, characterized in that, The specific steps are as follows: Step S1: Select the corresponding acquisition array unit using time-division multiplexing via address scanning, and then acquire and read data from the selected acquisition array unit. Step S2: The read signal is processed by a corresponding chopper operational amplifier to suppress power frequency common-mode interference, high-frequency interference, high-frequency noise, and spurious waves; The feedforward spurious wave suppression module suppresses spurious waves and common-mode interference. The ripple suppression module is used to suppress the triangular ripple and offset generated by the first operational transconductance amplifier. The input impedance of the circuit is increased by using an input impedance boosting module, which reduces the load effect of the signal source. The high-pass filter module, combined with the feedback circuit in the second operational transconductance amplifier, is used to suppress high-frequency noise interference in the signal and provide bias. Simultaneously, the second analog switch of the corresponding chopper operational amplifier is turned on to output the corresponding chopper operational amplifier; Step S3: The chopper operational amplifier output undergoes gain level adjustment and analog-to-digital conversion through a shared programmable adjustable gain operational amplifier and analog-to-digital converter. The output digital signal is encoded with redundant bits and contains neural signals, row information, and column information.

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