Multi-blind-buried-hole PCB design method, multi-blind-buried-hole PCB manufacturing method and PCB

By splicing core boards with the same core material and copper layer thickness in the graphic layer design of the PCB board, and combining the voltage division, board division and total voltage division processes, the signal transmission distortion and accuracy issues of PCB boards with multiple blind holes in high-frequency and high-speed products are solved, and the production of high-precision PCB boards with multiple blind and buried holes is achieved.

CN120676559APending Publication Date: 2025-09-19HUIZHOU KING BROTHER CIRCUIT TECH +1
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Patent Information

Application Number
CN202510817473.9
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2025-06-18
Publication Date
2025-09-19

AI Technical Summary

Technical Problem

Existing technologies cannot effectively solve the signal transmission distortion problem of PCB boards with multiple blind vias in high-frequency and high-speed products, and it is difficult to meet the precision requirements of products with multiple blind vias during the miniaturization and thinning process.

Method used

Adopting specific process design and process flow, by selecting core boards with the same material and copper layer thickness in the graphic layer design of the PCB board, a splicing graphic layer is formed, and through the process of partial pressure, sub-board and total pressure, a PCB board with multiple blind and buried holes is finally formed.

Benefits of technology

It improves the accuracy and product yield of PCB boards with multiple blind and buried vias, reduces the scrap rate, meets the production needs of high-performance products, improves the accuracy of products, improves the positioning accuracy, and reduces the expansion and contraction of products.

✦ Generated by Eureka AI based on patent content.

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Abstract

The invention relates to a multi-blind-buried-hole PCB design method, a multi-blind-buried-hole PCB manufacturing method and a PCB, and the method comprises the steps: pattern layer design, splicing of pattern layers corresponding to core boards with the same core board material, copper layer thickness and base material thickness, pattern manufacturing, and printing of at least two pattern layers on the same side surface of the core board according to the optimized pattern layer design, wherein the core plate material, the copper layer thickness and the base material thickness are the same; the core plates are subjected to partial pressure according to a preset lamination sequence; the core board is divided into at least two sub-boards according to the pattern layer, and one pattern layer is arranged on one side face of each sub-board; total pressing: the daughter boards are subjected to total pressing according to a preset lamination sequence to form a laminated board, and the PCB is formed by total pressing of the daughter boards subjected to the same step at the moment, so that the core board processing steps corresponding to the two daughter boards are the same, the PCB is obtained after total pressing, the minimum expansion and shrinkage can be ensured, the requirement of a high-performance product can be met, the alignment precision of the product within 16 layers during total pressing can be smaller than or equal to 4 mil, and the production efficiency is improved. The precision is technically improved, the scrap rate is reduced, and the product yield is improved.
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Description

Technical Field

[0001] The present invention relates to the field of printed circuit board manufacturing, and in particular to a design method and a manufacturing method of a PCB board with multiple blind and buried vias, and a PCB board. Background Art

[0002] High-frequency and high-speed materials are being used more and more widely in the field of 5G communications, and are also being used more and more widely in mobile communications, data communication servers, optical modules, intelligent driving, industrial control, security and other fields, almost involving the update and iteration of the entire market.

[0003] To meet installation and signal requirements, existing technology used backdrilling for multiple blind vias, whether symmetrical or asymmetrical. This means that excess stubs are removed from the other side of the signal hole, as long as space within the board allows. At lower frequencies or speeds, a 0.2-0.3mm stub is acceptable. However, for ultra-high-speed or high-frequency products, this can cause signal transmission distortion. Due to increasing wiring density, the backside wiring of more and more high-frequency and high-speed products is densely packed, making backdrilling impractical. These products must instead be produced using double-sided, multi-layer blind vias in a partial-pressure stacking process, followed by a total pressure buildup to create the outer layer pattern.

[0004] PCB products will expand and contract during the manufacturing process due to the combined influence of materials, equipment precision, environment, production tools, and process flow. In the early stages of production, the distance between inner-layer holes and traces was relatively large, with conventional PCBs with 16 layers or more requiring a minimum of 14 mils. However, as customers demand smaller and thinner product sizes, PCBs with 16 layers or more are now even smaller than 6 mils. Early-stage layered production cannot meet these requirements for multiple blind vias, necessitating the development of more advanced technologies to meet product design demands. Summary of the Invention

[0005] Based on this, it is necessary to provide a design method, a manufacturing method and a PCB board with multiple blind and buried vias to address the problems in the prior art.

[0006] A method for designing a PCB board with multiple blind and buried vias, wherein the PCB board is provided with multiple blind and / or buried vias, and the design method comprises: Graphic layer design: In the graphic layer design of the PCB board, core board graphic layers corresponding to core boards with the same core board material, copper layer thickness, and core board thickness are selected and spliced ​​together. At this time, at least two core board graphic layers are spliced ​​together on the upper surface or lower surface of the same core board to form a spliced ​​graphic layer. There is a spacing between adjacent core board graphic layers in the spliced ​​graphic layer. The spacing is greater than or equal to 2 times the width of the process edge. The spliced ​​graphic layers are patterned to form a spliced ​​board; Voltage division design: The spliced ​​board obtained by the graphic layer design is divided according to the preset voltage division stacking order to obtain a voltage division board; Sub-board design: The voltage-dividing board obtained by the voltage-dividing design is divided into multiple sub-boards; Total pressing design: The sub-boards are pressed in the order of stacking the PCB board lamination structure to obtain the required pressed board corresponding to the PCB board.

[0007] In one embodiment, when designing the graphic layer, the preset pressure division stacking order of the core board during pressure division is determined. At this time, the layer positions of the core board graphic layer corresponding to one side of the core board are arranged in ascending order from top to bottom, and the layer positions of the core board graphic layer on the other side of the core board are arranged in ascending or descending order from top to bottom.

[0008] In one embodiment, when determining the preset pressure division stacking order of the core board during pressure division, the position of the layer number of the core board graphic layer on the other side of the core board is determined in ascending or descending order based on the arrangement order of the graphic layers with the smallest difference in residual copper rate between the upper and lower surfaces of the spliced ​​board.

[0009] In one embodiment, the two core board graphic layers on the upper surface or the lower surface of the splicing board are the first graphic layer and the second graphic layer, and the first graphic layer and the second graphic layer are symmetrically arranged about the symmetry axis in the middle position of the two or rotated 360° or rotated 180°, and the first graphic layer and the second graphic layer are provided with a first positioning hole and a second positioning hole on the outside, and the first positioning hole and the second positioning hole are symmetrically arranged about the symmetry axis in the middle position of the first graphic layer and the second graphic layer or rotated 360° or rotated 180°.

[0010] In one embodiment, a layer mark for marking is provided on the surface of the sub-board.

[0011] In one embodiment, when the number of core boards in the laminated structure of the PCB board is an even number 2N, where N is a natural number greater than or equal to 2, when designing the graphic layer, at least two core board graphic layers are spliced ​​and designed on the upper surface or lower surface of the same core board to form a spliced ​​graphic layer.

[0012] In one embodiment, when the number of core boards in the laminated structure of the laminated board obtained by total pressing is an odd number 2N+1, where N is a natural number greater than or equal to 2, the design method includes: Graphic layer design: The N+1th core board graphic layer is designed separately to form a sub-core board. For the remaining 2N core boards, at least two core board graphic layers are spliced ​​and designed on the upper or lower surface of the same core board to form a spliced ​​graphic layer. Splicing board: producing graphics according to the splicing graphic layer to form a splicing board; Pressure dividing design: The splicing plate is pressure divided according to the preset pressure dividing stacking order to obtain a pressure dividing plate; Sub-board design: the pressure dividing board is divided into multiple sub-boards; Total pressing design: the sub-board and the sub-core board are pressed together in the order of stacking the PCB board lamination structure to obtain a pressed board corresponding to the required PCB board.

[0013] In one embodiment, when the number of core boards in the laminated structure of the laminated board obtained by total pressing is an odd number 2N+1, where N is a natural number greater than or equal to 2, the design method includes: Graphic layer design: The N+1th core board graphic layer and the dummy board graphic layer are spliced ​​and designed on the upper or lower surface of the same core board to form a first spliced ​​graphic layer, and the graphics are produced according to the first spliced ​​graphic layer to form a first spliced ​​board. For the remaining 2N core boards, at least two core board pattern layers are spliced ​​and designed on the upper surface or lower surface of the same core board to form a second spliced ​​pattern layer, and patterns are produced according to the second spliced ​​pattern layer to form a second spliced ​​board; Pressure dividing design: the first splicing plate and the second splicing plate are pressure divided according to a preset pressure dividing stacking order to obtain a pressure dividing plate; Sub-board design: the pressure dividing board is divided into multiple sub-boards; Total pressing design: After removing the dummy board, the daughter board is pressed according to the stacking order of the PCB board lamination structure to obtain the required pressed board corresponding to the PCB board.

[0014] In one embodiment, when there is a core board of a different material in the PCB board laminate structure, the design method includes: Graphic layer design: If the different-material core board is located at the top or bottom of the PCB laminate structure, and the number of core boards in the remaining PCB laminate structure is 2N, the graphic layer of the different-material core board is designed separately to form a sub-core board. For the core boards in the remaining PCB laminate structure, at least two core board graphic layers are spliced ​​and designed on the upper or lower surface of the same core board to form a spliced ​​graphic layer. The spliced ​​graphic layer is patterned to form a spliced ​​board; If the foreign material core board is located at the top position or the bottom position in the PCB board laminate structure, and the number of core boards in the remaining PCB board laminate structure is 2N+1, the foreign material core board graphic layer is designed separately to form a sub-core board, and for the core boards in the remaining PCB board laminate structure, the N+1th core board graphic layer is designed separately to form a sub-core board, and for the remaining 2N number of core boards, at least two core board graphic layers are spliced ​​and designed on the upper surface or lower surface of the same core board to form a spliced ​​graphic layer, or the N+1th core board graphic layer and the fake board graphic layer are spliced ​​and designed on the upper surface or lower surface of the same core board to form a first spliced ​​graphic layer, and graphics are produced according to the first spliced ​​graphic layer to form a first spliced ​​board, and for the remaining 2N number of core boards, at least two core board graphic layers are spliced ​​and designed on the upper surface or lower surface of the same core board to form a second spliced ​​graphic layer, and graphics are produced according to the second spliced ​​graphic layer to form a second spliced ​​board; If the heterogeneous core board is located in the middle of the PCB laminate structure and the heterogeneous core board is an even number, the heterogeneous core board graphic layer is designed separately to form a sub-core board or the heterogeneous core board graphic layer and the dummy board graphic layer are spliced ​​on the upper and lower graphic layers of the same core board to form a first spliced ​​graphic layer, and the graphic production is performed according to the first spliced ​​graphic layer to form a first spliced ​​board; the graphic layer design of the even number of core board graphic layers is completed according to the design method of the even number of core boards to form a second spliced ​​graphic layer, and the graphic production is performed according to the second spliced ​​graphic layer to form a second spliced ​​board; If the heterogeneous core board is located in the middle of the PCB laminate structure and the number of heterogeneous core boards is odd, at least two non-heterogeneous core board graphic layers are spliced ​​and designed on the upper surface or lower surface of the same core board to form a first spliced ​​graphic layer, and the graphic production is performed according to the first spliced ​​graphic layer to form a first spliced ​​board, and the remaining heterogeneous core board graphic layers and the dummy board graphic layers are spliced ​​and designed on the upper surface or lower surface of the same core board to form a second spliced ​​graphic layer, and the graphic production is performed according to the second spliced ​​graphic layer to form a second spliced ​​board; Pressure division design: the splicing plate, or the first splicing plate and the second splicing plate are pressure-divided in a preset pressure division stacking order to form a pressure division plate, with the first splicing plate being preferably preset on the outside of the pressure division stacking plate; Sub-board design: the pressure dividing board is divided into multiple sub-boards; Total pressing design: After removing the dummy board, the daughter board is pressed according to the stacking order of the PCB board lamination structure to obtain the required pressed board corresponding to the PCB board.

[0015] In one of the embodiments, during the total pressure design, expansion and contraction compensation design is performed on the separately manufactured heterogeneous core board, including the expansion and contraction coefficient of the sub-board obtained by actual measurement of the sub-board. When separately designing the heterogeneous core board graphic layer, the expansion and contraction coefficient of the heterogeneous core board graphic layer is preset with reference to the expansion and contraction coefficient of the sub-board combined with the thermal expansion coefficient of the heterogeneous core board, thereby designing the heterogeneous core board graphic layer.

[0016] In one embodiment, the first splicing pattern layer is designed as a fake board pattern layer using a uniform pattern with a small difference in residual copper rate between the upper and lower pattern layers of the splicing board.

[0017] In one embodiment, the PCB board is provided with blind buried vias, including single-core board blind buried vias and / or cross-core board blind buried vias, and the design method thereof includes: Single core board blind and buried hole design: the blind and buried holes are designed and made simultaneously when the spliced ​​board is made; Design of blind buried vias across the core board: When designing the voltage divider, priority is given to the voltage divider stacking design in which blind buried vias across the core board penetrate the voltage divider board; the design is to complete the blind buried via production process simultaneously when the voltage divider board is produced. When multiple different levels of blind buried vias across the core board are involved, according to the design method, successive voltage division is adopted according to the levels of blind buried vias across the core board to form voltage divider board 1, voltage divider board 2...voltage divider board n, where n is a natural number greater than or equal to 2. The design is to complete the production of blind buried vias 1, blind buried vias 2, ..., and blind buried vias n simultaneously when the voltage divider board 1, voltage divider board 2, ..., and voltage divider board n are produced.

[0018] In one embodiment, the PCB board is provided with blind buried vias across the core board, and the blind buried vias across the core board need to pass through at least two core board graphic layers on the splicing board. The design adopts the method of making through holes according to the normal process flow when making the pressed board, and then adopts the back drilling design to complete the blind buried hole design.

[0019] A method for manufacturing a PCB board with multiple blind and buried vias is designed using the above-mentioned method for designing a PCB board with multiple blind and buried vias, comprising: Fabrication of a splicing board: After the circuits are fabricated according to the first splicing pattern layer and the second splicing pattern layer, drilling, hole metallization, and hole plugging are sequentially performed to form a splicing board; Sub-core board production: after the circuit is made according to the core board graphic layer, drilling, hole metallization and hole plugging production processes are carried out in sequence to form a sub-core board; Production of the pressure-dividing plate: The first splicing plate or sub-core plate and the second splicing plate are pressure-divided according to a preset pressure-dividing lamination sequence, and drilling, hole metallization, and plugging are sequentially performed to form the pressure-dividing plate; the pressure-dividing plate laminate structure includes the first splicing plate. During the pressure-dividing lamination, an isolation film is added to the upper / lower surface of the prepreg between the dummy plate area of ​​the first splicing plate and the second splicing plate to isolate the dummy plate area from the prepreg surface, and the prepreg surface from the second splicing plate; Depaneling: Depaneling the pressure-dividing spliced ​​board obtained by the pressure-dividing design, removing the dummy board, and sequentially performing drilling, hole metallization, and hole plugging production processes to form daughter boards; Total pressing: the sub-boards are pressed in the order of stacking the PCB board lamination structure to obtain a pressed board corresponding to the required PCB board; Post-process: Produce normally according to the post-process of PCB board.

[0020] A PCB board is manufactured using the above-mentioned multiple blind and buried via PCB board design method, or is manufactured using the above-mentioned multiple blind and buried via PCB board manufacturing method.

[0021] The above-mentioned multiple blind and buried via PCB board design method, manufacturing method and PCB board provide at least two core board graphic layers on the upper and lower surfaces of the core board to form a spliced ​​graphic layer, and then obtain multiple sub-boards through partial pressure division and board division. The sub-boards are then pressed together in sequence to obtain the required PCB board. At this time, most of the core boards in the PCB board are made by pressing together the sub-boards in the same steps. Therefore, the PCB board obtained after total pressing can ensure minimal expansion and contraction to meet the requirements of high-performance products. During total pressing, the alignment accuracy of products within 16 layers can be achieved to ≤4mil (conventional>84mil), which technically improves accuracy, reduces scrap, and increases product yield. BRIEF DESCRIPTION OF THE DRAWINGS

[0022] Figure 1 This is a schematic diagram of a PCB board according to an embodiment of the present invention; Figure 2 This is a schematic diagram of a graphic layer design according to a first embodiment of the present invention; Figure 3 This is a schematic diagram of a graphic layer design according to a first embodiment of the present invention; Figure 4 This is a schematic diagram of the distribution uniformity of circuit design according to the first embodiment of the present invention; Figure 5 This is a schematic diagram of the distribution uniformity of circuit design according to the first embodiment of the present invention; Figure 6 This is a schematic diagram of an embodiment of the present invention, in which the graphic layer and the positioning hole are designed to be axially symmetrical about the symmetry axis between the graphic layer and the positioning hole; Figure 7 This is a schematic diagram of a design in which the graphic layer and the positioning hole are rotated 360° about the axis of symmetry between the graphic layer and the positioning hole in accordance with an embodiment of the present invention; Figure 8 This is a schematic diagram of a design in which the graphic layer and the positioning hole are rotated 180° about the axis of symmetry between the graphic layer and the positioning hole in accordance with an embodiment of the present invention; Figure 9 This is a schematic diagram of a voltage divider design according to a first embodiment of the present invention; Figure 10 This is a schematic diagram of a split board design according to a first embodiment of the present invention; Figure 11 This is a schematic diagram of total pressure design in accordance with the first embodiment of the present invention; Figure 12 Schematic diagram of PCB boards in Embodiment 2 and Embodiment 3 of the present invention; Figure 13 This is a schematic diagram of the graphic layer design of the second embodiment of the present invention; Figure 14This is a schematic diagram of a two-voltage divider design according to an embodiment of the present invention; Figure 15 This is a schematic diagram of the design of a two-part board according to an embodiment of the present invention; Figure 16 This is a schematic diagram of total pressure design according to the second embodiment of the present invention; Figure 17 This is a schematic diagram of the graphic layer design of embodiment 3 of the present invention; Figure 18 This is a schematic diagram of a three-voltage design according to an embodiment of the present invention; Figure 19 This is a schematic diagram of a three-part board design according to an embodiment of the present invention; Figure 20 This is a schematic diagram of total pressure design in Example 3 of the present invention; Figure 21 This is a schematic diagram of a PCB board according to a fourth embodiment of the present invention; Figure 22 This is a schematic diagram of the graphic layer design of the fourth embodiment of the present invention; Figure 23 This is a schematic diagram of a four-voltage divider design according to an embodiment of the present invention; Figure 24 This is a schematic diagram of a four-part board design according to an embodiment of the present invention; Figure 25 This is a schematic diagram of total pressure design according to the fourth embodiment of the present invention; Figure 26 Schematic diagram of PCB boards of Embodiment 5 and Embodiment 6 of the present invention; Figure 27 This is a schematic diagram of the graphic layer design of the fifth embodiment of the present invention; Figure 28 This is a schematic diagram of a five-voltage divider design according to an embodiment of the present invention; Figure 29 This is a schematic diagram of the design of a five-point board according to an embodiment of the present invention; Figure 30 This is a schematic diagram of total pressure design according to the fifth embodiment of the present invention; Figure 31 This is a schematic diagram of the graphic layer design of Example 6 of the present invention; Figure 32 This is a schematic diagram of a six-voltage divider design according to an embodiment of the present invention; Figure 33 This is a schematic diagram of the design of a six-point board according to an embodiment of the present invention; Figure 34 This is a schematic diagram of total pressure design according to embodiment 6 of the present invention; Figure 35 This is a schematic diagram of the PCB board of Embodiment 7 and Embodiment 8 of the present invention; Figure 36 This is a schematic diagram of the graphic layer design of Example 7 of the present invention; Figure 37 This is a schematic diagram of a seven-voltage design according to an embodiment of the present invention; Figure 38 This is a schematic diagram of the design of a seven-point board according to an embodiment of the present invention; Figure 39 This is a schematic diagram of total pressure design according to embodiment 7 of the present invention; Figure 40 This is a schematic diagram of the graphic layer design of Example 8 of the present invention; Figure 41 This is a schematic diagram of an eight-voltage design according to an embodiment of the present invention; Figure 42 This is a schematic diagram of the design of an eight-point board according to an embodiment of the present invention; Figure 43 This is a schematic diagram of total pressure design according to embodiment 8 of the present invention; Figure 44 This is a schematic diagram of a PCB board according to a ninth embodiment of the present invention; Figure 45 This is a schematic diagram of the graphic layer design of Example 9 of the present invention; Figure 46 This is a schematic diagram of a voltage divider design according to embodiment nine of the present invention; Figure 47 This is a schematic diagram of the design of a nine-point board according to an embodiment of the present invention; Figure 48 This is a schematic diagram of the total pressure design of Example 9 of the present invention; Figure 49 This is a schematic diagram of a PCB board according to a tenth embodiment of the present invention; Figure 50 This is a schematic diagram of the graphic layer design according to the tenth embodiment of the present invention; Figure 51 This is a schematic diagram of a ten-pressure design according to an embodiment of the present invention; Figure 52 This is a schematic diagram of a ten-plate design according to an embodiment of the present invention; Figure 53 This is a schematic diagram of total pressure design according to embodiment 10 of the present invention; Figure 54 This is a schematic diagram of a PCB board according to an eleventh embodiment of the present invention; Figure 55 This is a schematic diagram of a graphics layer according to an eleventh embodiment of the present invention; Figure 56 This is a schematic diagram of the first voltage division design according to the eleventh embodiment of the present invention; Figure 57 This is a schematic diagram of the hole design of the eleventh embodiment of the present invention; Figure 58 This is a schematic diagram of the second voltage division design according to the eleventh embodiment of the present invention; Figure 59 This is a schematic diagram of the design of the sub-board according to the eleventh embodiment of the present invention; Figure 60 This is a schematic diagram of total pressure design according to the eleventh embodiment of the present invention; Figure 61 This is a schematic diagram of a PCB board according to a twelfth embodiment of the present invention; Figure 62 This is a schematic diagram of a graphics layer according to a twelfth embodiment of the present invention; Figure 63 This is a schematic diagram of the first voltage division design according to the twelfth embodiment of the present invention; Figure 64 This is a schematic diagram of the first hole design according to the twelfth embodiment of the present invention; Figure 65 This is a schematic diagram of the second voltage division design according to the twelfth embodiment of the present invention; Figure 66 This is a schematic diagram of the second hole design according to the twelfth embodiment of the present invention; Figure 67 This is a schematic diagram of a twelve-part board design according to an embodiment of the present invention; Figure 68 This is a schematic diagram of total pressure design according to the twelfth embodiment of the present invention; Figure 69 This is a schematic diagram of a PCB board according to a thirteenth embodiment of the present invention; Figure 70 This is a schematic diagram of total pressure design according to the thirteenth embodiment of the present invention; DETAILED DESCRIPTION

[0023] To make the above-mentioned objects, features, and advantages of the present invention more readily apparent, specific embodiments of the present invention are described in detail below with reference to the accompanying drawings. The following description sets forth numerous specific details to facilitate a full understanding of the present invention. However, the present invention can be implemented in many other ways than those described herein, and those skilled in the art may make similar modifications without departing from the scope of the present invention. Therefore, the present invention is not limited to the specific embodiments disclosed below.

[0024] It should be noted that when an element is considered to be "connected" to another element, it can be directly connected to the other element or there may be an intermediate element. In contrast, when an element is said to be "directly" connected to another element, there are no intermediate elements.

[0025] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by those skilled in the art to which the present invention pertains. The terms used herein in the specification of the present invention are for the purpose of describing specific embodiments only and are not intended to limit the present invention. The term "and / or" as used herein includes any and all combinations of one or more of the associated listed items.

[0026] The following limitations or explanations are given for the names involved: Core board: refers to the double-sided copper clad board, the raw material of the PCB board; Core board graphic layer: the circuit layer of the upper and lower layers of the core board; Sub-core board: formed after production processing according to the core board graphic layer; Spliced ​​graphic layer: a graphic layer formed by splicing two or more (inclusive) core board graphic layers; Splicing board: formed by splicing graphic layers through production processing; Pressure dividing plate: formed by dividing the pressure of the spliced ​​plates according to the preset laminated structure. The voltage divider plates are numbered, from least to most, the first voltage divider plate, the second voltage divider plate, ..., the nth voltage divider plate (n is a positive integer) according to the number of voltage dividers. Sub-board: The pressure divider is divided into sub-boards. The first pressure dividing plate is divided into the first sub-plate 1, the first sub-plate 2, ... the first sub-plate n, and the second pressure dividing plate is divided into the second sub-plate 1, the second sub-plate 2, ... the second sub-plate n; Pressed board: The sub-boards are pressed together to form a press board; PCB board: The laminated board is formed into a PCB board after subsequent processes; Fake board graphic layer: A graphic layer added to the PCB design data to meet the specific process requirements of PCB production; Fake board: formed after the fake board graphic layer is processed during production. The fake board is removed at a certain stage in the PCB production process. Different core board: a core board with different thickness or material from any other core board (base material or copper clad) in the PCB laminate structure; Single core board blind buried via: a blind buried via that only penetrates a single core board; Cross-core board blind buried via: a blind buried via that passes through at least two core boards.

[0027] A method for designing a PCB board with multiple blind and buried vias, wherein the PCB board is provided with multiple blind and / or buried vias, and the design method comprises: Graphic layer design: In the graphic layer design of the PCB board, core board graphic layers corresponding to core boards with the same core board material, copper layer thickness, and core board thickness are selected and spliced ​​together. At this time, at least two core board graphic layers are spliced ​​together on the upper surface or lower surface of the same core board to form a spliced ​​graphic layer. There is a spacing between adjacent core board graphic layers in the spliced ​​graphic layer. The spacing is greater than or equal to 2 times the width of the process edge. The spliced ​​graphic layers are patterned to form a spliced ​​board; Voltage division design: The spliced ​​board obtained by the graphic layer design is divided according to the preset voltage division stacking order to obtain a voltage division board; Sub-board design: The voltage-dividing board obtained by the voltage-dividing design is divided into multiple sub-boards; Total pressing design: The sub-boards are pressed in the order of stacking the PCB board lamination structure to obtain the required pressed board corresponding to the PCB board.

[0028] At least two core board graphic layers are set on the upper and lower surfaces of the core board to form a spliced ​​graphic layer. Then, multiple sub-boards are obtained through partial pressure division and board separation. The sub-boards are then pressed together in sequence to obtain the required PCB board. At this time, most of the core boards in the PCB board are made by pressing together the sub-boards in the same steps. Therefore, the PCB board obtained after total pressing can ensure minimal expansion and contraction to meet the requirements of high-performance products. During total pressing, the alignment accuracy of products within 16 layers can be achieved to ≤4mil (conventional>84mil), which technically improves accuracy, reduces scrap, and increases product yield.

[0029] At this time, when designing the graphic layer, the preset pressure division stacking order of the core board during pressure division is determined. At this time, the layer positions of the core board graphic layer corresponding to one side of the core board are arranged in ascending order from top to bottom, and the layer positions of the core board graphic layer on the other side of the core board are arranged in ascending or descending order from top to bottom.

[0030] When determining the preset voltage division stacking order of the core board during voltage division, the position of the core board graphic layer on the other side of the core board is determined in ascending or descending order based on the arrangement order of the graphic layer with the smallest difference in residual copper rate between the upper and lower surfaces of the spliced ​​board.

[0031] The two core board graphic layers on the upper surface or lower surface of the splicing board are the first graphic layer and the second graphic layer. The first graphic layer and the second graphic layer are symmetrically arranged about the symmetry axis in the middle position of the two, or rotated 360° or rotated 180°. The first graphic layer and the second graphic layer are provided with a first positioning hole and a second positioning hole on the outside. The first positioning hole and the second positioning hole are symmetrically arranged about the symmetry axis in the middle position of the first graphic layer and the second graphic layer, or rotated 360° or rotated 180°.

[0032] At the same time, the surface of the sub-board is provided with a layer mark for identification. Since there are many sub-boards and each sub-board is different, in order to avoid confusion in the production process of the sub-boards, a layer mark is provided on the surface of each sub-board (initially the core board surface). During the process of graphic production, it can be processed simultaneously with the graphic production to form a layer mark. Example

[0033] When the number of core boards in the laminated structure of the PCB board is an even number 2N, where N is a natural number greater than or equal to 2, when designing the graphic layer, at least two core board graphic layers are spliced ​​and designed to form a spliced ​​graphic layer on the upper surface or lower surface of the same core board.

[0034] At this time, the number of core boards of the PCB board obtained by the total pressure is an even number. Taking a 16-layer board as an example, the laminated structure of the PCB board is as follows: Figure 1As shown, it includes core boards 1 to 8. At this time, the upper and lower sides of core board 1 are core board graphic layers L01 and L02 respectively, the upper and lower sides of core board 2 are core board graphic layers L03 and L04 respectively,... the upper and lower sides of core board 8 are core board graphic layers L15 and L16 respectively.

[0035] Design methods include: Step 1: Graphic layer design. If all core board materials, copper layer thickness, and core board thickness are the same, the core board graphic layers of the core boards can be spliced ​​together. At this time, at least two core board graphic layers are spliced ​​together on the upper or lower surface of the same core board to form a spliced ​​graphic layer.

[0036] There is a spacing between adjacent core board graphic layers in the spliced ​​graphic layer, and the spacing is greater than or equal to 2 times the width of the process edge. The spliced ​​graphic layers are patterned to form a spliced ​​board.

[0037] The positions of the graphic layers on one side of the core board are arranged in ascending order from top to bottom, and the positions of the graphic layers on the other side of the core board are arranged in ascending or descending order from top to bottom, so as to determine whether the corresponding graphic layers are located on the same core board or different core boards during pattern production. There are two schemes for the ascending and descending order of the positions of the graphic layers on the core board, specifically: Design solution 1: Graphics layers L01 and L16, L02 and L15 are combined and designed on the same core board and circuit layer; L03 and L14, L04 and L13 are combined and designed on the same core board and circuit layer; and so on, L05 and L12, L06 and L11, L07 and L10, L08 and L09 (graphics layers on one side are in ascending order from top to bottom, and graphics layers on the other side are in descending order from top to bottom). Figure 2 shown.

[0038] Design solution 2: Graphics layers L01 and L09, L02 and L10 are combined and designed on the same core board and the same circuit layer; L03 and L11, L04 and L12 are combined and designed on the same core board and the same circuit layer; and so on; L05 and L13, L06 and L14, L07 and L15, L08 and L16 are combined and designed on the same core board and the same circuit layer (graphics layers on one side are in ascending order from top to bottom, and graphics layers on the other side are in ascending order from top to bottom). Figure 3 shown.

[0039] At this time, it is necessary to compare the residual copper rates of the two graphic layers on the same side of the core board of Design Scheme 1 and Design Scheme 2, and select the scheme with smaller residual copper rates of the graphic layers on the upper and lower surfaces of the spliced ​​board to determine the design scheme for splicing the graphic layers. At this time, if the difference in residual copper rates of the two graphic layers on the upper and lower surfaces of the spliced ​​board of Design Scheme 1 is smaller than the difference in residual copper rates of the two graphic layers on the upper and lower surfaces of the spliced ​​board of Design Scheme 2, then Design Scheme 1 is selected. Selecting the scheme with smaller residual copper rate can reduce the problem of board warping and, at the same time, reduce expansion and shrinkage.

[0040] When designing a combined graphic layer, the positional relationship between the first and second graphic layers on the upper or lower surface of the same splicing board must be determined based on the distribution characteristics of the graphic layer circuit designs. The first and second graphic layers can have a variety of positional relationship settings, including symmetrical settings about the axis of symmetry between the two layers, 360° rotation settings (the 360° rotation setting is a translation setting), and 180° rotation settings. A combined design with a uniform distribution of graphic layer circuit designs is preferred.

[0041] At this time, the circuit design is evenly distributed means that after the design is combined, the distribution density of the circuits in the graphic layer from top to bottom or from left to right changes little, so that the expansion and contraction can be reduced during the processing. Figure 4 and Figure 5 Take two layouts as an example, Figure 4 As shown in the figure (the first graphic layer and the second graphic layer on the upper surface of the splicing board are designed to be axisymmetric with the center line), after the graphic layers are spliced ​​together, the density of the graphic layer lines from left to right gradually becomes sparse, and then gradually becomes dense. Figure 5 As mentioned above (the first graphic layer and the second graphic layer on the upper surface of the splicing board are designed by rotating 360 degrees based on the center line), after the graphic layers are spliced ​​and designed, the density of the graphic layer lines from left to right is gradually sparse, then suddenly becomes dense, and finally gradually sparse again. Figure 10 The line design distribution density in the change is small, so choose Figure 10 The graphic layer is designed with an axisymmetric design method along the center line. In this way, during the processing, the circuit design distribution on the upper and lower surfaces of the splicing board is relatively uniform, thereby reducing expansion and contraction.

[0042] In this embodiment, only the circuit design distribution uniformity of the upper surface or lower surface of a certain splicing board is listed. At this time, it is necessary to count the circuit design distribution uniformity of all splicing graphic layers to determine the angular position of the core board graphic layer during splicing.

[0043] At this time, in order to facilitate the subsequent production process, a positioning design is also provided: each graphic layer is provided with three (or more) positioning holes, and the positioning hole design is consistent with the graphic layer joint design, which is divided into the following three situations: 1. When the two core board graphic layers on the upper or lower surface of the splicing board are designed to be axisymmetric about the symmetry axis in the middle of the two, the positioning holes of the two graphic layers are also designed to be axisymmetric about the center line; 2. When the two core board graphic layers on the upper or lower surface of the splicing board are designed to be rotated 180° or 360° about the symmetry axis in the middle position between the two, the positioning holes of the two graphic layers are designed to be rotated 180° or 360° about the middle position between the two.

[0044] like Figure 6 As shown, the graphic layer and the positioning hole are designed to be axisymmetric about the symmetry axis in the middle of the two; like Figure 7 As shown, the graphics are combined and the positioning hole is rotated 360° about the symmetry axis in the middle of the two; like Figure 8 As shown, the graphics are combined and the positioning hole is rotated 180° about the symmetry axis in the middle of the two.

[0045] In this embodiment, the pattern layer and the positioning hole are designed to be axisymmetric about the symmetry axis between the two, that is, Figure 6 The scheme shown is used to design the graphic layer.

[0046] Step 2: Pressure division design. The splicing board obtained by the graphic layer design is divided according to the preset pressure division stacking order to obtain the pressure division board. After pressure division, it forms the following Figure 9 The structure shown.

[0047] Step 3: Sub-board design, the voltage divider board obtained by voltage divider design is divided into multiple sub-boards, such as Figure 10 shown.

[0048] Step 4: Total pressure design, the sub-board is pressed in the order of PCB board lamination structure to obtain the required PCB board corresponding pressing board to form PCB board, such as Figure 11 shown.

[0049] When optimizing the pattern layer design, based on the comparison of the residual copper rates between Design Schemes 1 and 2, the design with the lower residual copper rate is selected. This then determines the design scheme for the corresponding core board pattern layers. The core board pattern layers on one side of the core board are arranged in ascending order from top to bottom, while those on the other side are arranged in ascending or descending order from top to bottom. Based on the uniformity of the circuit distribution density of the spliced ​​pattern layers, the two core board pattern layers on the upper or lower surface of the same core board are designed to be axially symmetrical around the centerline or rotated 180° or 360°. This determines the angles and positions of the corresponding core board pattern layers during subsequent production. This optimizes the work data design, determining the positions of the corresponding core board pattern layers within the core board, the order of the core boards during partial pressure distribution (i.e., the preset stacking order for the core boards during partial pressure distribution), and the order of the sub-boards during total pressure distribution (since the core board pattern layers of the two sub-boards are symmetrical or rotated to a certain extent, the positional relationship between the two core board pattern layers during total pressure distribution needs to be adjusted during total pressure distribution based on the initial positional relationship between the two core board pattern layers, thereby forming the preset stacking order for total pressure distribution). During the graphic layer design optimization phase, the various production steps of the product have been planned. In the subsequent production process, production can be carried out according to the optimized graphic layer design.

[0050] In this embodiment, two core board graphic layers are set on one side of the core board, so that four core board graphic layers are set on the upper surface and the lower surface of the core board, thereby forming two spliced ​​graphic layers. After the spliced ​​graphic layers are completed, the boards are divided and pressed to obtain two sub-boards. Finally, the two sub-boards are pressed together to form a PCB board. At this time, the steps of the core board graphic layer involved in the PCB board are exactly the same after the graphic design. Therefore, the PCB board obtained after the total pressing can ensure the minimum expansion and contraction, thereby improving the positioning accuracy of the product. Example

[0051] In this embodiment, the number of core boards in the laminated structure of the laminated board obtained by total pressing is an odd number 2N+1. Taking N equal to 3 as an example, the number of core boards in the laminated structure of the laminated board obtained by total pressing is 7, and the number of corresponding graphic layers is 14. The laminated structure of the PCB board is as follows: Figure 12 As shown, it includes core boards 1 to 7. At this time, the upper and lower sides of core board 1 are respectively core board pattern layers L01 and L02, the upper and lower sides of core board 2 are respectively core board pattern layers L03 and L04, ... the upper and lower sides of core board 7 are respectively core board pattern layers L13 and L14, as shown in FIG. Figure 12 shown.

[0052] At this point, the design method includes the following steps: Step 1: Graphic layer design. All core board materials, copper layer thicknesses, and core board thicknesses are the same. At this point, the (N+1)th core board graphic layer is designed separately to form a sub-core board (core board 4 corresponds to the L07 and L08 core board graphic layers). For the remaining 2N core boards (remaining core board 1, core board 2, core board 3, core board 5, core board 6, core board 7), at least two core board graphic layers are spliced ​​and designed on the upper or lower surface of the same core board to form a spliced ​​graphic layer.

[0053] The remaining even-numbered core boards (core board 1, core board 2, core board 3, core board 5, core board 6, core board 7) are designed by combining the core board graphic layer according to the method in Example 1, and the sub-core board made separately from core board 4 is as follows: Figure 13 shown.

[0054] Step 2: Splice the board, and make the graphics according to the splicing graphic layer to form a splicing board The third step: voltage division design, the splicing board is divided according to the preset voltage division stacking order to obtain the voltage division board. At this time, the core board 4 corresponding to the completed pattern production sub-core board is not divided with other splicing boards. Figure 14 The structure shown.

[0055] Step 4: Sub-board design: the pressure dividing board is divided into multiple first sub-boards and second sub-boards, such as Figure 15 As shown, the sub-core board corresponding to the core board 4 that has completed the pattern production does not need to be divided into boards.

[0056] Step 5: Total pressure design: the first sub-board, the second sub-board, and the sub-core board are pressed together in the order of the PCB board lamination structure to obtain the required PCB board corresponding to the press board (such as Figure 16 shown).

[0057] At this time, the core board is always an odd number, and it is impossible to design all the core board graphic layers together. Therefore, the core board graphic layer in the middle layer position is designed separately, and the remaining even-numbered core boards are designed together. In this way, after the remaining even-numbered core board graphic layers are spliced, the steps involved in pressure division and board division (and other processes) are the same. Therefore, after the total pressing, except for the core board 4 designed separately to obtain the sub-core board, the steps of the remaining core boards are exactly the same after the graphics are produced. Therefore, the pressed board obtained after the total pressing can ensure the minimum expansion and contraction, thereby improving the positioning accuracy of the product. Example

[0058] In this embodiment, the number of core boards in the laminated structure of the laminated board obtained by total pressing is an odd number 2N+1. Taking N equal to 3 as an example, the number of core boards in the laminated structure of the laminated board obtained by total pressing is 7, and the number of corresponding graphic layers is 14. The laminated structure of the PCB board is as follows: Figure 12 As shown, it includes core boards 1 to 7. At this time, the upper and lower sides of core board 1 are respectively core board pattern layers L01 and L02, the upper and lower sides of core board 2 are respectively core board pattern layers L03 and L04, ... the upper and lower sides of core board 7 are respectively core board pattern layers L13 and L14, as shown in FIG. Figure 12 shown.

[0059] At this point, the design method includes the following steps: Step 1: Graphic layer design. All core board materials, copper layer thickness, and core board thickness are the same. At this time, the N+1 core board graphic layer (L07 and L08 core board graphic layers corresponding to core board 4) and the dummy board graphic layer are spliced ​​and designed on the upper or lower surface of the same core board to form the first spliced ​​graphic layer. The graphics are produced according to the first spliced ​​graphic layer to form the first spliced ​​board. For the remaining 2N core panels (remaining core panel 1, core panel 2, core panel 3, core panel 5, core panel 6, core panel 7), at least two core panel graphic layers are spliced ​​and designed on the upper surface or lower surface of the same core panel to form a second spliced ​​graphic layer, and graphics are produced according to the second spliced ​​graphic layer to form a second spliced ​​panel.

[0060] At this time, the remaining even-numbered core boards (core board 1, core board 2, core board 3, core board 5, core board 6, core board 7) are designed by combining the core board graphic layers in the same manner as in Example 1. Figure 17 shown.

[0061] At this time, since the first splicing pattern layer includes a dummy board pattern layer, which is finally removed, in order to reduce expansion and contraction, a uniform pattern with a small difference in residual copper rate between the upper and lower pattern layers of the first splicing board is designed to form the dummy board pattern layer.

[0062] Step 2: Voltage division design: divide the voltage of the first and second splicing plates according to the preset voltage division stacking order to obtain a voltage division plate, such as Figure 18 As shown, at this time, an isolation film is provided between the dummy board pattern layer and the PP to prevent the dummy board layer from being adhered and fixed to the core board 5 .

[0063] Step 3: Sub-board design, the pressure dividing board is divided into multiple sub-boards, such as Figure 19 As shown, at this time, the dummy plate is separated from the sub-core plate obtained from the core plate 4 and can be removed.

[0064] Step 4: Total pressing design: After removing the dummy board, the daughter board is pressed according to the PCB board lamination structure stacking sequence to obtain the required PCB board corresponding pressing board, such as Figure 20 shown.

[0065] At this time, the core boards are always an odd number. In order to design all the core boards together, a false board layer was provided in this embodiment, that is, a false board layer was provided on the other side of the middle core board. In this way, during the process of pressing and dividing the boards, the middle core board and the other even-numbered core boards are carried out at the same time, thereby ensuring that all the core boards go through exactly the same steps after the graphics are made. Therefore, the pressed board is obtained after the total pressing, which can ensure the minimum expansion and contraction, thereby improving the positioning accuracy of the product. Example

[0066] In this embodiment, there is a core board of different materials in the laminated structure of the PCB board. The core board of different materials refers to a core board in the laminated structure of the PCB board that has a different thickness or material from any other core board (substrate or copper clad). Specifically, in this embodiment, the different thickness of the substrate is used as an example.

[0067] At this time, the different material core board is located at the top position in the PCB board laminate structure, and the number of core boards in the remaining PCB board laminate structure is 2N. Taking the number of core boards as an example, at this time, the core boards with different thicknesses are located at the top position, that is, the thickness of core board 1 (corresponding to the graphic layers L01 and L02) is different from that of other core boards (such as Figure 21 Core plates 2 to 7 are made of the same material and have the same thickness. The upper and lower sides of core plate 2 are respectively formed with core plate pattern layers L03 and L04. The upper and lower sides of core plate 7 are respectively formed with core plate pattern layers L13 and L14.

[0068] At this point, the design method includes the following steps: Step 1: Graphic layer design. At this point, the core board graphic layers corresponding to the different-material core boards are designed separately to form sub-core boards (L01 and L02 core board graphic layers corresponding to core board 1). For the remaining 2N core boards (remaining core board 2, core board 3, core board 4, core board 5, core board 6, core board 7), at least two core board graphic layers are spliced ​​and designed on the upper or lower surface of the same core board to form a spliced ​​graphic layer.

[0069] The remaining even-numbered core boards (core board 2, core board 3, core board 4, core board 5, core board 6, core board 7) are designed by combining the core board graphic layer according to the method in Example 1, and the sub-core board made separately from core board 1 is as follows: Figure 22 shown.

[0070] Step 2: voltage division design, the splicing board is voltage divided according to the preset voltage division stacking order to obtain the voltage division board. At this time, the sub-core board of the core board 1 corresponding to the completed pattern production is not voltage divided with other splicing boards. Figure 23 The structure shown.

[0071] Step 3: Sub-board design: the pressure dividing board is divided into multiple first sub-boards and second sub-boards, such as Figure 24 As shown, the sub-core board corresponding to the core board 1 that has completed the pattern production does not need to be divided into boards.

[0072] Step 4: Total pressure design: the first sub-board, the second sub-board, and the sub-core board are pressed together in the order of the PCB board lamination structure to obtain the required PCB board corresponding to the press board (such as Figure 25 shown).

[0073] At this time, since it involves the design of a different material core board, and the different material core board needs to make certain expansion and contraction presets when designing the graphic layer, that is, it is necessary to preset the expansion and contraction coefficient of the different material core board graphic layer according to the actual expansion and contraction parameters of the sub-board and the thermal expansion coefficient of the different material core board. Therefore, in the above design method, the first, second and third steps do not involve the design of the different material core board. The remaining 2N core boards need to be completed first. The graphic layer design, pressure division design and board division design of the first, second and third steps are as follows. In the actual production process, the sub-board expansion and contraction coefficient is obtained according to the measured pressure division, and then the expansion and contraction coefficient of the different material core board graphic layer is preset according to the actual measured sub-board expansion and contraction coefficient and the thermal expansion coefficient of the different material core board. Then the image layer design of the different material core board in the first step is carried out. Since the different material core board does not participate in pressure division and board division, after the graphic layer design of the different material core board is completed, it is produced separately and finally the sub-core board is formed. When the total pressure is designed, the sub-core board is pressed together with the original sub-board according to the stacking order of the PCB board lamination structure to obtain a pressed board. At this time, when designing the graphic layer of the heterogeneous core board, the expansion and contraction coefficient of the core board graphic layer is preset based on the actual expansion and contraction parameters of the sub-board and combined with the thermal expansion coefficient of the heterogeneous core board. This can reduce the expansion and contraction difference between the heterogeneous core board graphic layer and the sub-board graphic layer, thereby improving the product's positioning accuracy.

[0074] At this time, there are core boards of different materials with different thicknesses. The core boards of different thicknesses cannot be designed together with the other core boards. If the remaining core boards are an even number of layers, the remaining core boards are designed together. The remaining core boards are designed through pressure division and panel division. When the total pressure is designed, the sub-core boards with different thicknesses are combined with the two sub-panels to obtain the total pressure of the sub-panels. The remaining even-layer core boards go through the same pressure division and panel division steps after the graphics are made. The core boards of different thicknesses are pressed together to obtain a pressed board. Most of the core boards in the pressed board go through the same steps, which can ensure minimum expansion and contraction, thereby improving the product's positioning accuracy.

[0075] Example 5 In this embodiment, there is a core board of different materials in the laminated structure of the PCB board. The core board of different materials refers to a core board in the laminated structure of the PCB board that has a different thickness or material from any other core board (substrate or copper clad). Specifically, in this embodiment, the different thickness of the substrate is used as an example.

[0076] At this time, the different material core board is located at the top position in the PCB board laminate structure, and the number of core boards in the remaining PCB board laminate structure is 2N+1. Taking the number of core boards as an example, at this time, the core boards with different thicknesses are located at the top position, that is, the thickness of core board 1 (corresponding to the graphic layers L01 and L02) is different from that of other core boards (such as Figure 26 Core panels 2 to 8 have the same material and thickness. The upper and lower sides of core panel 2 are core panel pattern layers L03 and L04, respectively. The upper and lower sides of core panel 8 are core panel pattern layers L15 and L16, respectively.

[0077] At this point, the design method includes the following steps: Step 1: Graphic layer design. At this time, the core board graphic layer corresponding to the different material core board is designed separately to form a sub-core board (L01 and L02 core board graphic layers corresponding to core board 1). The N+1th core board graphic layer in the remaining core boards is designed separately to form a sub-core board (the L09 and L10 core board graphic layers corresponding to core board 5). For the remaining 2N core boards (the remaining core boards 2, 3, 4, 6, 7, and 8), at least two core board graphic layers are spliced ​​and designed to be on the upper or lower surface of the same core board to form a spliced ​​graphic layer.

[0078] The remaining even-numbered core boards (core board 2, core board 3, core board 4, core board 6, core board 7, core board 8) are designed by combining the core board graphic layer according to the method in Example 1, and the sub-core boards made separately from core board 1 and core board 5 are made, such as Figure 27 shown.

[0079] Step 2: Splice the board, and make the graphics according to the splicing graphic layer to form a splicing board The third step: voltage division design, the splicing board is divided according to the preset voltage division stacking order to obtain the voltage division board. At this time, the core board 1 and the core board 5 corresponding to the completed pattern production sub-core board are not divided with other splicing boards. Figure 28 The structure shown.

[0080] Step 4: Sub-board design: the pressure dividing board is divided into multiple first sub-boards and second sub-boards, such as Figure 29 As shown, the sub-core boards of core board 1 and core board 5 corresponding to the completed graphics production do not need to be divided into boards.

[0081] Step 5: Total pressure design: the first sub-board, the second sub-board, and the sub-core boards corresponding to the core board 1 and the core board 5 are pressed in the order of the PCB board lamination structure to obtain the required PCB board corresponding to the press board, (such as Figure 30 shown).

[0082] At this time, since a core board of different materials is involved, it is necessary to first measure the actual expansion and contraction coefficient of the sub-board, and then, when designing the graphic layer of the core board of different materials, preset the expansion and contraction coefficient of the core board graphic layer according to the actual expansion and contraction parameters of the sub-board and the thermal expansion coefficient of the core board of different materials. This can reduce the expansion and contraction difference between the graphic layer of the core board of different materials and the graphic layer of the sub-board, thereby improving the positioning accuracy of the product.

[0083] At this time, there are core boards of different thicknesses (core boards corresponding to core boards have different thicknesses), and the core boards of different thicknesses cannot be designed together with the remaining core boards. Therefore, the core boards of different thicknesses need to be made separately. In this embodiment, the number of remaining core boards is an odd number of layers, and they cannot be completely designed together. Therefore, the middle layer core boards of the remaining core boards are made separately, and then the even-numbered core boards are left. In this way, the remaining even-numbered core boards go through the same steps of pressure division and board division after the graphics are made, and the core boards of different thicknesses and the separately made core boards are pressed together to obtain a pressed board. Most of the core boards in the pressed board go through the same steps, which can ensure minimum expansion and contraction, thereby improving the positioning accuracy of the product. Example

[0084] In this embodiment, there is a core board of different materials in the laminated structure of the PCB board. The core board of different materials refers to a core board in the laminated structure of the PCB board that has a different thickness or material from any other core board (substrate or copper clad). Specifically, in this embodiment, the different thickness of the substrate is used as an example.

[0085] At this time, the different material core board is located at the top position in the PCB board laminate structure, and the number of core boards in the remaining PCB board laminate structure is 2N+1. Taking the number of core boards as an example, at this time, the core boards with different thicknesses are located at the top position, that is, the thickness of core board 1 (corresponding to the graphic layers L01 and L02) is different from that of other core boards (such as Figure 26 Core panels 2 to 8 have the same material and thickness. The upper and lower sides of core panel 2 are core panel pattern layers L03 and L04, respectively. The upper and lower sides of core panel 8 are core panel pattern layers L15 and L16, respectively.

[0086] At this point, the design method includes the following steps: Step 1: Graphic layer design. At this time, the core board graphic layer corresponding to the different material core board is designed separately to form a sub-core board (L01 and L02 core board graphic layers corresponding to core board 1). The N+1 core board pattern layer (L09 and L10 core board pattern layers corresponding to core board 5) and the dummy board pattern layer are spliced ​​and designed on the upper or lower surface of the same core board to form a first spliced ​​pattern layer. Patterns are produced according to the first spliced ​​pattern layer to form a first spliced ​​board. For the remaining 2N core panels (remaining core panel 2, core panel 3, core panel 4, core panel 6, core panel 7, core panel 8), at least two core panel graphic layers are spliced ​​and designed on the upper surface or lower surface of the same core panel to form a second spliced ​​graphic layer, and graphics are produced according to the second spliced ​​graphic layer to form a second spliced ​​panel.

[0087] At this time, the remaining even-numbered core boards (core board 2, core board 3, core board 4, core board 6, core board 7, core board 8) are designed by combining the core board graphic layers in the same manner as in Example 1. Figure 31 shown.

[0088] Step 2: voltage division design, divide the voltage of the first and second splicing plates according to the preset voltage division stacking order to obtain a voltage division plate, such as Figure 32 As shown, at this time, a separation layer is provided between the dummy board pattern layer and the PP to prevent the dummy board layer from being adhered and fixed to the core board 6 .

[0089] Step 3: Sub-board design, the pressure dividing board is divided into multiple sub-boards, such as Figure 33 As shown, at this time, the dummy plate is separated from the sub-core plate obtained from the core plate 5 and can be removed.

[0090] Step 4: Total pressing design: After removing the dummy board, the daughter board is pressed according to the PCB board lamination structure stacking sequence to obtain the required PCB board corresponding pressing board, such as Figure 34 shown.

[0091] At this time, since a core board of different materials is involved, it is necessary to first measure the actual expansion and contraction coefficient of the sub-board, and then, when designing the graphic layer of the core board of different materials, preset the expansion and contraction coefficient of the core board graphic layer according to the actual expansion and contraction parameters of the sub-board and the thermal expansion coefficient of the core board of different materials. This can reduce the expansion and contraction difference between the graphic layer of the core board of different materials and the graphic layer of the sub-board, thereby improving the positioning accuracy of the product.

[0092] At this time, there are core panels with different thicknesses (the core panels have different thicknesses). The core panels with different thicknesses cannot be designed together with the remaining core panels. The number of remaining core panels is an odd number. Therefore, a fake panel layer is added to the remaining core panels during design. At this time, setting up a fake panel layer can ensure that all core panels go through the same panel division and pressure division steps after the graphics are made. Therefore, the pressed panels obtained after the total pressing can ensure that the expansion and contraction are minimized, thereby improving the product's alignment accuracy.

[0093] Example 7 At this time, in this embodiment, there is a core board of different materials in the laminated structure of the PCB board. The core board of different materials refers to a core board in the laminated structure of the PCB board that is different in thickness or material from any other core board (substrate or copper clad). Specifically, in this embodiment, the different thickness of the substrate is used as an example.

[0094] At this time, the different material core board is located in the middle position of the PCB board laminate structure, and there are an even number of them, and the number of core boards in the remaining PCB board laminate structure is 2N. Taking the number of core boards as an example, at this time, the core boards with different thicknesses are located in the middle position, that is, the thickness of core board 3 (corresponding to graphic layers L05 and L06) and core board 4 (corresponding to graphic layers L07 and L08) are different from the thickness of other core boards (such as Figure 35Core panels 1, 2, 5, and 8 are made of the same material and have the same thickness. The upper and lower sides of core panel 1 are core panel pattern layers L01 and L02, respectively. The upper and lower sides of core panel 8 are core panel pattern layers L15 and L16, respectively.

[0095] At this point, the design method includes the following steps: Step 1: Graphic layer design. At this time, the core board graphic layer corresponding to the heterogeneous core board is designed separately to form a sub-core board (core board 3 (corresponding to graphic layers L05 and L06), core board 4 (corresponding to graphic layers L07 and L08)). The remaining even-numbered core boards (core board 1, core board 2, core board 5, core board 6, core board 7, core board 8) are designed together with the core board graphic layer according to the method in Example 1. Core board 5 and core board 6 are designed separately to form sub-core boards. Figure 36 shown.

[0096] Step 2: Splicing the board, making graphics according to the splicing graphic layer to form a splicing board; The third step: voltage division design, the splicing board is divided according to the preset voltage division stacking order to obtain the voltage division board. At this time, the core board 3, core board 4, core board 5, and core board 6 corresponding to the sub-core board with completed pattern production are not divided by voltage with other splicing boards. Figure 37 The structure shown.

[0097] Step 4: Sub-board design: the pressure dividing board is divided into multiple first sub-boards and second sub-boards, such as Figure 38 As shown, core board 3, core board 4, core board 5, and core board 6 correspond to the sub-core boards that have completed pattern production and do not need to be divided into boards.

[0098] Step 5: Total pressure design: the first sub-board, the second sub-board, and the sub-core boards corresponding to core boards 3, 4, 5, and 6 are pressed together in the order of the PCB board lamination structure to obtain the required PCB board corresponding to the press board (such as Figure 39 shown).

[0099] At this time, since a core board of different materials is involved, it is necessary to first measure the actual expansion and contraction coefficient of the sub-board, and then, when designing the graphic layer of the core board of different materials, preset the expansion and contraction coefficient of the core board graphic layer according to the actual expansion and contraction parameters of the sub-board and the thermal expansion coefficient of the core board of different materials. This can reduce the expansion and contraction difference between the graphic layer of the core board of different materials and the graphic layer of the sub-board, thereby improving the positioning accuracy of the product.

[0100] At this time, there are core panels of different thicknesses (core panels corresponding to core panels have different thicknesses), and the core panels of different thicknesses cannot be designed together with the remaining core panels. Therefore, the core panels of different thicknesses need to be made separately. In this embodiment, the remaining even-numbered core panels can be spliced ​​to form spliced ​​panels, and those that cannot be spliced ​​are made separately. In this way, the remaining even-numbered core panels go through the same steps of pressure division and panel division after the graphics are made, and the core panels of different thicknesses and the separately made core panels are pressed together to obtain a pressed panel. Most of the core panels in the pressed panel go through the same steps, which can ensure minimal expansion and contraction, thereby improving the product's alignment accuracy. Example

[0101] At this time, in this embodiment, there is a core board of different materials in the laminated structure of the PCB board. The core board of different materials refers to a core board in the laminated structure of the PCB board that is different in thickness or material from any other core board (substrate or copper clad). Specifically, in this embodiment, the different thickness of the substrate is used as an example.

[0102] At this time, the different material core board is located in the middle position of the PCB board laminate structure, and there are an even number of them, and the number of core boards in the remaining PCB board laminate structure is 2N. Taking the number of core boards as an example, at this time, the core boards with different thicknesses are located in the middle position, that is, the thickness of core board 3 (corresponding to graphic layers L05 and L06) and core board 4 (corresponding to graphic layers L07 and L08) are different from the thickness of other core boards (such as Figure 35 Core panels 1, 2, 5, and 8 are made of the same material and have the same thickness. The upper and lower sides of core panel 1 are core panel pattern layers L01 and L02, respectively. The upper and lower sides of core panel 8 are core panel pattern layers L15 and L16, respectively.

[0103] At this point, the design method includes the following steps: Step 1: Graphic layer design. At this time, the core board graphic layer corresponding to the different material core board and the fake board form a spliced ​​board with a spliced ​​graphic layer. The remaining even-numbered core boards (core board 1, core board 2, core board 5, core board 6, core board 7, core board 8) are now combined with core board 1, core board 2, core board 7, and core board 8 to complete the splicing design of the core board pattern layer in the same manner as in Example 1. Core board 5, core board 6, and the dummy board form a splicing board with a splicing pattern layer, as shown in FIG. Figure 40 shown.

[0104] Step 2: Splicing the board, making graphics according to the splicing graphic layer to form a splicing board; The third step: pressure division design, the splicing plate is pressure divided according to the preset pressure division stacking order to obtain a pressure division plate. At this time, the splicing plate formed by core plate 3 and core plate 4 is pressure divided with the splicing plate formed by core plate 1, core plate 2, core plate 7, and core plate 8. The core plate 5 and core plate 6 form a corresponding splicing plate for pressure division. After pressure division, the following is formed Figure 41 The structure shown.

[0105] Step 4: Sub-board design: the pressure dividing board is divided into multiple first sub-boards, second sub-boards, and third sub-boards, such as Figure 42 shown.

[0106] Step 5: Total pressure design: the first sub-board, the second sub-board, the third sub-board, and the PCB board laminate structure are stacked in the order of total pressure to obtain the required PCB board corresponding to the press board (such as Figure 43 shown).

[0107] At this time, since a core board of different materials is involved, it is necessary to first measure the actual expansion and contraction coefficient of the sub-board, and then, when designing the graphic layer of the core board of different materials, preset the expansion and contraction coefficient of the core board graphic layer according to the actual expansion and contraction parameters of the sub-board and the thermal expansion coefficient of the core board of different materials. This can reduce the expansion and contraction difference between the graphic layer of the core board of different materials and the graphic layer of the sub-board, thereby improving the positioning accuracy of the product.

[0108] At this time, there are core panels of different thicknesses (core panels corresponding to core panels have different thicknesses), and the core panels of different thicknesses cannot be designed together with the remaining core panels. Therefore, the core panels of different thicknesses need to be made separately. In this embodiment, the remaining even-numbered core panels can be spliced ​​to form spliced ​​panels, and those that cannot be spliced ​​are made separately. In this way, the remaining even-numbered core panels go through the same steps of pressure division and panel division after the graphics are made, and the core panels of different thicknesses and the separately made core panels are pressed together to obtain a pressed panel. Most of the core panels in the pressed panel go through the same steps, which can ensure minimal expansion and contraction, thereby improving the product's alignment accuracy. Example

[0109] At this time, in this embodiment, there is a core board of different materials in the laminated structure of the PCB board. The core board of different materials refers to a core board in the laminated structure of the PCB board that is different in thickness or material from any other core board (substrate or copper clad). Specifically, in this embodiment, the different thickness of the substrate is used as an example.

[0110] At this time, the heterogeneous core board is located in the middle of the PCB laminate structure, and there are an odd number of them. For example, if the number of core boards is 8, the core boards with different thicknesses are located in the middle, that is, the thickness of core board 3 (corresponding to the graphic layers L05 and L06) is different from that of other core boards (such as Figure 44 Core panels 1, 2, 4, 5, and 8 are made of the same material and have the same thickness. Core panel 1 has core panel pattern layers L01 and L02 on its upper and lower sides, respectively. Core panel 8 has core panel pattern layers L15 and L16 on its upper and lower sides, respectively.

[0111] At this point, the design method includes the following steps: Step 1: Graphic layer design. At this time, the core board graphic layer corresponding to the different material core board and the fake board form a spliced ​​board with a spliced ​​graphic layer. The remaining core boards (core board 1, core board 2, core board 4, core board 5, core board 6, core board 7, core board 8) are now completed with the core board 1, core board 2, core board 7, and core board 8. The core board pattern layer is designed in the same manner as in Example 1. The core board 4 and core board 5 are spliced ​​together, and the core board 6 and the dummy board form a spliced ​​board with a spliced ​​pattern layer. Figure 45 shown.

[0112] Step 2: Splicing the board, making graphics according to the splicing graphic layer to form a splicing board; The third step: pressure division design, the splicing plate is pressure divided according to the preset pressure division stacking order to obtain the pressure division plate. At this time, the splicing plate formed by the core plate 3 and the dummy plate is pressure divided with the splicing plate of the core plate 1, core plate 2, core plate 7, and core plate 8, and the dummy plate splicing plate corresponding to the core plate 4, core plate 5, and core plate 6 is pressure divided. After pressure division, the following is formed Figure 46 The structure shown.

[0113] Step 4: Sub-board design: the pressure dividing board is divided into multiple first sub-boards, second sub-boards, third sub-boards, and fourth sub-boards, such as Figure 47 shown.

[0114] Step 5: Total pressure design: the first sub-board, the second sub-board, the third sub-board, and the fourth sub-board are pressed together in the order of the PCB laminate structure to obtain the required PCB corresponding pressing plate (such as Figure 48 shown).

[0115] At this time, since a core board of different materials is involved, it is necessary to first measure the actual expansion and contraction coefficient of the sub-board, and then, when designing the graphic layer of the core board of different materials, preset the expansion and contraction coefficient of the core board graphic layer according to the actual expansion and contraction parameters of the sub-board and the thermal expansion coefficient of the core board of different materials. This can reduce the expansion and contraction difference between the graphic layer of the core board of different materials and the graphic layer of the sub-board, thereby improving the positioning accuracy of the product.

[0116] At this time, there are core panels with different thicknesses (core panels have different thicknesses corresponding to the core panels), and the core panels with different thicknesses cannot be designed together with the remaining core panels. Therefore, the core panels with different thicknesses need to be spliced ​​with fake panels. In this embodiment, the remaining core panels can be spliced ​​to form spliced ​​panels. In this way, the remaining core panels go through the same pressure division and panel division steps after the graphics are made, and the core panels with different thicknesses also participate in some of the pressure division and panel division steps. Most of the core panels in the pressed panel go through the same steps, which can ensure minimal expansion and contraction, thereby improving the product's alignment accuracy. Example

[0117] In this embodiment, the PCB board is provided with blind and buried vias. At this time, the blind and buried vias only involve a single layer of the core board. In the specific steps of Examples 1 to 3, in the process of splicing the graphic layers to produce graphics to form a spliced ​​board, the buried blind and buried vias are directly designed and produced, and the remaining steps are the same.

[0118] For example, Figure 49 As shown, there is a buried hole on the core board 2, and the graphic layer is designed as shown in FIG. Figure 44 As shown, after the graphic layer is designed, the core board 2 and the core board 7 need to be spliced ​​together to form a splicing board, and then buried holes are processed at the splicing board position, as shown in FIG. Figure 50 As shown, finally complete the voltage divider design in sequence (such as Figure 51 ), sub-board design (such as Figure 52 ), total pressure design (such as Figure 53 ).

[0119] If blind holes are involved and only a single layer of core board is involved, the blind holes are located at the core board 1 or core board 8. The design method is the same as the above-mentioned buried hole design method. The difference is that the blind holes are designed at the corresponding positions of the core board 1 or core board 8, so they are not described in detail. Example

[0120] In this embodiment, the PCB board is provided with buried vias. At this time, the buried vias involve a cross-core board. If two voltage divider plates are designed normally according to the methods in Examples 1 to 3, and the buried vias are located at the same voltage divider plate position, then in the voltage dividing process, the core board involved in the buried blind vias is given priority for voltage dividing, and then the holes are designed. Finally, all the spliced ​​boards are voltage divided for the second time, and then the board division and total voltage process are carried out.

[0121] Specifically, taking the number of core boards as 8 as an example, at this time, all core boards have the same material and thickness. The upper and lower sides of core board 1 are core board graphic layers L01 and L02 respectively, the upper and lower sides of core board 2 are core board graphic layers L03 and L04 respectively,... The upper and lower sides of core board 8 are core board graphic layers L15 and L16 respectively.

[0122] At this time, the buried via is located on the same side of the voltage divider, spanning core board 2, core board 3, and core board 4, that is, connecting graphic layers L03, L04, L05, L06, L07, and L08. Figure 54 As shown, if all core boards are normally divided, core boards 1 to 4 are divided on one side of the same splicing board and are in the same sub-board position after the boards are divided.

[0123] At this point, the design method includes the following steps: Step 1: Graphics layer design. At this time, graphic layers L01 and L16, L02 and L15 are combined and designed on the same core board and the same circuit layer. L03 and L14, L04 and L13 are combined and designed on the same core board and the same circuit layer. And so on, L05 and L12, L06 and L11, L07 and L10, L08 and L09 (graphic layers on one side are in ascending order from top to bottom, and graphic layers on the other side are in descending order from top to bottom). Figure 55 shown.

[0124] Step 2: First voltage division design, divide the voltage of the splicing board of core board 2, core board 3, and core board 4 (which are respectively spliced ​​with core board 7, core board 6, and core board 5 to form a splicing board) involved in the buried hole for the first time to form the first voltage division board, such as Figure 56 As shown; Step 3: Buried hole design, forming a first voltage divider plate with a hole structure on the first voltage divider plate, such as Figure 57 As shown; Step 4: Second pressure dividing design, divide the pressure of the splicing board formed by core board 1 and core board 8 with the first pressure dividing board twice to form the second pressure dividing board, such as Figure 58 As shown; Step 5: Sub-board design: split the second pressure dividing board into multiple sub-boards, such as Figure 59 As stated.

[0125] Step 6: Total pressure design, according to the PCB board lamination structure stacking order, the sub-board total pressure is obtained to obtain the required PCB board corresponding pressing plate, such as Figure 60 shown.

[0126] At this time, if the PCB board is provided with a blind hole, then during the design process, the first pressure-dividing board involved in the blind hole is divided to form the first pressure-dividing board, and then the blind hole design is done, and then the pressure is divided a second time with other splicing boards to form the second pressure-dividing board, and then the board division and total pressure design are done to complete the design of the blind hole. At this time, most of the core boards in the press board go through the same steps, which can ensure minimal expansion and contraction, thereby improving the product's positioning accuracy. Example

[0127] In this embodiment, the PCB board is provided with buried vias and blind vias. At this time, the buried vias and blind vias involve cross-core boards. First, the boards are spliced ​​in accordance with the methods of embodiments one to three to form multiple spliced ​​boards. Then, the spliced ​​boards involved in the buried holes are pressure-divided to form pressure-dividing board 1. After forming pressure-dividing board 1, holes are processed to form buried holes. Then, the other spliced ​​boards involved are pressure-divided to form pressure-dividing board 2. After forming pressure-dividing board 2, holes are processed to form blind holes. If there are other spliced ​​boards that have not been pressure-divided, they are pressure-divided again, and then the board separation and total pressure processes are carried out.

[0128] Specifically, taking the number of core boards as 8 as an example, at this time, all core boards have the same material and thickness. The upper and lower sides of core board 1 are core board graphic layers L01 and L02 respectively, the upper and lower sides of core board 2 are core board graphic layers L03 and L04 respectively,... The upper and lower sides of core board 8 are core board graphic layers L15 and L16 respectively.

[0129] At this time, the buried vias are located on the same side of the voltage divider, spanning core board 2, core board 3, and core board 4, that is, connecting graphic layers L03, L04, L05, L06, L07, and L08. The blind vias span core board 6, core board 7, and core board 8, that is, connecting graphic layers L11, L12, L13, L14, L15, and L16. Figure 61 shown.

[0130] At this point, the design method includes the following steps: Step 1: Graphics layer design. At this time, graphic layers L01 and L16, L02 and L15 are combined and designed on the same core board and the same circuit layer. L03 and L14, L04 and L13 are combined and designed on the same core board and the same circuit layer. And so on, L05 and L12, L06 and L11, L07 and L10, L08 and L09 (graphic layers on one side are in ascending order from top to bottom, and graphic layers on the other side are in descending order from top to bottom). Figure 62 shown.

[0131] Step 2: First voltage division design, divide the voltage of the splicing board of core board 2, core board 3, and core board 4 (which are respectively spliced ​​with core board 7, core board 6, and core board 5 to form a splicing board) involved in the buried hole for the first time to form the first voltage division board, such as Figure 63 As shown; Step 3: Buried hole design, forming a first voltage divider plate with a hole structure on the first voltage divider plate, such as Figure 64 As shown; Step 4: Second pressure dividing design, divide the pressure of the splicing board formed by core board 1 and core board 8 with the first pressure dividing board twice to form the second pressure dividing board, such as Figure 65 As shown; Step 5: Blind hole design: design a blind hole on the second voltage divider plate formed by the second voltage divider, thereby forming a second voltage divider plate with a blind hole, such as Figure 66 As shown; Step 6: Sub-board design: Sub-board the second pressure dividing board to obtain multiple sub-boards, such as Figure 67 As stated.

[0132] Step 6: Total pressure design, according to the PCB board lamination structure stacking order, the sub-board total pressure is obtained to obtain the required PCB board corresponding pressing plate, such as Figure 68 shown.

[0133] At this time, most of the core panels in the laminate undergo the same steps, which can ensure minimal expansion and contraction, thereby improving the product's positioning accuracy.

[0134] Example 13 The PCB board is provided with blind buried vias across the core board, and the blind buried vias across the core board need to penetrate at least two core board graphic layers on the spliced ​​board. The design adopts the normal process of making through holes when making the laminated board, and then adopts back drilling design to complete the blind buried hole design. Specifically, taking the number of core boards as 8 as an example, at this time, all core boards have the same material and thickness. The upper and lower sides of core board 1 are core board graphic layers L01 and L02 respectively, the upper and lower sides of core board 2 are core board graphic layers L03 and L04 respectively,... The upper and lower sides of core board 8 are core board graphic layers L15 and L16 respectively.

[0135] At this time, the blind hole spans core board 6, core board 7, and core board 8, that is, it connects graphic layers L11, L12, L13, L14, L15, and L16. Figure 69 shown.

[0136] At this time, the total pressing is completed according to the method of embodiment 1 to embodiment 3 to obtain a pressed plate, such as Figure 70 shown.

[0137] Finally, a back-drilled hole is formed in the press plate by back drilling, thereby completing the hole processing process.

[0138] At this time, the core board of the laminate undergoes the same steps, which can ensure minimum expansion and contraction, thereby improving the positioning accuracy of the product. Example

[0139] Fabrication of a splicing board: After the circuits are fabricated according to the first splicing pattern layer and the second splicing pattern layer, drilling, hole metallization, and hole plugging are sequentially performed to form a splicing board; Sub-core board production: after the circuit is made according to the core board graphic layer, drilling, hole metallization and hole plugging production processes are carried out in sequence to form a sub-core board; Production of the pressure-dividing plate: The first splicing plate or sub-core plate and the second splicing plate are pressure-divided according to a preset pressure-dividing lamination sequence, and drilling, hole metallization, and plugging are sequentially performed to form the pressure-dividing plate; the pressure-dividing plate laminate structure includes the first splicing plate. During the pressure-dividing lamination, an isolation film is added to the upper / lower surface of the prepreg between the dummy plate area of ​​the first splicing plate and the second splicing plate to isolate the dummy plate area from the prepreg surface, and the prepreg surface from the second splicing plate; Depaneling: Depaneling the pressure-dividing spliced ​​board obtained by the pressure-dividing design, removing the dummy board, and sequentially performing drilling, hole metallization, and hole plugging production processes to form daughter boards; Total pressing: the sub-boards are pressed in the order of stacking the PCB board lamination structure to obtain a pressed board corresponding to the required PCB board; Post-process: Produce normally according to the post-process of PCB board. Example

[0140] A PCB board is manufactured using the design method in the above embodiment, or manufactured using the manufacturing method in the above embodiment.

[0141] In all the above embodiments, if panelization is performed, two core board graphic layers are set on one side of the core board, so that four core board graphic layers are set on the upper surface and the lower surface of a core board, thereby forming two spliced ​​graphic layers. After the spliced ​​graphic layers are completed, the panels are divided and pressed to obtain corresponding sub-boards, and finally the corresponding sub-boards are pressed together to form a PCB board. At this time, the steps of most of the core board graphic layers involved in the PCB board are exactly the same after the graphic design. Therefore, the PCB board is obtained after the total pressing, which can ensure the minimum expansion and contraction, thereby improving the positioning accuracy of the product.

[0142] The technical features of the above-mentioned embodiments can be combined arbitrarily. In order to make the description concise, not all possible combinations of the technical features in the above-mentioned embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.

[0143] The above-described embodiments merely illustrate several implementations of the present invention, and while their descriptions are relatively specific and detailed, they should not be construed as limiting the scope of the patent. It should be noted that a person skilled in the art would be able to make numerous variations and improvements without departing from the spirit of the present invention, all of which fall within the scope of protection of the present invention. Therefore, the scope of protection of the patent for this invention shall be determined by the appended claims.

Claims

1. A multiple blind and buried via PCB board design method, characterized in that: The PCB board is provided with multiple blind vias and / or buried vias, and the design method includes: Graphic layer design: In the graphic layer design of the PCB board, core board graphic layers corresponding to core boards with the same core board material, copper layer thickness, and core board thickness are selected and spliced ​​together. At this time, at least two core board graphic layers are spliced ​​together on the upper surface or lower surface of the same core board to form a spliced ​​graphic layer. There is a spacing between adjacent core board graphic layers in the spliced ​​graphic layer. The spacing is greater than or equal to 2 times the width of the process edge. The spliced ​​graphic layers are patterned to form a spliced ​​board; Voltage division design: The spliced ​​board obtained by the graphic layer design is divided according to the preset voltage division stacking order to obtain a voltage division board; Sub-board design: The voltage-dividing board obtained by the voltage-dividing design is divided into multiple sub-boards; Total pressing design: The sub-boards are pressed in the order of stacking the PCB board lamination structure to obtain the required pressed board corresponding to the PCB board.

2. The method for designing a PCB board with multiple blind and buried vias according to claim 1, wherein: When designing the graphic layer, determine the preset voltage division and stacking order of the core board during voltage division. At this time, the number of layers of the core board graphic layer corresponding to one side of the core board is arranged in ascending order from top to bottom, and the number of layers of the core board graphic layer on the other side of the core board is arranged in ascending or descending order from top to bottom.

3. The method for designing a PCB board with multiple blind and buried vias according to claim 2, wherein: When determining the preset voltage division stacking order of the core board during voltage division, the position of the core board graphic layer on the other side of the core board is determined in ascending or descending order based on the arrangement order of the graphic layer with the smallest difference in residual copper rate between the upper and lower surfaces of the spliced ​​board.

4. The method for designing a PCB board with multiple blind and buried vias according to claim 3, wherein: The two core board graphic layers on the upper surface or lower surface of the splicing board are the first graphic layer and the second graphic layer. The first graphic layer and the second graphic layer are symmetrically arranged about the symmetry axis in the middle position of the two, or rotated 360° or rotated 180°. The first graphic layer and the second graphic layer are provided with a first positioning hole and a second positioning hole on the outside. The first positioning hole and the second positioning hole are symmetrically arranged about the symmetry axis in the middle position of the first graphic layer and the second graphic layer, or rotated 360° or rotated 180°.

5. The method for manufacturing a PCB board with multiple blind and buried vias according to claim 4, wherein: The surface of the sub-board is provided with a layer mark for marking.

6. The method for designing a PCB board with multiple blind and buried vias according to claim 4, wherein: When the number of core boards in the laminated structure of the PCB board is an even number 2N, where N is a natural number greater than or equal to 2, when designing the graphic layer, at least two core board graphic layers are spliced ​​and designed to form a spliced ​​graphic layer on the upper surface or lower surface of the same core board.

7. The method for designing a PCB board with multiple blind and buried vias according to claim 4, wherein: When the number of core boards in the laminated structure of the laminated board obtained by total pressing is an odd number 2N+1, where N is a natural number greater than or equal to 2, the design method includes: Graphic layer design: The N+1th core board graphic layer is designed separately to form a sub-core board. For the remaining 2N core boards, at least two core board graphic layers are spliced ​​and designed on the upper or lower surface of the same core board to form a spliced ​​graphic layer. Splicing board: producing graphics according to the splicing graphic layer to form a splicing board; Pressure dividing design: The splicing plate is pressure divided according to the preset pressure dividing stacking order to obtain a pressure dividing plate; Sub-board design: the pressure dividing board is divided into multiple sub-boards; Total pressing design: the sub-board and the sub-core board are pressed together in the order of stacking the PCB board lamination structure to obtain a pressed board corresponding to the required PCB board.

8. The method for designing a PCB board with multiple blind and buried vias according to claim 4, wherein: When the number of core boards in the laminated structure of the laminated board obtained by total pressing is an odd number 2N+1, where N is a natural number greater than or equal to 2, the design method includes: Graphic layer design: The N+1th core board graphic layer and the dummy board graphic layer are spliced ​​and designed on the upper or lower surface of the same core board to form the first spliced ​​graphic layer. The graphics are produced according to the first spliced ​​graphic layer to form the first spliced ​​board. For the remaining 2N core boards, at least two core board pattern layers are spliced ​​and designed on the upper surface or lower surface of the same core board to form a second spliced ​​pattern layer, and patterns are produced according to the second spliced ​​pattern layer to form a second spliced ​​board; Pressure dividing design: the first splicing plate and the second splicing plate are pressure divided according to a preset pressure dividing stacking order to obtain a pressure dividing plate; Sub-board design: the pressure dividing board is divided into multiple sub-boards; Total pressing design: After removing the dummy board, the daughter board is pressed according to the stacking order of the PCB board lamination structure to obtain the required pressed board corresponding to the PCB board.

9. The method for designing a PCB board with multiple blind and buried vias according to any one of claims 6 to 8, wherein: When there is a core board of a different material in the PCB board laminate structure, the design method includes: Graphic layer design: If the different-material core board is located at the top or bottom of the PCB laminate structure, and the number of core boards in the remaining PCB laminate structure is 2N, the graphic layer of the different-material core board is designed separately to form a sub-core board. For the core boards in the remaining PCB laminate structure, at least two core board graphic layers are spliced ​​and designed on the upper or lower surface of the same core board to form a spliced ​​graphic layer. The spliced ​​graphic layer is patterned to form a spliced ​​board; If the foreign material core board is located at the top position or the bottom position in the PCB board laminate structure, and the number of core boards in the remaining PCB board laminate structure is 2N+1, the foreign material core board graphic layer is designed separately to form a sub-core board, and for the core boards in the remaining PCB board laminate structure, the N+1th core board graphic layer is designed separately to form a sub-core board, and for the remaining 2N number of core boards, at least two core board graphic layers are spliced ​​and designed on the upper surface or lower surface of the same core board to form a spliced ​​graphic layer, or the N+1th core board graphic layer and the fake board graphic layer are spliced ​​and designed on the upper surface or lower surface of the same core board to form a first spliced ​​graphic layer, and graphics are produced according to the first spliced ​​graphic layer to form a first spliced ​​board, and for the remaining 2N number of core boards, at least two core board graphic layers are spliced ​​and designed on the upper surface or lower surface of the same core board to form a second spliced ​​graphic layer, and graphics are produced according to the second spliced ​​graphic layer to form a second spliced ​​board; If the heterogeneous core board is located in the middle of the PCB laminate structure and the heterogeneous core board is an even number, the heterogeneous core board graphic layer is designed separately to form a sub-core board or the heterogeneous core board graphic layer and the dummy board graphic layer are spliced ​​on the upper and lower graphic layers of the same core board to form a first spliced ​​graphic layer, and the graphic production is performed according to the first spliced ​​graphic layer to form a first spliced ​​board; the graphic layer design of the even number of core board graphic layers is completed according to the design method of the even number of core boards to form a second spliced ​​graphic layer, and the graphic production is performed according to the second spliced ​​graphic layer to form a second spliced ​​board; If the heterogeneous core board is located in the middle of the PCB laminate structure and the number of heterogeneous core boards is odd, at least two non-heterogeneous core board graphic layers are spliced ​​and designed on the upper surface or lower surface of the same core board to form a first spliced ​​graphic layer, and the graphic production is performed according to the first spliced ​​graphic layer to form a first spliced ​​board, and the remaining heterogeneous core board graphic layers and the dummy board graphic layers are spliced ​​and designed on the upper surface or lower surface of the same core board to form a second spliced ​​graphic layer, and the graphic production is performed according to the second spliced ​​graphic layer to form a second spliced ​​board; Pressure division design: the splicing plate, or the first splicing plate and the second splicing plate are pressure-divided in a preset pressure division stacking order to form a pressure division plate, with the first splicing plate being preferably preset on the outside of the pressure division stacking plate; Sub-board design: the pressure dividing board is divided into multiple sub-boards; Total pressing design: If there is a dummy board, the sub-board will be removed from the dummy board and then pressed in the order of the PCB lamination structure to obtain the required PCB board corresponding to the pressing board.

10. The method for designing a PCB board with multiple blind and buried vias according to claim 9, wherein: During the total pressure design, expansion and contraction compensation design is performed on the separately manufactured heterogeneous core board, including the expansion and contraction coefficient of the sub-board obtained by actual measurement of the sub-board. When separately designing the heterogeneous core board graphic layer, the expansion and contraction coefficient of the heterogeneous core board graphic layer is preset by referring to the expansion and contraction coefficient of the sub-board and combining the thermal expansion coefficient of the heterogeneous core board to design the heterogeneous core board graphic layer.

11. The method for designing a PCB board with multiple blind and buried vias according to claim 10, wherein: The first splicing pattern layer adopts a uniform pattern design of a fake board pattern layer with a small difference in residual copper rate between the upper and lower pattern layers of the splicing board.

12. The method for designing a PCB board with multiple blind and buried vias according to any one of claims 6 to 8, wherein: The PCB board is provided with blind buried vias, including single-core board blind buried vias and / or cross-core board blind buried vias, and the design method thereof includes: Single core board blind and buried hole design: the blind and buried holes are designed and made simultaneously when the spliced ​​board is made; Design of blind buried vias across the core board: When designing the voltage divider, priority is given to adopting a voltage divider stacking design in which blind buried vias across the core board penetrate the voltage divider board, and the blind buried via manufacturing process is completed simultaneously when the voltage divider board is manufactured; when multiple blind buried vias across the core board at different levels are involved, according to the design method, according to the levels of the blind buried vias across the core board, successive voltage division is adopted to form voltage divider board 1, voltage divider board 2...voltage divider board n, where n is a natural number greater than or equal to 2, and the blind buried vias 1, blind buried vias 2,..., and blind buried vias n are designed to be completed simultaneously when the voltage divider board 1, voltage divider board 2,..., and voltage divider board n are manufactured.

13. The method for designing a PCB board with multiple blind and buried vias according to any one of claims 6 to 8, wherein: The PCB board is provided with blind buried vias across the core board, and the blind buried vias across the core board need to pass through at least two core board graphic layers on the splicing board. The design adopts the normal process flow to make through holes when making the pressed board, and then adopts the back drilling design to complete the blind buried hole design.

14. A method for manufacturing a PCB with multiple blind and buried vias, designed using the method for designing a PCB with multiple blind and buried vias according to any one of claims 1 to 13, comprising: Fabrication of a splicing board: After the circuits are fabricated according to the first splicing pattern layer and the second splicing pattern layer, drilling, hole metallization, and hole plugging are sequentially performed to form a splicing board; Sub-core board production: after the circuit is made according to the core board graphic layer, drilling, hole metallization and hole plugging production processes are carried out in sequence to form a sub-core board; Production of the pressure-dividing plate: The first splicing plate or sub-core plate and the second splicing plate are pressure-divided according to a preset pressure-dividing lamination sequence, and drilling, hole metallization, and plugging are sequentially performed to form the pressure-dividing plate; the pressure-dividing plate laminate structure includes the first splicing plate. During the pressure-dividing lamination, an isolation film is added to the upper / lower surface of the prepreg between the dummy plate area of ​​the first splicing plate and the second splicing plate to isolate the dummy plate area from the prepreg surface, and the prepreg surface from the second splicing plate; Depaneling: Depaneling the pressure-dividing spliced ​​board obtained by the pressure-dividing design, removing the dummy board, and sequentially performing drilling, hole metallization, and hole plugging production processes to form daughter boards; Total pressing: the sub-boards are pressed in the order of stacking the PCB board lamination structure to obtain a pressed board corresponding to the required PCB board; Post-process: Produce normally according to the post-process of PCB board.

15. A PCB board manufactured by the design method for a PCB board with multiple blind and buried vias according to any one of claims 1 to 14, or manufactured by the manufacturing method for a PCB board with multiple blind and buried vias according to claim 15.

Citation Information

Patent Citations

  • Manufacturing method for multilayer stacking printed wiring board

    CN101662897A

  • Manufacturing method of printed circuit board

    CN102056414A

  • Manufacturing method of inner-layer pattern of multi-layer PCB

    CN110708893A

  • Preparation method of novel PCB two-flavor jointed board

    CN111132477A

  • Control method for high-precision inter-layer alignment of ultrahigh multi-layer board

    CN113630988A