LCR meter and measuring method for measuring electrified measured piece

Abstract

The invention belongs to the technical field of electronic component impedance measurement, and particularly relates to an LCR meter and a measurement method for measuring a charged measured piece, the LCR meter comprises an AC signal source, a first blocking capacitor, a second blocking capacitor, a third blocking capacitor, a voltage sampling unit, a current sampling unit, a first fast recovery diode and a second fast recovery diode; when an electrified tested piece is connected, the first blocking capacitor isolates direct current voltage on the tested piece and applies the direct current voltage to the alternating current signal source, and the second blocking capacitor and the third blocking capacitor isolate direct current voltage on the tested piece and apply the direct current voltage to the voltage sampling unit. The first fast recovery diode and the second fast recovery diode clamp the voltage drop on the current sampling unit; according to the invention, the alternating current signal source, the voltage sampling unit and the current sampling unit can be prevented from being damaged at the moment when the electrified tested piece is connected to the LCR meter, the LCR meter is effectively protected, and the problem that the LCR meter is damaged due to voltage impact is solved.

Description

Technical Field

[0001] The present invention belongs to the technical field of electronic component impedance measurement, and specifically relates to an electrical performance testing device, and more particularly to an LCR meter and a method for measuring a charged test piece. Background Art

[0002] During capacitor testing, a DC voltage must first be applied to the capacitor under test to measure the leakage current. After the leakage current test is complete, the capacitor under test is discharged, and the capacitance of the capacitor under test is measured. However, in actual production, the capacitor under test may not be fully discharged. Even due to operational errors, the capacitor under test may not be discharged. Using an LCR meter to directly measure the charged capacitor under test can damage the LCR meter, affect normal production, and increase equipment maintenance costs.

[0003] Therefore, there is an urgent need to develop a new LCR meter and a measurement method for measuring a charged test piece to solve the technical problem that the LCR meter is easily damaged when measuring a charged test capacitor.

[0004] It should be noted that the above information disclosed in this background technology section is only used to understand the background technology of the present application concept, and therefore, the above description is not considered to constitute information of the prior art. Summary of the Invention

[0005] The embodiments of the present disclosure at least provide an LCR meter and a method for measuring a charged device under test.

[0006] In a first aspect, an embodiment of the present disclosure provides an LCR meter, which includes: an AC signal source, a first DC blocking capacitor, a second DC blocking capacitor, a third DC blocking capacitor, a voltage sampling unit, a current sampling unit, a first fast recovery diode and a second fast recovery diode; wherein the AC signal source, the first DC blocking capacitor, the second DC blocking capacitor, the voltage sampling unit, the third DC blocking capacitor, and the current sampling unit are electrically connected in sequence; the first fast recovery diode and the second fast recovery diode are connected in parallel with the current sampling unit, and the conduction directions of the first fast recovery diode and the second fast recovery diode are opposite; when the device under test is connected, the first DC blocking capacitor isolates the DC voltage on the device under test from being applied to the AC signal source, and the second DC blocking capacitor and the third DC blocking capacitor isolate the DC voltage on the device under test from being applied to the voltage sampling unit; and the first fast recovery diode and the second fast recovery diode clamp the voltage drop on the current sampling unit.

[0007] In an optional embodiment, the LCR meter further includes: a current limiting circuit; the current limiting circuit is electrically connected to the first DC blocking capacitor; and the current limiting circuit limits the current flowing through the first DC blocking capacitor.

[0008] In a second aspect, an embodiment of the present disclosure further provides an LCR meter, which includes: a second DC blocking capacitor, a third DC blocking capacitor and a voltage sampling unit; wherein the second DC blocking capacitor, the voltage sampling unit and the third DC blocking capacitor are electrically connected in sequence; when a device under test is connected between the second DC blocking capacitor and the third DC blocking capacitor, the second DC blocking capacitor and the third DC blocking capacitor isolate the DC voltage on the device under test and apply it to the voltage sampling unit.

[0009] In a third aspect, an embodiment of the present disclosure further provides an LCR meter, which includes: an AC signal source and a first DC blocking capacitor; the AC signal source is electrically connected to the first DC blocking capacitor; when the first DC blocking capacitor is electrically connected to the device under test, the first DC blocking capacitor isolates the DC voltage on the device under test from being applied to the AC signal source.

[0010] In an optional embodiment, the LCR meter further includes: a current limiting circuit; the current limiting circuit is electrically connected to the first DC blocking capacitor; and the current limiting circuit limits the current flowing through the first DC blocking capacitor.

[0011] In a fourth aspect, an embodiment of the present disclosure further provides an LCR meter, comprising: a current sampling unit, a first fast recovery diode and a second fast recovery diode; wherein the first fast recovery diode and the second fast recovery diode are connected in parallel with the current sampling unit, and the conduction directions of the first fast recovery diode and the second fast recovery diode are opposite; when the common end of the current sampling unit, the first fast recovery diode and the second fast recovery diode are electrically connected to the device under test, the first fast recovery diode and the second fast recovery diode clamp the voltage drop on the current sampling unit.

[0012] In the fifth aspect, the embodiment of the present disclosure also provides a measurement method for measuring a live device under test, which includes: isolating the DC voltage on the device under test through a first DC blocking capacitor and applying it to an AC signal source; limiting the current flowing through the first DC blocking capacitor through a current limiting circuit; isolating the DC voltage on the device under test through a second DC blocking capacitor and a third DC blocking capacitor and applying it to a voltage sampling unit; and clamping the voltage drop on the current sampling unit through a first fast recovery diode and a second fast recovery diode.

[0013] In a sixth aspect, an embodiment of the present disclosure further provides a method for measuring a live device under test, which includes: isolating a DC voltage on the device under test by a second DC blocking capacitor and a third DC blocking capacitor and applying the DC voltage to a voltage sampling unit.

[0014] In the seventh aspect, the embodiment of the present disclosure also provides a measurement method for measuring a live device under test, which includes: isolating the DC voltage on the device under test from being applied to an AC signal source through a first DC blocking capacitor; and limiting the current flowing through the first DC blocking capacitor through a current limiting circuit.

[0015] In an eighth aspect, an embodiment of the present disclosure further provides a method for measuring a live device under test, which includes: clamping a voltage drop on a current sampling unit by using a first fast recovery diode and a second fast recovery diode.

[0016] The beneficial effect of the present invention is that, by arranging a first DC blocking capacitor between the AC signal source and the device under test, arranging a second DC blocking capacitor and a third DC blocking capacitor between the voltage sampling unit and the device under test, and arranging a first fast recovery diode and a second fast recovery diode between the current sampling unit and the device under test, the present invention can prevent the AC signal source, the voltage sampling unit, and the current sampling unit from being damaged when the charged device under test is connected to the LCR meter, effectively protect the LCR meter, and overcome the problem of the LCR meter being damaged due to voltage shock.

[0017] Other features and advantages of the present invention will be described in the following description, and in part will become apparent from the description, or understood by practicing the present invention. The purpose and other advantages of the present invention are realized and obtained by the structures particularly pointed out in the description and the drawings.

[0018] In order to make the above-mentioned objects, features and advantages of the present invention more obvious and easy to understand, preferred embodiments are given below and described in detail with reference to the accompanying drawings. BRIEF DESCRIPTION OF THE DRAWINGS

[0019] In order to more clearly illustrate the specific embodiments of the present invention or the technical solutions in the prior art, the following briefly introduces the drawings required for use in the specific embodiments or the description of the prior art. Obviously, the drawings described below are some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying any creative work.

[0020] Figure 1 A circuit diagram of an LCR meter provided in an embodiment of the present disclosure.

[0021] In the picture: OSC, AC signal source; C1, first DC blocking capacitor; C2, second DC blocking capacitor; C3, third DC blocking capacitor; DUT, device under test; U1, voltage sampling unit; U2, current sampling unit; U3, current limiting circuit; D1, the first fast recovery diode; D2, the second fast recovery diode. DETAILED DESCRIPTION

[0022] To make the objectives, technical solutions, and advantages of the embodiments of the present invention more clear, the technical solutions of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the embodiments described are only part of the embodiments of the present invention, not all of them. All other embodiments obtained by ordinary technicians in this field based on the embodiments of the present invention without making any creative efforts shall fall within the scope of protection of the present invention.

[0023] The terms used herein are only used to describe specific exemplary configurations and are not intended to be limiting. As used herein, the singular articles "a", "an" and "the" may also be intended to include plural forms, unless otherwise clearly indicated herein. The terms "comprise", "include" and "have" are inclusive and therefore specify the presence of features, steps, operations, elements and / or components, but do not exclude the presence or addition of one or more other features, steps, operations, elements, components and / or combinations thereof. The method steps, processes and operations described herein should not be interpreted as necessarily requiring them to be performed in the particular order discussed or shown, unless specifically identified as an execution order. Additional or alternative steps may be adopted.

[0024] As used herein, the phrases "in one embodiment," "according to one embodiment," "in some embodiments," and the like generally refer to the fact that the particular feature, structure, or characteristic following the phrase may be included in at least one embodiment of the present disclosure. Thus, a particular feature, structure, or characteristic may be included in more than one embodiment of the present disclosure, such that these phrases do not necessarily refer to the same embodiment. As used herein, the terms "example," "exemplary," and the like are used to "serve as an example, instance, or illustration." Any implementation, aspect, or design described herein as "example" or "exemplary" is not necessarily to be construed as preferred or advantageous over other implementations, aspects, or designs. Instead, the use of the terms "example," "exemplary," and the like is intended to present concepts in a concrete manner.

[0025] In the LCR table, L refers to Inductance, C refers to Capacitance, and R refers to Resistance.

[0026] Research has found that when existing LCR meters measure capacitors, the capacitors are directly electrically connected to the functional components in the LCR meter. However, the capacitors may impact the LCR meter due to regenerative voltage or insufficient discharge, causing voltage shock to the LCR meter and damaging the LCR meter.

[0027] Based on the above research, the embodiments of the present disclosure provide an LCR meter and a measurement method for a live device under test, which can prevent the live device under test from damaging the AC signal source, voltage sampling unit, and current sampling unit at the moment of being connected to the LCR meter, effectively protect the LCR meter, and overcome the problem of LCR meter being damaged due to voltage shock.

[0028] The defects in the above solutions are the results obtained by the inventors after practice and careful research. Therefore, the process of discovering the above problems and the solutions proposed by this disclosure for the above problems below should be the contributions made by the inventors to this disclosure during the disclosure process.

[0029] It should be noted that similar reference numerals and letters denote similar items in the following drawings, and therefore, once an item is defined in one drawing, it does not need to be further defined or explained in subsequent drawings.

[0030] The following embodiments of the present invention are described in detail with reference to the accompanying drawings. In the absence of conflict, the following embodiments and features therein may be combined with each other.

[0031] like Figure 1 As shown, at least one embodiment provides an LCR meter, which includes: an AC signal source OSC, a first DC blocking capacitor C1, a second DC blocking capacitor C2, a third DC blocking capacitor C3, a voltage sampling unit U1, a current sampling unit U2, a first fast recovery diode D1 and a second fast recovery diode D2; wherein the AC signal source OSC, the first DC blocking capacitor C1, the second DC blocking capacitor C2, the voltage sampling unit U1, the third DC blocking capacitor C3, and the current sampling unit U2 are electrically connected in sequence; the first fast recovery diode D1 and the second fast recovery diode D2 are connected in parallel with the current sampling unit U2, and the conduction directions of the first fast recovery diode D1 and the second fast recovery diode D2 are opposite; when the device under test DUT is connected, the first DC blocking capacitor C1 isolates the DC voltage on the device under test DUT from being applied to the AC signal source OSC, and the second DC blocking capacitor C2 and the third DC blocking capacitor C3 isolate the DC voltage on the device under test DUT from being applied to the voltage sampling unit U1; and the first fast recovery diode D1 and the second fast recovery diode D2 clamp the voltage drop on the current sampling unit U2.

[0032] In at least one embodiment, by providing a first DC blocking capacitor C1 between the AC signal source OSC and the device under test DUT, providing a second DC blocking capacitor C2 and a third DC blocking capacitor C3 between the voltage sampling unit U1 and the device under test DUT, and providing a first fast recovery diode D1 and a second fast recovery diode D2 between the current sampling unit U2 and the device under test DUT, it is possible to prevent the charged device under test DUT from damaging the AC signal source OSC, the voltage sampling unit U1, and the current sampling unit U2 at the moment of being connected to the LCR meter, effectively protecting the LCR meter and overcoming the problem of the LCR meter being damaged due to voltage shock.

[0033] Specifically, the device under test (DUT) may be a capacitor, and the capacitance and ESR (equivalent series resistance) of the device under test (DUT) may be measured by cooperating with the AC signal source (OSC), the voltage sampling unit (U1), and the current sampling unit (U2).

[0034] Specifically, if the device under test DUT is a charged capacitor, the DC voltage across the device under test DUT is as high as tens of volts. If the second DC blocking capacitor C2 and the third DC blocking capacitor C3 are not set, when the device under test DUT is directly connected to the voltage sampling unit U1 during testing, the DC voltage of tens of volts is sufficient to damage the voltage sampling unit U1. After setting the second DC blocking capacitor C2 and the third DC blocking capacitor C3, since the second DC blocking capacitor C2 and the third DC blocking capacitor C3 have the characteristics of blocking DC and passing AC, the DC voltage of tens of volts carried by the device under test DUT will not be applied to the voltage sampling unit U1.

[0035] Specifically, the input end of the voltage sampling unit U1 is a high-impedance input, so the capacity of the second blocking capacitor C2 and the third blocking capacitor C3 used is in the nanofarad level, that is, the stored energy is small, and instantaneous charging and discharging is not enough to damage the voltage sampling unit U1.

[0036] Specifically, when the signal source loop is in a stable state, due to the presence of the first DC blocking capacitor C1, the DC voltage of the device under test DUT will not be applied to the AC signal source OSC, so the AC signal source OSC will not be damaged by the voltage on the device under test DUT.

[0037] Specifically, the fast-responding first fast recovery diode D1 and the second fast recovery diode D2 ensure that the voltage drop on the current sampling unit U2 is about 0.7V, and the current sampling unit U2 will not be damaged due to excessive DC voltage on the current sampling unit U2.

[0038] In at least one embodiment, see Figure 1 The LCR meter further includes: a current limiting circuit U3; the current limiting circuit U3 is electrically connected to the first DC blocking capacitor C1; the current limiting circuit U3 limits the current flowing through the first DC blocking capacitor C1.

[0039] Specifically, when the DUT is connected to the LCR meter, the DUT charges the first DC-blocking capacitor C1. Because of the presence of current-limiting circuit U3 in the loop, charging of the first DC-blocking capacitor C1 begins at a limited maximum current and continues at a constant voltage until the voltage of the first DC-blocking capacitor C1 reaches that of the DUT. The presence of current-limiting circuit U3 in the excitation loop ensures that the AC signal source OSC will not be damaged by excessive current when the DUT is connected.

[0040] Specifically, the current limiting circuit U3 is composed of components such as resistors and depletion-type MOS transistors to achieve precise current control.

[0041] Based on the same technical concept, please refer to Figure 1 At least one embodiment further provides an LCR meter, which includes: a second DC blocking capacitor C2, a third DC blocking capacitor C3 and a voltage sampling unit U1; wherein the second DC blocking capacitor C2, the voltage sampling unit U1, and the third DC blocking capacitor C3 are electrically connected in sequence; when a device under test (DUT) is connected between the second DC blocking capacitor C2 and the third DC blocking capacitor C3, the second DC blocking capacitor C2 and the third DC blocking capacitor C3 isolate the DC voltage on the device under test (DUT) from being applied to the voltage sampling unit U1.

[0042] In at least one embodiment, a second DC blocking capacitor C2 is provided between the voltage sampling unit U1 and the device under test DUT to prevent the voltage sampling unit U1 from being directly electrically connected to the device under test DUT. This can prevent the voltage sampling unit U1 from being damaged when the device under test DUT is connected to the LCR meter. This can effectively protect the LCR meter and overcome the problem of the LCR meter being damaged due to voltage shock.

[0043] Specifically, if the device under test DUT is a charged capacitor, the DC voltage across the device under test DUT is as high as tens of volts. If the second DC blocking capacitor C2 and the third DC blocking capacitor C3 are not set, when the device under test DUT is directly connected in parallel with the voltage sampling unit U1 during testing, the voltage of tens of volts is sufficient to damage the voltage sampling unit U1. After setting the second DC blocking capacitor C2 and the third DC blocking capacitor C3, since the second DC blocking capacitor C2 and the third DC blocking capacitor C3 have the characteristics of blocking DC and passing AC, the DC voltage of tens of volts carried by the device under test DUT will not be applied to the voltage sampling unit U1.

[0044] Specifically, the input end of the voltage sampling unit U1 is a high-impedance input, so the capacity of the second blocking capacitor C2 and the third blocking capacitor C3 used is in the nanofarad level, that is, the stored energy is small, and instantaneous charging and discharging is not enough to damage the voltage sampling unit U1.

[0045] Based on the same technical concept, please refer to Figure 1 At least one embodiment further provides an LCR meter, which includes: an AC signal source OSC and a first DC blocking capacitor C1; the AC signal source OSC is electrically connected to the first DC blocking capacitor C1; when the first DC blocking capacitor C1 is electrically connected to the device under test DUT, the first DC blocking capacitor C1 isolates the DC voltage on the device under test DUT from being applied to the AC signal source OSC.

[0046] In at least one embodiment, a first DC blocking capacitor C1 is provided between the AC signal source OSC and the device under test DUT to prevent the AC signal source OSC from being directly electrically connected to the device under test DUT. This can prevent the AC signal source OSC from being damaged the moment the device under test DUT is connected to the LCR meter, effectively protecting the LCR meter and overcoming the problem of the LCR meter being damaged by voltage shocks.

[0047] Specifically, when the signal source loop is in a stable state, due to the presence of the first DC blocking capacitor C1, the DC voltage of the device under test DUT will not be applied to the AC signal source OSC, so the AC signal source OSC will not be damaged by the high voltage of the device under test DUT.

[0048] In at least one embodiment, see Figure 1 The LCR meter further includes: a current limiting circuit U3; the current limiting circuit U3 is electrically connected to the first DC blocking capacitor C1; the current limiting circuit U3 limits the current flowing through the first DC blocking capacitor C1.

[0049] Specifically, after the device under test DUT is connected, the current limiting circuit U3 and the first DC blocking capacitor C1 are located between the AC signal source OSC and the device under test DUT, thereby limiting the current flowing through the first DC blocking capacitor C1, thereby protecting the AC signal source OSC.

[0050] Specifically, when the DUT is connected to the LCR meter, the DUT charges the first DC-blocking capacitor C1. Because of the presence of current-limiting circuit U3 in the loop, charging of the first DC-blocking capacitor C1 begins at a limited maximum current and continues at a constant voltage until the voltage of the first DC-blocking capacitor C1 reaches that of the DUT. The presence of current-limiting circuit U3 in the excitation loop ensures that the AC signal source OSC will not be damaged by excessive current when the DUT is connected.

[0051] Specifically, the current limiting circuit U3 is composed of components such as resistors and depletion-type MOS transistors to achieve precise current control.

[0052] Based on the same technical concept, please refer to Figure 1 At least one embodiment further provides an LCR meter, comprising: a current sampling unit U2, a first fast recovery diode D1, and a second fast recovery diode D2; wherein the first fast recovery diode D1 and the second fast recovery diode D2 are connected in parallel with the current sampling unit U2, and the first fast recovery diode D1 and the second fast recovery diode D2 have opposite conduction directions; when a common end of the current sampling unit U2, the first fast recovery diode D1, and the second fast recovery diode D2 is electrically connected to a device under test (DUT), the first fast recovery diode D1 and the second fast recovery diode D2 clamp a voltage drop across the current sampling unit U2.

[0053] In at least one embodiment, by providing a first fast recovery diode D1 and a second fast recovery diode D2 between the current sampling unit U2 and the device under test DUT, it is possible to prevent the current sampling unit U2 from being damaged when the device under test DUT is connected to the LCR meter, effectively protect the LCR meter, and overcome the problem of the LCR meter being damaged due to voltage shock.

[0054] Specifically, the fast-responding first fast recovery diode D1 and the second fast recovery diode D2 ensure that the voltage drop on the current sampling unit U2 is 0.7V, and the current sampling unit U2 will not be damaged due to excessive DC voltage on the current sampling unit U2.

[0055] Based on the same technical concept, please refer to Figure 1 At least one embodiment further provides a method for measuring a live device under test, comprising: isolating a DC voltage on the device under test (DUT) through a first DC blocking capacitor (C1) and applying it to an AC signal source (OSC); limiting the current flowing through the first DC blocking capacitor (C1) through a current limiting circuit (U3); isolating a DC voltage on the device under test (DUT) through a second DC blocking capacitor (C2) and a third DC blocking capacitor (C3) and applying it to a voltage sampling unit (U1); and clamping a voltage drop on the current sampling unit (U2) through a first fast recovery diode (D1) and a second fast recovery diode (D2).

[0056] In at least one embodiment, by providing a first DC blocking capacitor C1 between the AC signal source OSC and the device under test DUT, providing a second DC blocking capacitor C2 and a third DC blocking capacitor C3 between the voltage sampling unit U1 and the device under test DUT, and providing a first fast recovery diode D1 and a second fast recovery diode D2 between the current sampling unit U2 and the device under test DUT, it is possible to prevent the AC signal source OSC, the voltage sampling unit U1, and the current sampling unit U2 from being damaged at the moment the device under test DUT is connected to the LCR meter, effectively protect the LCR meter, and overcome the problem of the LCR meter being damaged due to voltage shock.

[0057] Based on the same technical concept, please refer to Figure 1 At least one embodiment further provides a method for measuring a live device under test, comprising: isolating a DC voltage on the device under test DUT through a second DC blocking capacitor C2 and a third DC blocking capacitor C3 and applying the DC voltage to a voltage sampling unit U1.

[0058] Based on the same technical concept, please refer to Figure 1 At least one embodiment further provides a method for measuring a live device under test, comprising: isolating a DC voltage on the device under test DUT from being applied to an AC signal source OSC via a first DC blocking capacitor C1; and limiting a current flowing from the device under test DUT to the first DC blocking capacitor C1 via a current limiting circuit U3.

[0059] Based on the same technical concept, please refer to Figure 1 At least one embodiment further provides a method for measuring a live device under test, which includes: clamping a voltage drop on a current sampling unit U2 by using a first fast recovery diode D1 and a second fast recovery diode D2.

[0060] In summary, the present invention sets a first DC blocking capacitor between the AC signal source and the device under test, sets a second DC blocking capacitor and a third DC blocking capacitor between the voltage sampling unit and the device under test, and sets a first fast recovery diode and a second fast recovery diode between the current sampling unit and the device under test. This can prevent the charged device under test from damaging the AC signal source, the voltage sampling unit, and the current sampling unit when it is connected to the LCR meter, effectively protect the LCR meter, and overcome the problem of the LCR meter being damaged by voltage shock.

[0061] The disclosure and other solutions, examples, embodiments, modules, and functional operations described in this document can be implemented in digital electronic circuitry, or in computer software, firmware, or hardware, including the structures disclosed in this document and their structural equivalents, or any combination thereof. The disclosure and other embodiments can be implemented as one or more computer program products, i.e., one or more modules of computer program instructions encoded on a tangible, non-volatile computer-readable medium, for execution by a data processing apparatus or to control the operation of the data processing apparatus. The computer-readable medium can be a machine-readable storage device, a machine-readable storage substrate, a storage device, a composition of matter that effects a machine-readable propagated signal, or any combination thereof. The term "data processing unit" or "data processing apparatus" includes all devices, equipment, and machines for processing data, including, for example, a programmable processor, a computer, or a plurality of processors or computers. In addition to hardware, the apparatus may also include code that creates an execution environment for a computer program, such as code constituting processor firmware, a protocol stack, a database management system, an operating system, or any combination thereof. A propagated signal is an artificially generated signal, such as a machine-generated electrical, optical, or electromagnetic signal, that is generated to encode information for transmission to a suitable receiver device.

[0062] A computer program (also referred to as a program, software, software application, script, or code) may be written in any form of programming language (including compiled or interpreted languages) and may be deployed in any form, including as a standalone program or as a module, component, subroutine, or other unit suitable for use in a computing environment. A computer program does not necessarily correspond to a file in a file system. A program may be stored in a portion of a file that holds other programs or data (e.g., one or more scripts stored in a markup language document), in a single file dedicated to the program, or in multiple coordinated files (e.g., files storing one or more modules, subroutines, or portions of code). A computer program may be deployed for execution on one or more computers, located at one site or distributed across multiple sites and interconnected by a communications network.

[0063] The processes and logic flows described in this document can be performed by one or more programmable processors executing one or more computer programs to perform functions by operating on input data and generating output. The processes and logic flows can also be performed by, and apparatus can also be implemented as, special-purpose logic circuitry, e.g., an FPGA (field programmable gate array) or an ASIC (application-specific integrated circuit).

[0064] For example, processors suitable for executing computer programs include general-purpose and special-purpose microprocessors, as well as any one or more of any type of digital computer. Typically, a processor will receive instructions and data from read-only memory or random access memory, or both. The essential components of a computer are a processor that executes instructions and one or more memory devices that store instructions and data. Typically, a computer will also include one or more mass storage devices for storing data, such as magnetic, magneto-optical, or optical disks, or be operatively coupled to receive data from or transfer data to a mass storage device, or both. However, a computer need not have such devices. Computer-readable media suitable for storing computer program instructions and data include all forms of nonvolatile memory, media, and storage devices, including, for example, semiconductor memory devices, such as erasable programmable read-only memory (EPROM), electrically erasable programmable read-only memory (EEPROM), and flash memory devices; magnetic disks, such as internal hard disks or removable disks; magneto-optical disks; and compact disk read-only memory (CD ROM) and digital versatile disk read-only memory (DVD-ROM) disks. The processor and memory may be supplemented by, or incorporated into, special-purpose logic circuitry.

[0065] While this patent document contains many specifics, they should not be construed as limitations on the scope of any invention or the claims, but rather as descriptions of features for particular embodiments of particular inventions. Certain features described in this patent document in the context of separate embodiments can also be implemented in combination in a single embodiment. Conversely, various functions described in the context of a single embodiment can also be implemented separately in multiple embodiments, or in any suitable subcombination. Furthermore, while the features described above may be described as functioning in certain combinations, or even initially claimed to be so, in some cases one or more features in a claim combination may be removed from the combination, and a claim combination may be directed to a subcombination or variations of a subcombination.

[0066] Likewise, while operations may be depicted in a particular order in the accompanying drawings, this should not be understood as requiring that such operations be performed in the particular order shown or in sequential order, or that all illustrated operations be performed, in order to achieve desired results. Furthermore, the separation of various system components in the embodiments of this patent document should not be understood as requiring such separation in all embodiments.

[0067] Only a few implementations and examples are described, and other implementations, enhancements, and variations can be made based on what is described and illustrated in this patent document.

[0068] A first component is directly coupled to a second component when there are no intervening components other than a line, trace, or another medium between the first and second components. A first component is indirectly coupled to a second component when there are intervening components other than a line, trace, or another medium between the first and second components. The term "coupled" and its variations encompass both direct and indirect couplings. Unless otherwise specified, the use of the term "about" is intended to include a range of 10% above and below the value.

[0069] Although several embodiments are provided in this disclosure, it should be understood that the disclosed systems and methods may be embodied in many other specific forms without departing from the spirit or scope of the present disclosure. The present examples are to be considered illustrative rather than restrictive, and the present invention is not to be construed as being limited to the details given. For example, various elements or components may be combined or integrated into another system, or certain features may be omitted or not implemented.

[0070] In the several embodiments provided herein, it should be understood that the disclosed devices and methods may also be implemented in other ways. The device embodiments described above are merely illustrative. For example, the flowcharts and block diagrams in the accompanying drawings show the possible architectures, functions, and operations of the devices, methods, and computer program products according to multiple embodiments of the present invention. In this regard, each box in the flowchart or block diagram may represent a module, program segment, or part of a code, which contains one or more executable instructions for implementing the specified logical functions. It should also be noted that in some alternative implementations, the functions marked in the boxes may also occur in an order different from that marked in the accompanying drawings. For example, two consecutive boxes can actually be executed substantially in parallel, or they may sometimes be executed in the opposite order, depending on the functions involved. It should also be noted that each box in the block diagram and / or flowchart, as well as the combination of boxes in the block diagram and / or flowchart, may be implemented using a dedicated hardware-based system that performs the specified functions or actions, or may be implemented using a combination of dedicated hardware and computer instructions.

[0071] In addition, without departing from the scope of the present disclosure, the discrete or separate techniques, systems, subsystems, and methods described and illustrated in the various embodiments may be combined or integrated with other systems, modules, techniques, or methods. Other items shown or discussed as coupled may be directly connected, or may be indirectly coupled or communicated through some interface, device, or intermediate component in an electrical, mechanical, or other manner. Other examples of changes, substitutions, and modifications may be determined by those skilled in the art without departing from the spirit and scope disclosed herein.

Claims

1. An LCR meter, characterized in that: include: AC signal source (OSC), a first DC blocking capacitor (C1), a second DC blocking capacitor (C2), a third DC blocking capacitor (C3), a voltage sampling unit (U1), a current sampling unit (U2), a first fast recovery diode (D1) and a second fast recovery diode (D2); wherein The AC signal source (OSC), the first DC blocking capacitor (C1), the second DC blocking capacitor (C2), the voltage sampling unit (U1), the third DC blocking capacitor (C3), and the current sampling unit (U2) are electrically connected in sequence; The first fast recovery diode (D1), the second fast recovery diode (D2) and the current sampling unit (U2) are connected in parallel, and the conduction directions of the first fast recovery diode (D1) and the second fast recovery diode (D2) are opposite; When the device under test (DUT) is connected, the first DC blocking capacitor (C1) isolates the DC voltage on the device under test (DUT) from being applied to the AC signal source (OSC), and the second DC blocking capacitor (C2) and the third DC blocking capacitor (C3) isolate the DC voltage on the device under test (DUT) from being applied to the voltage sampling unit (U1); and The first fast recovery diode (D1) and the second fast recovery diode (D2) clamp the voltage drop on the current sampling unit (U2).

2. The LCR meter according to claim 1, wherein Also includes: Current limiting circuit (U3); The current limiting circuit (U3) is electrically connected to the first DC blocking capacitor (C1); The current limiting circuit (U3) limits the magnitude of the current flowing through the first DC blocking capacitor (C1).

3. An LCR meter, characterized in that: include: A second DC blocking capacitor (C2), a third DC blocking capacitor (C3) and a voltage sampling unit (U1); wherein The second DC blocking capacitor (C2), the voltage sampling unit (U1), and the third DC blocking capacitor (C3) are electrically connected in sequence; When a device under test (DUT) is connected between the second DC blocking capacitor (C2) and the third DC blocking capacitor (C3), the second DC blocking capacitor (C2) and the third DC blocking capacitor (C3) isolate the DC voltage on the device under test (DUT) from being applied to the voltage sampling unit (U1).

4. An LCR meter, characterized in that: include: AC signal source (OSC) and first DC blocking capacitor (C1); The AC signal source (OSC) is electrically connected to the first DC blocking capacitor (C1); When the first DC blocking capacitor (C1) is electrically connected to the device under test (DUT), the first DC blocking capacitor (C1) isolates the DC voltage on the device under test (DUT) from being applied to the AC signal source (OSC).

5. The LCR meter according to claim 4, wherein: Also includes: Current limiting circuit (U3); The current limiting circuit (U3) is electrically connected to the first DC blocking capacitor (C1); The current limiting circuit (U3) limits the magnitude of the current flowing through the first DC blocking capacitor (C1).

6. An LCR meter, characterized in that: include: A current sampling unit (U2), a first fast recovery diode (D1), and a second fast recovery diode (D2); in The first fast recovery diode (D1), the second fast recovery diode (D2) and the current sampling unit (U2) are connected in parallel, and the conduction directions of the first fast recovery diode (D1) and the second fast recovery diode (D2) are opposite; When the common end of the current sampling unit (U2), the first fast recovery diode (D1), and the second fast recovery diode (D2) is electrically connected to the device under test (DUT), the first fast recovery diode (D1) and the second fast recovery diode (D2) clamp the voltage drop on the current sampling unit (U2).

7. A method for measuring a live test piece, characterized in that: include: The DC voltage on the device under test (DUT) is isolated from the AC signal source (OSC) through the first DC blocking capacitor (C1); The current flowing through the first DC blocking capacitor (C1) is limited by a current limiting circuit (U3); The DC voltage on the device under test (DUT) is isolated by the second DC blocking capacitor (C2) and the third DC blocking capacitor (C3) and applied to the voltage sampling unit (U1); The voltage drop on the current sampling unit (U2) is clamped by a first fast recovery diode (D1) and a second fast recovery diode (D2).

8. A method for measuring a live test piece, characterized in that: include: The DC voltage on the device under test (DUT) is isolated by a second DC blocking capacitor (C2) and a third DC blocking capacitor (C3) and applied to a voltage sampling unit (U1).

9. A method for measuring a live test piece, characterized in that: include: The DC voltage on the device under test (DUT) is isolated from the AC signal source (OSC) through the first DC blocking capacitor (C1); The magnitude of the current flowing through the first DC blocking capacitor (C1) is limited by a current limiting circuit (U3).

10. A method for measuring a live test piece, characterized in that: include: The voltage drop on the current sampling unit (U2) is clamped by a first fast recovery diode (D1) and a second fast recovery diode (D2).

Images