Photonic crystal defect waveguide and phototransistor integrated chip

Abstract

The invention relates to the technical field of optics, and provides a photonic crystal defect waveguide and phototransistor integrated chip which comprises a photonic crystal defect waveguide module which comprises a pair of oppositely arranged photonic crystal arrays, a line defect waveguide channel is formed between the photonic crystal arrays, the photonic crystal arrays comprise nano air holes arranged periodically, and the nano air holes are communicated with the photonic crystal defect waveguide module. The width of the line defect waveguide channel is linearly and gradually changed along the light propagation direction, and the width of the input end is determined based on the period and diameter of the nano air hole; the photoelectric transistor module comprises a transistor strip-shaped part, the transistor strip-shaped part is provided with a side incidence window, the transverse width of the transistor strip-shaped part is the same as the width of the output end of the line defect waveguide channel, and the output end of the line defect waveguide channel is aligned with the center of the side incidence window. According to the scheme, high-efficiency and low-loss monolithic integrated coupling of the photonic crystal waveguide and the side incidence phototransistor is realized.

Description

Technical Field

[0001] The present invention relates to the field of optical technology, and in particular to a photonic crystal defect waveguide and phototransistor integrated chip. Background Art

[0002] In the field of optical communications and optical interconnects, photonic crystal waveguides (PhCWs), with their ability to precisely control small-scale light propagation through the photonic band gap effect (PBG), have become a key enabler for highly integrated photonic integrated circuits (PICs). However, the coupling efficiency between photonic crystal devices and optical devices has long been limited by the following factors: first, size and mode mismatch. The physical scale difference between traditional optical devices (such as micron-scale phototransistors) and photonic crystal waveguides results in a limited coupling area and incompatible mode field distributions, leading to significant signal attenuation. Second, there are barriers to integrating side-incident devices. While side-incident strip phototransistors can avoid electrode shading losses, their submicron-scale incidence windows require extremely high coupling precision. Positional or angular deviations can directly lead to a sharp drop in coupling efficiency.

[0003] To address the limited coupling efficiency between photonic crystal devices and optical devices, existing coupling solutions exist. Some use external components such as lens fibers, which can partially improve the alignment problem, but introduce additional reflection and scattering losses and system complexity, making it difficult to meet the monolithic integration requirements of PICs. Others use traditional waveguide-detector coupling structures, which lack size-adaptive design and cannot adapt to the micro-nanoscale matching requirements of photonic crystal defect waveguides and side-incident windows.

[0004] Therefore, how to achieve high-efficiency, low-loss coupling between photonic crystal waveguides and side-incident phototransistors while maintaining high integration has become a core technical challenge in the design of integrated chip structures. Summary of the Invention

[0005] In view of the problem in the prior art that it is difficult to achieve high-efficiency, low-loss coupling between a photonic crystal waveguide and a side-incident phototransistor while maintaining high integration, the present invention proposes a photonic crystal defect waveguide and phototransistor integrated chip.

[0006] Based on the above objectives, one aspect of an embodiment of the present invention provides a photonic crystal defect waveguide and phototransistor integrated chip, comprising: A photonic crystal defect waveguide module comprises a pair of opposing photonic crystal arrays forming a linear defect waveguide channel therebetween. The photonic crystal arrays comprise a periodically arranged group of nanometer air holes. The width of the linear defect waveguide channel varies linearly along the direction of light propagation, and the input end width is determined based on the period and diameter of the nanometer air holes. The phototransistor module includes a transistor strip portion, wherein the transistor strip portion is provided with a side incident window, the lateral width of the transistor strip portion is the same as the width of the output end of the linear defect waveguide channel, and the output end of the linear defect waveguide channel is centered with the side incident window.

[0007] In some embodiments, the input end width of the linear defect waveguide channel is a difference between an integer multiple of a period of the nano air hole group and a diameter of the nano air hole.

[0008] In some embodiments, the integer multiple includes 2, 3 or 4.

[0009] In some embodiments, the width of the linear defect waveguide channel increases linearly from the middle of the channel to the output end, forming a gradient defect region.

[0010] In some embodiments, the shape of the nano-air hole is cylindrical, and the depth of the nano-air hole is the same as the height of the strip-shaped portion of the transistor.

[0011] In some embodiments, the lattice structure of the photonic crystal array includes a square lattice or a triangular lattice.

[0012] In some embodiments, the linear defect waveguide channel is configured to transmit an optical signal with a wavelength of 850 nm to 940 nm.

[0013] In some embodiments, the photonic crystal defect waveguide module and the phototransistor module have the same material stacking structure.

[0014] In some embodiments, the transistor mesa portion is further included below the transistor strip portion, wherein the transistor mesa portion includes an SOI substrate, and the SOI substrate includes a Si substrate, a silicon dioxide BOX layer, and an N+ type Si layer from bottom to top.

[0015] In some embodiments, the transistor strip portion includes, from bottom to top, an N-type Si layer, a P-type SiGe layer, and an N-type poly-Si layer.

[0016] The present invention has at least the following beneficial effects: A photonic crystal defect waveguide and phototransistor integrated chip of the present application realizes the high-efficiency, low-loss monolithic integration of the photonic crystal waveguide and the side-incident phototransistor in a specific band, significantly improving the coupling efficiency and light absorption efficiency. Specifically, the photonic crystal defect waveguide forms a photonic bandgap through a photonic crystal array, constraining the target band optical signal to be efficiently transmitted in the defect channel. The linear gradient of the linear defect waveguide channel width and the coordinated design of parameters effectively adapt to the light mode and accurately guide the light signal to the target position. The output end width is the same as the width of the phototransistor incident window, eliminating the size mismatch. The center alignment of the two reduces the alignment accuracy requirements, ensures efficient coupling, and avoids a sudden drop in coupling efficiency. BRIEF DESCRIPTION OF THE DRAWINGS

[0017] In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the following briefly introduces the drawings required for use in the embodiments or the description of the prior art. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other embodiments can be obtained based on these drawings without paying any creative work.

[0018] Figure 1 Shown is a three-dimensional diagram of a photonic crystal defect waveguide and phototransistor integrated chip provided by one embodiment of the present invention; Figure 2 A top view of a photonic crystal defect waveguide and phototransistor integrated chip provided by another embodiment of the present invention; Figure 3 A side view of a photonic crystal defect waveguide and phototransistor integrated chip provided by another embodiment of the present invention; Figure 4 A side view of a phototransistor provided in accordance with another embodiment of the present invention; Figure 5 An energy band diagram of a photonic crystal array provided in another embodiment of the present invention; FIG6 (a) is a schematic diagram of electromagnetic field energy transmitted in a photonic crystal defect waveguide channel for incident light with a wavelength of 850 nm according to another embodiment of the present invention; FIG6( b ) is a schematic diagram of electromagnetic field energy transmitted in a photonic crystal defect waveguide channel when incident light with a wavelength of 940 nm is provided in another embodiment of the present invention.

[0019] Reference numerals: 1. SOI substrate; 2. First N-type Si layer; 3. First P-type SiGe layer; 4. First N-type polycrystalline Si layer; 5. Contact electrode; 6. Transistor mesa portion; 7. Transistor strip portion; 8. Photonic crystal array; 9. Input terminal; 10. Nano-air hole group; 11. Nano-air hole; 12. Output terminal; 13. Linear defect waveguide channel; 14. Incident window; 100. Photonic crystal defect waveguide and phototransistor integrated chip; 101. First Si substrate; 102. First silicon dioxide BOX layer; 103. First N+ type Si layer; 111. Photonic crystal defect waveguide module; 112. Phototransistor module; 601. Second Si substrate; 602. Second silicon dioxide BOX layer; 603. Second N+ type Si layer; 701. Second N-type Si layer; 702. Second P-type SiGe layer; 703. Second N-type polycrystalline Si layer. DETAILED DESCRIPTION

[0020] The following describes embodiments of the present invention. However, it is to be understood that the disclosed embodiments are merely examples and other embodiments can take various alternative forms.

[0021] Furthermore, it should be noted that the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but may also include elements not expressly listed or inherent to such processes, methods, articles, or apparatuses.

[0022] One or more embodiments of the present application will be described below with reference to the accompanying drawings.

[0023] Based on the above objectives, the present invention proposes an embodiment of a photonic crystal defect waveguide and phototransistor integrated chip.

[0024] like Figure 1-2 As shown, Figure 1 FIG. 1 is a perspective view of a photonic crystal defect waveguide and phototransistor integrated chip provided by an embodiment of the present invention. Figure 2A top view of a photonic crystal defect waveguide and phototransistor integrated chip 100 is shown. The chip comprises a photonic crystal defect waveguide module 111 and a phototransistor module 112. The photonic crystal defect waveguide module 111 includes a pair of opposing photonic crystal arrays 8, forming a linear defect waveguide channel 13 between the two opposing photonic crystal arrays 8. Each photonic crystal array 8 includes a periodically arranged nano-air hole group 10. The width D of the linear defect waveguide channel 13 varies linearly along the direction of light propagation. The width of the input end 9 of the linear defect waveguide channel 13 is determined based on the period P of the nano-air hole group 10 and the diameter d of the nano-air hole 11. The period P of the nano-air hole group 10 refers to the distance between the centers of adjacent nano-air holes 11. The phototransistor module 112 includes a transistor strip portion 7 located on the transistor mesa portion 6. The transistor strip portion 7 is provided with a side incident window 14. The lateral width w of the transistor strip portion 7 is the same as the width of the output end 12 of the linear defect waveguide channel 13. The output end 12 of the linear defect waveguide channel 13 is centrally aligned with the side incident window 14. The central alignment of the output end 12 of the linear defect waveguide channel 13 with the side incident window 14 of the transistor strip portion 7 ensures consistent optical path direction and reduces mode shift and scattering loss.

[0025] The above-mentioned photonic crystal defect waveguide and phototransistor integrated chip 100 realizes the high-efficiency, low-loss monolithic integration of photonic crystal waveguide and side-incident phototransistor in a specific band, significantly improving the coupling efficiency and light absorption efficiency. Specifically, the photonic crystal defect waveguide forms a photonic bandgap through the photonic crystal array 8, constraining the target band optical signal to be efficiently transmitted in the defect channel. The linear gradient of the width D of the linear defect waveguide channel 13 and the coordinated design of parameters effectively adapt to the light mode and accurately guide the light signal to the target position. The width of the output end 12 is the same as the width of the phototransistor incident window 14, eliminating the size mismatch. The center alignment of the two reduces the alignment accuracy requirements, ensures efficient coupling, and avoids a sudden drop in coupling efficiency.

[0026] According to some embodiments of the present invention, please refer to Figure 3 , Figure 3The figure shows a side view of a photonic crystal defect waveguide and phototransistor integrated chip. The photonic crystal defect waveguide module 111 and the phototransistor module 112 share the same material stack structure. For the photonic crystal defect waveguide and phototransistor integrated chip 100, the material stack structure utilizes an SOI substrate 1 and comprises, from bottom to top, a first Si substrate 101, a first silicon dioxide BOX layer 102, a first N+-type Si layer 103, a first N-type Si layer 2, a first P-type SiGe layer 3, and a first N-type polycrystalline Si layer 4. The material stack structure of the photonic crystal defect waveguide module 111 is as described above. This complete unification of the material stack structure further effectively avoids sudden changes in the interface refractive index and reduces scattering losses.

[0027] Optionally, the resistivity of the first N+ type Si layer 103 is 0.003Ω / cm.

[0028] Optionally, the first P-type SiGe layer 3 may be a P-type Si 0.84 Ge 0.16 .

[0029] According to some embodiments of the present invention, please refer to Figure 4 , Figure 4 The phototransistor is shown in a side view. The transistor mesa portion 6 of the phototransistor module 112 adopts an SOI substrate 1 , which includes a second Si substrate 601 , a second silicon dioxide BOX layer 602 and a second N+ type Si layer 603 from bottom to top.

[0030] Optionally, the resistivity of the second N+ type Si layer 603 is 0.003Ω / cm.

[0031] According to some embodiments of the present invention, please refer to Figure 4 The transistor strip portion 7 of the phototransistor module 112 includes, from bottom to top, a second N-type Si layer 701 , a second P-type SiGe layer 702 and a second N-type polycrystalline Si layer 703 , and a contact electrode 5 on the second N-type polycrystalline Si layer 703 .

[0032] Optionally, the second P-type SiGe layer 702 may be a P-type Si 0.84 Ge 0.16 .

[0033] According to several embodiments of the present invention, the width of the input end 9 of the linear defect waveguide channel 13 is determined based on the period P of the nano-air hole group 10 and the diameter d of the nano-air hole 11. Specifically, the width of the input end 9 is the difference between n times the period P of the nano-air hole group 10 and the diameter d of the nano-air hole 11. That is, the width of the input end 9 is nP-d, where n is a positive integer. According to several embodiments of the present invention, n can be 2, 3, or 4. Furthermore, the width D of the linear defect waveguide channel 13 linearly gradients along the direction of light propagation. Specifically, the width D of the linear defect waveguide channel 13 linearly increases from the middle of the channel to the output end 12, forming a gradient defect region. The width D of the linear defect waveguide channel 13 linearly gradients along the direction of light propagation to the same width w as the lateral width w of the transistor strip portion 7 of the silicon-based phototransistor. This gradient structure effectively suppresses mode mismatch and light scattering loss, thereby optimizing optical coupling efficiency.

[0034] In one embodiment, the period P of the nano-air hole group 10 is 400 nm, the diameter d of the nano-air hole 11 is 368 nm, and the width of the input end 9 of the linear defect waveguide channel 13 is the difference between twice the period P of the nano-air hole group 10 and the diameter d of the nano-air hole 11. Therefore, the width of the input end 9 of the linear defect waveguide channel 13 is 2P-d=2*400nm-368nm=432nm. In a specific implementation, only the nano-air holes 11 in the middle portion of the photonic crystal array 8 are removed to ensure that sufficient space is left in the middle portion of the photonic crystal array so that the nano-air holes 11 do not interfere with each other due to being too close together. The width of the input end 9 of the linear defect waveguide channel 13 is accurately calculated. Based on this, the width D of the linear defect waveguide channel 13 is linearly gradiented along the direction of light propagation until it is consistent with the lateral width w of the transistor strip portion 7 of the silicon-based phototransistor. This can ensure the precise spacing between the pair of photonic crystal arrays 8 and avoid the problem of near-field coupling interference between the arrays. At the same time, this gradient structure can effectively suppress mode mismatch and light scattering loss, thereby optimizing optical coupling efficiency.

[0035] In one specific implementation, the line defect waveguide channel 13 is configured to transmit optical signals with wavelengths of 850 nm to 940 nm. That is, the photonic bandgap formed by the photonic crystal array 8 accurately covers the incident light in the target wavelength band of 850-940 nm, blocking the propagation path of the target wavelength band light of 850-940 nm within the photonic crystal array 8 area, ensuring that the incident light is concentrated and transmitted in the line defect waveguide channel 13, and is transmitted to the silicon-based phototransistor module 112 through the side incident window 14, forming a single transmission mode in the photonic bandgap, ensuring that the target wavelength optical signal passes through the line defect waveguide channel 13 with high transmission efficiency, and effectively improving the coupling efficiency and light absorption capacity of the device.

[0036] According to several embodiments of the present invention, the transistor strip portion 7 of the phototransistor module 112 includes a side entrance window 14 sized to match the output end 12 of the linear defect waveguide channel 13, enabling efficient absorption of optical signals within the phototransistor and integrating electrical functions. The gradual transition of the linear defect waveguide channel 13, combined with the central alignment of the output end 12 and the side entrance window 14, ensures that optical signals of the target wavelength are precisely coupled from the photonic crystal defect waveguide to the entrance window 14 of the phototransistor, ensuring consistent optical transmission direction.

[0037] According to several embodiments of the present invention, the nano-air hole 11 is cylindrical in shape, and its depth is consistent with the height h of the transistor strip portion 7. The cylindrical hole wall forms a continuous lateral reflection surface, enhancing the vertical confinement of incident light of the target wavelength within the linear defect waveguide channel 13 and reducing photon leakage. Maintaining consistent height effectively reduces the optical field step at the interface between the linear defect waveguide and the phototransistor, avoiding scattering losses caused by height mismatch.

[0038] According to some embodiments of the present invention, the lattice structure of the photonic crystal array 8 includes a square lattice or a triangular lattice. The square lattice is conducive to the creation of defects, thereby effectively forming the linear defect waveguide channel 13, while the triangular lattice has a high structural symmetry, which helps to improve transmission efficiency.

[0039] As an optional embodiment, in order to further understand the band gap characteristics of the linear defect waveguide channel 13 between the photonic crystal arrays 8 of the present application, optionally, the BandSOLVE module of the RSoft software is used to perform photonic band simulation on the two-dimensional periodic photonic crystal array 8, as shown in FIG. Figure 5 The figure shows the energy band diagram of the photonic crystal array provided by another embodiment of the present invention. The lattice structure is set to a square lattice arrangement, the lattice constant a = 400nm, and the period P of the corresponding nano-air hole group 10 is 400nm. The simulated TE mode and TM mode band structures are unfolded along the symmetric path Γ-XM-Γ. The ordinate is the normalized frequency Frequency, which is represented by (ωa) / (2πc)=a / λ, where a is the lattice constant, a = 400nm, and λ is the target wavelength. When the target wavelength is 850nm, the normalized frequency is a / λ = 400 / 850≈0.47. When the target wavelength is 940nm, the normalized frequency is a / λ = 400 / 940≈0.42.

[0040] According to the relationship between the normalized frequency and the target wavelength, the normalized frequency range corresponding to the light in the 850nm to 940nm band is 0.42 to 0.47. Figure 5It can be seen that there is a TM photon band gap between the normalized frequencies of 0.42 and 0.47, indicating that light from 850 nm to 940 nm cannot be transmitted in the photonic crystal array 8 . Within this target wavelength range, the incident light is effectively confined in the linear defect waveguide channel 13 .

[0041] Furthermore, when the period P of the nano-air hole group 10 is 400 nm, the photonic crystal array 8 has the best effect of limiting the incident light.

[0042] Furthermore, when the diameter d of the nano-air hole 11 is 368 nm, the photonic crystal array 8 has the best effect of limiting the incident light.

[0043] As shown in Figure 6, Figure 6 shows the results obtained by simulation using RSoft software provided by the present invention, where different colors represent different electromagnetic field intensities. Specifically, Figure 6 (a) is a schematic diagram of the electromagnetic field energy transmitted by incident light with a wavelength of 850nm in a photonic crystal defect waveguide channel, and Figure 6 (b) is a schematic diagram of the electromagnetic field energy transmitted by incident light with a wavelength of 940nm in a photonic crystal defect waveguide channel. Comprehensive analysis of Figures 6 (a) and 6 (b) shows that Figure 6 (a) shows that at the target wavelength of 850nm, that is, the light wave incident on the photonic crystal defect waveguide is a light wave with a wavelength of 850nm, the electromagnetic field intensity is the highest in the defect region, indicating that the light wave with a wavelength of 850nm is effectively transmitted in the photonic crystal defect waveguide. As can be seen from Figure 6(b), at the target wavelength of 940nm, that is, the light wave injected into the photonic crystal defect waveguide is a light wave with a wavelength of 940nm, the light is confined within the photonic crystal defect waveguide channel, indicating that the light wave with a wavelength of 940nm is also effectively transmitted in the photonic crystal defect waveguide.

[0044] Furthermore, Lumerical FDTD Solutions software can optionally be used to perform optical simulations to verify the coupling performance of the silicon-based photonic crystal defect waveguide and phototransistor integrated chip 100 proposed in the present invention. Specifically, at the interface between the photonic crystal defect waveguide and the silicon-based phototransistor strip portion 7, the incident light power and the light power coupled into the side window of the transistor are monitored. In one specific embodiment, the calculated coupling efficiency is approximately 81%, which is significantly improved compared to an unoptimized conventional silicon waveguide and phototransistor integrated structure.

[0045] comprehensive Figure 56 and the above analysis process, it can be found that by rationally designing the channel width D of the photonic crystal defect waveguide, the period P of the nano-air hole group 10, and the diameter d of the nano-air hole 11, it is possible to prevent light with a wavelength range of 850-940nm from being transmitted in the photonic crystal array 8. By constructing a linear defect waveguide channel 13 between the two photonic crystal arrays 8, it is possible to achieve efficient transmission of optical signal lines in the wavelength range of 850-940nm in the defect waveguide channel. The optical signal transmitted through the linear defect waveguide channel 13 can be precisely coupled to the side incident window 14 of the silicon-based phototransistor, thereby significantly improving the optical coupling efficiency and light absorption efficiency between the devices. At the same time, the present invention achieves efficient optical signal coupling by optimizing the docking structure between the photonic crystal defect waveguide and the phototransistor, effectively improving the coupling efficiency between the photonic crystal waveguide and the silicon-based phototransistor, so as to achieve efficient integrated optical signal transmission.

[0046] The above-mentioned photonic crystal defect waveguide and phototransistor integrated chip 100 realizes the high-efficiency, low-loss monolithic integration of photonic crystal waveguide and side-incident phototransistor in a specific band, significantly improving the coupling efficiency and light absorption efficiency. Specifically, the photonic crystal defect waveguide forms a photonic bandgap through a photonic crystal array, constraining the target band optical signal to be efficiently transmitted in the defect channel. The linear gradient of the width D of the linear defect waveguide channel 13 and the coordinated design of parameters effectively adapt to the light mode and accurately guide the light signal to the target position. The width of the output end 12 is the same as the width of the phototransistor incident window 14, eliminating the size mismatch. The center alignment of the two reduces the alignment accuracy requirements, ensures efficient coupling, and avoids a sudden drop in coupling efficiency.

[0047] It will also be appreciated by those skilled in the art that the various exemplary logic blocks, modules, circuits and algorithmic steps described in conjunction with the disclosure herein can be implemented as electronic hardware, computer software or a combination of the two. In order to clearly illustrate this interchangeability of hardware and software, a general description has been given of the functions of various schematic components, blocks, modules, circuits and steps. Whether this function is implemented as software or hardware depends on specific applications and the design constraints imposed on the entire system. Those skilled in the art can implement the function in various ways for each specific application, but this implementation decision should not be interpreted as causing a departure from the disclosed scope of the embodiments of the present invention.

[0048] In one or more exemplary designs, the functionality may be implemented in hardware, software, firmware, or any combination thereof. If implemented in software, the functionality may be stored on or transmitted via a computer-readable medium as one or more instructions or code. Computer-readable media includes computer storage media and communication media, including any medium that facilitates the transfer of a computer program from one location to another. A storage medium may be any available medium that can be accessed by a general-purpose or special-purpose computer. By way of example, and not limitation, the computer-readable medium may include RAM, ROM, EEPROM, CD-ROM or other optical disk storage devices, magnetic disk storage devices or other magnetic storage devices, or any other medium that can be used to carry or store the desired program code in the form of instructions or data structures and that can be accessed by a general-purpose or special-purpose computer or processor. Furthermore, any connection may be appropriately referred to as a computer-readable medium. For example, if a coaxial cable, fiber optic cable, twisted pair cable, digital subscriber line (DSL), or wireless technologies such as infrared, radio, and microwaves are used to transmit software from a website, server, or other remote source, then the coaxial cable, fiber optic cable, twisted pair cable, DSL, or wireless technologies such as infrared, radio, and microwaves are included in the definition of medium. As used herein, disk and disc include compact disc (CD), laser disc, optical disc, digital versatile disc (DVD), floppy disk, and Blu-ray disc where disks usually reproduce data magnetically, while discs reproduce data optically with lasers. Combinations of the above should also be included within the scope of computer-readable media.

[0049] The above are exemplary embodiments disclosed in the present invention, but it should be noted that various changes and modifications may be made without departing from the scope of the embodiments disclosed in the claims. The functions, steps and / or actions of the method claims according to the disclosed embodiments described herein do not need to be performed in any particular order. In addition, although the elements disclosed in the embodiments of the present invention may be described or required in individual form, they may also be understood as multiple unless expressly limited to the singular.

[0050] It should be understood that, as used herein, the singular forms "a" and "an" are intended to include the plural forms as well, unless the context clearly supports an exception. It should also be understood that, as used herein, "and / or" is intended to include any and all possible combinations of one or more of the associated listed items.

[0051] The serial numbers of the embodiments disclosed in the above embodiments of the present invention are only for description and do not represent the advantages or disadvantages of the embodiments.

[0052] Those skilled in the art will understand that all or part of the steps to implement the above embodiments may be accomplished by hardware, or may be accomplished by a program instructing the relevant hardware, and the program may be stored in a computer-readable storage medium, and the above-mentioned storage medium may be a read-only memory, a disk, or an optical disk, etc.

[0053] Those skilled in the art should understand that the discussion of any of the above embodiments is merely illustrative and is not intended to limit the scope of the disclosure of the present invention (including the claims) to these examples. Within the spirit of the present invention, the technical features of the above embodiments or different embodiments may be combined, and many other variations exist in different aspects of the above embodiments, which are not provided in detail for the sake of clarity. Therefore, any omissions, modifications, equivalent substitutions, improvements, etc. made within the spirit and principles of the present invention should be included within the scope of protection of the present invention.

Claims

1. A photonic crystal defect waveguide and phototransistor integrated chip, characterized in that: include: A photonic crystal defect waveguide module comprises a pair of opposing photonic crystal arrays forming a linear defect waveguide channel therebetween. The photonic crystal arrays comprise a periodically arranged group of nanometer air holes. The width of the linear defect waveguide channel varies linearly along the direction of light propagation, and the input end width is determined based on the period and diameter of the nanometer air holes. The phototransistor module includes a transistor strip portion, wherein the transistor strip portion is provided with a side incident window, the lateral width of the transistor strip portion is the same as the width of the output end of the linear defect waveguide channel, and the output end of the linear defect waveguide channel is centered with the side incident window.

2. The photonic crystal defect waveguide and phototransistor integrated chip according to claim 1, characterized in that: The input end width of the linear defect waveguide channel is a difference between an integral multiple of the period of the nano air hole group and a diameter of the nano air hole.

3. The photonic crystal defect waveguide and phototransistor integrated chip according to claim 2, characterized in that: The integer multiples may be 2, 3 or 4.

4. The photonic crystal defect waveguide and phototransistor integrated chip according to claim 1, characterized in that: The width of the linear defect waveguide channel increases linearly from the middle of the channel to the output end, forming a gradual defect region.

5. The photonic crystal defect waveguide and phototransistor integrated chip according to claim 1, characterized in that: The shape of the nano air hole is cylindrical, and the depth of the nano air hole is the same as the height of the strip-shaped portion of the transistor.

6. The photonic crystal defect waveguide and phototransistor integrated chip according to claim 1, characterized in that: The lattice structure of the photonic crystal array includes a square lattice or a triangular lattice.

7. The photonic crystal defect waveguide and phototransistor integrated chip according to claim 1, characterized in that: The linear defect waveguide channel is configured to transmit an optical signal with a wavelength of 850 nm to 940 nm.

8. The photonic crystal defect waveguide and phototransistor integrated chip according to claim 1 is characterized in that: The photonic crystal defect waveguide module and the phototransistor module have the same material stacking structure.

9. The photonic crystal defect waveguide and phototransistor integrated chip according to claim 1, characterized in that: The device further comprises a transistor mesa portion located below the transistor strip portion, wherein the transistor mesa portion comprises an SOI substrate, and the SOI substrate comprises a Si substrate, a silicon dioxide BOX layer, and an N+ type Si layer from bottom to top.

10. The photonic crystal defect waveguide and phototransistor integrated chip according to claim 1, characterized in that: The transistor strip portion includes, from bottom to top, an N-type Si layer, a P-type SiGe layer, and an N-type polycrystalline Si layer.

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