High and low temperature irradiation test system of ferroelectric memory

Abstract

The invention relates to a high and low temperature irradiation test system for a ferroelectric memory. The system comprises a radiation source, a test mother board, a test daughter board, a high and low temperature test box, a system power supply and an upper computer, the test daughter board is used for fixing a to-be-tested memory and measuring temperature and radiation parameters of the to-be-tested memory in a test process; the test mother board is used for performing read-write operation on the to-be-tested memory according to an instruction of the upper computer, reading the temperature and radiation parameters measured by the test daughter board and transmitting the temperature and radiation parameters to the upper computer; the upper computer is used for setting a read-write mode of the to-be-tested memory, monitoring temperature, radiation parameters and electrical parameters of the to-be-tested memory in real time, comparing and analyzing the parameters with preset data, and recording failure information of the to-be-tested memory in a test process; the radiation source is used for simulating an irradiation environment in a space; the high and low temperature test box is used for simulating the temperature environment in space. According to the invention, the problem of how to simulate the device service behavior and failure mechanism research of the ferroelectric memory in the space environment under multi-physical field coupling on the ground is solved.

Description

Technical Field

[0001] The invention belongs to the technical field of memory testing and relates to a high and low temperature radiation testing system for a ferroelectric memory. Background Art

[0002] Ferroelectric memory has become a key component in the field of deep space exploration engineering due to the inherent properties of ferroelectric materials, which have the characteristics of resistance to strong electromagnetic interference, natural radiation resistance, and high and low temperature resistance.

[0003] The service environment parameters for ferroelectric memories used in spaceflight include radiation, temperature, and electric fields. Furthermore, radiation-heat, radiation-electricity, heat-electricity, and radiation-thermal-electricity must be considered. Research on radiation effects in ferroelectric memories in China started relatively late. Most previous studies focused on the radiation effects of ferroelectric materials and ferroelectric thin film capacitors, with little research on the service life of ferroelectric memories under the coupled effects of radiation, temperature, and electric fields. In space, radiation, temperature, and electric fields not only exist simultaneously but are also not independent of each other. Radiation damage to ferroelectric memories primarily manifests through the formation of defects such as dislocations and vacancies within the material, and through phase transitions and microstructural changes within the ferroelectric material. These changes can lead to changes in the ferroelectric material's phase composition, electrical properties, and stability. For example, after irradiation, ferroelectric materials may develop new defects such as oxygen vacancies and lattice disorder with a certain probability. These defects can further slow the polarization reversal rate, reduce the piezoelectric response, cause a change or drift in the dielectric constant, and potentially reduce device durability. The interface effects affecting ferroelectric memories manifest as a combined effect of coupled radiation, temperature, and electric fields. Lattice mismatch and dislocations induced by radiation can cause carrier drift in the memory, shifting the energy band and electric field distributions. Under the action of an external voltage, the generation and diffusion of oxygen vacancies in the ferroelectric layer affect the internal electric field. The accumulation of oxygen vacancies at the interface causes changes in the lattice constant, altering the thermal stress distribution of the device system. Thermal stress further exacerbates the generation and diffusion of oxygen vacancies, as well as radiation-induced charge tunneling and drift. Therefore, the effects of multiple service parameters, such as radiation, temperature, and electric field, on ferroelectric memories are mutually coupled and mutually reinforcing. Therefore, it is necessary to understand the nature of the coupled "irradiation," "electric field," and "temperature" multi-field behavior of ferroelectric memories in space. By using a high- and low-temperature radiation test system for ferroelectric memories, a ground-based evaluation platform for ferroelectric memories for aerospace applications can be established, simulating deep space environments. This will effectively support research on the service behavior and failure mechanisms of memory chips under multi-field coupling. Summary of the Invention

[0004] The technical problem solved by the present invention is: to overcome the shortcomings of the existing technology and propose a high and low temperature radiation test system for ferroelectric memory, which is used to realize the performance test of the multi-physical field coupling of ferroelectric memory such as radiation-electric field-temperature in space applications. It mainly solves the technical problem of how to simulate the device service behavior and failure mechanism of ferroelectric memory under multi-physical field coupling in space environment on the ground.

[0005] The solution to the technical problem of the present invention is: a high and low temperature radiation test system for ferroelectric memory, comprising a test motherboard, a test daughterboard, a radiation source, a high and low temperature test chamber, a system power supply and a host computer;

[0006] The test sub-board is used to fix the memory to be tested and measure the temperature parameters and radiation parameters of the memory to be tested during the test process;

[0007] The test motherboard is used to perform read and write operations on the memory to be tested according to the instructions of the host computer, read the temperature parameters and radiation parameters measured by the test daughter board and transmit them to the host computer;

[0008] The host computer is used to set the read and write mode of the memory to be tested, monitor the temperature parameters, radiation parameters and electrical parameters of the memory to be tested in real time during the test process, compare and analyze them with preset data, and record failure information of the memory to be tested during the test process;

[0009] The radiation source is 60 Co gamma-ray source, used to simulate the radiation environment in space;

[0010] The high and low temperature test chamber is used to simulate the temperature environment in space;

[0011] The system power supply is used to supply power to the test motherboard and the test daughterboard.

[0012] Furthermore, the test sub-board includes a base, a lead shield, a radiation sensor and a temperature sensor;

[0013] The lead shield is used to protect the circuit components in the test sub-board to avoid damage due to radiation; the radiation sensor is used to measure the radiation value of the memory to be tested during the test; and the temperature sensor is used to measure the temperature value of the memory to be tested during the test.

[0014] Furthermore, the test motherboard is composed of an FPGA minimum system, and the FPGA minimum system uses a Xilinx Artix-7 FPGA chip as a main control chip.

[0015] Furthermore, the high and low temperature test chamber generates a test temperature of -55°C to 125°C.

[0016] Furthermore, the host computer includes a test module and a data recording module;

[0017] A test module is used to instruct the minimum system on the test motherboard to write data and / or read data from the memory under test, and output different feedback signals according to the consistency of the read and written data;

[0018] The data recording module is used to receive the feedback signal and, upon receiving the feedback signal, read the radiation test parameters in the memory test environment to be tested detected by the radiation sensor on the test sub-board and the temperature test parameters in the memory test environment to be tested detected by the temperature sensor.

[0019] Furthermore, the host computer is developed using C# language, and the system environment is under Windows operating system and runs under .net framework.

[0020] Furthermore, the test daughter board and the radiation source are placed in a high and low temperature test chamber; the test mother board, the system power supply and the host computer are placed outside the high and low temperature test chamber; the test daughter board and the test mother board are connected via an FPC soft board.

[0021] A high and low temperature radiation testing method for a ferroelectric memory, characterized by comprising the following steps:

[0022] Connect the memory to be tested to the test daughter board;

[0023] Place the test daughter board and radiation source in a high and low temperature test chamber, and perform system configuration on the test daughter board and test mother board;

[0024] Connect the test motherboard and the test daughterboard, and connect the host computer and the test motherboard;

[0025] Turn on the high and low temperature test chamber and set it to the required test temperature. Initialize the test system after turning it on;

[0026] By presetting the read and write mode on the host computer, the order and content of the preset data written into the memory to be tested are determined;

[0027] The test motherboard sends the command data of the host computer to the test daughter board, and the test daughter board completes the execution of the command on the memory to be tested;

[0028] Turn on the radiation source and irradiate the memory to be tested at a specified distance, specified intensity and specified time;

[0029] The host computer monitors and records temperature parameters and radiation parameters in real time, reads the actual readout value of the memory under test in real time, compares and analyzes it with the preset data, and records the failure information of the memory under test during the test.

[0030] The beneficial effects of the present invention compared with the prior art are:

[0031] The high and low temperature irradiation test system used in the present invention can simulate the environmental conditions such as extreme temperatures and strong radiation faced by ferroelectric memory in space, and realize the performance test of multi-physical field coupling such as radiation-electric field-temperature, which strongly supports the in-depth study of the device service behavior and failure mechanism of ferroelectric memory under multi-physical field coupling in space environment. BRIEF DESCRIPTION OF THE DRAWINGS

[0032] Figure 1 This is a structural diagram of a high and low temperature radiation test system for a ferroelectric memory according to an embodiment of the present invention;

[0033] Figure 2 This is a schematic diagram of the structure of a test daughter board according to an embodiment of the present invention;

[0034] Figure numerals: 1 is the test motherboard, 2 is the test daughterboard, 3 is the radiation source, 4 is the high and low temperature test chamber, 5 is the system power supply, 6 is the host computer, 2-1 is the base, 2-2 is the lead shielding cover, 2-3 is the radiation sensor, and 2-4 is the temperature sensor. DETAILED DESCRIPTION

[0035] The present invention will be further described below with reference to the accompanying drawings and examples.

[0036] Example 1

[0037] As a preferred embodiment of the present application, Figure 1 As shown, the high and low temperature radiation test system includes a radiation source 3, a test motherboard 1, a test daughterboard 2, a high and low temperature test chamber 4, a system power supply 5 and a host computer 6. First, the memory to be tested is fixed on the base 2-1 of the test daughter board 2 and then placed together in a high and low temperature experimental box 4. The high and low temperature experimental box 4 is turned on and set to the temperature required for the test. Then, the test motherboard 1 is initialized, and preset data is written to the memory to be tested through the host computer 6. Next, the radiation source 3 is turned on to irradiate the memory device to be tested at a specified distance, specified intensity and specified time; during the test process, the radiation parameters and temperature parameters of the memory to be tested are monitored in real time by the radiation sensor 2-3 and the temperature sensor 2-4 of the test daughter board 1, and data is read out from the memory to be tested in real time according to a predetermined read and write mode; the host computer 6 compares the actual read data of the memory device to be tested with the preset data to determine whether it is correct. Once the read data is inconsistent with the preset data, the host computer 6 immediately records the failure information such as the total radiation dose of the memory to be tested, thereby realizing dynamic testing of the ferroelectric memory under the coupling of the radiation-electric field-temperature multi-physical field.

[0038] Figure 1This is a structural schematic diagram of the high and low temperature radiation test system of the ferroelectric memory of the present invention, which is used to realize the dynamic test of the ferroelectric memory under the coupling of radiation-electric field-temperature multi-physical fields, including a radiation source 3, a test motherboard 1, a test daughterboard 2, a high and low temperature test chamber 4, a system power supply 5 and a host computer 6.

[0039] Wherein, the radiation source 3 adopts 60 The Coγ-ray source mainly plays an irradiation role, and its purpose is to simulate the irradiation environment in space; the high and low temperature test chamber 4 is used to generate a test temperature of -55°C to 125°C to simulate the temperature environment in space; the system power supply 5 is used to supply power to the test motherboard 1 and the test daughter board 2; the test motherboard 1 is composed of an FPGA minimum system, and after being connected to the host computer 6, it can execute the corresponding test program, which is selected and preset by the tester before the test; the test daughter board 2 is used to fix the memory to be tested and monitor the temperature, radiation and other environmental parameters of the memory to be tested during the test process; the host computer 6, the test motherboard 1 and the test daughter board 2 are connected in sequence, and can monitor the temperature parameters, radiation parameters and electrical parameters of the memory to be tested in real time during the test process, perform read / write operations on the memory to be tested and perform failure judgment, and record the failure information of the memory to be tested in real time; the host computer 6 generally uses a computer to complete the design and development of the test program, read the failure information recorded during the test process, and perform statistics and analysis on the failure information of the memory to be tested.

[0040] The FPGA minimum system for testing the motherboard (1) of the present invention adopts a Xilinx Artix-7 FPGA chip as a main control chip.

[0041] Figure 2 This is a structural diagram of a test sub-board, which is provided with a base 2-1, a lead shielding cover 2-2, a radiation sensor 2-3 and a temperature sensor 2-4; the base 2-1 is used to fix the memory to be tested; the lead shielding cover 2-2 is used to protect the circuit components in the test sub-board to avoid damage due to radiation; the radiation sensor 2-3 is used to measure the radiation value of the memory to be tested during the test; the temperature sensor 2-4 is used to measure the temperature value of the memory to be tested during the test.

[0042] It should be emphasized that the memory to be tested needs to be exposed to a radiation source during the test process, and the vertical irradiation of the radiation source 3 is used to simulate the space irradiation environment, but at the same time, the stability of other electronic components of the test sub-board 1 except the base 2-1 and the radiation sensor 2-3 must be protected. Therefore, a dedicated lead shielding cover 2-2 is required to protect the test sub-board 2.

[0043] The host computer 6 of the present invention uses Visual studio 2022 development tools and C# language for development. The system environment is under the Windows operating system and runs under the .net framework.

[0044] The following describes the operation process of the high and low temperature radiation test system for ferroelectric memory of the present invention through actual operation process:

[0045] Step a: connecting the memory to be tested to the test daughter board;

[0046] Step b: placing the test daughter board and the radiation source in the high and low temperature test chamber, and performing system configuration on the test daughter board and the test mother board;

[0047] Step c: connecting the test motherboard to the test daughterboard, and connecting the host computer to the test motherboard;

[0048] Step d: Turn on the high and low temperature test box and set it to the temperature required for the test, and initialize the test system after turning it on;

[0049] Step e: The tester presets the read and write mode on the host computer and determines the order and content of writing the preset data to the memory to be tested;

[0050] Step f: The test motherboard sends the command data of the host computer to the test daughter board, and the test daughter board completes the execution of the command on the memory to be tested;

[0051] Step g: turning on the radiation source to irradiate the memory device to be tested at a specified distance, specified intensity, and specified time;

[0052] Step h: The host computer monitors and records the temperature parameters and radiation parameters in real time, reads the actual readout value of the memory to be tested in real time, and compares and analyzes it with the preset data;

[0053] Step i: The host computer records the failure information of the memory to be tested during the test process.

[0054] Through the above process steps, the present invention realizes the performance test of the multi-physical field coupling of ferroelectric memory in space applications, such as radiation-electric field-temperature, and solves the technical problem of studying the device service behavior and failure mechanism under the multi-physical field coupling of ferroelectric memory in space environment by simulating it on the ground.

[0055] Although the present invention has been disclosed above in terms of preferred embodiments, it is not intended to limit the present invention. Any person skilled in the art may make possible changes and modifications to the technical solutions of the present invention by using the methods and technical contents disclosed above without departing from the spirit and scope of the present invention. Therefore, any simple modifications, equivalent changes, and modifications made to the above embodiments based on the technical essence of the present invention without departing from the content of the technical solutions of the present invention shall fall within the scope of protection of the technical solutions of the present invention.

[0056] The contents not described in detail in the specification of the present invention belong to the common knowledge of those skilled in the art.

Claims

1. A high and low temperature radiation test system for ferroelectric memory, characterized in that: It includes a test motherboard (1), a test daughterboard (2), a radiation source (3), a high and low temperature test chamber (4), a system power supply (5) and a host computer (6); The test sub-board (2) is used to fix the memory to be tested and measure the temperature parameters and radiation parameters of the memory to be tested during the test process; The test motherboard (1) is used to perform read and write operations on the memory to be tested according to the instructions of the host computer (6), read the temperature parameters and radiation parameters measured by the test daughter board (2), and transmit them to the host computer (6); The host computer (6) is used to set the read and write mode of the memory to be tested, monitor the temperature parameters, radiation parameters and electrical parameters of the memory to be tested in real time during the test process, compare and analyze them with preset data, and record failure information of the memory to be tested during the test process; The radiation source (3) is 60 Co gamma-ray source, used to simulate the radiation environment in space; The high and low temperature test chamber (4) is used to simulate the temperature environment in space; The system power supply (5) is used to supply power to the test motherboard (1) and the test daughterboard (2).

2. The high and low temperature radiation test system for ferroelectric memory according to claim 1, characterized in that: The test sub-board (2) comprises a base (2-1), a lead shield (2-2), a radiation sensor (2-3) and a temperature sensor (2-4); The lead shield (2-2) is used to protect the circuit components in the test sub-board (2) to avoid damage due to radiation; the radiation sensor (2-3) is used to measure the radiation value of the memory to be tested during the test process; and the temperature sensor (2-4) is used to measure the temperature value of the memory to be tested during the test process.

3. The high and low temperature radiation test system for ferroelectric memory according to claim 2, characterized in that: The test motherboard (1) is composed of an FPGA minimum system, and the FPGA minimum system uses a Xilinx Artix-7 FPGA chip as a main control chip.

4. The high and low temperature radiation test system for ferroelectric memory according to claim 1, characterized in that: The high and low temperature test box (4) generates a test temperature of -55°C to 125°C.

5. The high and low temperature radiation test system for ferroelectric memory according to claim 3, characterized in that: The host computer (6) includes a test module and a data recording module; A test module is used to instruct the FPGA minimum system on the test motherboard (1) to write data and / or read data to the memory to be tested, and output different feedback signals according to the consistency of the read and written data; The data recording module is used to receive the feedback signal and, upon receiving the feedback signal, read the radiation test parameters in the memory test environment to be tested detected by the radiation sensor (2-3) on the test sub-board (2) and the temperature test parameters in the memory test environment to be tested detected by the temperature sensor (2-4).

6. The high and low temperature radiation testing system for ferroelectric memory according to claim 1, characterized in that: The host computer (6) is developed using C# language, and the system environment is under the Windows operating system and runs under the .net framework.

7. The high and low temperature radiation testing system for ferroelectric memory according to claim 1, characterized in that: The test sub-board (2) and the radiation source (3) are placed in a high and low temperature test box (4); the test motherboard (1), the system power supply (5) and the host computer (6) are placed outside the high and low temperature test box (4); the test sub-board (2) and the test motherboard (1) are connected via an FPC soft board.

8. A high and low temperature radiation testing method for a ferroelectric memory based on the system according to any one of claims 1 to 7, characterized in that: The following steps are involved: Connecting the memory to be tested to the test daughter board (2); Placing the test daughter board (2) and the radiation source (3) in a high and low temperature test box (4), and performing system configuration on the test daughter board (2) and the test mother board (1); Connecting the test motherboard (1) and the test daughterboard (2), and connecting the host computer (6) and the test motherboard (1); Turn on the high and low temperature test box (4) and set it to the temperature required for the test, and initialize the test system after turning it on; The order and content of the preset data written into the memory to be tested are determined by presetting the read and write mode of the host computer (6); The test motherboard (1) sends the instruction data of the host computer (6) to the test daughterboard (2), and the test daughterboard (2) completes the execution of the instruction on the memory to be tested; Turning on the radiation source (3) to irradiate the memory to be tested at a specified distance, specified intensity, and specified time; The host computer (6) monitors and records temperature parameters and radiation parameters in real time, reads the actual readout value of the memory to be tested in real time, compares and analyzes it with the preset data, and records the failure information of the memory to be tested during the test process.

Images