Drive circuit and electro-acoustic conversion system

Abstract

The invention provides a drive circuit and an electro-acoustic conversion system, capable of suppressing deterioration of a piezoelectric element. A drive circuit (10) is provided with: an amplifier (14) that amplifies an input signal and supplies the amplified signal as a drive signal to a piezoelectric element (21) of a MEMS speaker (20) driven by the piezoelectric element (21); and offset generation units (16a-16c) that generate an offset such that the minimum value of the absolute value of the voltage of the drive signal is equal to or greater than a positive predetermined voltage.

Description

Technical Field

[0001] The present disclosure relates to a driving circuit and an electroacoustic conversion system. Background Art

[0002] As an electroacoustic transducer, a speaker using a MEMS (Micro Electro Mechanical Systems) is known. It is known to use a piezoelectric element as a driving portion of a MEMS (for example, Patent Document 1).

[0003] By applying a DC voltage to the piezoelectric body of a piezoelectric element, the piezoelectric body is polarized. Even after the DC voltage is applied to the piezoelectric body, the piezoelectric body remains in a polarized state. Therefore, the piezoelectric properties of the piezoelectric body can be maintained at a high level. If a voltage in the opposite direction to the polarization is applied to the piezoelectric body, a so-called depolarization occurs, in which the polarization disappears. To suppress the depolarization of the piezoelectric body, a positive drive signal is supplied to the piezoelectric element. However, if noise or the like is applied to the drive signal, a negative voltage may be applied to the piezoelectric element, causing the piezoelectric element to deteriorate.

[0004] Patent Document 1: Japanese Patent No. 7157332 Summary of the Invention

[0005] The present disclosure provides a driving circuit and an electroacoustic conversion system capable of suppressing degradation of a piezoelectric element.

[0006] According to an embodiment of the present disclosure, a driving circuit includes: an amplifier that amplifies an input signal and supplies the amplified signal as a driving signal to the piezoelectric element of the MEMS speaker driven by the piezoelectric element; and an offset generating unit that generates an offset that causes the minimum absolute value of the voltage of the driving signal to be positive and greater than a predetermined voltage.

[0007] According to the present disclosure, it is possible to suppress degradation of the piezoelectric element. BRIEF DESCRIPTION OF THE DRAWINGS

[0008] Figure 1 It is a block diagram of the electroacoustic conversion system according to the first embodiment.

[0009] Figure 2 It is a plan view of the MEMS speaker in the first embodiment.

[0010] Figure 3 (a) and Figure 3 (b) is a graph showing the voltage of the drive signal with respect to time in the comparative structure. Figure 3 (c) is a graph showing the voltage of the drive signal with respect to time in the first embodiment.

[0011] Figure 4 (a) to Figure 4 (c) are circuit diagrams of circuit 30, circuit 31 and circuit 32 respectively.

[0012] Figure 5 (a) to Figure 5 (c) is a graph showing voltages with respect to time in the circuit 30 , the circuit 31 , and the circuit 32 .

[0013] Figure 6 It is a block diagram of the electroacoustic conversion system according to the second embodiment.

[0014] Figure 7 This is a block diagram of a driving circuit according to the second embodiment.

[0015] Figure 8 is a block diagram of a driving circuit of a first comparative example.

[0016] Figure 9 (a) and Figure 9 (b) is a graph showing voltage with respect to time, illustrating the operation of a class A or class B amplifier and a class H amplifier.

[0017] Figure 10 (a) and Figure 10 (b) is a graph showing voltage versus time in the first comparative example.

[0018] Figure 11 is a block diagram of a driving circuit according to a second comparative example.

[0019] Figure 12 (a) to Figure 12 (d) is a graph showing voltage versus time in the first comparative example.

[0020] Figure 13 (a) and Figure 13 (b) is a graph showing voltage versus time in the second embodiment.

[0021] Figure 14 This is a block diagram of a driving circuit according to a third embodiment.

[0022] Figure 15 It is a block diagram of an electroacoustic conversion system according to a third embodiment. DETAILED DESCRIPTION

[0023] The following describes in detail the methods for implementing the present disclosure with reference to the accompanying drawings. The following embodiments are intended to illustrate the technical concepts of the invention and do not limit the invention to the structures and numerical values ​​described. In addition, in the various drawings, the same components are labeled with the same reference numerals, and duplicate descriptions may be omitted as appropriate. The sizes and positional relationships of the components shown in the various drawings are sometimes exaggerated to facilitate understanding of the invention.

[0024] (First embodiment)

[0025] Figure 1 1 is a block diagram of the electroacoustic transducer system according to the first embodiment. The electroacoustic transducer system 100 according to the first embodiment includes a drive circuit 10 and a MEMS speaker 20. A digital audio signal S1 is input to the electroacoustic transducer system 100 from a digital audio signal generator 28.

[0026] The drive circuit 10 includes a digital-to-analog converter (DAC) 12, an amplifier 14, offset generators 16a to 16c, and adders 18a to 18c. The DAC 12 may be provided outside the drive circuit 10. The drive circuit 10 may include at least one of the following: a pair of the offset generator 16a and the adder 18a; a pair of the offset generator 16b and the adder 18b; and a pair of the offset generator 16c and the adder 18c.

[0027] The DAC 12 converts the digital signal S1 or S1a into an analog signal S2. The amplifier 14 amplifies the analog signal S2 or S2a and outputs the amplified signal as a signal S3. The amplifier 14 is, for example, an audio amplifier or a piezoelectric driver. The signal S3 or S3a is output to the MEMS speaker 20.

[0028] The offset generator 16a generates a digital offset value Vofa. The adder 18a adds the offset value Vofa to the digital signal S1 and outputs the signal S1, to which the offset value Vofa has been added, as a digital signal S1a to the DAC 12. If the offset generator 16a and the adder 18a are not provided, the signal S1 is input to the DAC 12.

[0029] The offset generator 16b generates an offset voltage Vofb. The adder 18b adds the offset voltage Vofb to the signal S2 and outputs the signal S2 added with the offset voltage Vofb as a signal S2a to the amplifier 14. If the set of the offset generator 16b and the adder 18b is not provided, the signal S2 is input to the amplifier 14.

[0030] The offset generator 16c generates an offset voltage Vofc. The adder 18c adds the offset voltage Vofc to the signal S3 and outputs the signal S3, to which the offset voltage Vofc has been added, as a drive signal S3a to the piezoelectric element 21 within the MEMS speaker 20. If the set of the offset generator 16c and the adder 18c is not provided, the signal S3 is supplied to the piezoelectric element 21 as a drive signal.

[0031] exist Figure 1In the figure, the offset generating units 16a to 16c and the adders 18a to 18c are shown separately for functional explanation. However, in an actual circuit, the offset generating units 16a to 16c and the corresponding adders 18a to 18c may be integrated to form the offset generating units 16a to 16c.

[0032] The MEMS speaker 20 is an electroacoustic transducer using MEMS and is a headphone or set-up speaker. The MEMS speaker 20 includes a piezoelectric element 21 that drives the MEMS speaker 20. The piezoelectric element 21 includes a piezoelectric body 22 and electrodes 23 (first electrode) and 24 (second electrode) that apply voltage to the piezoelectric body 22. The piezoelectric body 22 is spontaneously polarized (arrow 29) such that the direction of electrode 24 relative to electrode 23 is positive. A drive signal S3 or S3a is supplied to the piezoelectric element 21 to set the voltage of electrode 24 to a positive voltage relative to electrode 23.

[0033] (MEMS Speaker Description)

[0034] Figure 2 FIG is a plan view of the MEMS speaker of the first embodiment. Figure 2 As shown, the MEMS speaker includes a piezoelectric body 22, a movable portion 25, torsion bars 26, a fixed frame 27, and electrodes 23a and 24a. The fixed frame 27 is a rigid body. The planar shape of the fixed frame 27 can be set to a rectangular, polygonal, circular, or elliptical shape, as appropriate. The movable portion 25 is disposed within the fixed frame 27. The planar shape of the movable portion 25 can be set to a rectangular, polygonal, circular, or elliptical shape, as appropriate. A plurality of torsion bars 26 are disposed in the movable portion 25. The torsion bars 26 and the fixed frame 27 are connected via the piezoelectric body 22.

[0035] Electrodes 23a and 24a are provided on the fixing frame 27. The electrodes 23a and 24a are connected to the electrodes 23 and 24 (see FIG. 2 ) of the piezoelectric body 22 via wiring provided on the fixing frame 27. Figure 1 ) are electrically connected. When a voltage is applied between electrodes 23a and 24a, a voltage is applied between electrodes 23 and 24. As a result, the piezoelectric body 22 deforms due to the inverse piezoelectric effect, driving the movable portion 25. The amount of drive of the movable portion 25 varies depending on the voltage value between electrodes 23 and 24. By applying a signal S3 or S3a between electrodes 23 and 24, the movable portion 25 is driven, and sound is output from the MEMS speaker 20. The movable portion 25, torsion bar 26, and fixed frame 27 are formed, for example, from a silicon substrate.

[0036] The MEMS speaker 20 is manufactured using a semiconductor process, resulting in minimal performance variation. It is compact, thin, lightweight, and consumes low power. Furthermore, its frequency characteristics are flat up to mid- and high-frequency frequencies. In the MEMS speaker 20, after being manufactured using a semiconductor process, a DC voltage is applied to the piezoelectric element 21, causing the piezoelectric element 22 to spontaneously polarize. Even after the DC voltage is applied to the piezoelectric element 22, the piezoelectric element 22 maintains its polarized state. Therefore, the piezoelectric properties of the piezoelectric element 22 are highly maintained. However, applying a voltage in the opposite direction to the spontaneous polarization to the piezoelectric element 22 causes the spontaneous polarization to disappear. This is called depolarization.

[0037] Such characteristics are particularly significant when a piezoelectric material having a perovskite crystal structure is used as the piezoelectric material 22. Examples of the piezoelectric material having a perovskite crystal structure include PZT (lead zirconate titanate), PNZT (lead zirconate titanate niobate), PLZT (lead lanthanum zirconate titanate), PLT (lead lanthanum titanate), PMN (lead magnesium niobate), PMNN (lead manganese niobate), and BaTiO3 (barium titanate).

[0038] Figure 2 The structure of the MEMS speaker 20 is just an example. The MEMS speaker 20 includes the piezoelectric element 21 , and any structure may be used as long as the piezoelectric element 21 drives the movable part 25 .

[0039] (Comparative structure)

[0040] A comparative configuration in which the offset generating units 16 a to 16 c and the adders 18 a to 18 c are not provided will be described. Figure 3 (a) and Figure 3 (b) is a graph showing the voltage of the drive signal with respect to time in the comparative structure, Figure 3 (c) is a graph showing the voltage of the drive signal with respect to time in the first embodiment. The waveform of the target drive signal S3 is shown by a thin solid line, and the actual waveform is shown by a thick solid line.

[0041] like Figure 3 As shown in (a), the target waveform has a minimum value of 0V. This suppresses depolarization of the piezoelectric element 22 of the piezoelectric element 21. However, due to the influence of noise, negative noise 50 may enter the signal in the actual waveform. Even if a negative voltage is applied to the piezoelectric element 21 for a short time, it is unlikely that the piezoelectric element 22 will immediately depolarize. However, if the noise 50 accumulates, it may adversely affect the polarization state of the piezoelectric element 22.

[0042] like Figure 3As shown in (b), depending on the type of amplifier 14, linearity around 0V may deteriorate. This can cause distortion in the actual waveform, as shown by dashed circle 52. In this case, unwanted total harmonic distortion, such as second-order and third-order distortion, occurs in signal S3. Furthermore, intermodulation distortion may also occur. Consequently, the sound quality of MEMS speaker 20 deteriorates.

[0043] (First embodiment)

[0044] like Figure 3 As shown in (c) of FIG. 1 , in the first embodiment, the offset generators 16a to 16c generate an offset voltage Vof such that the minimum absolute value of the voltage of the drive signal S3 or S3a is a positive predetermined voltage or greater. Consequently, the minimum value of the target waveform becomes the offset voltage Vof. This prevents the voltage from becoming negative even if noise 51 enters the signal. Consequently, it is possible to suppress the adverse effects of noise 51 on the polarization state of the piezoelectric body 22.

[0045] Furthermore, the voltage range in which the amplifier 14 has good linearity can be used. Therefore, waveform distortion can be suppressed even near the minimum voltage value. This reduces total harmonic distortion and improves the sound quality of the MEMS speaker 20.

[0046] The offset generating unit 16c may apply an offset to the drive signal S3 after amplification by the amplifier 14. The offset generating unit 16b may apply an offset to the input signal S2 before amplification by the amplifier 14. The offset generating unit 16a may apply an offset to the digital signal S1.

[0047] When noise is generated in the amplifier 14, using the offset generator 16c is effective. From the perspective of distortion of the amplifier 14, using at least one of the offset generators 16a and 16b is effective.

[0048] exist Figure 3 In (c), the offset voltage Vof is set to a level that prevents the noise 51 from becoming negative, and preferably within a range that does not significantly affect the distortion of the amplifier 14. From this perspective, the offset voltage Vof is preferably 0.1% or greater, and more preferably 1% or greater, relative to the maximum value of the target waveform. Excessively large offset voltage Vof reduces the dynamic range. From this perspective, the offset voltage Vof is preferably 10% or less relative to the maximum value of the target waveform. As an example, when the maximum value of the target waveform is 30V, the offset voltage Vof is 2V.

[0049] (Circuit Example of Offset Generators 16b and 16c)

[0050] First, a comparison circuit 30 that does not include the offset generation units 16 b and 16 c will be described. Figure 4(a) is a circuit diagram of the circuit 30 . Figure 5 (a) is a graph showing voltage in the circuit 30 with respect to time.

[0051] like Figure 4 As shown in (a), circuit 30 includes amplifier 15, capacitors C2 to C4, and resistors R3 and R4. Amplifier 15 is a differential input, differential output amplifier. A power supply voltage Vdd relative to ground is supplied to amplifier 15. Signal S2 is input to the positive input terminal of amplifier 15. The negative input terminal of amplifier 15 is grounded via capacitor C2. The positive output terminal of amplifier 15 is electrically connected to electrode 24 of piezoelectric element 21 via capacitor C3. The negative output terminal of amplifier 15 is electrically connected to electrode 23 via capacitor C4.

[0052] Node N1 between capacitor C3 and electrode 24 is electrically connected to power supply voltage Vdd via resistor R3. Node N2 between capacitor C4 and electrode 23 is grounded via resistor R4. Capacitors C2 and C4 serve as coupling capacitors for AC signals. The resistance values ​​of resistors R3 and R4 are sufficiently lower than the impedance of piezoelectric element 21 and are such that signals S3a+ and S3a- do not leak to the power supply or ground.

[0053] like Figure 5 As shown in (a), signal S2 is centered at 0V. Amplifier 15 amplifies the voltage of signal S2 input to the positive input terminal relative to the 0V at the negative input terminal, outputting signal S3+ to the positive output terminal and signal S3- to the negative output terminal. Signals S3+ and S3- are centered at 0V, with a maximum amplitude of Vdd. Signal S3- is the inverted version of signal S3+.

[0054] The voltage of the node N1 is pulled up to Vdd, and the voltage of the node N2 is pulled down to 0 V. As a result, the signal S3 a+ becomes a signal centered at Vdd, and the signal S3 a- becomes a signal centered at 0 V.

[0055] The voltage (S3a+)-(S3a-) of the driving signal S3a applied to the electrode 24 relative to the electrode 23 of the piezoelectric element 21 becomes a signal centered on Vdd, and its minimum value is 0 V. Thus, the minimum value of the driving signal S3a becomes 0V.

[0056] Next, the circuit 31 provided with the offset generating unit 16 b will be described. Figure 4 (b) is a circuit diagram of circuit 31. Figure 5 (b) is a graph showing the voltage in the circuit 31 with respect to time.

[0057] like Figure 4As shown in (b), in the circuit 31, the input signal S2 is input to the positive input terminal of the amplifier 15 via the offset generating unit 16b. The offset generating unit 16b includes a capacitor C1, resistors R1 and R2. The node N3 between the capacitor C1 and the positive input terminal of the amplifier 15 is electrically connected to the power supply voltage Vdd via the resistor R1, and is grounded via the resistor R2. The capacitor C1 is a coupling capacitor for the AC signal. The resistance values ​​of the resistors R1 and R2 are sufficiently lower than the input impedance of the positive input terminal of the amplifier 15, and are such that the signal S2 does not leak to the power supply and the ground. The positive output terminal of the amplifier 15 is electrically connected to the electrode 24 of the piezoelectric element 21. The negative output terminal of the amplifier 15 is electrically connected to the electrode 23. The other structures are the same as those of the circuit 30 and the description thereof is omitted.

[0058] The bias voltage of the node N3 is obtained by dividing the power supply voltage Vdd by resistors R1 and R2. The resistance values ​​of the resistors R1 and R2 are set so that the bias voltage of the node N3 becomes the offset voltage Vof1. Figure 5 As shown in (b), the signal S2a is a signal centered around the offset voltage Vof1. The minimum voltage of the signal S2a is positive.

[0059] The signal S3+ is centered around the offset voltage Vof2, and the signal S3- is centered around the offset voltage -Vof2. The minimum voltage of the signal S3+ is positive, and the maximum voltage of the signal S3- is negative.

[0060] The minimum value of the voltage (S3+)-(S3-) of the drive signal S3 applied to the electrode 24 relative to the electrode 23 of the piezoelectric element 21 is approximately Vof, which is 2×Vof2. In this way, the minimum value of the drive signal S3 can be set to positive Vof.

[0061] Next, the circuit 32 including the offset generating unit 16 c will be described. Figure 4 (c) is a circuit diagram of circuit 31. Figure 5 (c) is a graph showing the voltage in the circuit 32 with respect to time.

[0062] like Figure 4 As shown in (c), in the circuit 32, the node N2 is connected to the offset voltage -Vof via the resistor R4. The other structures are the same as those of the circuit 30, and the description thereof is omitted.

[0063] like Figure 5 As shown in (c), signal S3a- becomes a signal centered around offset voltage -Vof. The minimum value of the voltage (S3a+) - (S3a-) of drive signal S3a applied to electrode 24 relative to electrode 23 of piezoelectric element 21 is offset voltage Vof. This allows the minimum value of drive signal S3a to be set to positive Vof.

[0064] Circuits 31 and 32 are examples, and other circuit configurations are possible as long as the minimum value of drive signal S3a can be set to a positive offset voltage Vof. For example, offset generator 16b does not need to use resistors R1 and R2 as long as the bias voltage at node N3 can be set to Vof1.

[0065] In offset generator 16c, resistor R3 is not required to pull up the voltage of node N1, and resistor R4 is not required to pull down the voltage of node N2. Node N1 can be pulled up to Vdd+vof, and node N2 can be pulled down to 0V. Amplifier 15 can output signal S3 to ground rather than differential output, with electrode 23 grounded.

[0066] (Second embodiment)

[0067] Figure 6 This is a block diagram of an electroacoustic conversion system according to a second embodiment. The electroacoustic conversion system 100 according to the second embodiment includes a digital-to-analog converter (DAC) 30 , a drive circuit 10 , and a MEMS speaker 20 . A digital audio signal is input to the electroacoustic conversion system 100 from a digital audio signal generator 28 .

[0068] The DAC 30 converts the input digital signal into an analog signal. The driving circuit 10 amplifies the analog signal and outputs the amplified driving signal to the MEMS speaker 20. The driving circuit 10 is, for example, an audio amplifier or a piezoelectric driver.

[0069] (Drive Circuit)

[0070] Figure 7 FIG. 1 is a block diagram of a driving circuit according to a second embodiment. Figure 7 As shown, driver circuit 10 includes amplifier 12 and pull-up circuit 13. Amplifier 12 is a class H amplifier. Amplifier 12 includes preamplifier 14, class H stage 16, and booster 18. Preamplifier 14 and class H stage 16 are differential input and differential output amplifiers. Booster 18 supplies voltage VBST as a power supply voltage to class H stage 16.

[0071] Preamplifier 14 differentially amplifies differential signals S1+ and S1- as input signals, and outputs the amplified signals as differential signals S2+ and S2-. Class H stage 16 uses voltage VBST as a power supply voltage, differentially amplifies differential signals S2+ and S2-, and outputs the amplified signals as differential signals S3+ and S3-.

[0072] Pull-up circuit 13 includes capacitors C1 and C2, and resistors R1 and R2. The positive output terminal of amplifier 12 is electrically connected to electrode 24 of piezoelectric element 21 via capacitor C1. The negative output terminal of amplifier 12 is electrically connected to electrode 23 via capacitor C2. Node N1 between capacitor C1 and electrode 24 is electrically connected to voltage VBST via resistor R1. Node N2 between capacitor C2 and electrode 23 is grounded via resistor R2. Capacitors C1 and C2 serve as coupling capacitors for AC signals. The resistance values ​​of resistors R1 and R2 are sufficiently low compared to the impedance of piezoelectric element 21 and are large enough to prevent signals S3+ and S3- from leaking to the power supply or ground. Node N1 is pulled up to voltage VBST, and node N2 is pulled down to ground potential. Signals S4+ and S4- at nodes N1 and N2 are supplied to electrodes 24 and 23, respectively. Thus, the pull-up circuit 13 pulls up the output signal ( S3+)-( S3 −) outputted from the amplifier 12 to the voltage VBST, and supplies the pulled-up signal ( S4+)-( S4 −) to the piezoelectric element 21 as a driving signal.

[0073] (First Comparative Example)

[0074] Figure 8 This is a block diagram of a driving circuit according to a first comparative example. In the first comparative example, the pull-up resistor R1 and the pull-down resistor R2 are not provided. The rest of the structure is the same as that of the first embodiment.

[0075] Figure 9 (a) and Figure 9 (b) is a graph showing voltage with respect to time, illustrating the operation of a class A or class B amplifier and a class H amplifier. Figure 9 (a) shows the waveform of the output signal V3 of the final stage, which is a class A or class B amplifier, and the power supply voltage of the final stage. Figure 9 As shown in (a), in a class A or class B amplifier, the final stage uses VDD as the power supply voltage for amplification. The waveform of signal S3 is between 0V and VDD.

[0076] Figure 9 (b) shows the waveform of the output signal V3 and the power supply voltage in the class H stage 16 of the class H amplifier. Figure 8 and Figure 9 As shown in (b) of FIG5 , in a class H amplifier, class H stage 16 uses voltage VBST output by booster 18 as its power supply voltage for amplification. Booster 18 generates voltage VBST based on the waveform of signal S1, S2, or S3. For example, booster 18 generates voltage VBST by predicting the waveform of signal S3 based on past waveforms. As a result, voltage VBST increases when the voltage of signal S3 is high, and decreases when the voltage of signal S3 is low.

[0077] For example, assume that voltage V1 (first voltage) and voltage V2 (second voltage) higher than voltage V1 are used as the voltage of signal S3. In this case, the pull-up voltage VBST1 at voltage V1 is lower than the pull-up voltage VBST2 at voltage V2. In this way, the pull-up voltage VBST can be changed based on the voltage of signal S3. In the above, voltages V1 and V2 are assumed, but the voltage of signal S3 and the pull-up voltage VBST at any two different times can be in the above relationship. In addition, Figure 9 In (b), three levels of voltage are set as the pull-up voltage VBST. However, the pull-up voltage VBST may be set to four or more levels of voltage.

[0078] Furthermore, pull-up voltage VBST1 at voltage V1 is lower than the maximum voltage VM in the voltage waveform of signal S3 and is equal to or greater than voltage V1. Pull-up voltage VBST2 at voltage V2 is lower than the maximum voltage VM in the voltage waveform of signal S3 and is equal to or greater than voltage V2. This reduces power consumption.

[0079] Figure 10 (a) and Figure 10 (b) is a graph showing the voltage with respect to time in the first comparative example. The output signals S3+ and S3- of the H-class stage 16 are signals centered at 0V. Therefore, Figure 10 As shown in (a), the signals S4+ and S4- are centered at 0V. Figure 10 As shown in (b), the voltage (S4+)-(S4-) applied to the electrode 24 becomes a signal centered at 0 V relative to the electrode 23 of the piezoelectric element 21. Therefore, the piezoelectric body 22 of the piezoelectric element 21 may be depolarized. Even if depolarization is not achieved, the polarization state of the piezoelectric body 22 may be adversely affected.

[0080] (Second Comparative Example)

[0081] Figure 11 This is a block diagram of a driving circuit according to a second comparative example. In the second comparative example, a voltage VMAX is prepared, which is the maximum value of the output signals S3+ and S3- of the H-class stage 16. Node N1 is pulled up to voltage VMAX via resistor R1, and node N2 is pulled down to 0V via resistor R2.

[0082] Figure 12 (a) to Figure 12 (d) is a graph showing voltage versus time in Comparative Example 2. Table 1 shows signals S4+, S4-, and (S4+)-(S4-) when signal S2+ is at its minimum, midpoint, and maximum.

[0083] [Table 1]

[0084] S2+minimum S2+midpoint S2+Max S4+ VMAX-VMAX / 2 VMAX VMAX+VMAX / 2 S4- VMAX / 2 0 -VMAX / 2 (S4+)-(S4-) 0 VMAX 2VMAX

[0085] like Figure 12 As shown in (a), signal S4+ is pulled up by voltage VMAX, becoming a signal centered around voltage VMAX. Signal S4- is pulled down by 0V, becoming a signal centered around 0V. As shown in Table 1, signal S4+ is VMAX-VMAX / 2, VMAX, and VMAX+VMAX / 2 when signal S2+ is at its minimum, midpoint, and maximum, respectively. Signal S4- is -VMAX / 2, 0V, and VMAX / 2 when signal S2+ is at its minimum, midpoint, and maximum, respectively.

[0086] like Figure 12 As shown in (b), the signals (S4+)-(S4-) supplied to the piezoelectric element 21 are centered around voltage VMAX. As shown in Table 1, the signals (S4+)-(S4-) are 0V, VMAX, and 2VMAX when the signal S2+ is at its minimum, midpoint, and maximum, respectively. This prevents the voltage at electrode 24 from being negative relative to electrode 23 of the piezoelectric element 21. This prevents depolarization of the piezoelectric element 22 and any adverse effects.

[0087] like Figure 12 As shown in (c), when the amplitudes of signals S4+ and S4- are small, signal S4+ is also a signal centered around voltage VMAX, and signal S4- is a signal centered around 0V.

[0088] like Figure 12 As shown in (d), the signal (S4+)-(S4-) supplied to the piezoelectric element 21 becomes a signal centered around voltage VMAX. Consequently, a voltage around voltage VMAX is stably applied to the piezoelectric element 21, causing current to flow. This increases power consumption. Furthermore, the provision of a voltage generating circuit that supplies voltage VMAX increases the size of the drive circuit 10.

[0089] (Second embodiment)

[0090] Figure 13 (a) and Figure 13 (b) is a graph showing voltage versus time in the second embodiment. Table 2 shows signals S4+, S4-, and (S4+)-(S4-) when signal S2+ is at minimum, midpoint, and maximum.

[0091] [Table 2]

[0092] S2+minimum S2+midpoint S2+Max S4+ VB ST--VB ST / 2 VBST VBST+VBST / 2 S4- VBST / 2 0 -VBST / 2 (S4+)-(S4-) 0 VBST 2VBST

[0093] When the amplitudes of the signals S4+ and S4- are at their maximum, the voltage VBST is VMAX, which is the same as that of the first comparative example. Figure 12 Same as (a).

[0094] like Figure 13 As shown in (a), voltage VBST varies depending on the waveforms of signals S4+ and S4-. Therefore, when the amplitudes of signals S2+ and S2- are small, signal S4+ becomes lower than voltage VMAX. Voltage VBST is always greater than the voltage of signal S4+. Therefore, as shown in Table 2, signal S4+ is VBST-VBST / 2, VBST, and VBST+VBST / 2 when signal S2+ is at its minimum, midpoint, and maximum, respectively. Signal S4- is -VBST / 2, 0V, and VBST / 2 when signal S2+ is at its minimum, midpoint, and maximum, respectively.

[0095] like Figure 13 As shown in (b), the signal (S4+)-(S4-) is a positive voltage, and the voltage of the signal (S4+)-(S4-) is lower than the voltage VMAX. Therefore, a voltage lower than the voltage VMAX is applied to the piezoelectric element 21. This reduces power consumption compared to the second comparative example. In addition, since the voltage VBST used by the H-class stage 16 is used, a voltage generation circuit for supplying the voltage VBST is not required. As a result, the drive circuit 10 can be miniaturized.

[0096] According to the second embodiment, the pull-up circuit 13 pulls up the signal S3+ to the pull-up voltage VBST whose voltage value is changed based on the voltage of the input signal S2+, and supplies the pulled-up drive signal S4+ to the piezoelectric element 21. Thus, the voltage VBST can be made lower than the voltage VMAX of the second comparative example, thereby suppressing the current flowing through the piezoelectric element 21 and reducing power consumption.

[0097] The voltage booster 18 may generate the voltage VBST based on the current voltage of the signal S2+ or based on the past voltage of the signal S2+. The voltage booster 18 may also generate the voltage VBST based on the envelope of the signal S2+.

[0098] The pull-up voltage VBST is the power supply voltage of the class H stage 16. This eliminates the need for a circuit for generating the pull-up voltage VBST, thereby miniaturizing the drive circuit 10. As such amplifiers, class G or class H amplifiers are known.

[0099] In pull-up circuit 13, the voltage at node N1 can be pulled up without resistor R1, and the voltage at node N2 can be pulled down without resistor R2. Alternatively, node N1 can be pulled up to VDD, and node N2 can be pulled down to a voltage higher than 0V. In this case, if signal S3 is set to (S3+)-(S3-) and signal S4 is set to (S4+)-(S4-), signal S3 is pulled up to the pull-up voltage, and the pulled-up drive signal S4 is supplied to piezoelectric element 21. Amplifier 12 may not have a differential output, but instead output signal S3 to ground, with electrode 23 grounded.

[0100] (Third embodiment)

[0101] Figure 14 FIG. 1 is a block diagram of a driving circuit according to a third embodiment. Figure 14 As shown, the drive circuit 10 includes a low-pass filter (LPF) 32. LPF 32 suppresses high-frequency components in the signals S4+ and S4- output by the pull-up circuit 13, while allowing low-frequency components to pass through. The signal passing through LPF 32 is supplied to the piezoelectric element 21 of the MEMS speaker 20. LPF 32 is an analog filter. The remaining structure is the same as in the first embodiment, and its description is omitted.

[0102] The piezoelectric element 21 has a large capacitance component, and therefore has a lower impedance as the frequency increases. Therefore, if the signal supplied to the piezoelectric element 21 contains a high-frequency component, power consumption increases.

[0103] In addition, high-frequency sounds above 16 kHz are almost inaudible to humans, but high-frequency sounds of sufficient intensity can adversely affect hearing. For example, the International Non-Ionizing Radiation Committee (INIRC) stipulates that the sound pressure of occupational exposure to sound waves with a frequency of 16 kHz to 20 kHz is 70 dB or less, and that the sound pressure limit of ultrasonic waves with a frequency of 20 kHz to 100 kHz is 100 dB or less. The sound wave output of the MEMS speaker 20 is flat in the high-frequency domain. Therefore, when a signal above 16 kHz is input to the MEMS speaker 20, the MEMS speaker 20 will output sound waves or ultrasonic waves above 16 kHz. This may adversely affect human hearing.

[0104] Therefore, in the third embodiment, LPF 32 passes the audible frequency components of signals S4+ and S4- while suppressing frequency components higher than the audible range. This prevents signals S5+ and S5-, which contain ultrasonic frequency components exceeding the human audible range, from being input into the MEMS speaker 20. This reduces the power consumption of the MEMS speaker 20. The audible frequency range is between 20 Hz and 20 kHz. The ultrasonic frequency components are above 20 kHz.

[0105] The cutoff frequency of LPF 32 is preferably between 10 kHz and 20 kHz. This prevents signals S5+ and S5-, which contain high-frequency components that are barely audible to humans, from being input into MEMS speaker 20. This reduces the power consumption of MEMS speaker 20. Furthermore, it reduces the sound pressure of sound waves that could adversely affect human hearing.

[0106] Figure 15 This is a block diagram of the electroacoustic conversion system of the third embodiment. LPF 32a filters the signal output by digital sound signal generator 28 and outputs the filtered signal to DAC 30. LPF 32a is a digital filter. LPF 32a can also be provided within digital sound signal generator 28. This eliminates the need for an LPF after digital sound signal generator 28, thereby reducing the number of components.

[0107] The LPF 32b filters the signal output from the DAC 30 and outputs the filtered signal to the amplifier 12. The LPF 32c filters the signal output from the amplifier 12 and outputs the filtered signal to the MEMS speaker 20. By providing the LPF 32c after the amplifier 12, high-frequency components of noise generated by the amplifier 12 can be removed.

[0108] The driving circuit 10 only needs to include at least one of the LPFs 32 a to 32 c . When the driving circuit 10 includes the LPF 32 a , the DAC 30 may also be included in the driving circuit 10 .

[0109] As described above, the embodiments have been described. However, the embodiments are presented as examples, and the present invention is not limited to the embodiments described above. The embodiments described above can be implemented in various other forms, and various combinations, omissions, substitutions, and modifications can be made without departing from the scope of the invention. These embodiments and their variations are included within the scope and spirit of the invention, and are included in the invention described in the scope of the patent application and its equivalents.

Claims

1. A driving circuit, characterized in that: have: an amplifier that amplifies an input signal and supplies the amplified signal as a driving signal to the piezoelectric element of the MEMS speaker driven by the piezoelectric element; as well as The offset generating unit generates an offset such that a minimum absolute value of the voltage of the drive signal becomes a positive predetermined voltage or more.

2. The driving circuit according to claim 1, wherein: The piezoelectric element includes a piezoelectric body, a first electrode and a second electrode for applying a voltage to the piezoelectric body. The driving signal is supplied to the piezoelectric element so that the second electrode has a positive voltage relative to the first electrode.

3. The driving circuit according to claim 2, wherein: The piezoelectric body is spontaneously polarized so that the second electrode is positive with respect to the first electrode.

4. The driving circuit according to any one of claims 1 to 3, characterized in that: The offset generating unit applies the offset to the drive signal amplified by the amplifier.

5. The driving circuit according to any one of claims 1 to 3, characterized in that: The offset generating unit applies an offset to the input signal before amplification by the amplifier.

6. The driving circuit according to any one of claims 1 to 3, characterized in that: The driving circuit includes a digital-to-analog converter that converts a digital signal into the input signal, which is an analog signal. The offset generating unit applies an offset to the digital signal.

7. An electroacoustic conversion system, characterized in that: have: The driving circuit according to claim 1 or 2; and The MEMS speaker.

8. A driving circuit, characterized in that: have: an amplifier that amplifies an input signal and outputs the amplified signal as an output signal; and The pull-up circuit pulls up the output signal to a pull-up voltage whose voltage value is changed according to the voltage waveform of the input signal, and supplies the pulled-up output signal as a driving signal to the piezoelectric element of the MEMS speaker driven by the piezoelectric element.

9. The driving circuit according to claim 8, wherein: The pull-up voltage when the voltage of the output signal is a first voltage is lower than the pull-up voltage when the voltage of the output signal is a second voltage higher than the first voltage.

10. The driving circuit according to claim 9, wherein: When the voltage of the output signal is a first voltage, the pull-up voltage is lower than or equal to a maximum voltage in the voltage waveform of the output signal and higher than or equal to the first voltage.

11. The driving circuit according to any one of claims 8 to 10, characterized in that: setting a power supply voltage of the amplifier based on a voltage waveform of the input signal, The pull-up voltage is the power supply voltage.

12. The driving circuit according to claim 11, wherein: The amplifier is a class G amplifier or a class H amplifier.

13. The driving circuit according to any one of claims 8 to 10, characterized in that: The driving circuit includes a low-pass filter that passes frequency components in the audible range in the driving signal and suppresses frequency components higher than the audible range.

14. The driving circuit according to any one of claims 8 to 10, characterized in that: The piezoelectric element includes a piezoelectric body, a first electrode and a second electrode for applying a voltage to the piezoelectric body. The driving signal is supplied to the piezoelectric element so that the second electrode has a positive voltage relative to the first electrode.

15. The driving circuit according to claim 14, wherein: The piezoelectric body is spontaneously polarized so that the second electrode is positive with respect to the first electrode.

16. An electroacoustic conversion system, characterized in that: have: The drive circuit according to any one of claims 8 to 10; and The MEMS speaker.

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