Method and device for optimizing configuration parameters of multiplication device
By optimizing the interpolation matrix and valuation matrix of the Karatsuba decomposition strategy, determining the row range according to the mode parameters and performing matrix element processing, the problem of long optimization time for the multiplication device configuration parameters is solved, and a more efficient optimization process is achieved.
Patent Information
- Application Number
- CN202510759965.7
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-06-06
- Publication Date
- 2025-09-26
AI Technical Summary
In the prior art, the optimization process of the multiplication device configuration parameters of the Karatsuba decomposition strategy takes too long, resulting in a very time-consuming search process.
By obtaining the valuation matrix, interpolation matrix and input parameter set of the target multiplication operation, the row range of the interpolation matrix is determined according to the mode parameters, and the matrix elements within the row range are optimized. The valuation matrix is updated to reduce the overhead, and the interpolation matrix is optimized to shorten the optimization time.
The optimization time of the multiplication device configuration parameters corresponding to the Karatsuba decomposition strategy is effectively shortened, and the efficiency of the optimization process is improved.
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Figure CN120704640A_ABST
Abstract
Description
Technical Field
[0001] One or more embodiments of the present specification relate to the field of computers, and more particularly, to a method and apparatus for optimizing configuration parameters of a multiplication device. Background Art
[0002] Karatsuba multiplication is a highly efficient multiplier that significantly reduces the complexity of multiplication. Its core concept is to reduce the area required for multiplication by decomposing large-number multiplications into smaller-bit-width multiplications, reusing the intermediate results, and ultimately recovering the result of the large-number multiplication. Furthermore, for the k-term Karatsuba algorithm, the multiplication decomposition strategy for dividing a large number into k parts is not unique. Furthermore, Karatsuba multiplication can be used not only for ordinary multiplication but also for nonlinear multiplication, reducing the number of smaller-bit-width multiplications required for multiplication, thereby reducing the cost of multiplication devices.
[0003] In the prior art, for various types of multiplication operations, a feasible Karatsuba decomposition strategy is searched exhaustively, resulting in a time-consuming search process. Karatsuba decomposition strategies correspond to the configuration parameters of the multiplication device, and accordingly, optimizing the configuration parameters of the multiplication device is time-consuming. Summary of the Invention
[0004] One or more embodiments of this specification describe a method and apparatus for optimizing configuration parameters of a multiplication device, which can shorten the time spent on optimizing the configuration parameters of the multiplication device.
[0005] In a first aspect, a method for optimizing configuration parameters of a multiplication device is provided, comprising:
[0006] Obtaining a first estimate matrix, a second estimate matrix, an interpolation matrix, and an input parameter set corresponding to a target multiplication operation; the first estimate matrix and the second estimate matrix are respectively used to control the decomposition and combination of the multiplier and the multiplicand under the Karatsuba algorithm decomposing the multiplier into k segments, and the two together determine the generation of an intermediate product vector; the interpolation matrix is used to restore the multiplication result from the intermediate product vector; the input parameter set includes at least a mode parameter of the target multiplication operation; the mode parameter is used to define the multiplication type;
[0007] Determining, according to the mode parameters, a row range of a plurality of rows for optimizing the interpolation matrix;
[0008] For the interpolation matrix, with the goal of reducing overhead, each matrix element within the row range is optimized to obtain an optimized interpolation matrix, and the first valuation matrix and the second valuation matrix are updated accordingly, wherein the overhead includes the area overhead of the multiplication device that implements the target multiplication operation; the optimized interpolation matrix, the updated first valuation matrix and the second valuation matrix are used as configuration parameters of the multiplication device.
[0009] In one possible embodiment, the intermediate product vector is obtained by dot multiplication of the first intermediate vector and the second intermediate vector; the first intermediate vector is obtained by operation of the first estimation matrix and the first vector; the first vector is composed of the multiplier decomposed into k segments of equal length; the second intermediate vector is obtained by operation of the second estimation matrix and the second vector; the second vector is composed of the multiplicand decomposed into k segments of equal length; the multiplication result is obtained by multiplying each row of the result column vector by the corresponding bit weight; the result column vector is obtained by multiplying the interpolation matrix by the intermediate product vector.
[0010] In a possible implementation, determining, according to the mode parameter, a row range of the plurality of rows for optimizing the interpolation matrix includes:
[0011] If the multiplication type defined by the mode parameter is modular multiplication, determining the row range to be row 0 to row k-1;
[0012] If the multiplication type defined by the mode parameter is integer multiplication, determining the row range to be row k-1 to row 2k-2;
[0013] If the multiplication type defined by the mode parameter is ordinary multiplication, determining the row range to be row 0 to row 2k-2;
[0014] If the multiplication type defined by the mode parameter is user-defined multiplication, the row range is determined to be a range set by the user.
[0015] In one possible implementation, the area overhead includes a multiplier area and an adder area, wherein the multiplier area is the multiplication overhead of generating all elements of the intermediate product vector multiplied by the area of a single multiplier, and the adder area is the addition and subtraction overhead of generating all elements of the intermediate product vector multiplied by the area of a single adder.
[0016] Furthermore, the multiplication overhead of any element in the intermediate product vector is the product of the number of multiplications required to generate the element and the multiplication factor, wherein the number of multiplications is determined based on the calculation weight of the fragment involved in the element, and the calculation weight of the fragment is determined based on the number of bits determined to be 0 in the fragment and the length of the fragment; the multiplication factor is determined based on whether the element is used within the row range and whether it is used only in the edge row.
[0017] Furthermore, the input parameter set includes calculation weights of several segments of the multiplier and / or the multiplicand.
[0018] In a possible implementation, the optimization process includes:
[0019] For the current interpolation matrix, check whether there is a target column with all zeros in the row range; if so, delete the target column to update the interpolation matrix;
[0020] The corresponding updating of the first valuation matrix and the second valuation matrix includes:
[0021] Delete the target row corresponding to the target column in the first estimation matrix and the second estimation matrix.
[0022] Furthermore, the optimization process further includes:
[0023] For the current interpolation matrix, any row within the row range is compared with the standard decomposition corresponding to the row. If the number of non-zero elements in a row is greater than the number of non-zero elements in its corresponding standard decomposition, the row in the current interpolation matrix is replaced with the corresponding standard decomposition to update the interpolation matrix.
[0024] Furthermore, the standard decomposition corresponding to the row is obtained as follows:
[0025] Get each basic product term corresponding to the i-th row, where the sum of the index of the fragment split by the multiplier and the index of the fragment split by the multiplicand in each basic product term is i;
[0026] Merge any two basis product terms whose indices are symmetric to obtain the standard decomposition corresponding to the i-th row.
[0027] In a possible implementation, the optimization process includes:
[0028] Performing at least one round of search, each round of search performing an optimal step search process based on the results of the previous round; the optimal step search process is used to find a decomposition method for elements in the intermediate product vector according to the cost;
[0029] If the cost of the search results of this round is less than the cost of the results of the previous round, or if the cost of the search results of this round is greater than the cost of the results of the previous round and the preset round has not been reached, then accept the results of this round and continue to iterate based on them; otherwise, terminate the search and use the search results of the previous round as the output search results.
[0030] Furthermore, the round-level search includes multiple optimal step search processes, and each optimal step search process searches for decomposition methods of other elements based on the result of the previous optimal step until there are no decomposable elements, and stops when the minimum cost of all optimal steps in this round and the corresponding first valuation matrix, second valuation matrix, interpolation matrix, and intermediate product vector are used as the output results of this round.
[0031] Furthermore, the search process for a single optimal step includes:
[0032] For each expandable element in the intermediate product vector, expansion is performed under multiple expansion methods, and the element expansion method that reduces the cost the most or increases the cost the least after expansion is determined as the optimal step.
[0033] Furthermore, the multiple expansion modes include: a full expansion mode and a template-based expansion mode.
[0034] In a second aspect, a device for optimizing configuration parameters of a multiplication device is provided, comprising:
[0035] an acquisition unit, configured to acquire a first estimation matrix, a second estimation matrix, an interpolation matrix, and an input parameter set corresponding to a target multiplication operation; the first estimation matrix and the second estimation matrix are respectively used to control the decomposition and combination of the multiplier and the multiplicand under the Karatsuba algorithm decomposing the multiplier into k segments, and the two together determine the generation of an intermediate product vector; the interpolation matrix is used to restore the multiplication result from the intermediate product vector; the input parameter set includes at least a mode parameter of the target multiplication operation; the mode parameter is used to define the multiplication type;
[0036] a determining unit, configured to determine a row range of a plurality of rows for optimizing the interpolation matrix according to the mode parameters acquired by the acquiring unit;
[0037] A processing unit is configured to optimize the interpolation matrix obtained by the acquisition unit, with the goal of reducing overhead, the matrix elements within the row range obtained by the determination unit, obtain an optimized interpolation matrix, and correspondingly update a first valuation matrix and a second valuation matrix, wherein the overhead includes an area overhead of a multiplication device that implements the target multiplication operation; the optimized interpolation matrix, the updated first valuation matrix, and the second valuation matrix are used as configuration parameters of the multiplication device.
[0038] According to a third aspect, a computer-readable storage medium is provided, on which a computer program is stored. When the computer program is executed in a computer, the computer is caused to execute the method according to the first aspect.
[0039] In a fourth aspect, a computing device is provided, comprising a memory and a processor, wherein the memory stores executable code, and when the processor executes the executable code, the method of the first aspect is implemented.
[0040] Through the method and device provided in the embodiments of this specification, the Karatsuba decomposition strategy is represented by an evaluation matrix and an interpolation matrix. On the basis of the known better Karatsuba decomposition strategy, a better Karatsuba decomposition strategy is sought. The optimization process is based on the multiplication type. First, the row range of several rows for optimizing the interpolation matrix is determined. Then, for the interpolation matrix, with the goal of reducing the overhead, each matrix element within the row range is optimized to obtain the optimized interpolation matrix, and the first evaluation matrix and the second evaluation matrix are updated accordingly. That is to say, for certain multiplication types, the range of optimizing the interpolation matrix can be narrowed, and the optimization time can be shortened accordingly. The Karatsuba decomposition strategy corresponds to the configuration parameters of the multiplication device, and accordingly, the time spent on optimizing the configuration parameters of the multiplication device can be shortened. BRIEF DESCRIPTION OF THE DRAWINGS
[0041] In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the following briefly introduces the drawings required for use in the description of the embodiments. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying any creative work.
[0042] Figure 1 A schematic diagram showing a range of rows requiring attention in different modes according to one embodiment;
[0043] Figure 2 A schematic diagram of user-defined constraints according to one embodiment is shown;
[0044] Figure 3 A schematic diagram of an implementation scenario of an embodiment disclosed in this specification;
[0045] Figure 4 This is a schematic diagram of an implementation scenario of another embodiment disclosed in this specification;
[0046] Figure 5 A flow chart illustrating a method for optimizing configuration parameters of a multiplication device according to one embodiment is shown;
[0047] Figure 6 shows an initialization flow chart according to one embodiment;
[0048] Figure 7 FIG. 1 is a schematic diagram showing an operation of an (E, I) matrix during an initialization phase according to an embodiment;
[0049] Figure 8 A local optimization flow chart according to one embodiment is shown;
[0050] Figure 9 shows a global search hierarchy diagram according to one embodiment;
[0051] Figure 10 A global search flow chart according to one embodiment is shown;
[0052] Figure 11 A pseudo code diagram of an overall optimized Karatsuba decomposition search algorithm according to one embodiment is shown;
[0053] Figure 12 FIG. 1 shows a design space exploration (DSE) flow chart according to one embodiment;
[0054] Figure 13 FIG. 2 shows a design space exploration (DSE) flow chart according to another embodiment;
[0055] Figure 14 A global search flow chart according to another embodiment is shown;
[0056] Figure 15 A schematic block diagram shows an apparatus for optimizing configuration parameters of a multiplication device according to an embodiment. DETAILED DESCRIPTION
[0057] To facilitate understanding, some basic concepts and the meanings of characters used in the embodiments of this specification are first explained.
[0058] Modular multiplication (MM): is a basic cryptographic primitive designed to complete the operation Z = XY mod M.
[0059] NTT-Friendly module: q=q H ×2 ω +1, where ω≥1, q H ≠0.
[0060] Data width (W) and R: W represents the bit length of the data, R = 2 W .
[0061] A, B: represent the multiplier and multiplicand respectively.
[0062] k, m, r: k means that A and B are decomposed into k equal-length segments (also called words) when using the Karatsuba algorithm; m means the length of each segment; r = 2 m For example, when W=40, k=4, m=10, and r=2 10When r=2, a 40-bit number A can be divided into four 10-bit numbers. 10 ,A=A3r 3 +A2r 2 +A1r 1 +A0r 0 .
[0063] Non-linear multiplication operations: including AB mod R and
[0064] Karatsuba algorithm: The core is to calculate the result of large number multiplication by decomposing large number multiplication into relatively small multiplications, reusing the intermediate results of the multiplication. For example, c = AB, A, B are divided into A = A1r + A0, B = B1r + B0, c = A0B0 + A1B0r + A0B1r + A1B1r 2 =A0B0+A1B1r 2 +[(A0+A1)(B0+B1)-A0B0-A1B1]r, where [(A0+A1)(B0+B1)-A0B0-A1B1] replaces A1B0+A0B1, reducing one multiplication overhead. Furthermore, this can be extended to decompose AB into smaller words, such as dividing A into 3 parts, A=A2r 2 +A1r+A0, which is called the 3-term Karatsuba algorithm.
[0065] (E, I) Matrix: The Karatsuba algorithm can be represented by a pair of (E, I) matrices, where the E matrix is the estimate matrix, controlling the decomposition of the multiplier and multiplicand and the generation of the intermediate product vector e; the I matrix is the interpolation matrix, controlling how the intermediate product vector e is used to recover the final multiplication result. For example, in the case of the 2-term Karatsuba algorithm (k=2), A is represented by the vector (A0A1) T ,B is represented by a vector (B0B1) T The E matrix is expressed as get By e A , e B Dot product gets the intermediate product vector pass get Finally, multiply each row of the I·e result by the corresponding bit weight to recover the multiplication result c=(r 0 r 1 r 2 )·I·e=AB。
[0066] It should be noted that in the embodiment of this specification, the element e in the intermediate product vector e generated by the (E, I) matrix is iThe number of sub-terms of the corresponding expressions must be equal, such as A0B0, (A0-A1)(B0-B1), (A0-A1+A2)(B0-B1+B2). The situation where the number of sub-terms of the expression is unbalanced, such as A0(B0+B1) and (A0-A1)(B0-B1+B2), is not supported.
[0067] Mode: defines the type of Karatsuba multiplication. MOD, DIV, FULL and MANUAL represent AB modR, AB and user-defined multiplication Since each row of the I matrix in the Karatsuba decomposition result corresponds to a different bit weight (r x ), so different modes are reflected in focusing on different rows in the I matrix. Figure 1 Schematic diagram showing the row ranges that require attention in different modes according to one embodiment. Figure 1 ,exist Figure 1 (a) shows that in MOD mode, the optimization process needs to focus on the 0th to k-1th rows of the interpolation matrix; Figure 1 (b) in FIG shows that, in DIV mode, the optimization process needs to focus on the k-1th row to the 2k-2th row of the interpolation matrix; Figure 1 (c) in shows that in FULL mode, all rows of the interpolation matrix need to be paid attention to during the optimization process; Figure 1 (d) in FIG. 4 shows that, in MANUAL mode, the user can manually set several rows of the interpolation matrix that need to be paid attention to during the optimization process.
[0068] Edge row: In MOD or DIV mode, the row in the I matrix closest to the part to be discarded, usually the k-1th row. For example, Figure 1 (a) shows the I matrix r k-1 Corresponding coefficients (such as A0B k-1 ) is approximately r 2 , so the k-1th row will contribute approximately r to the multiplication result 2 ×r k-1 Numbers of greater or lesser magnitude than R=r k , so in ABmodR, the k-1th row is regarded as an edge row, and only the lower half multiplication is required. Similarly, we can get Figure 1 (b) in FIG. 4 shows that the edge row in the DIV mode is also the k-1th row of the I matrix.
[0069] Search range (SR): The range of search optimization in the I matrix. For example, SR(i,j) means that the rows from row i to row j in the I matrix are the rows that the algorithm needs to search. For example, Figure 1As shown in (a), in MOD mode, SR(0,k-1), the results from row 0 to row k-1 are all related to ABmodR. The multiplication intermediate terms of rows greater than k-1 must exceed R, so they are not explored; Figure 1 As shown in (b) in the DIV mode, the search algorithm focuses on rows k-1 to 2k-2. The multiplication intermediate results of rows less than k-1 must be less than R, so no exploration is done; Figure 1 As shown in (c) in , in FULL mode, the search algorithm will focus on all rows, so the search range is all rows of the I matrix; Figure 1 As shown in (d) in the figure, the user can also manually set the search algorithm to traverse specific rows of the I matrix in MANUAL mode, and then set SR(i,j).
[0070] Element: represents the element in the intermediate product vector e. i Represents the element with sequence number i in e, usually representing a polynomial multiplication, such as (A0+A1)(B0+B1).
[0071] The calculated weight of the fragment, also known as the calculated weight of the word (word_weight): Definition For example, if the bit length of word A0 is 8, its binary representation is A0=8′bxxxx_0000, where x represents the uncertainty of whether the bit corresponds to 0 or 1. Then the calculation weight of word A0 is
[0072] User-defined constraints: In the embodiments of this specification, it means that the user can specify the calculation weights of each fragment corresponding to operands A and B in Karatsuba multiplication to conform to the properties of operands A and B in actual application scenarios, such as containing a series of consecutive 0 bits (NTT-Friendly modulus) or a series of consecutive bits of 1. Figure 2 FIG. 1 shows a schematic diagram of user-defined constraints according to an embodiment. Figure 2 ,like Figure 2 As shown in (a), S1 contains a sequence of consecutive bits of 1, expressed as "...all1's...". S1 and F1 are summed to convert the sequence of consecutive bits of 1 in S1 into a sequence of consecutive bits of 0 in S2, expressed as "...all0's...". S2 is split into 4 segments, and the calculation weights of each segment are A3 = 1, A2 = 0.5, A1 = 0.9, and A0 = 1. Figure 2As shown in (b), S3 contains a sequence of consecutive 1 bits and a sequence of consecutive 0 bits. S3 is split into four segments, and the calculated weights for each segment are A3 = 0.9, A2 = 0.6, A1 = 0.5, and A0 = 1. Based on the definition of the calculated weights for characters in the k-term Karatsuba decomposition in the embodiments of this specification, it can be seen that there is no restriction on the position of the consecutive 0 or 1 segments in the operand, nor is there a limit on the number of consecutive 0 or 1 segments that appear.
[0073] Multiplication number (Mul_num): Calculates an element e i Required equivalence The number of multiplications. In the case of a monomial multiplied by a monomial, for example, A0B0, the number of multiplications is When a polynomial is multiplied by a polynomial, for example, (A0+A1)×(B0+B1), the default word_weight of the polynomial is 1; the embodiments of this specification do not support the case of a monomial being multiplied by a polynomial, for example, A0×(B0+B1).
[0074] Multiplication factor (M_factor): If the element e i If it is only used in edge rows, the multiplication factor is 0.5, that is, M_factor(e i )=0.5;If the element e i If the non-edge rows in the search range are used, the multiplication factor is 1, that is, M_factor(e i )=1; otherwise element e i The multiplication factor is 0, that is, M_factor(e i )=0.
[0075] Total multiplication cost (Exp mul ): The multiplication cost of all elements required to generate the Karatsuba decomposition result, that is, ∑Mul_cost(e i ), where Mul_cost(e i ) represents the generated element e i The multiplication cost of ∑M_factor(e i )×Mul_num(e i ).
[0076] Total additive cost (Exp add ): The cost of adding and subtracting all elements required to generate the Karatsuba decomposition result, in units. For example, Exp add =3 means 3 times are required addition
[0077] Multiplication area factor (A mul ): On the specific implementation platform, the corresponding area of multipliers with different bit widths.
[0078] Additive area factor (A add ): On the specific implementation platform, the corresponding area of adders with different bit widths.
[0079] Cost: Cost is defined as the area cost required for Karatsuba decomposition, which is given by the equation Cost = Exp mul ×A mul +Exp add ×A add If custom constraints are required, the Cost function can be further modified to guide the algorithm to search for the desired Karatsuba decomposition result.
[0080] Standard decomposition (SD): Based on the 2-term Karatsuba decomposition scheme. SD(i) represents the decomposition of a row using the 2-term Karatsuba method. For example, for the second row of the matrix I (bit weight r 2 ) can be expressed as A1B1+(A0+A2)(B0+B2)-A0B0-A2B2=A1B1+A0B2+A2B0.
[0081] K: represents the upper bound of the search for k in the design space exploration tool. For example, if K = 4, the design space exploration tool will search for k∈{1, 2, 3, 4}. The case of k=1 corresponds to performing ordinary multiplication without factorization.
[0082] The solution provided in this specification is described below in conjunction with the accompanying drawings.
[0083] Figure 3 This is a schematic diagram of an implementation scenario of an embodiment disclosed in this specification. This implementation scenario involves optimizing the configuration parameters of a multiplication device under a certain value of k. It can be understood that the Karatsuba decomposition strategy, that is, the decomposition and combination method of the multiplier and the multiplicand in the multiplication operation under the Karatsuba algorithm in which the multiplier and the multiplicand are decomposed into k fragments, corresponds to the configuration parameters of the multiplication device. Figure 3In an embodiment of this specification, an optimized Karatsuba decomposition search method is proposed. This method uses the classic Karatsuba algorithm in the form of an (E, I) matrix as input. Under given constraints, such as the properties of operands A and B, the optimized decomposition pattern, etc., it searches for a more optimal Karatsuba decomposition scheme and outputs the decomposition result in the form of an (E, I) matrix. During the search process, the device resource overhead data under the specific implementation platform is referenced to estimate the computational overhead (Cost) of the Karatsuba decomposition during the optimization process. Finally, the Karatsuba decomposition with the lowest Cost during the entire search process is output to help users find the Karatsuba design solution with the lowest circuit area cost in practical applications. For example, the computational overhead before optimization includes 6 multiplications and 6 additions, with a Cost of 1234. After optimization, the computational overhead is even lower, including 4 multiplications and 2 additions, with a Cost of 567. The Cost is significantly reduced.
[0084] Figure 4 This is a schematic diagram of another implementation scenario of the embodiment disclosed in this specification. This implementation scenario involves optimizing the configuration parameters of the multiplication device under multiple values of k. Figure 4 Based on the search method proposed in the embodiments of this specification, a design space exploration (DSE) tool is proposed in the embodiments of this specification. This tool supports optimizing Karatsuba decompositions using a search method in user-provided 1- to K-term Karatsuba decompositions one by one, and selects the Karatsuba decomposition with the minimum cost (Cost) among all optimized results as output. This ensures that, within a specific implementation platform and under constraints, the total cost required for multiplication of the Karatsuba decomposition output by the DSE tool is minimized. For example, the input includes a given 2-term Karatsuba decomposition (E, I) matrix form, a given 3-term Karatsuba decomposition (E, I) matrix form, ..., and a given K-term Karatsuba decomposition (E, I) matrix form. The output is the optimized k-term Karatsuba decomposition (E, I) matrix form, which is the decomposition with the lowest computational cost after optimization among all input Karatsuba decompositions, with Cost = 567, where Cost is significantly reduced.
[0085] Among them, the above Figure 3 and Figure 4Implementation scenarios all rely on searching for a better Karatsuba decomposition solution, typically using an exhaustive search approach, which can be time-consuming. The embodiments of this specification aim to shorten search time, or optimize time, and propose corresponding solutions to reduce the time spent optimizing the configuration parameters of multiplication devices.
[0086] Figure 5 A flow chart showing a method for optimizing configuration parameters of a multiplication device according to an embodiment of the present invention is shown. The method can be based on Figure 3 or Figure 4 The implementation scenario shown in Figure 5 As shown, the method for optimizing the configuration parameters of a multiplication device in this embodiment includes the following steps: Step 51, obtaining a first estimation matrix, a second estimation matrix, an interpolation matrix, and an input parameter set corresponding to a target multiplication operation; the first estimation matrix and the second estimation matrix are respectively used to control the decomposition and combination method of the multiplier and the multiplicand under the Karatsuba algorithm decomposed into k segments, and the two together determine the generation of an intermediate product vector, the interpolation matrix is used to restore the multiplication result from the intermediate product vector, and the input parameter set includes at least a mode parameter of the target multiplication operation; the mode parameter is used to define the multiplication type; Step 52, determining a row range of several rows of the interpolation matrix to be optimized based on the mode parameter; Step 53, optimizing each matrix element within the row range of the interpolation matrix with the goal of reducing overhead, obtaining an optimized interpolation matrix, and correspondingly updating the first estimation matrix and the second estimation matrix, wherein the overhead includes the area overhead of the multiplication device that implements the target multiplication operation; the optimized interpolation matrix, the updated first estimation matrix, and the second estimation matrix are used as the configuration parameters of the multiplication device. The specific execution method of each of the above steps is described below.
[0087] First, in step 51, the first valuation matrix, the second valuation matrix, the interpolation matrix and the input parameter set corresponding to the target multiplication operation are obtained; the first valuation matrix and the second valuation matrix are respectively used to control the decomposition and combination method of the multiplier and the multiplicand under the Karatsuba algorithm that is decomposed into k fragments, and the two together determine the generation of the intermediate product vector. The interpolation matrix is used to restore the multiplication result from the intermediate product vector. The input parameter set includes at least the mode parameters of the target multiplication operation; the mode parameters are used to define the multiplication type. It can be understood that under a certain k value, a multiplication operation can have multiple different decomposition and combination methods, and these decomposition and combination methods correspond to different overheads. The embodiment of this specification explores a better decomposition and combination method based on a known decomposition and combination method to reduce overhead.
[0088] In one example, the intermediate product vector is obtained by dot multiplication of the first intermediate vector and the second intermediate vector; the first intermediate vector is obtained by operation of the first estimation matrix and the first vector; the first vector is composed of the multiplier decomposed into k segments of equal length; the second intermediate vector is obtained by operation of the second estimation matrix and the second vector; the second vector is composed of the multiplicand decomposed into k segments of equal length; the multiplication result is obtained by multiplying each row of the result column vector by the corresponding bit weight; the result column vector is obtained by multiplying the interpolation matrix by the intermediate product vector.
[0089] For example, the first valuation matrix is E A , the second valuation matrix is E B , the interpolation matrix is I, the multiplier and the first vector are both represented by A, the multiplicand and the second vector are both represented by B, and the first intermediate vector e A =E A A, the second intermediate vector e B =E B B, the intermediate product vector The resulting column vector is I·e, and the multiplication result c=(r 0 r 1 ... r 2k-2 )·I·e=AB。
[0090] In the embodiments of this specification, the multiplication type includes any one of modular multiplication, integer multiplication, ordinary multiplication and custom multiplication. Performing corresponding exploration optimization according to the multiplication type is helpful to save exploration time.
[0091] Then, in step 52, the row range of the plurality of rows to be optimized for the interpolation matrix is determined according to the mode parameters. It is understood that the matrix elements outside the above row range do not need to be optimized and have no effect on the multiplication result.
[0092] In one example, determining, according to the mode parameter, a row range of a plurality of rows for optimizing the interpolation matrix includes:
[0093] If the multiplication type defined by the mode parameter is modular multiplication, determining the row range to be row 0 to row k-1;
[0094] If the multiplication type defined by the mode parameter is integer multiplication, determining the row range to be row k-1 to row 2k-2;
[0095] If the multiplication type defined by the mode parameter is ordinary multiplication, determining the row range to be row 0 to row 2k-2;
[0096] If the multiplication type defined by the mode parameter is user-defined multiplication, the row range is determined to be a range set by the user.
[0097] In this example, when the multiplication type is modular multiplication, integer multiplication, or custom multiplication, the range of rows to be optimized can usually be narrowed.
[0098] Finally, in step 53, with the goal of reducing overhead, the interpolation matrix is optimized for each matrix element within the row range to obtain an optimized interpolation matrix, and the first and second estimation matrices are updated accordingly. The overhead includes the area overhead of the multiplication device that implements the target multiplication operation. The optimized interpolation matrix, the updated first and second estimation matrices are used as configuration parameters for the multiplication device. It is understood that the above-mentioned optimization process is to reduce overhead by adjusting the matrix elements of the interpolation matrix, and the adjustment method will further affect the exploration time.
[0099] In one example, the area overhead includes a multiplier area and an adder area, wherein the multiplier area is the multiplication overhead of generating all elements of the intermediate product vector multiplied by the area of a single multiplier, and the adder area is the addition and subtraction overhead of generating all elements of the intermediate product vector multiplied by the area of a single adder.
[0100] The area of a single multiplier may correspond to the aforementioned multiplication area factor (A mul ), the area of a single adder can correspond to the aforementioned addition area factor (A add ), both of which are related not only to the specific implementation platform, but also to the data bit width, and can be determined by the device resource overhead data under the specific implementation platform.
[0101] Furthermore, the multiplication overhead of any element in the intermediate product vector is the product of the number of multiplications required to generate the element and the multiplication factor, wherein the number of multiplications is determined based on the calculation weight of the fragment involved in the element, and the calculation weight of the fragment is determined based on the number of bits determined to be 0 in the fragment and the length of the fragment; the multiplication factor is determined based on whether the element is used within the row range and whether it is used only in the edge row.
[0102] For example, if the element e i If it is only used in edge rows, the multiplication factor is 0.5, that is, M_factor(e i )=0.5;If the element e i If the non-edge rows in the search range are used, the multiplication factor is 1, that is, M_factor(e i )=1; otherwise element e i The multiplication factor is 0, that is, M_factor(e i )=0.
[0103] Furthermore, the input parameter set includes calculation weights of several segments of the multiplier and / or the multiplicand.
[0104] In this example, the computation weight of the fragment reflects the characteristics of the operands on which the multiplication operation is performed.
[0105] In one example, the optimization process includes:
[0106] For the current interpolation matrix, check whether there is a target column with all zeros in the row range; if so, delete the target column to update the interpolation matrix;
[0107] The corresponding updating of the first valuation matrix and the second valuation matrix includes:
[0108] Delete the target row corresponding to the target column in the first estimation matrix and the second estimation matrix.
[0109] In this example, the number of columns of the interpolation matrix is equal to the number of elements of the intermediate product vector, and each column of the interpolation matrix corresponds to each element of the intermediate product vector. If there is a target column with all zeros in the row range, then the element of the intermediate product vector corresponding to the target column has no meaning of existence, and the element can be deleted from the intermediate product vector and the target column can be deleted from the interpolation matrix. In addition, the generation of the intermediate product vector is based on the valuation matrix, and each element of the intermediate product vector corresponds to each row of the valuation matrix. Therefore, the target row corresponding to the target column in the valuation matrix is deleted.
[0110] Furthermore, the optimization process further includes:
[0111] For the current interpolation matrix, any row within the row range is compared with the standard decomposition corresponding to the row. If the number of non-zero elements in a row is greater than the number of non-zero elements in its corresponding standard decomposition, the row in the current interpolation matrix is replaced with the corresponding standard decomposition to update the interpolation matrix.
[0112] In this example, by comparing the number of non-zero elements, a decomposition method with fewer multiplications can be selected to reduce overhead.
[0113] Furthermore, the standard decomposition corresponding to the row is obtained as follows:
[0114] Get each basic product term corresponding to the i-th row, where the sum of the index of the fragment split by the multiplier and the index of the fragment split by the multiplicand in each basic product term is i;
[0115] Merge any two basis product terms whose indices are symmetric to obtain the standard decomposition corresponding to the i-th row.
[0116] The index of the fragment can be expressed by subscript. For example, for any row, such as row i, the mathematical requirement is A0*B i +A1*B (i-1) +...+A i *B0. You can combine any two subscript symmetric terms, such as A0*B i +A i *B0 becomes (A0+A i )(B0+B i )-A0*B0-A i *B i Therefore, the i-th row based on the standard decomposition requires at most (i+1)*(i+2) / 2 elements.
[0117] In one example, the optimization process includes:
[0118] Performing at least one round of search, each round of search performing an optimal step search process based on the results of the previous round; the optimal step search process is used to find a decomposition method for elements in the intermediate product vector according to the cost;
[0119] If the cost of the search results of this round is less than the cost of the results of the previous round, or if the cost of the search results of this round is greater than the cost of the results of the previous round and the preset round has not been reached, then accept the results of this round and continue to iterate based on them; otherwise, terminate the search and use the search results of the previous round as the output search results.
[0120] In this example, one or more elements in the intermediate product vector may be polynomials multiplied by polynomials. Such elements can be expanded. When there are multiple elements, the order in which the multiple elements are expanded and the way each element is expanded can be diverse. Through a round-level search for the optimal step, a better decomposition method for each element under an expansion order can be searched. The next round-level search can introduce another expansion order to seek whether there is a better decomposition method, making the search process more efficient.
[0121] Furthermore, the round-level search includes multiple optimal step search processes, and each optimal step search process searches for decomposition methods of other elements based on the result of the previous optimal step until there are no decomposable elements, and stops when the minimum cost of all optimal steps in this round and the corresponding first valuation matrix, second valuation matrix, interpolation matrix, and intermediate product vector are used as the output results of this round.
[0122] In this example, a single optimal step search determines which element to decompose and how to decompose it.
[0123] Furthermore, the search process for a single optimal step includes:
[0124] For each expandable element in the intermediate product vector, expansion is performed under multiple expansion methods, and the element expansion method that reduces the cost the most or increases the cost the least after expansion is determined as the optimal step.
[0125] In this example, not only can the element expansion method with the largest cost reduction be selected as the optimal step, but the element expansion method with the smallest cost increase can also be selected as the optimal step.
[0126] Furthermore, the multiple expansion modes include: a full expansion mode and a template-based expansion mode.
[0127] In this example, in the full expansion mode, the elements are all expanded into combinations of monomials multiplied by monomials. In the template-based expansion mode, the elements can still be expanded into combinations of polynomials multiplied by polynomials.
[0128] The following is a summary of the round-level search and the optimal step search process. Given an (E, I), we can currently determine whether there is e i Can be decomposed. Among them, multiple e i The decomposition order of can be non-unique, you can choose one of the e i Decompose and see the overhead, then continue to disassemble other e i , up to multiple e i The optimal solution is found from this link, including the decomposition method with the greatest cost reduction or the decomposition method with the least cost increase, as the current step search. At the same time, it is also the starting point of the next step search. Since the decomposition order is not unique, the next round of search may introduce another exploration branch and obtain a different decomposition result. The whole process continues until there is no e that can be decomposed. i It should be noted that the step search allows the selection of the decomposition method with the least increase in cost. All the step optimal solutions are represented by a curve, which is not a monotonically decreasing curve. The decomposition method with the least cost is selected from the optimal solutions of each step as the optimal solution of this round. The optimal solution of this round can be an intermediate state, and there is e i The decomposition can continue. No assumptions are made about the decomposition order; it can be randomized and external strategies can be introduced. If the optimal solution at this round is better than the optimal solution at the previous round, it is replaced and the next round begins. If not, the entire exploration can be terminated. Alternatively, the exploration depth can be considered, and the exploration can be terminated after J rounds of no better results than the previous round.
[0129] Through the method provided in the embodiments of this specification, the Karatsuba decomposition strategy is represented by an evaluation matrix and an interpolation matrix. On the basis of a known better Karatsuba decomposition strategy, a better Karatsuba decomposition strategy is sought. The optimization process is based on the multiplication type. First, the row range of several rows for optimizing the interpolation matrix is determined. Then, for the interpolation matrix, with the goal of reducing overhead, each matrix element within the row range is optimized to obtain an optimized interpolation matrix, and the first evaluation matrix and the second evaluation matrix are updated accordingly. That is to say, for certain multiplication types, the range of optimization of the interpolation matrix can be narrowed, and the optimization time can be shortened accordingly. The Karatsuba decomposition strategy corresponds to the configuration parameters of the multiplication device, and accordingly, the time spent on optimizing the configuration parameters of the multiplication device can be shortened.
[0130] A preferred embodiment provided in this specification is introduced below.
[0131] This embodiment of the present invention proposes a search method, the input of which is the classic k-term Karatsuba decomposition result, the complete multiplication operation is AB, the decomposition result is represented in the form of an (E, I) matrix, and various parameters include: the number of Karatsuba terms k, the decomposition mode Mode, the operand width W, the multiplier area A of the specific implementation platform mul Sum adder area A add , and user-defined constraints based on specific application contexts, for example, some bits of A are consecutive 1s.
[0132] The method can be divided into three stages: initialization stage, best-step search stage and global search stage.
[0133] The goal of the initialization phase is to obtain the initial decomposition results based on the input parameters ((E, I), k, Mode, W) and user-defined constraints. Figure 6 FIG. 1 shows an initialization flow chart according to an embodiment. Figure 6 , the initialization process is as follows:
[0134] First, initialize the variables. Generate the required intermediate product vector e based on the input (E, I) matrix. Determine the search range (SR) and edge rows for the I matrix based on Mode and k. Determine the word calculation weights for A and B based on the user-added constraints.
[0135] Then, generate the initial decomposition result. According to the input k, Mode, search range SR(i, j) and edge rows, check whether there is a column in the I matrix within the search range SR(i, j) that is all 0. If so, delete this column and the element e in the vector e corresponding to this column. i and the corresponding rows in the E matrix.
[0136] Next, within the search range SR(i, j), the I matrix is compared row by row. If the number of elements required for a row in the I matrix is greater than the number of elements required by the standard decomposition of its corresponding row, the corresponding row in the current (E, I) matrix is replaced by the standard decomposition of the corresponding row, and the element e of the newly added intermediate product vector is replaced by i Update to the intermediate product vector e. At the same time, check whether there is a column in the I matrix within the search range SR(i, j) that is all 0. If so, delete this column and the corresponding element e in the vector e. i and the corresponding rows in matrix E. Repeat the above process until all rows in the search range are checked, and the initialized (E, I) decomposition can be obtained.
[0137] Figure 7 FIG. 1 shows a schematic diagram of the operation of the (E, I) matrix in the initialization phase according to an embodiment. Figure 7 ,exist Figure 7 In (a), taking the 2-term Karatsuba search ABmodR as an example, the bit weight r 1 The corresponding row is the edge row, the search range is SR(0,1), and the corresponding column of e2 is all 0 in the search range; Figure 7 In (b), remove the column corresponding to e2 to obtain a new I matrix; Figure 7 In (c), row 0 is replaced by its standard decomposition, with e4 replacing e0+e3. It should be noted that the figure only shows the operations on the intermediate product vector e and the interpolation matrix I, but not the operations on the valuation matrix E. The intermediate product vector e is generated based on the valuation matrix E, and the corresponding operations on the valuation matrix E can be performed based on the operations on the intermediate product vector e.
[0138] The local optimization stage is the best-step search stage, and the goal of this stage is to find the best-step in each iteration process. Figure 8 FIG. 1 shows a local optimization flow chart according to an embodiment. Figure 8 , by separately expanding all expandable elements e in the intermediate product vector e i , select Expand iTo maximize the reduction or minimize the increase in the cost of Karatsuba decomposition, i The expansion of is called the optimal step. i There are two strategies: full expansion strategy and template-based expansion strategy.
[0139] The full expansion strategy refers to the element e i The corresponding expression is expanded as the decomposition result. Its advantage is that it works for all types of expressions, but its disadvantage is that it generates a large number of intermediate products, making it difficult to effectively utilize the intermediate results of the Karatsuba algorithm. For example, (A0+A1)(B0+B1)=A0B0+A0B1+A1B0+A1B1.
[0140] The template-based expansion strategy refers to the element to be decomposed e i The corresponding expression is expanded according to a pre-set template, which increases the chances of reusing Karatsuba intermediate results and further improves the possibility of finding a better Karatsuba decomposition. For example, (A0+A1+A2)(B0+B1+B2)=-A2B2+(A1+A0)(B1+B0)+(A2+A0)(B2+B0)+(A1+A2)(B1+B2)-A0B0-A1B1. If the sign of a character in the equation to be decomposed is negative, the character and its sign are treated as a whole to unify with the template, such as: (A0-A1+A2)(B0-B1+B2)=(A0+(-A1)+A2)(B0+(-B1)+B2)=-A2B2+(-A1+A0)(-B1+B0)+(A2+A0)(B2+B0)+(-A1+A2)(-B1+B2)-A0B0-A1B1.
[0141] For each element e in the intermediate product vector e that can be further expanded i After expanding using the above two methods, select e i and its corresponding optimal expansion method, so that the cost (Cost) required for Karatsuba decomposition is maximized or minimized, and the decomposition result is updated to the (E, I) matrix and the intermediate product vector e.
[0142] The core of the local optimization stage is to achieve an efficient element decomposition scheme for the intermediate product vector. In addition to the above-mentioned full expansion strategy and template-based expansion strategy, the AI algorithm can also be used to provide possible expansion methods for the elements of the intermediate product vector.
[0143] In the global search phase, a greedy search strategy is used to search for the globally optimized Karatsuba decomposition results. This phase can be divided into top-level search, round-level search, and step-level search. Figure 9 FIG. 1 shows a global search hierarchy diagram according to one embodiment. Figure 9 The top-level search may include several rounds of searches, each of which may include several step-level searches. Step-level searches are optimal step searches, used to find the optimal step. It is understood that the number of rounds of searches may be one or multiple. When there are multiple rounds of searches, different rounds may include different numbers of step-level searches.
[0144] Figure 10 A global search flow chart according to one embodiment is shown. Figure 10 At the top level of the algorithm, the algorithm will perform multiple rounds of search, each round of search will be based on the results of the previous round. If the cost of the decomposition result of this round is round Less than the cost of the previous decomposition result last , then accept the decomposition result of this round and continue iterating based on it, otherwise terminate the search and use the decomposition result of the previous round as the algorithm search result output. At the round level of the algorithm, the algorithm will perform multiple optimal step search processes. Each optimal step search process is based on the previous optimal step result, and the corresponding optimal step of each step is recorded. The whole process is repeated until there are no decomposable elements in the (E, I) matrix of the current round, and the smallest of all the best steps in this round is And the corresponding (E, I) matrix and the intermediate product vector e as the output result of this round (cost round , (E, I) round , e round ). At the step level of the algorithm, the algorithm will search for the optimal step under the current conditions and use it as the output of the step level.
[0145] Figure 11 FIG. 1 shows a pseudo code diagram of the overall optimized Karatsuba decomposition search algorithm according to one embodiment. Figure 11 , Lines 1 to 3 of Algorithm 1 correspond to the initialization phase; Lines 11 to 14 of Algorithm 1 correspond to the top-level search; Lines 5 to 10 of Algorithm 1 correspond to the round-level search; Lines 5 to 8 of Algorithm 1 correspond to the step-level search.
[0146] Figure 12 FIG. 1 shows a design space exploration (DSE) flow chart according to an embodiment. Figure 12Based on the automated Karatsuba decomposition search algorithm proposed in the embodiments of this specification, design space exploration can be achieved by adding additional constraints, including the maximum number of Karatsuba decomposition terms K to be searched and the corresponding (E, I) matrix and other custom constraints. In order to be applied to different practical scenarios, DSE needs to provide in advance the multiplier area overhead (A) of different bit widths under the implementation platform. mul ) and adder overhead (A add ), when calculating Cost = Exp mul ×A mul +Exp add ×A add When A is obtained by looking up the table mul and A add The DSE tool searches for optimal results for k from 2 to K on a specific platform, where each k corresponds to a k-term Karatsuba decomposition input. The output is the solution with the lowest cost among the optimization results of the search algorithm for all inputs (E, I). The DSE tool optimizes only for a given input (E, I). Therefore, in practice, a relatively good Karatsuba decomposition solution should be selected as input for each k corresponding to (E, I) to increase the likelihood of finding a more optimal decomposition.
[0147] Figure 13 FIG. 4 shows a design space exploration DSE flow chart according to another embodiment. Figure 13 The DSE tool proposed in the embodiment of this specification can expand the search space. Under a given K, multiple (E, I) matrices corresponding to a single k are allowed to find the optimal decomposition of these matrices that meets the constraints. For K, the total number of types of search optimization (E, I) is Type k Represents the number of k-term Karatsuba decompositions to be searched in the DSE tool. The specific (E, I) is set by the user and must ensure that the elements of the intermediate product vectors generated by the provided (E, I) are symmetric, for example, A0B0, (A0+A1)(B0+B1). The multiplication of a monomial by a polynomial, for example, A0(B0+B1), is not supported.
[0148] Figure 14 FIG. 1 shows a global search flow chart according to another embodiment. Figure 14 , and the aforementioned Figure 10Compared to the illustrated embodiment, global search only continues when the current round's cost is lower than the previous round's cost, which can cause the search algorithm to get stuck in a local optimum. The top-level search condition can be modified to allow for a number of additional search rounds if the current round's cost is greater than or equal to the optimal cost of the previous search process. The specific number of rounds can be determined by the user. If the cost of the search results in subsequent rounds is still greater than or equal to the optimal cost of the previous search process, the search is abandoned and the optimal result from the previous search process is used as the output. Otherwise, the optimal result from the subsequent search rounds is accepted and the search continues based on this result.
[0149] The solution provided by the embodiment of this description has significant advantages over conventional processing methods.
[0150] This specification introduces the concept of word computation weights to quantify the portion of A and B where the bits are consecutively 0 or 1, making them relevant to the cost calculation and allowing the search algorithm to maximize the characteristics of A and B. For example, if k = 4, A and B are 16 bits, and the lower 0th to 3rd bits of A are always 0, then the multiplication directly related to A0, such as A0B0, will have zero multiplier area overhead. Furthermore, by setting different cost functions, key algorithm search metrics such as power consumption and timing can be controlled.
[0151] The embodiments of this specification adopt a search method based on a greedy algorithm, so from a global perspective, it will not cover all situations. The algorithm will tend to search in the direction of "possible optimization of Karatsuba decomposition", so the search process is more efficient. At the same time, the cost of each search is the exploration of the element expansion method of each intermediate product vector in the local optimization stage. Since the expansion calculation of the elements of the intermediate product vector is relatively small, it does not consume too much time. In summary, the embodiments of this specification adopt a search scheme based on a greedy algorithm, and provide an element expansion strategy for the intermediate product vector in local optimization, so that the algorithm does not need to spend a lot of time to traverse each situation, thereby improving the search speed.
[0152] The embodiment of this specification proposes an efficient search algorithm for optimizing Karatsuba decomposition based on a greedy algorithm that supports nonlinear multiplication operations. The solution supports determining the type of algorithm decomposition MOD, DIV, FULL and MANUAL by setting the Mode parameter, and ensures that the algorithm outputs the correct (E, I) matrix corresponding to the Karatsuba decomposition; the solution adopts the idea of "expanding the intermediate product" to search the optimization space, and proposes a complete expansion and template-based expansion strategy to help the algorithm search in the direction of "possible optimization of Karatsuba decomposition"; the solution is based on a greedy search solution and adopts a "top-level-round-step" three-level structure. In the round-level iteration, the algorithm forces the expansion of all intermediate product vectors to help the search algorithm jump out of the local optimal solution and move towards the global optimal solution as much as possible; the solution introduces the concept of calculation weight, by quantizing a series of consecutive 0 or 1 bits in A and B, so that the characteristics of the multiplier A and the multiplicand B can be reflected in the calculation of the intermediate product (such as a0b0). Further, the cost function is used to evaluate the decomposition quality and can be combined with the parameters of the specific implementation platform. At the same time, users can change the calculation method of the Cost function to guide the algorithm search direction.
[0153] The embodiments of this specification develop a tool that supports rapid design space exploration under given constraints, minimizing the overall cost of nonlinear operations based on the Karatsuba algorithm in modular multiplication applications. Specifically, the tool supports searching for at least one k-term Karatsuba (E, I) matrix corresponding to each k within a given search range K, and finding the minimum cost function from all optimization results, thereby minimizing the overall cost of nonlinear operations in modular multiplication operations. Constraints include: mode Mode, data bit width W, user-defined constraints that meet actual application scenarios, and relevant device parameters of the specific implementation platform, and evaluate the expected cost of the Karatsuba decomposition solution under the specific implementation platform.
[0154] The embodiments of this specification are of significant significance for modular multiplication operations. Modular multiplication operations are widely used in cryptographic systems such as the classic RSA algorithm, elliptic curve cryptography (ECC), and the emerging fully homomorphic cryptography (FHE). Classic modular multiplication algorithms include Barrett modular multiplication (BMM) and Montgomery modular multiplication (MMM). These two modular multiplication algorithms replace expensive division operations with multiplication and shift operations, allowing modular multiplication operations to be implemented efficiently. In order to achieve high-performance cryptographic systems, modular multiplication operations often adopt a pipeline architecture to achieve high throughput characteristics. Although BMM and MMM can avoid hardware-unfriendly division operations, BMM and MMM generally require three ordinary multiplications, which still consumes a large amount of hardware resources. As the multiplication bit width increases, the circuit area of the modular multiplier based on the pipeline architecture increases significantly. Therefore, optimizing the design of ordinary multipliers will help to achieve high-performance, area-efficient modular multipliers.
[0155] Several typical examples are given below to help understand the methods provided in the embodiments of this specification.
[0156] In the first example, the complete 3-term Karatsuba algorithm AB search MOD (AB mod R) process (where A0=0) is used as an example:
[0157] enter:
[0158] k=3,Mode=MOD,W=30,user-defined constraint is that the lower 10 bits of A are constant 0, that is, A0=0, assuming that the 10-bit multiplier consumes 119 LUTs and the 10-bit adder consumes 10 LUTs as the A of the specific implementation platform mul and A add .
[0159] First, the initialization phase includes:
[0160] Initialization parameters
[0161] With k = 3 and Mode = MOD, the search range is from row 0 to row 2 of the I matrix, where row 2 is an edge row. This means the search range is SR(0, 2), with edge_row = 2. Based on the user-defined constraints, the weights for A and B are calculated as follows: A0 = 0, A1 = 1, A2 = 1, B0 = 1, B1 = 1, and B2 = 1.
[0162] Initialization decomposition
[0163] Check if there is any column of all 0 in the I matrix within the search range. After checking, there is no corresponding column of all 0 in SR(0,2), so no processing is done.
[0164]
[0165] Check row by row whether it is better than the standard decomposition.
[0166] r 0 The coefficient of the term under standard decomposition: A0B0 (1 element), r 0 The coefficients of the term under the current decomposition are: (A0+A1)(B0+B1)+(A0+A2)(B0+B2)+(A2+A1)(B2+B1)-A1B1-A2B2-(A0+A1+A2)(B0+B1+B2)(6 elements). Since the number of elements required for the coefficients of the standard decomposition is smaller, the standard decomposition is used to calculate r. 0 Make a replacement.
[0167]
[0168] r 1 The coefficient of the term under standard decomposition: (A0+A1)(B0+B1)-A1B1-A0B0 (3 elements), r 1 The coefficient of the term under the current decomposition is: A2B2+(A0+A1+A2)(B0+B1+B2)-(A0+A2)(B0+B2)-(A2+A1)(B2+B1)(4 elements). Since the number of elements required for the coefficient of the standard decomposition is smaller, the standard decomposition is used to calculate r. 1 Substituting them, we get Equation (4). Observing Equation (4), we can see that the first column (corresponding to A2B2) is all 0 in SR(0, 2) and can be removed. At the same time, the third column (corresponding to (A0+A2)(B0+B2)) is all 0 in SR(0, 2) and can be removed, resulting in Equation (5). The corresponding intermediate product vector e is shown in Equation (6).
[0169]
[0170] r 2 The coefficient of the term under standard decomposition is: A1B1+(A0+A2)(B0+B2)-A2B2-A0B0 (4 elements); the coefficient of the term r2 under the current decomposition is: 2A1B1-(A0+A1)(B0+B1)-(A1+A2)(B1+B2)+(A0+A1+A2)(B0+B1+B2) (4 elements). Since the coefficients required for standard decomposition cannot reduce the number of required elements, the current r is retained. 2 Item decomposition.
[0171] According to the above process, after traversing SR(0, 2), the (E, I) matrix pair corresponding to equation (5) is used as the initial decomposition result.
[0172] An optimized Karatsuba decomposition search is then performed, which includes at least one round of search.
[0173] The first round of search (Round Level Search) includes multiple optimal step searches:
[0174] Taking equation (5) as the input of the first round of search, the elements that can be decomposed in the corresponding intermediate product e are: (A0+A1)(B0+B1), (A2+A1)(B2+B1), (A0+A1+A2)(B0+B1+B2).
[0175] The first optimal step search involves expanding multiple elements separately:
[0176] Expand (A0+A1)(B0+B1) based on the full expansion strategy:
[0177] Using A0B1 and A1B0 to replace (A0+A1)(B0+B1)-A0B0-A1B1, we get the new equation (7), and the corresponding intermediate product vector is shown in equation (8). This decomposition corresponds to Exp mul =2.5, Exp add =6, Cost=357.5.
[0178]
[0179] Expand (A2+A1)(B2+B1) based on the full expansion strategy:
[0180] Using A1B2 and A2B1 to replace (A1+A2)(B1+B2)-A2B2-A1B1, we get the new equation (9), and the corresponding intermediate product vector is shown in equation (10). This decomposition corresponds to Exp mul =4, Exp add =6, Cost=536.0.
[0181]
[0182] Expand (A0+A1+A2)(B0+B1+B2) based on the full expansion strategy:
[0183] Using A0B0+A0B1+A0B2+A1B0+A1B1+A1B2+A2B0+A2B1+A2B2 to replace (A0+A1+A2)(B0+B1+B2), we get the new equation (11), and the corresponding intermediate product vector is shown in equation (12). This decomposition corresponds to Exp mull =5, Expadd =4, Cost=635.0.
[0184]
[0185] Template-based expansion strategy expansion (A0+A1+A2)(B0+B1+B2):
[0186] Using (A1+A0)(B1+B0)+(A2+A0)(B2+B0)+(A1+A2)(B1+B2)-A0B0-A1B1-A2B2 to replace (A0+A1+A2)(B0+B1+B2), we get the new equation (13), and the corresponding intermediate product vector is shown in equation (14). This decomposition corresponds to Exp mul =3, Exp add =4, Cost=397.
[0187]
[0188] Choose the first optimal step expansion:
[0189] During the first optimal step search, it was found that the full expansion strategy of (A0+A1)(B0+B1) would yield the minimum Cost = 357.5. Therefore, equations (7) and (8) were retained as the first optimal step decomposition results, and the second optimal step search was performed based on them.
[0190] The second optimal step search involves expanding multiple elements separately:
[0191] Taking equation (7) as the input of the first round of search, the elements that can be decomposed in the corresponding intermediate product e are: (A2+A1)(B2+B1) and (A0+A1+A2)(B0+B1+B2).
[0192] Expand (A2+A1)(B2+B1) based on the full expansion strategy:
[0193] Using A1B2 and A2B1 to replace (A1+A2)(B1+B2)-A2B2-A1B1, we get the new equation (15), and the corresponding intermediate product vector is shown in equation (16). This decomposition corresponds to Exp mul =3, Exp add =4, Cost=397.0.
[0194]
[0195] Expand (A0+A1+A2)(B0+B1+B2) based on the full expansion strategy:
[0196] Using A0B0+A0B1+A0B2+A1B0+A1B1+A1B2+A2B0+A2B1+A2B2 to replace (A0+A1+A2)(B0+B1+B2), we get the new equation (17), and the corresponding intermediate product vector is shown in equation (18). This decomposition corresponds to Exp mul =4, Exp add =2, Cost=496.0.
[0197]
[0198] Expand (A0+A1+A2)(B0+B1+A2) based on the template expansion strategy:
[0199] Using (A1+A0)(B1+B0)+(A2+A0)(B2+B0)+(A1+A2)(B1+B2)-A0B0-A1B1-A2B2 to replace (A0+A1+A2)(B0+B1+B2), we get the new equation (19), and the corresponding intermediate product vector is shown in equation (20). This decomposition corresponds to Exp mul =2.5, Exp add =4, Cost=337.5.
[0200]
[0201] Select the second best step expansion:
[0202] During the second optimal step search, it was found that the template strategy expansion (A0+A1+A2)(B0+B1+B2) would obtain the minimum Cost = 337.5. Therefore, equations (19) and (20) were retained as the second optimal step decomposition results, and the third optimal step search was performed based on this.
[0203] The third best step search involves expanding multiple elements separately:
[0204] Taking equation (19) as the input of the first round of search, the elements that can be decomposed in the corresponding intermediate product e are: (A0+A1)(B0+B1) and (A0+A2)(B0+B2).
[0205] Expand (A0+A1)(B0+B1) with the full expansion strategy:
[0206] Using A1B0 and A0B1 to replace (A0+A1)(B0+B1)-a0B0-A1B1, we get the new equation (21), and the corresponding intermediate product vector is shown in equation (22). This decomposition corresponds to Exp mul =2.5, Exp add =2, Cost=317.5.
[0207]
[0208] Expand (A0+A2)(B0+B2) with the full expansion strategy:
[0209] Using A2B0 and A0B2 to replace (A0+A2)(B0+B2)-A0B0-A2B2, we get the new equation (23), and the corresponding intermediate product vector is shown in equation (24). This decomposition corresponds to Exp mul =2, Exp add =2, Cost=258.0.
[0210]
[0211] The third best move selection:
[0212] During the third optimal step search, it was found that expanding (A0+A2)(B0+B2) with the full expansion strategy would obtain the minimum Cost = 258.0. Therefore, Equation (23) and Equation (24) were retained as the third optimal step decomposition, and the fourth optimal step search was performed based on this.
[0213] The fourth best-step search involves expanding an element:
[0214] Taking equation (23) as the input of the fourth optimal step search, the elements available for decomposition in the corresponding intermediate product e are: (A0+A1)(B0+B1).
[0215] Expand (A0+A1)(B0+B1) with the full expansion strategy:
[0216] Using A1B0 and A0B1 to replace (A0+A1)(B0+B1)-A0B0-A1B1, we get the new equation (21), and the corresponding intermediate product vector is shown in equation (22). This decomposition corresponds to Exp mul =2, Exp add =0, Cost=238.0.
[0217]
[0218] The fourth best move selection:
[0219] During the fourth optimal step search, it was found that expanding (A0+A1)(B0+B1) using the full expansion strategy would yield a lower cost of 238.0 compared to the initial input of the fourth optimal step search. Therefore, Equations (25) and (26) were retained as the fourth optimal step decomposition. Since after the fourth optimal step search, there were no further elements in the intermediate product vector corresponding to the current decomposition, the optimal step search in this round was terminated.
[0220] First round output selection:
[0221] Among the optimal steps found in the first round: the first optimal step, i.e., full expansion (A0+A1)(B0+B1), cost = 357.5; the second optimal step, i.e., expansion based on the template strategy (A0+A1+A2)(B0+B1+B2), cost = 337.5; the third optimal step, i.e., full expansion (A0+A2)(B0+B2), cost = 258.0; the fourth optimal step, i.e., full expansion (A0+A1)(B0+B1), cost = 238.0. Among them, the smallest cost is the fourth optimal step, i.e., full expansion (A0+A1)(B0+B1). Therefore, as the output of the first round, the corresponding (E, I) decomposition matrix and intermediate product vector e are retained, see equations (25) and (26).
[0222] Second round of search (Round Level Search):
[0223] Since the input of the second round of search is equation (25), there are no elements of the intermediate product vector that can be decomposed. Therefore, the optimal step search link is not performed in this round, and the input of this round is used as the output of this round.
[0224] Algorithm top level:
[0225] The algorithm found the optimal decomposition result in the first round of search, as shown in Equations (25) and (26), and the search results achieved a lower cost compared to the initial decomposition. Therefore, the first round search results were used as the input for the second round of search. However, there were no intermediate product elements that could be further expanded in the second round of search. The second round search input was used as the output. Considering that the cost of the second round search results was equal to that of the first round search results, the round-level search was terminated, and the first round search results were used as the overall output of the algorithm.
[0226] Considering that the algorithm output is the Karatsuba MOD scene, the user needs to manually clear the unused rows in the I matrix, which is r in this example. 3 、r 4 The corresponding rows, so the final search result of the algorithm is shown in equation (27). Referring to equation (26), A0B0, A0B1, and A0B2 do not need multiplication because the calculation weight of A0 is 0; A1B0 requires a full multiplication; A2B0 and A1B1 each require a lower half multiplication.
[0227]
[0228] The second example uses the complete 4-term Karatsuba algorithm AB search MOD (ABmodR) process as an example to demonstrate the impact of user-defined constraints on search results, where the calculated weights A0 = 0.75 and B0 = 0.625.
[0229] The input to the search algorithm is as follows:
[0230]
[0231] Mode = MOD, W = 32, k = 4, user-defined constraints are A0 = 0.75, B0 = 0.625, and the calculation weights of the remaining words are all 1, that is, there are 2 bits in A fixed to 0, and there are 3 bits in B fixed to 0. Assume that the 8-bit multiplier consumes 71 LUTs and the 8-bit adder consumes 8 LUTs as the specific implementation platform A mul and A add .
[0232] The optimized Karatsuba decomposition after the search algorithm is searched is as follows:
[0233]
[0234] In this example, considering A0=0.75 and B0=0.625, the computational cost of calculating A0B1 and A1B0 is 0.75+0.625=1.375 multiplications, which is greater than the computational cost of (A0-A1)(-B0+B1) (1 multiplication and 2 additions). Therefore, (A0-A1)(-B0+B1) is still maintained in the optimized decomposition result and is not further expanded. On the contrary, if The complete A2B2 needs to be introduced, and the computational overhead of the (A0-A2)(-B0+B2) solution (2 multiplications and 2 additions) is greater than the computational overhead of A0B2+A2B0, which is 0.75+0.625=1.375 multiplications.
[0235] It should be noted that since this example is about searching for AB mod R, the I matrix after the search only uses rows 0 to 3 (i.e., r 0 to r 3 Item corresponding row), that is
[0236] The third example uses the complete 4-term Karatsuba algorithm AB search MOD (AB mod R) process as an example to demonstrate the impact of user-defined constraints on search results, where A1=0 and B1=0.
[0237] The search algorithm input is the same as Equation (28), Mode = MOD, W = 32, k = 4, and the user-defined constraints are A1 = 0, B1 = 0. The calculation weights of the remaining words are all 1, that is, A[15:8] is fixed to 0, B[15:8] is fixed to 0. Assume that the 8-bit multiplier consumes 71 LUTs and the 8-bit adder consumes 8 LUTs as the A of the specific implementation platform. mul and A add .
[0238] The optimized Karatsuba decomposition after the search algorithm is searched is as follows:
[0239]
[0240] In this case, Using the (A0-A2)(-B0+B2) scheme introduces a full multiplication of A2B2, resulting in a computational cost of two multiplications and two additions for calculating A0B2+A2B0. Directly calculating A0B2+A2B0 consumes two multiplications and one addition, resulting in a lower cost. To maximize the advantage of A1=0 and B1=0, the search algorithm generates a large number of product terms related to A1 and B1 to reduce the multiplication cost.
[0241] It should be noted that since this example is about searching for AB mod R, the I matrix after the search only uses rows 0 to 3 (i.e., r 0 to r 3 Item corresponding row), that is
[0242] The fourth example uses the full 4-term Karatsuba algorithm AB search The process is used as an example to show the impact of user-defined constraints on search results, where A1=0.
[0243] The search algorithm input is the same as Equation (28), Mode = DIV, W = 32, k = 4, and the user-defined constraint is A1 = 0, that is, A[15:8] is fixed to 0, and the calculation weights of the remaining words are all 1. Assume that the 8-bit multiplier consumes 71 LUTs and the 8-bit adder consumes 8 LUTs as the A of the specific implementation platform. mul and A add .
[0244] The optimized Karatsuba decomposition after the search algorithm is searched is as follows:
[0245]
[0246] Due to r 3The corresponding row is an edge row in the search, so the overhead of A3B0 and A0B3 is multiplied by a factor of 0.5. If the 2-term Karatsuba algorithm is used, A3B0 + A0B3 = (A0 + A3)(B0 + B3) - A3B3 - A0B0. In this case, the additional calculation of A0B0 will offset the multiplication saved by reusing A3B3. Overall, two additions will be added, so it is better to directly calculate A3B0 + A0B3. Similarly, the appearance of A1B1 can be avoided, and A1B3 and A1B2 can further reduce the computational overhead by leveraging the properties of multiplication operations.
[0247] It should be noted that since this example is a search In the case of , the I matrix after the search only uses the 3rd to 6th rows (i.e., r 3 to r 6 Item corresponding row), that is
[0248] The fifth example uses the full 4-term Karatsuba algorithm AB search The process is used as an example to demonstrate the impact of user-defined constraints on search results and the search algorithm proposed in this project allows users to set the search range to support customized nonlinear multiplication operation types, where A1=0.
[0249] The search algorithm input is the same as Equation (28), Mode = MANUAL, W = 32, k = 4, the user-defined constraint is A1 = 0, and the calculation weights of the remaining words are all 1, that is, A[15:8] is fixed to 0. The search range is set to rows 2 to 6 of the I matrix, and the edge row is the second row, that is, the nonlinear multiplication operation type searched is Assume that 8-bit multiplier consumes 71 LUTs and 8-bit adder consumes 8 LUTs as the specific implementation platform A mul and A add .
[0250] The optimized Karatsuba decomposition after the search algorithm is searched is as follows:
[0251]
[0252]
[0253] In this example, the algorithm searches And the calculation weight of A1 is 0, so the search algorithm is more inclined to generate A1B3 and A1B2 rather than and Since the calculated weights of A0 and B0 are 1, the search algorithm retains and Although the introduction of less than r2 A0B0, from the overall point of view will save 1 multiplication. Therefore, no 1 Related items, such as Or A1B0 and A0B1.
[0254] It should be noted that since this example is a search In the case of , the I matrix after the search only uses the 2nd to 6th rows (i.e., r 2 to r 6 Item corresponding row), that is
[0255] According to another embodiment, a device for optimizing configuration parameters of a multiplication device is also provided. The device is used to execute the method provided in the embodiment of this specification. Figure 15 FIG. 1 is a schematic block diagram showing an apparatus for optimizing configuration parameters of a multiplication device according to an embodiment. Figure 15 As shown, the apparatus 1500 includes:
[0256] An acquisition unit 1501 is configured to acquire a first estimate matrix, a second estimate matrix, an interpolation matrix, and an input parameter set corresponding to a target multiplication operation; the first estimate matrix and the second estimate matrix are respectively used to control the decomposition and combination of the multiplier and the multiplicand under the Karatsuba algorithm decomposition into k segments, and the two together determine the generation of an intermediate product vector; the interpolation matrix is used to restore the multiplication result from the intermediate product vector; the input parameter set includes at least a mode parameter of the target multiplication operation; the mode parameter is used to define the multiplication type;
[0257] A determining unit 1502 is configured to determine a row range of a plurality of rows for optimizing the interpolation matrix according to the mode parameters acquired by the acquiring unit 1501;
[0258] The processing unit 1503 is used to optimize the matrix elements within the row range obtained by the determination unit 1502 with the goal of reducing the overhead for the interpolation matrix obtained by the acquisition unit 1501, obtain an optimized interpolation matrix, and update the first valuation matrix and the second valuation matrix accordingly, wherein the overhead includes the area overhead of the multiplication device that implements the target multiplication operation; the optimized interpolation matrix, the updated first valuation matrix, and the second valuation matrix are used as configuration parameters of the multiplication device.
[0259] Optionally, as an embodiment, the intermediate product vector is obtained by dot multiplication of the first intermediate vector and the second intermediate vector; the first intermediate vector is obtained by operation of the first estimation matrix and the first vector; the first vector is composed of the multiplier decomposed into k segments of equal length; the second intermediate vector is obtained by operation of the second estimation matrix and the second vector; the second vector is composed of the multiplicand decomposed into k segments of equal length; the multiplication result is obtained by multiplying each row of the result column vector by the corresponding bit weight; the result column vector is obtained by multiplying the interpolation matrix by the intermediate product vector.
[0260] Optionally, as an embodiment, the determining unit 1502 is specifically configured to:
[0261] If the multiplication type defined by the mode parameter is modular multiplication, determining the row range to be row 0 to row k-1;
[0262] If the multiplication type defined by the mode parameter is integer multiplication, determining the row range to be row k-1 to row 2k-2;
[0263] If the multiplication type defined by the mode parameter is ordinary multiplication, determining the row range to be row 0 to row 2k-2;
[0264] If the multiplication type defined by the mode parameter is user-defined multiplication, the row range is determined to be a range set by the user.
[0265] Optionally, as an embodiment, the area overhead includes a multiplier area and an adder area, the multiplier area being the multiplication overhead of generating all elements of the intermediate product vector multiplied by the area of a single multiplier, and the adder area being the addition and subtraction overhead of generating all elements of the intermediate product vector multiplied by the area of a single adder.
[0266] Furthermore, the multiplication overhead of any element in the intermediate product vector is the product of the number of multiplications required to generate the element and the multiplication factor, wherein the number of multiplications is determined based on the calculation weight of the fragment involved in the element, and the calculation weight of the fragment is determined based on the number of bits determined to be 0 in the fragment and the length of the fragment; the multiplication factor is determined based on whether the element is used within the row range and whether it is used only in the edge row.
[0267] Furthermore, the input parameter set includes calculation weights of several segments of the multiplier and / or the multiplicand.
[0268] Optionally, as an embodiment, the processing unit 1503 includes:
[0269] a checking subunit, configured to check, for the current interpolation matrix, whether there is a target column with all zeros within the row range, and if so, delete the target column to update the interpolation matrix;
[0270] The deleting subunit is configured to delete the target row corresponding to the target column in the first estimation matrix and the second estimation matrix.
[0271] Furthermore, the processing unit 1503 further includes:
[0272] The comparison subunit is used to compare any row within the row range of the current interpolation matrix with the standard decomposition corresponding to the row; if the number of non-zero elements in a row is greater than the number of non-zero elements in its corresponding standard decomposition, the row in the current interpolation matrix is replaced with the corresponding standard decomposition to update the interpolation matrix.
[0273] Furthermore, the standard decomposition corresponding to the row is obtained as follows:
[0274] Get each basic product term corresponding to the i-th row, where the sum of the index of the fragment split by the multiplier and the index of the fragment split by the multiplicand in each basic product term is i;
[0275] Merge any two basis product terms whose indices are symmetric to obtain the standard decomposition corresponding to the i-th row.
[0276] Optionally, as an embodiment, the processing unit 1503 includes:
[0277] A search subunit is configured to perform at least one round-level search, wherein each round-level search performs an optimal step search process based on the result of the previous round; the optimal step search process is configured to find a decomposition method for elements in the intermediate product vector according to the cost;
[0278] The iterative subunit is used to accept the results of this round and continue iterating based on them if the cost of the search results of this round is less than the cost of the results of the previous round, or if the cost of the search results of this round is greater than the cost of the results of the previous round and the preset round has not been reached; otherwise, the search is terminated and the search results of the previous round are output as the search results.
[0279] Furthermore, the round-level search includes multiple optimal step search processes, and each optimal step search process searches for decomposition methods of other elements based on the result of the previous optimal step until there are no decomposable elements, and stops when the minimum cost of all optimal steps in this round and the corresponding first valuation matrix, second valuation matrix, interpolation matrix, and intermediate product vector are used as the output results of this round.
[0280] Furthermore, the search process for a single optimal step includes:
[0281] For each expandable element in the intermediate product vector, expansion is performed under multiple expansion methods, and the element expansion method that reduces the cost the most or increases the cost the least after expansion is determined as the optimal step.
[0282] Furthermore, the multiple expansion modes include: a full expansion mode and a template-based expansion mode.
[0283] Through the device provided in the embodiments of this specification, the Karatsuba decomposition strategy is represented by an evaluation matrix and an interpolation matrix. On the basis of a known better Karatsuba decomposition strategy, a better Karatsuba decomposition strategy is sought. The optimization process is based on the multiplication type obtained by unit 1501. The determination unit 1502 first determines the row range of several rows for optimizing the interpolation matrix. Then, the processing unit 1503 optimizes each matrix element within the row range for the interpolation matrix with the goal of reducing overhead to obtain an optimized interpolation matrix, and updates the first evaluation matrix and the second evaluation matrix accordingly. That is to say, for certain multiplication types, the range of optimization of the interpolation matrix can be narrowed, and the optimization time can be shortened accordingly. The Karatsuba decomposition strategy corresponds to the configuration parameters of the multiplication device, and accordingly, the time spent on optimizing the configuration parameters of the multiplication device can be shortened.
[0284] According to another embodiment, there is also provided a computer readable storage medium having a computer program stored thereon, which, when executed in a computer, causes the computer to execute a combination of Figure 5 、 6 , 8, 10, 12 to 14.
[0285] According to another embodiment, a computing device is provided, including a memory and a processor, wherein the memory stores executable code, and when the processor executes the executable code, the system realizes the combination of Figure 5 、 6 , 8, 10, 12 to 14.
[0286] Those skilled in the art will appreciate that, in one or more of the above examples, the functions described herein may be implemented using hardware, software, firmware, or any combination thereof. When implemented using software, these functions may be stored in a computer-readable medium or transmitted as one or more instructions or codes on a computer-readable medium.
[0287] The specific implementation methods described above further illustrate the objectives, technical solutions and beneficial effects of the present invention in detail. It should be understood that the above description is only a specific implementation method of the present invention and is not intended to limit the scope of protection of the present invention. Any modifications, equivalent replacements, improvements, etc. made on the basis of the technical solution of the present invention should be included in the scope of protection of the present invention.
Claims
1. A method for optimizing configuration parameters of a multiplication device, comprising: Obtaining a first estimation matrix, a second estimation matrix, an interpolation matrix, and an input parameter set corresponding to a target multiplication operation; The first estimate matrix and the second estimate matrix are respectively used to control the decomposition and combination of the multiplier and the multiplicand under the Karatsuba algorithm decomposing the multiplier and the multiplicand into k segments, and the two together determine the generation of the intermediate product vector. The interpolation matrix is used to restore the multiplication result from the intermediate product vector. The input parameter set includes at least a mode parameter of the target multiplication operation; the mode parameter is used to define the multiplication type. Determining, according to the mode parameters, a row range of a plurality of rows for optimizing the interpolation matrix; For the interpolation matrix, with the goal of reducing overhead, each matrix element within the row range is optimized to obtain an optimized interpolation matrix, and the first valuation matrix and the second valuation matrix are updated accordingly, wherein the overhead includes the area overhead of the multiplication device that implements the target multiplication operation; the optimized interpolation matrix, the updated first valuation matrix and the second valuation matrix are used as configuration parameters of the multiplication device.
2. The method according to claim 1, wherein The intermediate product vector is obtained by dot multiplication of the first intermediate vector and the second intermediate vector; the first intermediate vector is obtained by operation of the first estimation matrix and the first vector; the first vector is composed of the multiplier decomposed into k segments of equal length; the second intermediate vector is obtained by operation of the second estimation matrix and the second vector; the second vector is composed of the multiplicand decomposed into k segments of equal length; the multiplication result is obtained by multiplying each row of the result column vector by the corresponding bit weight; the result column vector is obtained by multiplying the interpolation matrix by the intermediate product vector.
3. The method according to claim 1, wherein The step of determining, according to the mode parameter, a row range of a plurality of rows for optimizing the interpolation matrix comprises: If the multiplication type defined by the mode parameter is modular multiplication, determining the row range to be row 0 to row k-1; If the multiplication type defined by the mode parameter is integer multiplication, determining the row range to be row k-1 to row 2k-2; If the multiplication type defined by the mode parameter is ordinary multiplication, determining the row range to be row 0 to row 2k-2; If the multiplication type defined by the mode parameter is user-defined multiplication, the row range is determined to be a range set by the user.
4. The method according to claim 1, wherein The area overhead includes a multiplier area and an adder area, wherein the multiplier area is the multiplication overhead of generating all elements of the intermediate product vector multiplied by the area of a single multiplier, and the adder area is the addition and subtraction overhead of generating all elements of the intermediate product vector multiplied by the area of a single adder.
5. The method according to claim 4, wherein: The multiplication overhead of any element in the intermediate product vector is the product of the number of multiplications required to generate the element and the multiplication factor, where the number of multiplications is determined based on the calculation weight of the fragment involved in the element, and the calculation weight of the fragment is determined based on the number of bits determined to be 0 in the fragment and the length of the fragment; the multiplication factor is determined based on whether the element is used within the row range and whether it is used only in the edge rows.
6. The method according to claim 5, wherein: The input parameter set includes calculation weights of several segments of the multiplier and / or the multiplicand.
7. The method of claim 1, wherein: The optimization process includes: For the current interpolation matrix, check whether there is a target column with all zeros in the row range; if so, delete the target column to update the interpolation matrix; The corresponding updating of the first valuation matrix and the second valuation matrix includes: Delete the target row corresponding to the target column in the first estimation matrix and the second estimation matrix.
8. The method of claim 7, wherein: The optimization process further includes: For the current interpolation matrix, any row within the row range is compared with the standard decomposition corresponding to the row. If the number of non-zero elements in a row is greater than the number of non-zero elements in its corresponding standard decomposition, the row in the current interpolation matrix is replaced with the corresponding standard decomposition to update the interpolation matrix.
9. The method of claim 8, wherein: The standard decomposition corresponding to the row is obtained as follows: Get each basic product term corresponding to the i-th row, where the sum of the index of the fragment split by the multiplier and the index of the fragment split by the multiplicand in each basic product term is i; Merge any two basis product terms whose indices are symmetric to obtain the standard decomposition corresponding to the i-th row.
10. The method of claim 1, wherein: The optimization process includes: Performing at least one round of search, each round of search performing an optimal step search process based on the results of the previous round; the optimal step search process is used to find a decomposition method for elements in the intermediate product vector according to the cost; If the cost of the search results of this round is less than the cost of the results of the previous round, or if the cost of the search results of this round is greater than the cost of the results of the previous round and the preset round has not been reached, then accept the results of this round and continue to iterate based on them; otherwise, terminate the search and use the search results of the previous round as the output search results.
11. The method according to claim 10, wherein: The round-level search includes multiple optimal step search processes. Each optimal step search process searches for decomposition methods of other elements based on the results of the previous optimal step until there are no decomposable elements. The minimum cost of all optimal steps in this round and the corresponding first valuation matrix, second valuation matrix, interpolation matrix, and intermediate product vector are used as the output results of this round.
12. The method of claim 11, wherein: The search process for a single optimal step includes: For each expandable element in the intermediate product vector, expansion is performed under multiple expansion methods, and the element expansion method that reduces the cost the most or increases the cost the least after expansion is determined as the optimal step.
13. The method of claim 12, wherein: The multiple expansion modes include: a full expansion mode and a template-based expansion mode.
14. A device for optimizing configuration parameters of a multiplication device, comprising: An acquisition unit, configured to acquire a first estimation matrix, a second estimation matrix, an interpolation matrix, and an input parameter set corresponding to a target multiplication operation; The first estimate matrix and the second estimate matrix are respectively used to control the decomposition and combination of the multiplier and the multiplicand under the Karatsuba algorithm decomposing the multiplier and the multiplicand into k segments, and the two together determine the generation of the intermediate product vector. The interpolation matrix is used to restore the multiplication result from the intermediate product vector. The input parameter set includes at least a mode parameter of the target multiplication operation; the mode parameter is used to define the multiplication type. a determining unit, configured to determine a row range of a plurality of rows for optimizing the interpolation matrix according to the mode parameters acquired by the acquiring unit; A processing unit is configured to optimize the interpolation matrix obtained by the acquisition unit, with the goal of reducing overhead, the matrix elements within the row range obtained by the determination unit, obtain an optimized interpolation matrix, and correspondingly update a first valuation matrix and a second valuation matrix, wherein the overhead includes an area overhead of a multiplication device that implements the target multiplication operation; the optimized interpolation matrix, the updated first valuation matrix, and the second valuation matrix are used as configuration parameters of the multiplication device.
15. A computer-readable storage medium having a computer program stored thereon, which, when executed in a computer, causes the computer to execute the method according to any one of claims 1 to 13.
16. A computing device comprising a memory and a processor, wherein the memory stores executable code, and when the processor executes the executable code, the method according to any one of claims 1 to 13 is implemented.