A 16-bit off-chip one-time programmable circuit

Abstract

The application relates to a 16Bit off-chip one-time programmable circuit, which belongs to the technical field of programming circuits and comprises basic storage units, a clock module, a pulse generator module, a counter module, a latch module, a code decoder module, a shutdown delay module and a switch module. Under the joint action of the related modules, the electromigration resistance change memory is easy to realize due to the resistor device, the mask plate manufacturing cost is reduced, the current for causing the electromigration of the resistor is smaller than the current for fusing the FUSE resistor, the metal splashing does not affect the safety of the surrounding circuit, the area required by the electromigration resistance change memory is small, the chip flow cost is reduced, the comparator can detect the slight change of the resistance value, the fault tolerance rate of data writing is increased to a certain extent, data can be written after the whole is packaged into a chip, and the calibration of the parameters of the chip in the actual use environment is facilitated.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of storage circuit, in particular to a 16Bit off-chip one-time programmable circuit. BACKGROUND

[0002] One-time programmable memory device belongs to non-volatile memory (NVM, Non-Volatile Memory), and its programming process is irreversible. Because its cost is lower than that of multiple-time programmable device, it is suitable for use in electronic products with low cost and fixed program, such as power management chips. Specifically, the power management chip is mainly composed of analog circuits, and due to the influence of process manufacturing errors, the chip returned from the virtual chip to the actual physical chip often needs to be calibrated. By adding a storage module and a register module in the chip, the determined value is written to the chip (non-volatile memory) after debugging, and the value of the storage module is loaded into the register after the chip is powered on, and the analog circuit parameters are calibrated. The characteristics of non-volatile memory are that the stored data will not disappear due to power off. Traditional one-time programmable memory devices include FUSE (using fuse to store information), Schottky diode (using thermal breakdown to store information), and floating gate transistor (using floating gate to store information).

[0003] The existing memory devices (one-time programmable memory devices) based on Schottky diode or crystal floating gate need special semiconductor process support. In addition, new layout levels are introduced, and more levels of mask plates are required for subsequent wafer factories, increasing the production cost of chip tape-out. In addition, the FUSE resistance-based memory needs to be applied with voltage through a probe before chip packaging to melt the FUSE resistance (bare die, which means a semiconductor manufacturing unit cut from a wafer without packaging). In this process, FUSE metal splashes may affect the safety of the surrounding circuit, and incomplete melting of the FUSE resistance may affect the accuracy of data writing. SUMMARY

[0004] In order to overcome the disadvantages of the existing traditional one-time programmable memory devices due to technical limitations, the present application provides a 16Bit off-chip one-time programmable circuit prepared under the joint action of related modules, which contains a resistor device, and the electromigration resistance change memory is easy to implement. In the chip preparation process, the mask plate manufacturing cost is reduced, the current required for the resistance to produce electromigration is small, and the metal splashing does not affect the safety of the surrounding circuit, which can reduce the tape-out cost. The comparator is used to judge the resistance change of the resistance change memory, which increases the fault tolerance rate of data writing to a certain extent, and the data can be written after chip packaging, which is convenient for parameter calibration of the chip in the actual use environment.

[0005] The technical scheme adopted by the present application to solve its technical problems is:

[0006] A 16Bit off-chip one-time programmable circuit, characterized in that it comprises a basic storage unit, a clock module, a pulse generator module, a counter module, a latch module, a decoder module, a shutdown delay module and a switch module connected electrically; the switch module and the counter module each have multiple paths, one end of the first path switch module is connected with the first path signal interaction end of the first path counter module, the second path signal interaction end of the first path counter module is connected with the first path signal interaction end of the shutdown delay module; the other end of the first path switch module is connected with the clock module signal interaction end and one end of the second path switch module, when the decoder module is working, in the write mode, the first path signal interaction end of the decoder module is connected with one end of the first path switch module, the input of the decoder module is switched to the external write clock signal, in the read mode, the first path signal interaction end of the decoder module is connected with the other end of the first path switch module, the input of the decoder module is switched to the internal write clock; the other end of the second path switch module is connected with the first path signal interaction end of the pulse generator module, the second path signal interaction end of the pulse generator module is connected with the first path signal interaction end of the second path counter module and the first path signal interaction end of the latch module, the second path signal interaction end of the latch module is connected with the first path signal interaction end and the second path signal interaction end of the basic storage unit and the second path signal interaction end of the decoder module, the third path signal interaction end of the decoder module is connected with the third path signal interaction end of the basic storage unit; the basic storage unit is composed of a PMOS transistor, a resistor, a comparator chip and a switch connected electrically, and the PMOS transistor, the resistor and the comparator chip jointly constitute a basic storage unit, i.e. an OTP circuit; in the basic storage unit, the PMOS transistor generates two paths of equal size current, i.e. a PMOS current mirror, converts the resistance values of the two resistors into voltages for comparison by the comparator chip; the first resistor serves as a reference resistor, the resistance value of the first resistor is greater than that of the second resistor, and the second resistor serves as an object of electromigration current application; when the second resistor does not undergo electromigration, the resistance value of the first resistor is greater than that of the second resistor, the comparator outputs a low level, i.e. the memory stores "0"; when the second resistor undergoes electromigration and its resistance value is greater than that of the first resistor, the comparator outputs a high level, i.e. the memory stores "1".

[0007] Further, the basic storage unit is composed of a PMOS transistor, a resistor, a comparator chip and a switch connected electrically, and the PMOS transistor and the resistor jointly constitute a basic storage unit, i.e. an OTP circuit.

[0008] Further, in the basic storage unit, the PMOS tube generates two-way equal size current, i.e. PMOS current mirror, and converts the resistance values of the two resistors into voltage for comparison by the comparator COMP; the first resistor is used as a reference resistor and has a resistance value greater than that of the second resistor, and the second resistor is used as an electromigration current application object; when the second resistor does not undergo electromigration, the resistance value of the first resistor is greater than that of the second resistor, the comparator outputs low level, and the memory stores "0"; when the second resistor undergoes electromigration and its resistance value is greater than that of the first resistor, the comparator outputs high level, and the memory stores "1".

[0009] Further, in the basic storage unit, the first switch is controlled by the comparator chip pin Din, and when the first switch is closed, "1" is written; the second switch is controlled by the external write clock of the comparator chip, and when the second switch is closed, the storage unit enters the write mode; the third switch is controlled by the internal read clock of the comparator chip, and when the third switch is closed, the storage unit enters the read mode; the basic storage unit reserves the pin Din to control the electromigration current, thereby obtaining a 1bit storage unit that can be written outside the chip and is programmable once; specifically, to realize the writing and reading of multiple data, the storage unit needs a set of serial write and read circuit modules, and a 16-bit programmable circuit based on the previous electromigration resistance change memory is obtained.

[0010] Further, the signal interaction end of the first counter module and the shutdown delay module is the EN enable pin, and the ENB signal obtained through the shutdown delay is used for enabling other circuits of the chip, and the EN signal is guided by the pulse counter to enter the write mode of the OTP circuit.

[0011] Further, when the codec module works, in the write mode, the input of the codec module is switched to the external write clock signal, the codec module outputs 16-bit writable signals in turn to make the corresponding storage unit enter the write mode, the external data write pin of the storage unit can control the gate voltage of the corresponding switch tube MOS, thereby controlling the access of the electromigration current, and finally controlling whether the corresponding resistor produces the electromigration effect.

[0012] Further, the codec module works in the read mode, the codec module input switches to the internal write clock, the codec module outputs 16-bit readable signals in sequence, the comparator judges 16 resistors in sequence, if the resistance migration occurs, the resistance value becomes larger, the comparator outputs high level, if the resistance value does not change, the comparator outputs low level, at the same time, the rising edge of the read clock passes through the pulse generator module to obtain the narrow pulse Latch signal with the pulse width of 1us, the 1us high level of Latch is used for the comparator module to read, the falling edge of the narrow pulse is used for the latch module to latch, the latch module latches the output result of the comparator, and the output signal Dout of the latch module is the 16bit output signal of the OTP memory.

[0013] Further, the second path counter module works in the read mode, the second path counter module counts the latch module latch signal Latch, after 16 reading periods, the second path counter module outputs the sleep mode to become high level, turns off all modules in the OTP circuit, reduces the static current of the OTP circuit, and the OTP circuit enters the sleep mode to reduce the circuit power consumption.

[0014] Compared with the prior art, the application has the beneficial effects that: under the joint action of the related modules, the finished product prepared by the application contains resistor devices in the semiconductor process, in addition, since the resistance is a commonly used device in the circuit, the electromigration resistance change memory is easy to realize, and the overall circuit does not introduce new layout levels when preparing a chip, thereby reducing the mask manufacturing cost, the current for causing the resistance to produce electromigration is smaller than the current for fusing the FUSE resistance, so that the metal splashing does not affect the safety of the surrounding circuit, a larger safety space does not need to be left for the resistance on the layout, the electromigration resistance change memory requires a small area, and the wafer production cost can be reduced; in addition, the comparator can detect the slight change of the resistance value, the fault tolerance rate of data writing is increased to a certain extent, data can be written after the overall encapsulation into a chip, and the parameter calibration of the chip in the actual use environment is facilitated. Therefore, the application has good application prospect. BRIEF DESCRIPTION OF DRAWINGS

[0015] The application will be further described below in combination with the drawings and examples.

[0016] Figure 1 It is a basic storage unit (electromigration resistance change memory) structure schematic diagram of the application.

[0017] Figure 2 It is an OTP circuit structure block diagram and working principle schematic diagram of the application.

[0018] Figure 3 It is an OTP circuit timing diagram of the application.

[0019] Figure 4 is a resistive electromigration effect diagram. DETAILED DESCRIPTION

[0020] Figure 1 、 2 , as shown in 3, a 16Bit off-chip one-time programmable circuit, characterized in that, comprising electrically connected basic storage unit, clock module, pulse generator module, counter module, latch module, decoder module, shutdown delay module, switch module; the switch module, the counter module has multiple ways respectively, the first way switch module and the first way counter module first way signal interaction end connection, the second way signal interaction end of the first way counter module and the first way signal interaction end of shutdown delay module are connected; the other end of the first way switch module and the clock module signal interaction end, the first way switch module of the second way switch module is connected, the decoder module works, in the write mode, the first way signal interaction end of the decoder module and the first way switch module are connected, the input of the decoder module is switched to the external write clock signal, in the read mode, the first way signal interaction end of the decoder module and the other end of the first way switch module are connected, the input of the decoder module is switched to the internal write clock itself; the other end of the second way switch module and the first way signal interaction end of the pulse generator module are connected, the second way signal interaction end of the pulse generator module and the first way signal interaction end of the second way counter module, the first way signal interaction end of the latch module are connected, the second way signal interaction end of the latch module and the first way signal interaction end and the second way signal interaction end of the basic storage unit, the second way signal interaction end of the decoder module are connected, the third way signal interaction end of the decoder module and the third way signal interaction end of the basic storage unit are connected; the basic storage unit is composed of electrically connected PMOS tube and resistance and comparator chip, switch, PMOS tube and resistance and comparator chip, switch together constitute a basic storage unit, namely OTP circuit; in the basic storage unit, PMOS tube generates two equal size currents, namely PMOS current mirror, the resistance values of the two resistors are converted into voltages for comparison by the comparator chip; the resistance value of the first resistor is greater than that of the second resistor, and the second resistor is used as the object of electromigration current; when the second resistor does not occur electromigration, the resistance value of the first resistor is greater than that of the second resistor, the comparator output low level, that is, the memory stores "0"; when the second resistor occurs electromigration, its resistance value is greater than that of the first resistor, the comparator output high level, that is, the memory stores "1".

[0021] Figure 1As shown, in the application, the basic storage unit is composed of PMOS tubes M0, M1, M2 connected by electrically conductive wires, resistors R1 and R2, a comparator chip, switches S1, S2 and S3, the PMOS tubes M1 and M2 and the resistors R1 and R2 and the comparator chip together constitute a basic storage unit, i.e. an OTP circuit (single OTP circuit), the 16-bit OTP circuit introduced below is composed of 16 basic storage units and is an expansion circuit of the basic storage unit, mainly solving the problems of serial writing, parallel output and circuit timing. Specifically, the functions of the PMOS tubes M1 and M2 are to generate two equal-sized currents (PMOS current mirror), to convert the resistance values of the resistors R1 and R2 into voltages for comparison by the comparator; the resistor R1 is a reference resistor with a resistance value slightly larger than that of the resistor R2, and the resistor R2 is the object of the electromigration current I_EM; when the resistor R2 does not undergo electromigration, the resistance of the resistor R1 is slightly larger than that of the resistor R2, the comparator COMP outputs a low level, i.e. the memory stores “0”; when the resistor R2 undergoes electromigration and its resistance value is greater than that of the resistor R1, the comparator COMP outputs a high level, i.e. the memory stores “1”; the switch S1 is controlled by the pin Din, and when the switch S1 is closed, “1” is written, and when the switch S1 is open, “0” is written; the switch S2 is controlled by the external write clock, and when the switch S2 is closed, the memory enters the write mode; the switch S3 is controlled by the internal read clock of the chip, and when the switch S3 is closed, the memory reads the mode. The specific principle of the application is to use the electromigration effect of the resistor to make the memory, Figure 1 The basic storage unit uses a larger current I_EM to make the resistor R2 produce the electromigration effect, the resistance value of R2 becomes larger after electromigration, M1 and M2 are equal-sized current sources that convert the resistance information into voltage information for the comparator COMP to determine the resistance value; the comparator is used to determine the size of the resistor R2 and the reference resistor R1 to obtain information about whether electromigration occurs, and electromigration is recorded as “1” and no electromigration is recorded as “0”; the chip can reserve the pin Din to control the electromigration current, thereby obtaining a 1-bit storage unit that can be programmed once outside the chip.

[0022] Figure 1 、 2 As shown, the 1-bit storage unit of the application needs a set of serial writing and reading circuit to realize the writing and reading of multiple data, and the following introduces a 16-bit one-time programmable circuit based on the electromigration resistance change memory described above, which is referred to as OTP circuit hereinafter. Figure 2 In the application, the EN signal (output by the peripheral circuit) is the enable pin (output by the peripheral circuit) of the counter module and the shutdown delay module of the chip, when the input is high level, the ENB signal output by the shutdown delay module immediately becomes high level, the chip (the OTP circuit) Figure 2The overall circuit structure begins operation; when the input is low, after passing through the shutdown delay module, ENB becomes low, and the chip stops working; when EN inputs a continuous pulse signal, and the low-level time of the pulse signal does not exceed the shutdown delay, the counter counts the pulses. When the counter counts to 7 pulses, the counter output Wmode signal becomes high, and the OTP circuit enters write mode. After the shutdown delay, the ENB signal is obtained and used to enable other circuits of the chip. The EN signal guides the OTP circuit into write mode through the pulse counter. In write mode, the encoder / decoder module input switches to the write clock CK_W signal (output by the peripheral circuit). The encoder / decoder module sequentially outputs 16-bit writable signals W<0:15> to make the corresponding memory cell enter write mode. Din is the external data write pin of the chip (basic memory cell), which controls the gate voltage of the Switch MOS transistor, thereby controlling the access of the electromigration current I_EM, and finally controlling whether the corresponding resistor RES_EM produces an electromigration effect. In read mode, the encoder / decoder module input switches to the internal write clock, and the encoder / decoder module sequentially outputs 16-bit readable signals R<0:15>. The comparator sequentially checks the 16 resistors RES_EM. If the resistor undergoes electromigration, its resistance increases, and the comparator module outputs a high level; if the resistance remains unchanged, the comparator outputs a low level. Simultaneously, the rising edge of the read clock passes through the pulse generator module to obtain a narrow pulse latch signal with a pulse width of 1µs. The 1µs period during which the latch is high is used by the comparator module to read the data, and the falling edge of the narrow pulse is used by the latch module to latch the data. The latch module latches the output of the comparator, and the output Dout<0:15> of the latch module is the 16-bit data of the OTP memory. Figure 2 (Overall circuit configuration) Output signal. In read mode, the counter module counts the latch signal. After 16 read cycles, the counter module outputs "Sleep mode" to a high level, shutting down all modules in the OTP circuit, reducing the quiescent current of the OTP circuit, and the OTP circuit enters sleep mode to reduce circuit power consumption.

[0023] Figure 3 Operating sequence and mode of OTP circuit: Detailed Figure 3 It is an OTP circuit ( Figure 2 Overall circuit configuration) using timing diagrams, OTP circuit ( Figure 2 The overall circuit structure has three operating modes: write mode (the external pins of the OTP circuit are only EN, CK_W, and Din; for internal wiring details, please refer to the updated circuit block diagram). Figure 3, wherein the same line name is physically connected together, R<0:15> represents 16 wires (R<0>, R<1>...R<15>) such as R<0> and the control signal R<0> on the switch are connected together) The EN pin is continuously pulsed for 7 times to make the circuit enter the write mode, at this time, the D0 bit memory module can be written through the Din pin, Din is high to write high, Din is low to write low. When writing clock CK_W comes every rising edge, switch to the next bit memory write mode, write in turn until the 16-bit memory is written.

[0024] When reading, the circuit is enabled, EN is continuously high, the circuit automatically enters the read mode, and the OTP circuit reads and latches one bit every rising edge of the read clock CK_R until 16 bits are read. The internal latch is delayed for 1us after the rising edge of CK_R, so the pulse width of CK_R should be more than 2us to maintain signal stability and latching. The sleep mode automatically enters the sleep mode after 16 read clock cycles to reduce power consumption (the external pins of the OTP circuit are EN, CK_W, Din, and the user needs to input the signals at the corresponding pins according to the timing diagram of Figure 3 , and the corresponding pins are shown in Figure 2 . When writing, the chip's enable pin is connected to the internal counter and delay-off module, CK_W is connected to the internal compiler, and the Din pin is connected to the control switch of the electromigration current source.

[0025] Figure 4 In the background art, electromigration is a metal migration phenomenon caused by the action of current and temperature on metal wires. The moving electrons and the host metal lattice exchange momentum with each other, and when the metal atoms migrate in the direction of the electron flow, voids are formed at the original position. At the same time, hillocks are formed by the accumulation of metal atoms migrating, which can cause the resistance of the metal wire to increase, and even break (form an open circuit).

[0026] Figure 1 , 2As shown in FIGS. 1-3, by the above technical solutions, under the joint action of the related modules, the finished semiconductor process prepared by the application contains a resistor device, in addition, since the resistor is a commonly used device in the circuit, the electromigration resistance change memory is easy to realize, and when the overall circuit is prepared into a chip, no new layout hierarchy is introduced, the mask manufacturing cost is reduced, the current causing the electromigration of the resistor is smaller than the current of the fuse resistor, and no metal splashing will affect the safety of the surrounding circuit, no large safety space needs to be left on the layout, the area required by the electromigration resistance change memory is small, the chip manufacturing cost can be reduced, and the comparator can detect the slight change of the resistance value, the fault tolerance rate of data writing is increased to a certain extent, the data can be written after the overall encapsulation into a chip, and the calibration of the parameters of the chip in the actual use environment is facilitated.

[0027] The basic principles and main features of the application and the advantages of the application are shown and described above, and it is obvious for those skilled in the art that the application is limited to the details of the above exemplary embodiments, and the application can be realized in other specific forms without departing from the spirit or essential characteristics of the application. Therefore, from any point of view, the embodiments should be regarded as exemplary and non-limiting, the scope of the application is defined by the appended claims rather than the above description, and all changes falling within the meaning and scope of the equivalent elements of the claims are intended to be included in the application.

[0028] In addition, it should be understood that although the present specification is described in terms of embodiments, the embodiments do not contain only one independent technical solution, and the description manner of the specification is only for clarity, those skilled in the art should consider the specification as a whole, and the technical solutions in each embodiment can also be appropriately combined to form other embodiments that those skilled in the art can understand.

Claims

1. A 16-bit off-chip one-time programmable circuit, characterized in that, The system includes an electrically connected basic storage unit, a clock module, a pulse generator module, a counter module, a latch module, a codec module, a shutdown delay module, and a switch module. The switch module and counter module each have multiple channels. One end of the first switch module is connected to the first signal interaction terminal of the first counter module, and the second signal interaction terminal of the first counter module is connected to the first signal interaction terminal of the shutdown delay module. The other end of the first switch module is connected to the signal interaction terminal of the clock module and one end of the second switch module. When the codec module is working, in write mode, the first signal interaction terminal of the codec module is connected to one end of the first switch module, and the input of the codec module is switched to an external write clock signal. In read mode, the first signal interaction terminal of the codec module is connected to the other end of the first switch module, and the input of the codec module is switched to its own internal read clock signal. The other end of the second switch module is connected to the first signal interaction terminal of the pulse generator module. The second signal interaction terminal of the pulse generator module is connected to the first signal interaction terminal of the second counter module and the first signal interaction terminal of the latch module. The second signal interaction terminal of the latch module is connected to the first and second signal interaction terminals of the basic storage unit and the second signal interaction terminal of the codec module. The third signal interaction terminal of the codec module is connected to the third signal interaction terminal of the basic storage unit. The basic storage unit consists of electrically connected PMOS transistors and resistors, as well as a comparator chip and switches. The PMOS transistors, resistors, comparator chip, and switches together constitute a basic storage unit, i.e., an OTP circuit. In the basic storage unit, the PMOS transistors generate two currents of equal magnitude, i.e., PMOS current mirrors, which convert the resistance values ​​of the two resistors into voltages for comparison by the comparator chip. The first resistor serves as a reference resistor, and its resistance value is greater than that of the second resistor. The second resistor is the object to which the electromigration current is applied. When the second resistor does not undergo electromigration, the resistance value of the first resistor is greater than that of the second resistor, and the comparator outputs a low level, meaning the memory stores "0"; when the second resistor undergoes electromigration and its resistance value is greater than that of the first resistor, the comparator outputs a high level, meaning the memory stores "1".

2. The 16-bit off-chip one-time programmable circuit according to claim 1, characterized in that, In the basic memory cell, the first switch is controlled by the comparator chip pin Din. When the first switch is closed, "1" is written, and when the second switch is open, "0" is written. The second switch is controlled by an external write clock of the comparator chip. When the second switch is closed, the memory cell enters write mode. The third switch is controlled by an internal read clock of the comparator chip. When the third switch is closed, the memory cell enters read mode. The comparator chip reserves a pin Din to control the electromigration current, thus obtaining a 1-bit memory cell that can be written externally and is programmable at one time. Specifically, to realize the writing and reading of multiple data, the memory cell needs a set of serial write and read circuit modules, resulting in a 16-bit programmable circuit based on electromigration resistive random access memory.

3. The 16-bit off-chip one-time programmable circuit according to claim 2, characterized in that, The signal interaction terminal of the first counter module and the shutdown delay module is the EN enable pin. The ENB signal obtained after the shutdown delay is used to enable other circuits of the chip. The EN signal guides the OTP circuit to enter the write mode through the pulse counter.

4. A 16-bit off-chip one-time programmable circuit according to claim 2, characterized in that, When the codec module is working, in write mode, the codec module outputs 16-bit writable signals in sequence to make the corresponding memory cell enter the write mode. The external data write pin of the memory cell can control the gate voltage of the MOS switch, thereby controlling the access of the electromigration current, and finally controlling whether the corresponding resistor produces the electromigration effect.

5. A 16-bit off-chip one-time programmable circuit according to claim 2, characterized in that, When the encoder / decoder module is working, in read mode, it sequentially outputs 16-bit readable signals. The comparator sequentially judges the 16 resistors. If a resistor undergoes electromigration, its resistance value increases, and the comparator outputs a high level. If the resistance value remains unchanged, the comparator outputs a low level. Simultaneously, a 1µs narrow pulse latch signal is generated by the pulse generator module at the rising edge of the read clock. The 1µs period during which the latch signal is high is used for the comparator module to read the signal, and the falling edge of the narrow pulse is used for the latch module to latch the result. The latch will latch the output result of the comparator, and the output signal Dout of the latch is the 16-bit output signal of the OTP memory.

6. A 16-bit off-chip one-time programmable circuit according to claim 1, characterized in that, When the second counter module is working, in read mode, the second counter module counts the latch signal Latch of the latch module. After 16 read cycles, the Sleep mode output of the second counter module goes high, shutting down all modules in the OTP circuit, reducing the static current of the OTP circuit, and the OTP circuit enters sleep mode to reduce circuit power consumption.

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