Semiconductor structure and method of forming the same

Abstract

A semiconductor structure and a forming method thereof, the semiconductor structure comprising: a substrate; a drift region in the substrate, the drift region having first type doping ions therein, the drift region comprising a plurality of sub-drift regions with different doping ion concentrations, any sub-drift region near a top surface of the substrate being in another adjacent sub-drift region, and the doping ion concentration of each sub-drift region increasing in a direction from a bottom surface of the substrate to the top surface of the substrate; a first body region in the substrate at a side of the drift region, the first body region having second type doping ions therein; a gate structure on the substrate and covering part of the drift region and part of the first body region; and a drain doping region at a side of the gate structure and in the sub-drift region with the largest doping ion concentration in the drift region. Since the doping ion concentration of each sub-drift region increases, the average concentration of the doping ions in the drift region is increased, and thus the on-resistance of the semiconductor structure is reduced.

Description

TECHNICAL FIELD

[0001] Embodiments of the present application relate to the field of semiconductor manufacturing, and in particular, to a semiconductor structure and a forming method thereof. BACKGROUND

[0002] With the rapid development of semiconductor manufacturing technology, semiconductor devices are developing towards higher component density, higher integration and higher performance. Power semiconductor devices refer to high-power electronic devices mainly used in power equipment for power conversion and control circuit.

[0003] Among them, LDMOS (Laterally Diffused Metal Oxide Semiconductor) is a double diffusion structure power device, which is often used in radio frequency power circuit. In high-voltage power integrated circuit, high-voltage LDMOS is often used to meet the requirements of high-voltage resistance and power control. Lateral double diffusion field effect transistor (LDMOS) has many advantages, such as high thermal stability and frequency stability, good gain and durability, low feedback capacitance and thermal resistance, constant input impedance and simpler bias current circuit. In addition, LDMOS also has good process compatibility with CMOS, so LDMOS is being widely applied.

[0004] However, the performance of the current LDMOS device still needs to be improved. SUMMARY

[0005] The problem solved by embodiments of the present application is to provide a semiconductor structure and a forming method thereof to improve the performance of the semiconductor structure.

[0006] To solve the above problems, embodiments of the present application provide a semiconductor structure, comprising: a substrate; a drift region located in the substrate, the drift region having first type doping ions therein, the drift region comprising a plurality of sub-drift regions with different doping ion concentrations, any of the sub-drift regions near a top surface of the substrate being located in another adjacent sub-drift region, and the doping ion concentration of each of the sub-drift regions increasing in a direction from a bottom surface of the substrate to a top surface of the substrate; a first body region located in the substrate at a side of the drift region, the first body region having second type doping ions therein different from the first type doping ions in the conductive type; a gate structure located on the substrate and covering part of the drift region and part of the first body region; a drain doping region located at one side of the gate structure and in the sub-drift region with the largest doping ion concentration in the drift region; and a source doping region located in the first body region at the other side of the gate structure.

[0007] Optionally, the drift region includes a first sub-drift region, and a second sub-drift region located in the first sub-drift region; the second sub-drift region has a lateral width greater than that of the first sub-drift region, and a sidewall of the second sub-drift region towards the first body region is located between the first body region and the first sub-drift region.

[0008] Optionally, the semiconductor structure further includes a second body region located in the substrate at a bottom of the first body region and between the first body region and the second sub-drift region, the second body region being in contact with the first body region and the second sub-drift region, and having a gap between the second body region and the first sub-drift region, the second body region having the second type of doping ions therein, and the second body region having a doping ion concentration less than that of the first body region.

[0009] Optionally, the semiconductor structure further includes a third body region located in the substrate at a bottom of the second body region, the third body region being in contact with the second body region, the second sub-drift region, and the first sub-drift region, the third body region having the second type of doping ions therein, and the third body region having a doping ion concentration less than that of the second body region.

[0010] Optionally, the third body region extends to a part of a bottom of the first sub-drift region in a direction parallel to the top surface of the substrate.

[0011] Optionally, the drift region further includes a third sub-drift region located in the second sub-drift region, and a sidewall of the third sub-drift region towards the first body region has a gap between the second sub-drift region.

[0012] Optionally, the semiconductor structure further includes a gap between the first body region and the second sub-drift region.

[0013] Correspondingly, the application also provides a forming method of a semiconductor structure, comprising: providing a substrate, the substrate comprising a first region and a second region arranged adjacently in a direction parallel to a top surface of the substrate; forming a drift region in the substrate of the first region, the drift region having first-type doping ions, the drift region comprising a plurality of sub-drift regions with different doping ion concentrations, any of the sub-drift regions near a side of the top surface of the substrate being located in another of the sub-drift regions adjacently, and the doping ion concentration of each of the sub-drift regions increasing in a direction from a bottom surface of the substrate to the top surface of the substrate; forming a body region in the substrate, the step of forming the body region comprising: forming a first body region in the substrate of the second region, the first body region having second-type doping ions different from the first-type doping ions in the conductive type; forming a gate structure on the substrate at a junction of the first region and the second region, the gate structure covering part of the drift region and part of the first body region; forming a drain doping region in the drift region at a side of the gate structure, and the drain doping region being located in the sub-drift region with the largest doping ion concentration in the drift region; and forming a source doping region in the first body region at another side of the gate structure.

[0014] Optionally, the step of forming the drift region comprises: forming a first sub-drift region in the substrate of the first region; forming a second sub-drift region in the substrate of the first region, the second sub-drift region being located in the first sub-drift region, and a lateral width of the second sub-drift region being greater than a lateral width of the first sub-drift region, a side wall of the second sub-drift region towards the first region being located between the first region and the first sub-drift region; and the drift region comprising the first sub-drift region and the second sub-drift region.

[0015] Optionally, the step of forming the drift region further comprises: after forming the second sub-drift region, forming a third sub-drift region in the substrate of the first region, the third sub-drift region being located in the second sub-drift region, and a side wall of the third sub-drift region towards the first region having a gap with the second sub-drift region; and the drift region comprising the third sub-drift region, the second sub-drift region and the first sub-drift region.

[0016] Optionally, the step of forming the body region further comprises: before forming the first body region, forming a second body region in the substrate of the second region and part of the first region, the second body region being in contact with the second sub-drift region, and a gap being between the second body region and the first sub-drift region, the second body region having the second-type doping ions; and in the step of forming the first body region, the first body region is formed in the second body region of the second region, and a doping ion concentration of the first body region is greater than a doping ion concentration of the second body region.

[0017] Optionally, the step of forming the second body region comprises: forming an initial second body region in the substrate of the second region, the initial second body region having the second type of dopant ions therein; and annealing the initial second body region to extend the initial second body region to a position in contact with the second sub-drift region and spaced apart from the first sub-drift region to form the second body region.

[0018] Optionally, the step of forming the body region further comprises: prior to forming the second body region, forming a third body region in the substrate of the second region and part of the first region, the third body region being in contact with both the second sub-drift region and the first sub-drift region, the third body region having the second type of dopant ions therein; and in the step of forming the second body region, forming the second body region in the third body region, the second body region having a higher concentration of dopant ions than the third body region.

[0019] Optionally, the step of forming the third body region comprises: forming an initial third body region in the substrate of the second region, the initial third body region having the second type of dopant ions therein; and annealing the initial third body region to extend the third body region to a position in contact with both the second sub-drift region and the first sub-drift region to form the third body region.

[0020] Optionally, in the step of annealing the initial third body region to form the third body region, the third body region extends to a position in contact with part of the bottom of the first sub-drift region.

[0021] Optionally, the body region is formed after the drift region is formed.

[0022] Compared with the prior art, the technical scheme of the embodiment of the present application has the following advantages:

[0023] The semiconductor structure provided by the embodiment of the present application comprises a drift region in a substrate, the drift region has first type doping ions, the drift region comprises a plurality of sub-drift regions with different doping ion concentrations, any of the sub-drift regions near the top surface of the substrate is located in another adjacent sub-drift region, and the doping ion concentration of each of the sub-drift regions increases in the direction from the bottom surface of the substrate to the top surface of the substrate, a drain doping region is located at one side of the gate structure and in the sub-drift region with the largest doping ion concentration in the drift region. Since the drift region comprises a plurality of sub-drift regions with different doping ion concentrations, any of the sub-drift regions near the top surface of the substrate is located in another adjacent sub-drift region, and the doping ion concentration of each of the sub-drift regions increases in the direction from the bottom surface of the substrate to the top surface of the substrate, the average concentration of the doping ions in the drift region is increased, thereby reducing the on-resistance of the semiconductor structure and improving the performance of the semiconductor structure. Moreover, the drift region comprises a plurality of sub-drift regions with different doping ion concentrations, the drain doping region is located in the sub-drift region with the largest doping ion concentration in the drift region, the longitudinal size of the drain doping region to the bottom of the drift region is increased, thereby improving the electric field concentration in the drain doping region in the longitudinal direction, reducing the electric field intensity of the drain doping region in the longitudinal direction, and improving the performance of the semiconductor structure.

[0024] The forming method of the semiconductor structure provided by the embodiment of the present application comprises the following steps: forming a drift region in the substrate of the first region, the drift region has first type doping ions, the drift region comprises a plurality of sub-drift regions with different doping ion concentrations, any of the sub-drift regions near the top surface of the substrate is located in another adjacent sub-drift region, and the doping ion concentration of each of the sub-drift regions increases in the direction from the bottom surface of the substrate to the top surface of the substrate, and forming a drain doping region at one side of the gate structure and in the sub-drift region with the largest doping ion concentration in the drift region. Since the drift region comprises a plurality of sub-drift regions with different doping ion concentrations, and the doping ion concentration of each of the sub-drift regions increases in the direction from the bottom surface of the substrate to the top surface of the substrate, the average concentration of the doping ions in the drift region is increased, thereby reducing the on-resistance of the semiconductor structure and improving the performance of the semiconductor structure. Moreover, the drift region comprises a plurality of sub-drift regions with different doping ion concentrations, the drain doping region is located in the sub-drift region with the largest doping ion concentration in the drift region, the longitudinal size of the drain doping region to the bottom of the drift region is increased, thereby improving the electric field concentration in the drain doping region in the longitudinal direction, reducing the electric field intensity of the drain doping region in the longitudinal direction, and improving the performance of the semiconductor structure. BRIEF DESCRIPTION OF DRAWINGS

[0025] Figure 1 is a structural schematic diagram of a semiconductor structure;

[0026] Figure 2 is a structural schematic diagram of an embodiment of the semiconductor structure of the present application;

[0027] Figures 3 to 14 is a structural schematic diagram corresponding to each step in an embodiment of the forming method of the semiconductor structure of the present application. DETAILED DESCRIPTION

[0028] At present, the performance of semiconductor structures still needs to be improved. In combination with a semiconductor structure, the reasons why the performance of semiconductor structures needs to be improved are analyzed. Figure 1 is a structural schematic diagram of a semiconductor structure.

[0029] Reference Figure 1 , the semiconductor structure comprises: a substrate 10; a drift region 11 located in the substrate 10, the drift region 11 having first type doping ions therein; a body region 12 located in the substrate 10 at the side of the drift region 11, the body region 12 having second type doping ions therein, the second type doping ions being different from the first type doping ions in the conductive type; a gate structure 13 located on the substrate 10 and covering part of the drift region 11 and part of the body region 12; a drain doped region 14 located at one side of the gate structure 13 and within the drift region 11; and a source doped region 15 located within the body region 12 at the other side of the gate structure 13.

[0030] It is found through research that because the average concentration of the doping ions of the drift region 11 is low, it is easy to make the on-resistance of the semiconductor structure large. Moreover, the longitudinal dimension of the drain doped region 14 to the bottom of the drift region 11 is small, thereby it is easy to make the situation of electric field concentration in the drain doped region serious, and accordingly it is easy to make the electric field intensity of the drain doped region 14 in the longitudinal direction large, and further to cause the semiconductor device to be easy to be broken down.

[0031] To solve the above technical problems, the embodiment of the present application provides a semiconductor structure, comprising: a substrate; a drift region located in the substrate, the drift region having first type doping ions, the drift region comprising a plurality of sub-drift regions with different doping ion concentrations, any of the sub-drift regions near a top surface of the substrate being located in another adjacent sub-drift region, and the doping ion concentration of each of the sub-drift regions increasing in a direction from a bottom surface of the substrate to the top surface of the substrate; a first body region located in the substrate at a side of the drift region, the first body region having second type doping ions different from the first type doping ions in the conductive type; a gate structure located on the substrate and covering part of the drift region and part of the first body region; a drain doping region located at a side of the gate structure and in the sub-drift region with the largest doping ion concentration in the drift region; and a source doping region located in the first body region at another side of the gate structure.

[0032] In the semiconductor structure disclosed by the embodiment of the present application, the drift region located in the substrate has the first type doping ions, the drift region comprises a plurality of sub-drift regions with different doping ion concentrations, any of the sub-drift regions near the top surface of the substrate is located in another adjacent sub-drift region, and the doping ion concentration of each of the sub-drift regions increases in the direction from the bottom surface of the substrate to the top surface of the substrate, and the drain doping region is located at a side of the gate structure and in the sub-drift region with the largest doping ion concentration in the drift region. Since the drift region comprises a plurality of sub-drift regions with different doping ion concentrations, any of the sub-drift regions near the top surface of the substrate is located in another adjacent sub-drift region, and the doping ion concentration of each of the sub-drift regions increases in the direction from the bottom surface of the substrate to the top surface of the substrate, the average concentration of the doping ions in the drift region is increased, so that the on-resistance of the semiconductor structure is reduced, and the performance of the semiconductor structure is improved. Moreover, the drift region comprises a plurality of sub-drift regions with different doping ion concentrations, and the drain doping region is located in the sub-drift region with the largest doping ion concentration in the drift region, so that the longitudinal size of the drain doping region to the bottom of the drift region is increased, the electric field concentration in the drain doping region in the longitudinal direction is improved, the electric field intensity of the drain doping region in the longitudinal direction is reduced, and the performance of the semiconductor structure is improved.

[0033] In order to make the above objectives, characteristics and advantages of the embodiments of the present application more obvious and easy to understand, the specific embodiments of the present application are described in detail below with reference to the drawings.

[0034] Figure 2 is a structure schematic diagram of an embodiment of the semiconductor structure of the present application;

[0035] Reference Figure 2In this embodiment, the semiconductor structure includes: a substrate 100; a drift region 110 in the substrate 100, the drift region 110 having first-type doping ions therein, the drift region 110 including a plurality of sub-drift regions 111 with different doping ion concentrations, any of the sub-drift regions 111 near a top surface of the substrate 100 being located in another of the sub-drift regions 111, and the doping ion concentration of each of the sub-drift regions 111 increasing in a direction from a bottom surface of the substrate 100 to the top surface of the substrate 100; a first body region 121 in the substrate 100 at a side of the drift region 110, the first body region 121 having second-type doping ions therein different from the first-type doping ions in conductivity type; a gate structure 130 on the substrate 100 and covering part of the drift region 110 and part of the first body region 121; a drain doping region 141 at a side of the gate structure 130 and in the sub-drift region 111 with the largest doping ion concentration in the drift region 110; and a source doping region 142 in the first body region 121 at another side of the gate structure 130.

[0036] The substrate 100 is used to provide a process platform for forming the semiconductor structure. In this embodiment, the semiconductor structure is an LDMOS transistor, which can be an N-type transistor or a P-type transistor.

[0037] In this embodiment, the substrate 100 includes a first region i and a second region ii arranged adjacently.

[0038] The substrate 100 of the first region i is used to provide a process basis for forming the drift region 110 and part of the body region, and the substrate 100 of the second region ii is used to provide a process basis for forming the first body region 121.

[0039] In this embodiment, the substrate includes a substrate (not labeled), which is a silicon substrate. In other embodiments, the material of the substrate can also be germanium, silicon germanium, silicon carbide, gallium arsenide, or other materials such as indium gallium, and the substrate can also be a silicon-on-insulator substrate or a germanium-on-insulator substrate, or other types of substrates.

[0040] In this embodiment, the substrate is a P-type substrate (P-Sub), and the substrate is doped with P-type ions. As an example, the P-type ions include B ions, Ga ions, or In ions.

[0041] The drift region 110 is used to withstand a large partial pressure.

[0042] It can be understood that, since any of the sub-drift regions 111 close to the top side of the substrate 100 is located in another adjacent sub-drift region 111, i.e. in the direction from the bottom side of the substrate 100 to the top side of the substrate 100, the distance from the bottom side of each of the sub-drift regions 111 to the top side of the substrate 100 decreases.

[0043] Since the drift region 110 includes a plurality of sub-drift regions 111 with different doping ion concentrations, and the doping ion concentration of each of the sub-drift regions 111 increases in the direction from the bottom side of the substrate 100 to the top side of the substrate 100, the average concentration of the doping ions of the drift region 110 is increased, thereby reducing the on-resistance of the semiconductor structure, and further facilitating the improvement of the performance of the semiconductor structure. Moreover, since the drift region 110 includes a plurality of sub-drift regions 111 with different doping ion concentrations, the drain doping region 141 is located in the sub-drift region 111 with the largest doping ion concentration in the drift region 110, which facilitates the increase of the longitudinal size of the drain doping region 141 to the bottom of the drift region 110, thereby facilitating the improvement of the electric field concentration in the drain doping region 141 in the longitudinal direction, and further reducing the electric field intensity of the drain doping region 141 in the longitudinal direction, and correspondingly facilitating the improvement of the performance of the semiconductor structure.

[0044] Correspondingly, in the embodiment, the drift region 110 is located in the substrate 100 in the first region i.

[0045] In the embodiment, the first type of doping ions are N-type ions, for example, P ions, As ions or Sb ions. In other embodiments, the first type of doping ions can also be P-type ions. Correspondingly, in the case where the substrate is a P-type substrate and the first type of doping ions are P-type ions, the substrate has a deep N well (DNW), and the drift region is located in the deep N well.

[0046] In the embodiment, the drift region 110 includes a first sub-drift region 112 and a second sub-drift region 113 located in the first sub-drift region 112, i.e. the doping ion concentration of the second sub-drift region 113 is greater than that of the first sub-drift region 112.

[0047] It should be noted that the lateral width of the second sub-drift region 113 is greater than that of the first sub-drift region 112, and the side wall of the second sub-drift region 113 towards the first body region 121 is located between the first body region 121 and the first sub-drift region 112.

[0048] Here, the lateral width refers to the direction parallel to the top side of the substrate 100 and perpendicular to the side wall of the drift region 110.

[0049] The lateral width of the second sub-drift region 113 is greater than the lateral width of the first sub-drift region 112, which is conducive to increasing the lateral width of the drift region 110, thereby facilitating an increase in the partial pressure borne by the drift region 110.

[0050] It should also be noted that there is a gap between the first body region 121 and the second sub-drift region 113, which is conducive to improving the sharp change in the doping ion concentration in the region between the first body region 121 and the second sub-drift region 113, thereby facilitating a reduction in the electric field strength in the region between the first body region 121 and the second sub-drift region 113.

[0051] In this embodiment, the drift region 110 further comprises a third sub-drift region 114 located in the second sub-drift region 113, and there is a gap between the sidewall of the third sub-drift region 114 towards the first body region 121 side and the second sub-drift region 113.

[0052] It can be understood that the doping ion concentration of the third sub-drift region 114 is greater than the doping ion concentration of the second sub-drift region 113, which is conducive to further increasing the average concentration of doping ions in the drift region 110, thereby facilitating a further reduction in the on-resistance of the semiconductor structure.

[0053] The first body region 121 is used to form a conduction channel of the semiconductor structure, and provides a process basis for forming a source doped region 142.

[0054] In this embodiment, the first body region 121 is used as the body region 120.

[0055] Correspondingly, in this embodiment, the first body region 121 is located in the base 100 of the second region ii.

[0056] Since the first type of doping ions in this embodiment are N-type ions, such as P ions, As ions or Sb ions. Correspondingly, the second type of doping ions are P-type ions, such as B ions, Ga ions or In ions. In other embodiments, in the case where the first type of doping ions are P-type ions, the second type of doping ions can also be N-type ions.

[0057] In the embodiment, the semiconductor structure further comprises a second bulk region 122 located in the substrate 100 at the bottom of the first bulk region 121 and between the first bulk region 121 and the second sub-drift region 113, the second bulk region 122 being in contact with the first bulk region 121 and the second sub-drift region 113, and having a gap between the second bulk region 122 and the first sub-drift region 112, the second bulk region 122 having the second type of doping ions therein, and the doping ion concentration of the second bulk region 122 being less than the doping ion concentration of the first bulk region 121.

[0058] It can be understood that the second bulk region 122 and the first bulk region 121 are both bulk regions 120.

[0059] The second bulk region 122 is in contact with the second sub-drift region 113, and the doping ion concentration of the second bulk region 122 is less than the doping ion concentration of the first bulk region 121, which is advantageous for reducing the amplitude of the change in the doping ion concentration at the position where the bulk region 120 and the drift region 110 meet, and for forming an inversion layer at the position where the second bulk region 122 and the second sub-drift region 113 meet, thereby being advantageous for making the electric field distribution at the position where the bulk region 120 and the drift region 110 meet more uniform, and for reducing the electric field peak at the position where the bulk region 120 and the drift region 110 meet, and further being advantageous for improving the breakdown voltage at the position where the bulk region 120 and the drift region 110 meet; and further being advantageous for improving the problem of fast hot carrier relaxation time between the drift region 110 and the bulk region 120.

[0060] The second bulk region 122 has a gap between the second bulk region 122 and the first sub-drift region 112, which is advantageous for improving the situation of sharp change in the doping ion concentration in the region between the second bulk region 122 and the first sub-drift region 112, and thereby being advantageous for reducing the electric field intensity in the region between the second bulk region 122 and the first sub-drift region 112.

[0061] In this embodiment, the semiconductor structure further includes: a third body region 123 in the substrate 100 at the bottom of the second body region 122, i.e., the third body region 123, the second body region 122 and the first body region 121 all serve as the body region 120, the third body region 123 is in contact with the second body region 122, the second sub-drift region 113 and the first sub-drift region 112, the third body region 123 has the second type of doping ions therein, and the doping ion concentration of the third body region 123 is less than the doping ion concentration of the second body region 122, which is advantageous to further reduce the amplitude of the concentration variation of the doping ions at the position where the body region 120 and the drift region 110 meet, and accordingly, the sharp change of the doping ion concentration in the region between the body region 120 and the drift region 110 is improved, thereby being advantageous to further improve the uniformity of the electric field distribution at the position where the body region 120 and the drift region 110 meet.

[0062] Specifically, in the direction parallel to the top surface of the substrate 100, the third body region 123 extends to the partial bottom of the first sub-drift region 112, which is advantageous to form an inversion layer at the bottom of the first sub-drift region 112, thereby being advantageous to form a depletion region with a larger longitudinal size when the semiconductor device is reversely biased, and further being advantageous to improve the electric field distribution and reduce the local electric field strength, and accordingly, the breakdown voltage of the semiconductor device is improved.

[0063] The gate structure 130 is used to control the opening and closing of the channel.

[0064] The gate structure 130 includes a gate dielectric layer (not shown) and a gate electrode layer (not shown) covering the gate dielectric layer. In this embodiment, the gate structure 130 is a polysilicon gate structure, the material of the gate dielectric layer is silicon oxide, and the material of the gate electrode layer is polysilicon.

[0065] It is worth noting that, due to the reduction of the electric field strength of the drain doping region 141 in the longitudinal direction, the electric field distribution in the region between the drift region 110 and the drain doping region 141 is more uniform, thereby being advantageous to improve the capacitance effect, and further being advantageous to reduce the Miller capacitance between the gate structure 130 and the drain doping region 141, and also reduce the power consumption of the semiconductor device.

[0066] In this embodiment, the semiconductor structure further includes: a side wall 131 on the sidewall of the gate structure 130.

[0067] The side wall 131 plays a protective role for the sidewall of the gate structure 130.

[0068] It should be noted that the material of the side wall 131 can be one or more of silicon oxide, silicon nitride, silicon carbide, silicon carbon nitride, silicon carbon nitrogen oxide, silicon nitrogen oxide, boron nitride, and boron carbon nitride.

[0069] It should also be noted that the side wall 131 can be a single-layer structure or a stacked structure.

[0070] In other embodiments, the semiconductor structure further comprises a field plate located on the drift region at a portion between the gate layer and the substrate, and the gate layer covers the gate dielectric layer and a portion of the field plate. Correspondingly, the side wall located at one side of the field plate is formed on the field plate.

[0071] During operation of the device, the drain doped region 141 and the source doped region 142 are used to provide a carrier source.

[0072] In this embodiment, the drain doped region 141 is used as the drain of the LDMOS transistor, and the source doped region 142 is used as the source of the LDMOS transistor.

[0073] In this embodiment, the first type of doping ions are N-type ions. Correspondingly, the drain doped region 141 and the source doped region 142 are both doped with N-type ions. The doping ion concentration in the drain doped region 141 and the source doped region 142 is greater than the doping ion concentration in each of the sub-drift regions 111.

[0074] In other embodiments, in the case where the first type of doping ions are P-type ions, the drain doped region and the source doped region are both doped with P-type ions.

[0075] In this embodiment, the semiconductor structure comprises a body contact region 143 located in the first body region 121 at a side of the source doped region 142 away from the drain doped region 141.

[0076] Specifically, the body contact region 143 is connected to the source doped region 142.

[0077] More specifically, the body contact region 143 and the source doped region 142 are both connected to a ground terminal.

[0078] In this embodiment, the semiconductor structure further comprises an interlayer dielectric layer (not shown in the figure) located on the substrate 100 and covering the gate structure 130 and the side wall 131.

[0079] Specifically, the material of the interlayer dielectric layer is a dielectric material.

[0080] In this embodiment, the semiconductor structure further includes: a gate plug 151 penetrating through the interlayer dielectric layer and contacting the gate structure 130; a drain plug 152 penetrating through the interlayer dielectric layer and contacting the drain doped region 141; a source plug 153 penetrating through the interlayer dielectric layer and contacting the source doped region 142; a body contact region plug 154 penetrating through the interlayer dielectric layer and contacting the body contact region 143; and an interconnection structure 155 in the interlayer dielectric layer on top of the source plug 153 and the body contact region plug 154, and the interconnection structure 155 contacts the source plug 153 and the body contact region plug 154 respectively, that is, the body contact region 143 and the source doped region 142 are connected through the interconnection structure 155, the source plug 153 and the body contact region plug 154.

[0081] Specifically, the body contact region 143 and the source doped region 142 are connected to the ground through the interconnection structure 155, the source plug 153 and the body contact region plug 154.

[0082] Correspondingly, the application further provides a forming method of the semiconductor structure. Figures 3 to 14 FIG. 1 is a structure schematic diagram of each step in an embodiment of the forming method of the semiconductor structure of the application.

[0083] Reference Figure 3 The substrate 500 is provided, and the substrate 500 includes a first region I and a second region II arranged adjacently in a direction parallel to a top surface of the substrate 500.

[0084] The substrate 100 is used to provide a process platform for the formation of the semiconductor structure. In this embodiment, the semiconductor structure is an LDMOS transistor, which can be an N-type transistor or a P-type transistor.

[0085] The substrate 500 of the first region I is used to provide a process basis for the subsequent formation of a drift region and a partial body region, and the substrate 500 of the second region II is used to provide a process basis for the subsequent formation of a first body region.

[0086] In this embodiment, the substrate includes a substrate (not shown), which is a silicon substrate. In other embodiments, the material of the substrate can also be germanium, silicon germanium, silicon carbide, gallium arsenide or indium gallium, or other materials, and the substrate can also be a silicon-on-insulator substrate or a germanium-on-insulator substrate, or other types of substrates.

[0087] In this embodiment, the substrate is a P-type substrate (P-Sub), and the substrate is doped with P-type ions. As an example, the P-type ions include B ions, Ga ions or In ions.

[0088] Reference Figures 4 to 6 In the substrate 500 of the first region I, a drift region 510 is formed, the drift region 510 has first type doping ions, the drift region 510 includes a plurality of sub-drift regions 511 with different doping ion concentrations, any of the sub-drift regions 511 near the top surface of the substrate 500 is located in another adjacent sub-drift region 511, and along the direction from the bottom surface of the substrate 500 to the top surface of the substrate 500, the doping ion concentration of each of the sub-drift regions 511 is increased.

[0089] The drift region 510 is used to withstand a large partial pressure.

[0090] It can be understood that, since any of the sub-drift regions 511 near the top surface of the substrate 500 is located in another adjacent sub-drift region 511, i.e., along the direction from the bottom surface of the substrate 500 to the top surface of the substrate 500, the distance from the bottom surface of each of the sub-drift regions 511 to the top surface of the substrate 500 is decreased.

[0091] Since the drift region 510 includes a plurality of sub-drift regions 511 with different doping ion concentrations, and along the direction from the bottom surface of the substrate 500 to the top surface of the substrate 500, the doping ion concentration of each of the sub-drift regions 511 is increased, which is beneficial to increase the average concentration of the doping ions of the drift region 510, thereby reducing the on-resistance of the semiconductor structure, and further beneficial to improve the performance of the semiconductor structure. Moreover, since the drift region 510 includes a plurality of sub-drift regions 511 with different doping ion concentrations, the subsequent drain doping region is located in the sub-drift region with the largest doping ion concentration in the drift region 510, which is beneficial to increase the longitudinal size of the drain doping region to the bottom of the drift region 510, thereby beneficial to improve the situation of electric field concentration in the drain doping region in the longitudinal direction, and further reduce the electric field strength of the drain doping region in the longitudinal direction, and accordingly beneficial to improve the performance of the semiconductor structure.

[0092] In the embodiment, the first type doping ions are N-type ions, for example, P ions, As ions or Sb ions. In other embodiments, the first type doping ions can also be P-type ions. Accordingly, in the case that the substrate is a P-type substrate and the first type doping ions are P-type ions, the substrate has a deep N well (DNW), and the drift region is formed in the deep N well.

[0093] In the embodiment, the step of forming the drift region 510 includes: forming a first sub-drift region 512 in the substrate 500 of the first region I, as shown in FIG. 5A; and forming a plurality of second sub-drift regions 513 in the first sub-drift region 512, as shown in FIG. 5B. Figure 4 The first sub-drift region 512 is formed in the substrate 500 of the first region I, and the plurality of second sub-drift regions 513 are formed in the first sub-drift region 512. Figure 5As shown, a second sub-drift region 513 is formed in the substrate 500 of the first region I, the second sub-drift region 513 is located in the first sub-drift region 512, that is, the doping ion concentration of the second sub-drift region 513 is greater than the doping ion concentration of the first sub-drift region 512, and the lateral width of the second sub-drift region 513 is greater than the lateral width of the first sub-drift region 512, and the second sub-drift region 513 is located between the first region I and the first sub-drift region 512 towards the sidewall of the first region I; the drift region 510 comprises the first sub-drift region 512 and the second sub-drift region 513.

[0094] The lateral width refers to the direction parallel to the top surface of the substrate 500 and perpendicular to the sidewall of the drift region 510.

[0095] After the first sub-drift region 512 is formed in the substrate 500 of the first region I, the second sub-drift region 513 is formed in the first sub-drift region 512, which is beneficial to reduce the difficulty of forming the first sub-drift region 512 and the second sub-drift region 513.

[0096] The lateral width of the second sub-drift region 513 is greater than the lateral width of the first sub-drift region 512, which is beneficial to increase the lateral width of the drift region 510, thereby facilitating the increase of the partial pressure borne by the drift region 510.

[0097] In the embodiment, the step of forming the drift region 510 further comprises: Figure 6 As shown, after the second sub-drift region 513 is formed, a third sub-drift region 514 is formed in the substrate 500 of the first region I, the third sub-drift region 514 is located in the second sub-drift region 513, and the third sub-drift region 514 has a gap between the second sub-drift region 513 towards the sidewall of the first region I; the drift region 510 comprises the third sub-drift region 514, the second sub-drift region 513 and the first sub-drift region 512.

[0098] It can be understood that the doping ion concentration of the third sub-drift region 514 is greater than the doping ion concentration of the second sub-drift region 513, which is beneficial to further increase the average concentration of the doping ions of the drift region 510, thereby facilitating the further reduction of the on-resistance of the semiconductor structure.

[0099] Moreover, after the second sub-drift region 513 is formed, the third sub-drift region 514 is formed in the substrate 500 of the first region I, which is beneficial to reduce the difficulty of forming the third sub-drift region 514.

[0100] Reference Figures 7 to 11In the substrate 500, a body region 520 is formed, and the step of forming the body region 520 includes: forming a first body region 521 in the substrate 500 of the second region II, as shown in Figure 11 The first body region 521 has a second type of doping ions different from the first type of doping ions.

[0101] The first body region 521 is used to form a conduction channel of a semiconductor structure, and provides a process basis for subsequent formation of a source doped region.

[0102] In the embodiment, in the step of forming the first body region 521, the first body region 521 and the second sub-drift region 513 have a gap, which is beneficial to reduce the probability of coincidence of the first body region 521 and the second sub-drift region 513, thereby facilitating the difficulty of forming the first body region 521 and the second sub-drift region 513.

[0103] In the embodiment, the step of forming the body region 520 further includes: before forming the first body region 521, forming a second body region 522 in the substrate of the second region II and part of the first region I, as shown in Figures 9 to 10 The second body region 522 is in contact with the second sub-drift region 513, and the second body region 522 and the first sub-drift region 512 have a gap, and the second body region 522 has the second type of doping ions. Figure 11 In the step of forming the first body region 521, the first body region 521 is formed in the second body region 522 of the second region II, and the doping ion concentration of the first body region 521 is greater than the doping ion concentration of the second body region 522, that is, the doping ion concentration of the second body region 522 is less than the doping ion concentration of the first body region 521.

[0104] After forming the second body region 522 in the substrate of the second region II and part of the first region I, the first body region 521 is formed in the second body region 522 of the second region II, which is beneficial to reduce the difficulty of forming the second body region 522.

[0105] The second body region 522 is in contact with the second sub-drift region 513, and the doping ion concentration of the second body region 522 is less than that of the first body region 521, which is advantageous to reduce the amplitude of the concentration variation of the doping ions at the position where the body region 520 and the drift region 510 meet, and to form an inversion layer at the position where the second body region 522 and the second sub-drift region 513 meet, thereby being advantageous to make the electric field distribution at the position where the body region 520 and the drift region 510 meet more uniform, and to reduce the electric field peak at the position where the body region 520 and the drift region 510 meet, and further being advantageous to improve the breakdown voltage at the position where the body region 520 and the drift region 510 meet; and further being advantageous to improve the problem of fast hot carrier relaxation time between the drift region 510 and the body region 520.

[0106] The second body region 522 and the first sub-drift region 512 have a gap therebetween, which is advantageous to improve the sharp change of the doping ion concentration in the region between the second body region 522 and the first sub-drift region 512, and thereby being advantageous to reduce the electric field intensity in the region between the second body region 522 and the first sub-drift region 512.

[0107] It should be noted that the step of forming the second body region 522 comprises: Figure 9 forming an initial second body region 522' in the substrate of the second region II, and the initial second body region 522' has the second type of doping ions therein; and Figure 10 annealing the initial second body region 522' to extend the initial second body region 522' to a position in contact with the second sub-drift region 513 and spaced apart from the first sub-drift region 512, so as to form the second body region 522.

[0108] The initial second body region 522' is formed in the substrate of the second region II first, and then the initial second body region 522' is annealed to form the second body region 522, which is advantageous to further reduce the difficulty of forming the second body region 522.

[0109] In the embodiment, the step of forming the body region 520 further comprises: Figure 7 and Figure 8As shown, before forming the second body region 522, a third body region 523 is formed in the substrate 500 of the second region II and part of the first region I, the third body region 523 is in contact with both the second sub-drift region 513 and the first sub-drift region 512, and the third body region 523 has the second type of doping ions; in the step of forming the second body region 522, the second body region 522 is formed in the third body region 523, and the doping ion concentration of the second body region 522 is greater than that of the third body region 523, i.e. the doping ion concentration of the third body region 523 is less than that of the second body region 522.

[0110] The third body region 523 is in contact with both the second sub-drift region 513 and the first sub-drift region 512, the third body region 523 has the second type of doping ions, and the doping ion concentration of the third body region 523 is less than that of the second body region 522, which is conducive to further reducing the amplitude of the change in the doping ion concentration at the position where the body region 520 and the drift region 510 meet, and accordingly improving the sharp change in the doping ion concentration in the region between the body region 520 and the drift region 510, thereby facilitating further improvement in the uniformity of the electric field distribution at the position where the body region 520 and the drift region 510 meet.

[0111] Moreover, the third body region 523 is first formed in the substrate 500 of the second region II and part of the first region I, and then the second body region 522 is formed in the third body region 523, which is conducive to reducing the difficulty of forming the third body region 523.

[0112] Specifically, the step of forming the third body region 523 includes: as shown, Figure 7 forming an initial third body region 523' in the substrate 500 of the second region II', the initial third body region 523' having the second type of doping ions; and Figure 8 as shown, performing annealing treatment on the initial third body region 523' to extend the third body region 523 to a position in contact with both the second sub-drift region 513 and the first sub-drift region 512, to form the third body region 523.

[0113] The initial third body region 523' is first formed in the substrate 500 of the second region II', and then the annealing treatment is performed on the initial third body region 523' to form the third body region 523, which is conducive to further reducing the difficulty of forming the third body region 523.

[0114] More particularly, in the step of annealing the initial third body region 523' to form the third body region 523, the third body region 523 extends to a position in contact with a portion of the bottom of the first sub-drift region 512.

[0115] The third body region 523 extending to a position in contact with a portion of the bottom of the first sub-drift region 512 facilitates the formation of an inversion layer at the bottom of the first sub-drift region 512, thereby facilitating the formation of a depletion region with a larger longitudinal dimension when the semiconductor device is reversely biased, and further facilitating the improvement of the electric field distribution and the reduction of the local electric field intensity, and accordingly the improvement of the breakdown voltage of the semiconductor device.

[0116] In the embodiment, the body region 520 is formed after the formation of the drift region 510, which facilitates the reduction of the modification to the existing process, and further facilitates the combination with the existing process, and further facilitates the reduction of the difficulty in forming the drift region 510 and the body region 520.

[0117] In other embodiments, the drift region can also be formed after the formation of the body region.

[0118] In some other embodiments, the steps of forming the drift region and the body region include: forming a third body region in the base of the second region and a portion of the first region; forming a first sub-drift region in the base of the first region after the formation of the third body region, the bottom of the first sub-drift region being in contact with the third body region; forming the second body region in the third body region of the second region and a portion of the first region after the formation of the first sub-drift region, the second body region having a gap with the first sub-drift region; forming a second sub-drift region in the first sub-drift region after the formation of the second body region, the second sub-drift region being in contact with the second body region; forming a first body region in the second body region of the second region after the formation of the first sub-drift region; and forming a third sub-drift region in the second sub-drift region after the formation of the first body region.

[0119] Reference Figure 12 A gate structure 530 is formed on the base 500 at the boundary between the first region I and the second region II, the gate structure 530 covering a portion of the drift region 510 and a portion of the first body region 521.

[0120] The gate structure 530 is used to control the opening and closing of the channel.

[0121] The gate structure 530 includes a gate dielectric layer (not shown) and a gate electrode layer (not shown) covering the gate dielectric layer. In the embodiment, the gate structure 530 is a polysilicon gate structure, the material of the gate dielectric layer is silicon oxide, and the material of the gate electrode layer is polysilicon.

[0122] With reference to the above Figure 12 , after forming the gate structure 530, further comprising: forming the side wall 531 on the sidewall of the gate structure 530.

[0123] The side wall 531 protects the sidewall of the gate structure 530.

[0124] It should be noted that the material of the side wall can be one or more of silicon oxide, silicon nitride, silicon carbide, silicon carbon nitride, silicon carbon nitrogen oxide, silicon nitrogen oxide, boron nitride and boron carbon nitride.

[0125] It should be noted that the material of the side wall 531 can be one or more of silicon oxide, silicon nitride, silicon carbide, silicon carbon nitride, silicon carbon nitrogen oxide, silicon nitrogen oxide, boron nitride and boron carbon nitride.

[0126] It should be further noted that the side wall 531 can be a single-layer structure or a laminated structure.

[0127] In other embodiments, the forming method further comprises: in the step of forming the gate structure, forming a field plate covering part of the drift region on the base of the gate medium side, and the gate layer covers the gate medium layer and part of the field plate. Correspondingly, in the step of forming the side wall, the side wall on one side of the field plate is formed on the field plate.

[0128] With reference to the above Figure 13 , a drain doped region 541 is formed in the drift region 510 on one side of the gate structure 530, and the drain doped region 541 is located in the sub-drift region 511 with the maximum doping ion concentration in the drift region 510.

[0129] Since the electric field intensity of the drain doped region 541 in the longitudinal direction is reduced, the electric field distribution of the region between the drift region 510 and the drain doped region 541 is more uniform, which is conducive to improving the capacitance effect, thereby reducing the Miller capacitance between the gate structure 530 and the drain doped region 541, and reducing the power consumption of the semiconductor device.

[0130] With reference to the above Figure 13 , a source doped region 542 is formed in the first body region 521 on the other side of the gate structure 530.

[0131] In the device working, the drain doped region 541 and the source doped region 542 are used to provide a carrier source.

[0132] In this embodiment, the drain doped region 541 is used as the drain of the LDMOS transistor, and the source doped region 542 is used as the source of the LDMOS transistor.

[0133] In the embodiment, the first type of doping ions are N-type ions; accordingly, the drain doping region 541 and the source doping region 542 are both doped with N-type ions. The doping ion concentration in the drain doping region 541 and the source doping region 542 is greater than the doping ion concentration in each of the sub-drift regions 511.

[0134] In other embodiments, in the case where the first type of doping ions are P-type ions, the drain doping region and the source doping region are both doped with P-type ions.

[0135] In the embodiment, after the gate structure 530 is formed, a body contact region 543 is formed in the first body region 521, and the body contact region 543 is located on the side of the source doping region 542 that is away from the drain doping region 541.

[0136] Specifically, the body contact region 543 is connected to the source doping region 542.

[0137] More specifically, the body contact region 543 and the source doping region 542 are both connected to a ground terminal.

[0138] In the embodiment, after the drain doping region 541, the source doping region 542, and the body contact region 543 are formed, an interlayer dielectric layer (not shown in the figure) is formed on the substrate 500 to cover the gate structure 530 and the sidewall 531.

[0139] Specifically, the material of the interlayer dielectric layer is a dielectric material.

[0140] In the embodiment, the method of forming the semiconductor structure further includes: Figure 14 As shown, a gate plug 551 is formed to penetrate the interlayer dielectric layer and contact the gate structure 530, a drain plug 552 is formed to penetrate the interlayer dielectric layer and contact the drain doping region 541, a source plug 553 is formed to penetrate the interlayer dielectric layer and contact the source doping region 542, and a body contact region plug 554 is formed to penetrate the interlayer dielectric layer and contact the body contact region 543; after the source plug 553 and the body contact region plug 554 are formed, an interconnection structure 555 is formed in the interlayer dielectric layer on top of the source plug 553 and the body contact region plug 554, and the interconnection structure 555 contacts the source plug 553 and the body contact region plug 554, respectively, so that the body contact region 543 and the source doping region 542 are connected through the interconnection structure 555, the source plug 553, and the body contact region plug 554.

[0141] Specifically, the body contact region 543 is connected with the ground terminal through the interconnection structure 555, the source plug 553 and the body contact region plug 554.

[0142] It should be noted that the semiconductor structure can be formed by the forming method described in the foregoing embodiments, or can be formed by other forming methods. For the specific description of the semiconductor structure in this embodiment, reference can be made to the corresponding description in the foregoing embodiments, which will not be described herein again.

[0143] Although the present application has been disclosed with reference to above embodiments, the present application is not limited to the above. Any person skilled in the art, without departing from the spirit and scope of the present application, can make various changes and modifications, and therefore the protection scope of the present application should be subject to the scope defined by the claims.

Claims

1. A semiconductor structure, characterized by, The application includes: a substrate; a drift region in the substrate, the drift region including a first sub-drift region and a second sub-drift region in the first sub-drift region, the drift region having first-type doping ions therein, the drift region including a plurality of sub-drift regions having different doping ion concentrations, any of the sub-drift regions near a side of a top surface of the substrate being in an adjacent one of the sub-drift regions, and the doping ion concentration of each of the sub-drift regions increasing in a direction from a bottom surface of the substrate toward the top surface of the substrate; a first body region in the substrate on a side of the drift region, the first body region having second-type doping ions therein different from the first-type doping ions; a second body region in the substrate on a bottom of the first body region and between the first body region and the second sub-drift region; a third body region in the substrate on a bottom of the second body region, the third body region being in contact with the second body region, the second sub-drift region, and the first sub-drift region, the third body region having the second-type doping ions therein, the doping ion concentration of the third body region being less than the doping ion concentration of the second body region; a gate structure on the substrate and covering a portion of the drift region and a portion of the first body region; a drain doped region on a side of the gate structure and in the sub-drift region having the largest doping ion concentration in the drift region; a source doped region in the first body region on another side of the gate structure.

2. The semiconductor structure of claim 1, wherein, A lateral width of the second sub-drift region is greater than a lateral width of the first sub-drift region, and a sidewall of the second sub-drift region toward a side of the first body region is between the first body region and the first sub-drift region.

3. The semiconductor structure of claim 2, wherein, The second body region is in contact with the first body region and the second sub-drift region, and there is a gap between the second body region and the first sub-drift region, the second body region having the second-type doping ions therein, the doping ion concentration of the second body region being less than the doping ion concentration of the first body region.

4. The semiconductor structure of claim 1, wherein, The third body region extends to a portion of a bottom of the first sub-drift region in a direction parallel to the top surface of the substrate.

5. The semiconductor structure of claim 1, wherein, The drift region further includes a third sub-drift region in the second sub-drift region, and there is a gap between a sidewall of the third sub-drift region toward a side of the first body region and the second sub-drift region.

6. The semiconductor structure of any one of claims 1 to 5, wherein, There is a gap between the first body region and the second sub-drift region.

7. A method of forming a semiconductor structure, characterized by, The application includes: providing a substrate, the substrate including a first region and a second region disposed adjacent to each other in a direction parallel to a top surface of the substrate; forming a drift region in the substrate in the first region, the step of forming the drift region including forming a first sub-drift region in the substrate in the first region and forming a second sub-drift region in the substrate in the first region, the drift region having first-type doping ions therein, the drift region including a plurality of sub-drift regions having different doping ion concentrations, any of the sub-drift regions near a side of a top surface of the substrate being in an adjacent one of the sub-drift regions, and the doping ion concentration of each of the sub-drift regions increasing in a direction from a bottom surface of the substrate toward the top surface of the substrate; forming a body region in the substrate, the step of forming the body region including forming a first body region in the substrate of the second region, the first body region having therein a second type of dopant ion different from the first type of dopant ion; the step of forming the body region further including forming a second body region in the substrate of the second region and a portion of the first region before forming the first body region, the second body region being in contact with the second sub-drift region; the step of forming the body region further including forming a third body region in the substrate of the second region and a portion of the first region before forming the second body region, the third body region being in contact with both the second sub-drift region and the first sub-drift region, the third body region having therein the second type of dopant ion, the second body region being formed in the third body region in the step of forming the second body region, the second body region having a dopant ion concentration greater than a dopant ion concentration of the third body region; forming a gate structure on the substrate at a boundary between the first region and the second region, the gate structure covering a portion of the drift region and a portion of the first body region; forming a drain doped region in the drift region on a side of the gate structure, the drain doped region being located within the sub-drift region of the drift region having a greatest dopant ion concentration; forming a source doped region in the first body region on another side of the gate structure.

8. The method of forming a semiconductor structure of claim 7, wherein, the second sub-drift region is located in the first sub-drift region, and a lateral width of the second sub-drift region is greater than a lateral width of the first sub-drift region, the second sub-drift region being located between the first region and the first sub-drift region toward a sidewall of the first region; the drift region includes a first sub-drift region and a second sub-drift region.

9. The method of forming a semiconductor structure of claim 8, wherein, the step of forming the drift region further including forming a third sub-drift region in the substrate of the first region after forming the second sub-drift region, the third sub-drift region being located in the second sub-drift region, the third sub-drift region having a gap between a sidewall of the first region toward which the third sub-drift region is located and the second sub-drift region; the drift region includes the third sub-drift region, the second sub-drift region, and the first sub-drift region.

10. The method of forming a semiconductor structure of claim 8, wherein, the second body region has a gap between the second body region and the first sub-drift region, the second body region having therein the second type of dopant ion; the first body region is formed in the second body region of the second region in the step of forming the first body region, the first body region having a dopant ion concentration greater than a dopant ion concentration of the second body region.

11. The method of forming a semiconductor structure of claim 10, wherein, the step of forming the second body region includes: forming an initial second body region in the substrate of the second region, the initial second body region having therein the second type of dopant ion; annealing the initial second body region to extend the initial second body region to a position in contact with the second sub-drift region and spaced apart from the first sub-drift region to form the second body region.

12. The method of forming a semiconductor structure of claim 7, wherein, the step of forming the third body region includes: forming an initial third body region in the substrate of the second region, the initial third body region having therein the second type of dopant ion; The initial third body region is annealed so that the third body region extends to a position in contact with both the second sub-drift region and the first sub-drift region to form the third body region.

13. The method of forming a semiconductor structure of claim 12, wherein, In the step of annealing the initial third body region to form the third body region, the third body region extends to a position in contact with a portion of the bottom of the first sub-drift region.

14. The method of forming a semiconductor structure according to one of claims 7 to 13, wherein The body region is formed after the drift region.

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