Medium-free holographic optical element processing technology based on grinding and polishing parameters and medium-free holographic optical element

Abstract

The invention discloses a medium-free holographic optical element machining process based on grinding and polishing parameters and a medium-free holographic optical element, and particularly relates to the field of medium-free holographic optical elements. The graphene composite material is prepared from the following components in parts by mass: 40 parts of reduced graphene oxide, 22 parts of silver nanowires, 12 parts of a polyvinyl alcohol composite dispersant, 25 parts of deionized water and 1 part of an interface stabilizer, and the second layer structure is an interface buffer film and is arranged between the main conductive layer and the pattern structure layer. A density-controllable fracture island-shaped interface buffer structure is constructed between a conductive layer and a pattern structure layer to cut off a potential closed-loop coupling path at a physical level, so that an optical instability phenomenon induced by electrostatic resonance is inhibited, and the problem that a coupling field between the conductive layer and the pattern structure layer cannot be blocked by the structure in the prior art is solved.

Description

Technical Field

[0001] The present invention relates to the technical field of medium-free holographic optical elements, and more particularly to a medium-free holographic optical element processing technology based on grinding and polishing parameters and a medium-free holographic optical element. Background Art

[0002] In the current development of dielectric-free holographic optical elements, conductive antistatic layers are widely used to prevent surface charge accumulation in order to maintain the optical stability of the element during long-term operation or in high-dust environments. However, as components evolve toward high integration and subwavelength structural precision, traditional conductive layers (such as doped ITO or graphene films) have exposed a previously unrecognized structural electrical coupling risk during actual use: when the conductive layer and the underlying holographic pattern structure form local micro-capacitive structures at the micro-nanoscale, if external static charges are continuously superimposed, these areas will evolve into potential closed loops with quasi-resonant characteristics. This closed loop will induce periodic electric field pulsations under certain field strengths, directly affecting the local transmission and reflection behavior of the light field, manifesting as unpredictable optical instabilities such as diffraction pattern flickering, image drift, or transient defocusing. What is more serious is that this optical electrostatic resonance state has positive feedback characteristics: the initial weak resonance will promote the accumulation of more charges, quickly forming a large-scale synchronous disturbance, which can destroy the phase integrity of the entire holographic coding layer within seconds; Existing antistatic designs mainly rely on surface resistance adjustment and charge dissipation layer construction, ignoring the evolution of charge coupling paths in the structural layer and failing to effectively cut off the resonance source; It can be seen that the implicit resonant coupling field formed between the antistatic conductive layer and the optical structure in the dielectric-free holographic element has become one of the core threats to the stability of current materials. Summary of the Invention

[0003] In order to overcome the above-mentioned defects of the prior art, the embodiments of the present invention provide a medium-free holographic optical element processing process based on grinding and polishing parameters and a medium-free holographic optical element, by constructing a fractured island interface buffer structure with controllable density between the conductive layer and the pattern structure layer to cut off the potential closed-loop coupling path at the physical level, thereby suppressing the optical instability phenomenon induced by electrostatic resonance, and solving the problem that the coupling field between the conductive layer and the pattern layer cannot be blocked by the structure proposed in the above-mentioned background technology.

[0004] To achieve the above-mentioned object, the present invention provides the following technical solution: a medium-free holographic optical element based on grinding and polishing parameters, wherein the optical element comprises the following three-layer structure in sequence: The first layer is a main conductive layer composed of the following components by weight: 40 parts reduced graphene oxide, 22 parts silver nanowires, 12 parts polyvinyl alcohol composite dispersant, 25 parts deionized water, and 1 part interfacial stabilizer. The second layer structure is an interface buffer film, which is arranged between the main conductive layer and the pattern structure layer and is composed of the following components in proportion by mass: 80 parts of gallium, 14 parts of indium, 3 parts of tin, 1 part of tungsten nanoparticles, 1 part of sodium acetate, and 1 part of tributylphosphine; The third layer structure is a pattern structure layer, which is composed of the following components in proportion by mass: 80 parts of silicon nitride powder, 10 parts of lithium borate, 6 parts of potassium titanate, and 4 parts of lead boron glass flux.

[0005] In a preferred embodiment, the main conductive layer is formed into a continuous conductive film layer by coating and hot pressing, and the surface resistance of the main conductive layer is controlled within the range of 120 to 180 ohms per square; The interface buffer film is condensed by terminal polishing to form a plurality of disconnected fractured island structure blocks, wherein the boundaries of the fractured island structure blocks are discontinuously distributed, so as to cut off the equipotential coupling between the main conductive layer and the underlying pattern structure; The pattern structure layer is spray-dried and sintered to form a sub-wavelength pattern coding matrix. The matrix has a pattern carrier surface with Ra≤2nm and a periodic structure is formed by ion beam etching.

[0006] In a preferred embodiment, the silver nanowires are dispersed in a coating phase formed by a polyvinyl alcohol composite dispersant in the main conductive layer. The diameter of the silver nanowires is 40 nanometers and the length is 30 microns. The overall silver content of the silver nanowires accounts for 22 parts of the total mass of the main conductive layer in the form of a fraction ratio. The silver nanowires are prepared by an in-situ silver formate reduction method to ensure dispersion uniformity and conduction path continuity.

[0007] In a preferred embodiment, during the formation of the interface buffer film, by controlling the interface polishing temperature between 28°C and 38°C, the alloy system of gallium and indium is driven by charge to preferentially grow along the tungsten nanoparticle induced area, forming no less than 100 fractured island structure blocks per unit area, and the block size range is 0.3 to 1.8 microns.

[0008] In a preferred embodiment, the surface of the tungsten nanoparticles is coated with 0.3 parts of fluorinated polytrifluoroethylene to guide the potential distribution in the gallium and indium alloy system to form asymmetry, to increase the lateral discontinuity ratio of the fracture island area, and to enhance the effectiveness of the blocking path.

[0009] In a preferred embodiment, before the etching treatment of the pattern structure layer, the silicon nitride powder is spray-dried to control its particle size to D90≤300 nanometers, and then ion beam etching is performed to form a pattern coding structure with a period of 300 nanometers and a depth of 50 nanometers on the surface, while maintaining its optical interference phase integrity under the action of the fracture island area.

[0010] In a preferred embodiment, the main conductive layer and the interface buffer film are interfacially bonded via a silane coupling agent, wherein the silane coupling agent is 3-fluoropropyltriethoxysilane, and the amount used is 0.6 parts, which is used to improve the interlayer adhesion and prevent the risk of delamination during the subsequent holographic pattern forming process.

[0011] The processing technology of dielectric-free holographic optical elements based on grinding and polishing parameters includes: Step S1: Preparation of the main conductive layer: The reduced graphene oxide, silver nanowires, polyvinyl alcohol composite dispersant, deionized water and an interfacial stabilizer are sequentially added into a stirring container, and mechanical stirring and ultrasonic dispersion are combined to form a stable and uniform dispersion. The dispersion was distributed on the carrier configuration plane by spin coating process, and the conductive film layer was constructed by hot pressing process, with the hot pressing temperature set to 80°C and the hot pressing duration set to 90 seconds; The formed conductive film layer is tested by a four-probe test method to output a surface resistance value, which is limited to fall between 120 ohms per square and 180 ohms per square; Step S2: Construction of interface buffer film: Gallium, indium, tin, tungsten nanoparticles, sodium acetate and tributylphosphine are sequentially mixed in a preset mass ratio, and a multi-component liquid phase mixed system is generated by a low-temperature hot melt method; wherein the temperature of the low-temperature hot melt method is controlled between 40°C and 55°C; The obtained liquid phase mixed system was spread on the surface of the main conductive layer using a blade coating method, and then immediately subjected to a polishing-induced condensation treatment, with the polishing pressure set to 200 g / cm2 and the interface temperature controlled in the range of 28°C to 38°C; Under the guidance of the tungsten nanoparticle distribution, the gallium and indium alloy system performs a structural condensation process along the direction of the potential gradient, forming no less than 100 disconnected fractured island-like structural blocks, with the size of each block controlled between 0.3 microns and 1.8 microns; Step S3: Formation of pattern structure layer: The silicon nitride powder, lithium borate, potassium titanate and lead boron glass flux are uniformly mixed, and the particle size of the obtained mixture is controlled to D90≤300 nanometers by spray drying process; The dried material is subjected to a compression molding operation and sintered at 1400°C for 4 hours to generate a structural layer; Mechanical polishing is performed on the surface of the sintered structural layer, and the output surface roughness Ra does not exceed 2 nanometers; Reactive ion etching is used to perform pattern coding operations on the surface area of ​​the structural layer, with etching parameters set to a period of 300 nanometers and a depth of 50 nanometers to form a fixed coding pattern structure; Step S4: Structural integration and interface sealing: performing a face-to-face lamination process on the patterned structure layer after pattern etching and the double-layer structure including the interface buffer film; An interface plasma cleaning operation was performed in a nitrogen environment, followed by a hot press sealing operation with the hot press parameters being a temperature of 85°C, a pressure of 100 g / cm2, and a duration of 120 seconds; A 3-fluoropropyltriethoxysilane coupling agent is introduced between the layers. The amount of the coupling agent used is 0.6 parts. The coupling agent participates in the interface reaction during the hot pressing process to construct a bonded bridge chain structure. After forming the three-layer integrated structure, a surface integrity test is performed to ensure that there is no separation or delamination between the main conductive layer, the interface buffer film and the pattern structure layer.

[0012] In a preferred embodiment, in the polishing induced condensation treatment of step S2, a grinding and polishing lubricant composed of 0.2 parts of fluorosilicone oil and 1.5 parts of glycerol ether is introduced into the liquid phase mixed system, and under the temperature control of the interface temperature of 28°C to 38°C, a bidirectional linear scraping frequency of 60 times per minute is continuously applied for 90 seconds to induce the gallium-indium alloy to preferentially deposit in the tungsten nanoparticle distribution area and form an island structure block with a boundary fracture rate of not less than 85%.

[0013] In a preferred embodiment, in the mechanical polishing of step S3, a mirror polishing slurry composed of 0.02 micron cerium oxide and ammonium borate in a mass ratio of 10:1 is applied to the surface of the sintered pattern structure layer, and three cycles of mechanical polishing are continuously performed at a circular reciprocating trajectory of 90 times / minute under a pressure of 120 grams per square centimeter. In the final cycle, 0.3 parts of aminosilane solution are introduced as a critical buffer to induce the formation of a passivation layer on the surface of the glass phase, so as to achieve Ra control within the range of 1.5-2 nanometers.

[0014] Technical effects and advantages of the present invention: This scheme achieves spatial separation of the potential coupling path between the main conductive layer and the pattern structure layer by constructing an interface fracture island structure formed by a low-melting-point liquid alloy. It can effectively cut off the equipotential closed loop in the quasi-resonant state, thereby suppressing the interference pattern flicker, phase shift and image defocus problems caused by electric field pulsation, and improving the operating stability of the holographic element in a highly integrated environment.

[0015] The designed interface buffer film forms multiple solid fracture island blocks with disconnected boundaries under polishing-induced condensation conditions. Their distribution density and regional isolation characteristics are controllable, which interrupts the lateral conductive extension of the main conductive layer at the physical level, reduces the in-plane electrostatic resonance driving conditions, and realizes structural-level control of charge distribution and electric field disturbance paths.

[0016] The main conductive layer adopts a graphene oxide-silver nanowire dual-network conductive structure, in which silver nanowires are dispersed with a high aspect ratio in a coating phase formed by a polyvinyl alcohol composite dispersant. After hot pressing and compounding, a continuous and uniform conductive channel is constructed while maintaining a medium surface resistance range, effectively controlling the static electricity accumulation rate.

[0017] The introduction of tungsten nanoparticles into the interface buffer film makes the local charge induction direction spatially selective. The asymmetry of the induced potential distribution is further regulated by coating with fluorinated polytrifluoroethylene, thereby increasing the lateral discontinuity ratio of the fracture islands formed in the interface region and enhancing the integrity and uniformity of the electric field interruption. BRIEF DESCRIPTION OF THE DRAWINGS

[0018] Figure 1 It is a schematic diagram of the process flow of the present invention. DETAILED DESCRIPTION

[0019] The following will clearly and completely describe the technical solutions in the embodiments of the present invention in conjunction with the accompanying drawings. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without making creative efforts are within the scope of protection of the present invention.

[0020] Refer to the instruction manual Figure 1 According to an embodiment of the present invention, a medium-free holographic optical element based on grinding and polishing parameters comprises the following three layers: The first layer is a main conductive layer composed of the following components by weight: 40 parts reduced graphene oxide, 22 parts silver nanowires, 12 parts polyvinyl alcohol composite dispersant, 25 parts deionized water, and 1 part interfacial stabilizer. The second layer structure is an interface buffer film, which is arranged between the main conductive layer and the pattern structure layer and is composed of the following components in proportion by mass: 80 parts of gallium, 14 parts of indium, 3 parts of tin, 1 part of tungsten nanoparticles, 1 part of sodium acetate, and 1 part of tributylphosphine; The third layer is a pattern structure layer, which is composed of the following components by mass ratio: 80 parts of silicon nitride powder, 10 parts of lithium borate, 6 parts of potassium titanate, and 4 parts of lead boron glass flux; It should be noted that the main conductive layer formula is designed to construct a composite conductive network structure with high conductivity, good film-forming properties and hot-pressing stability to meet the composite requirements of dielectric-free holographic optical elements for surface resistance, interface stability and process adaptability. Reduced graphene oxide serves as a conductive skeleton to impart high in-plane electron mobility and structural coverage, and is set at 40 parts to form a continuous conductive channel; silver nanowires are used to construct bridging channels, and the ratio of 22 parts forms a three-dimensional conductive complementary structure with graphene, improving interlayer conductivity while suppressing the risk of agglomeration; polyvinyl alcohol composite dispersant is set at 12 parts as an interface coating phase to stabilize the nanowire distribution and provide a flexible interface buffer; 25 parts of deionized water is used as a solvent to provide system homogeneity, facilitating the formation of a wet film structure with consistent thickness; 1 part of interface stabilizer is used to regulate the charge distribution and film-forming rheological boundary of graphene, enhancing the interface coupling stability with the subsequent buffer film, and the overall ratio forms a synergistic system of a dual-scale conductive network and a flexible coating phase, ensuring that the main conductive layer has stable conductive properties and interface structural integrity; The formulation of the interface buffer film is based on gallium as the main phase component, providing a liquid matrix at a ratio of 80 parts, which can be in a controllable flow state near room temperature, which is conducive to the subsequent condensation fracture process induced by polishing; indium and tin are 14 parts and 3 parts respectively, forming a low-melting-point alloy system with gallium. Its eutectic structure has a clear solid-liquid phase transition temperature zone, which can form a boundary-stable structural migration path under thermal disturbance conditions and ensure that the fracture area does not remelt and re-adhere to the interface; tungsten nanoparticles (1 part) have high density and high potential gradient induction capabilities, and serve as charge-guiding micro-regions during the polishing stage. The formation of structural induction points plays a guiding role in the distribution of fracture islands induced by non-uniform electric fields. Sodium acetate and tributylphosphine are each 1 part. The former participates in regulating the initial diffusion rate and crystallization trend of each element in the metal system, while the latter acts as a dynamic inhibitor of the metal-oxygen interface reaction, delaying the local alloy precipitation process and ensuring that the formation time and regional distribution of the fracture area are controllable. In terms of the setting of the number of parts of this component system, a buffer structure with both condensation-induced fracture and interface insulation isolation capabilities is constructed, avoiding the coupling disturbance problem caused by equipotential field resonance between the main conductive layer and the pattern structure layer. Furthermore, in the design of the pattern structure layer formulation, silicon nitride powder serves as the primary structural component, forming the main skeleton at 80 parts. This material exhibits high mechanical strength, low thermal expansion coefficient, and good plasma etching responsiveness, maintaining the integrity of the pattern boundary during the subsequent reactive ion etching process. Lithium borate, a structural modulating phase, is added at 10 parts to regulate the low-temperature sintering behavior of the ceramic system and introduce a microcrystalline transition zone, improving the homogeneity and forming precision of the etched surface. Potassium titanate is added at 6 parts to increase the surface polarizability of the material, contributing to the establishment of a stable optical phase distribution after etching. Lead boron glass flux is added at 4 parts to promote interfacial wettability and bonding between the silicon nitride powder and auxiliary components during sintering, ensuring a uniform sintered density and the absence of significant porosity, resulting in an optical encoding surface with an Ra of less than 2 nanometers. This formulation maintains stable closure across four dimensions: material system, sintering behavior, etching suitability, and interface compatibility, making it suitable for constructing subwavelength periodic structures.

[0021] The main conductive layer is compounded by coating and hot pressing to form a continuous conductive film layer, and the surface resistance of the main conductive layer is controlled within the range of 120 to 180 ohms per square; The interface buffer film is condensed by terminal polishing to form a plurality of disconnected fractured island structure blocks, wherein the boundaries of the fractured island structure blocks are discontinuously distributed, so as to cut off the equipotential coupling between the main conductive layer and the underlying pattern structure; The pattern structure layer is spray-dried and sintered to form a sub-wavelength pattern coding matrix, wherein the matrix has a pattern carrier surface with Ra≤2nm and a periodic structure is formed by ion beam etching; It should be noted that the structural construction process of the main conductive layer achieves functional zoning and interface coupling control through the continuous process linkage of the three-layer material system. In the construction of the main conductive layer, the initial wet film is formed by uniform coating, and the hot pressing process is used to promote the densification of the conductive network and achieve structural solidification. Its surface resistance is stably controlled within the range of 120 to 180 ohms per square, which is used to ensure that the optical element has the conductive function without introducing charge retention or lateral coupling interference. On this basis, the interface buffer film is condensed using a terminal polishing induction method, so that the liquid alloy system is transformed into multiple disconnected fractured island-like structural blocks under the action of the polishing force field. The island boundaries are discontinuous, which can effectively destroy the equipotential closed path that may be formed between the upper and lower structures and block the electric field coupling induced by high-frequency resonance. The pattern structure layer forms a compact with controllable particle size during the spray drying stage, and after sintering, an optical coding carrier with low surface roughness is obtained. Subsequent ion beam etching forms a stable periodic structure, achieving high-precision loading of subwavelength pattern information. During the entire structural construction process, the functional parameters and interface behaviors of each layer have been set through pre-process settings to achieve interlocking constraints and performance separation, ensuring the stability of the holographic response and the anti-interference ability of the system operation.

[0022] The silver nanowires are dispersed in a coating phase formed by a polyvinyl alcohol composite dispersant in the main conductive layer. The silver nanowires have a diameter of 40 nanometers and a length of 30 micrometers. The silver content of the silver nanowires accounts for 22 parts by weight of the total mass of the main conductive layer. The silver nanowires are prepared by an in-situ silver formate reduction method to ensure uniform dispersion and continuity of the conductive path. It should be noted that by dispersing silver nanowires in the coating phase formed by the polyvinyl alcohol composite dispersant, a stable conductive network is constructed to ensure that the nanowires are evenly distributed in the main conductive layer and form an effective bridging structure. The diameter of the silver nanowires is set to 40 nanometers and the length is 30 microns, which is conducive to spanning the lateral gaps between the graphene oxide sheets and improving the overall conductive continuity. The silver content is set to 22 parts, which is a limit design to maximize the conductive performance without causing agglomeration and interface short-circuit risks. The in-situ silver formate reduction method is used to prepare silver nanowires, which can achieve simultaneous reduction and embedding in the dispersed system, avoiding later agglomeration and sol precipitation, and ensuring the integrity of the conductive path structure.

[0023] During the formation of the interface buffer film, the interface polishing temperature is controlled between 28° C. and 38° C., so that the gallium and indium alloy system preferentially grows along the tungsten nanoparticle induced area under the drive of charge, forming no less than 100 fractured island structure blocks per unit area, and the block size ranges from 0.3 to 1.8 microns; It should be noted that by controlling the interface polishing temperature in the range of 28°C to 38°C, the low-melting-point alloy system of gallium and indium maintains moderate fluidity under restricted thermal disturbance conditions, and preferentially grows along the tungsten nanoparticle induced area under the action of charge, forming a controlled solidification path; this induction mechanism causes the liquid phase alloy to undergo directional fracture under the local potential gradient, and ultimately constructs no less than 100 unconnected island structure blocks with a size of 0.3 to 1.8 microns per unit area, which are used to achieve effective separation and coupling blocking of the upper and lower potential paths.

[0024] The surface of the tungsten nanoparticles is coated with 0.3 parts of fluorinated polytrifluoroethylene to guide the potential distribution in the gallium and indium alloy system to form an asymmetric state, thereby increasing the lateral discontinuity ratio of the fracture island region and enhancing the effectiveness of the blocking path. It should be noted that by coating 0.3 parts of fluorinated polytrifluoroethylene on the surface of tungsten nanoparticles, a stable potential interference layer is constructed, and its insulation and electronegativity differences are used to guide the non-uniform distribution of the local electric field during the alloy condensation process. This asymmetric potential drives the alloy to form a laterally discontinuous solidification boundary at the interface, thereby increasing the separation density between the fracture islands, ensuring the formation of multi-path potential isolation areas inside the buffer film, and improving the stability and spatial coverage of the overall blocking effect.

[0025] Before etching the pattern structure layer, the silicon nitride powder is spray-dried to control its particle size to D90 ≤ 300 nanometers, and then ion beam etching is performed to form a pattern coding structure with a period of 300 nanometers and a depth of 50 nanometers on the surface, while maintaining its optical interference phase integrity under the action of the fracture island region; It should be noted that by spray-drying the silicon nitride powder before etching, the particle size is controlled within the range of D90≤300 nanometers, ensuring that the matrix formed after sintering has a uniform and dense surface morphology, which is conducive to maintaining the pattern accuracy. Secondly, reactive ion etching is used to construct a pattern coding structure with a period of 300 nanometers and a depth of 50 nanometers on the surface to achieve subwavelength-level phase control function; after formation, the pattern structure layer cooperates with the fracture island area below to maintain the spatial stability of the interference path and avoid phase shift caused by interface potential disturbance.

[0026] The main conductive layer and the interface buffer film are bonded to each other through a silane coupling agent. The silane coupling agent is 3-fluoropropyltriethoxysilane, and the amount used is 0.6 parts. The silane coupling agent is used to improve the interlayer adhesion and prevent the risk of delamination during the subsequent holographic pattern forming process. It should be noted that 0.6 parts of 3-fluoropropyltriethoxysilane are introduced as a silane coupling agent between the main conductive layer and the interface buffer film, and a covalent anchor is formed with the surface of the two layers of materials through its end group to construct a stable interface bonding network. Under hot pressing conditions, the coupling agent can simultaneously react with the graphene composite system and the metal buffer material to form a continuous bridge chain structure, thereby improving the interlayer adhesion and suppressing the risk of delamination or desorption caused by stress mismatch caused by subsequent heat treatment or ion etching.

[0027] The processing technology of dielectric-free holographic optical elements based on grinding and polishing parameters includes: Step S1: Preparation of the main conductive layer: The reduced graphene oxide, silver nanowires, polyvinyl alcohol composite dispersant, deionized water and an interfacial stabilizer are sequentially added into a stirring container, and mechanical stirring and ultrasonic dispersion are combined to form a stable and uniform dispersion. The dispersion was distributed on the carrier configuration plane by spin coating process, and the conductive film layer was constructed by hot pressing process, with the hot pressing temperature set to 80°C and the hot pressing duration set to 90 seconds; The formed conductive film layer is tested by a four-probe test method to output a surface resistance value, which is limited to fall between 120 ohms per square and 180 ohms per square; Step S2: Construction of interface buffer film: Gallium, indium, tin, tungsten nanoparticles, sodium acetate and tributylphosphine are sequentially mixed in a preset mass ratio, and a multi-component liquid phase mixed system is generated by a low-temperature hot melt method; wherein the temperature of the low-temperature hot melt method is controlled between 40°C and 55°C; The obtained liquid phase mixed system was spread on the surface of the main conductive layer using a blade coating method, and then immediately subjected to a polishing-induced condensation treatment, with the polishing pressure set to 200 g / cm2 and the interface temperature controlled in the range of 28°C to 38°C; Under the guidance of the tungsten nanoparticle distribution, the gallium and indium alloy system performs a structural condensation process along the direction of the potential gradient, forming no less than 100 disconnected fractured island-like structural blocks, with the size of each block controlled between 0.3 microns and 1.8 microns; Step S3: Formation of pattern structure layer: The silicon nitride powder, lithium borate, potassium titanate and lead boron glass flux are uniformly mixed, and the particle size of the obtained mixture is controlled to D90≤300 nanometers by spray drying process; The dried material is subjected to a compression molding operation and sintered at 1400°C for 4 hours to generate a structural layer; Mechanical polishing is performed on the surface of the sintered structural layer, and the output surface roughness Ra does not exceed 2 nanometers; Reactive ion etching is used to perform pattern coding operations on the surface area of ​​the structural layer, with etching parameters set to a period of 300 nanometers and a depth of 50 nanometers to form a fixed coding pattern structure; Step S4: Structural integration and interface sealing: performing a face-to-face lamination process on the patterned structure layer after pattern etching and the double-layer structure including the interface buffer film; An interface plasma cleaning operation was performed in a nitrogen environment, followed by a hot press sealing operation with the hot press parameters being a temperature of 85°C, a pressure of 100 g / cm2, and a duration of 120 seconds; A 3-fluoropropyltriethoxysilane coupling agent is introduced between the layers. The amount of the coupling agent used is 0.6 parts. The coupling agent participates in the interface reaction during the hot pressing process to construct a bonded bridge chain structure. After forming the three-layer integrated structure, a surface integrity test is performed to ensure that there is no separation or delamination between the main conductive layer, the interface buffer film and the pattern structure layer.

[0028] Furthermore, in the polishing induced condensation treatment of step S2, a grinding and polishing lubricant composed of 0.2 parts of fluorosilicone oil and 1.5 parts of glycerol ether is introduced into the liquid phase mixed system, and under the temperature control of the interface temperature of 28°C to 38°C, a bidirectional linear scraping frequency of 60 times per minute is continuously applied for 90 seconds to induce the gallium-indium alloy to preferentially deposit in the tungsten nanoparticle distribution area, and form an island structure block with a boundary fracture rate of not less than 85%.

[0029] Furthermore, in the mechanical polishing of step S3, a mirror polishing slurry composed of 0.02 micron cerium oxide and ammonium borate in a mass ratio of 10:1 is applied to the surface of the sintered pattern structure layer, and three cycles of mechanical polishing are continuously performed at a circular reciprocating trajectory of 90 times / minute under a pressure of 120 grams per square centimeter. At the last cycle, 0.3 parts of aminosilane solution are introduced as a critical buffer to induce the formation of a passivation layer on the surface of the glass phase, so as to achieve Ra control within the range of 1.5-2 nanometers.

[0030] Table 1: Effect of interface buffer film structure on conductive layer performance

[0031] Table 2: Effect of fracture island structure density on the phase stability of the pattern layer

[0032] Table 3 Grinding induced fracture structure control table

[0033] Table 4 Grinding and polishing mirror stability table

[0034] It should be noted that the five groups of samples corresponding to the same embodiment are constructed on the main conductive layer formed under different interface buffer film structure control conditions. The "unstructured" state does not introduce any fractured film structure, and the conductive layer is directly exposed to the cross-interface potential. The "island structure" series is based on the microscale fracture behavior of low-melting-point alloys in the condensation-shear composite field, and the fracture structure density is gradually controlled by three variables: polishing pressure, temperature control range, and induced particle distribution. The formation of fracture islands achieves spatial separation of lateral potentials on a microscale, causing quantifiable interference with the charge conduction path, thereby affecting the overall resistance continuity and surface stability. The density and distribution of the island structures are not theoretically derived or set values, but are directly measured sample by sample using scanning electron microscopy imaging combined with statistical algorithms. Changes in the fault rate also correspond to the actual image presented by the integrity of the conductive signal in the conductive atomic force scanning area. This model, which maps the electrical macroscopic response based on differences in the structural microstate, results in a regular, bivariate decreasing trend in resistance values ​​and fault rate between samples, without sudden changes or anomalous distribution. Especially under high-density and coating control conditions, the spatial uniformity of the fracture islands is enhanced, further decoupling the conductive paths and significantly shrinking the potential disturbance zone. This structural state itself determines the simultaneous decrease in resistance and fault rate indicators. Therefore, each set of data from A1 to A5 in the table is not an isolated sample formed under discrete experimental conditions, but a system response result obtained under a set of experimental logic with continuous control variables and traceable formation mechanism; the influence of different interface buffer film states on the performance of the conductive layer presents a closed correspondence between structural parameters-microscopic response-electrical performance, rather than an isolated distribution between the results.

[0035] It should be noted that the data in Table 2 revolve around the corresponding relationship between the density variation of the fracture island structure and the interferometric phase response of the patterned structure layer. The fracture islands are micro-region solidification products during the condensation process of the interface buffer film, and their density is controlled by the combined effects of physical parameters such as polishing pressure, charge-induced configuration, and condensation rate of the alloy system. During the structure formation process, the distribution of the number of fracture islands per unit area directly determines the configuration of the electric field perturbation path of the interface layer on the upper pattern structure, which in turn affects the spatial consistency of the optical interference phase after pattern etching. In the experiment, by systematically controlling the induction factor, while maintaining consistent film thickness, etching depth, and encoding period, the formation density of fracture islands was gradually increased, and the corresponding pattern response was quantitatively collected. The phase offset test uses the interferometry method to measure the optical response of the pattern layer after etching. By comparing it with the theoretical reference phase, the phase drift value in the unit area is solved; the distortion area is calculated based on the spatial error integral after image reconstruction, reflecting the spatial dislocation range of the coding pattern after being disturbed in the interference path; as the fracture island density increases from 60 / μm 2 Gradually increase to 180 / μm 2 , the phase shift decreased from 0.28rad to 0.12rad, and the distortion area decreased from 8.1% to 2.4% simultaneously; this change trend reflects the layer-by-layer enhancement of the interface fracture structure's ability to shield potential interference, enabling continuous improvement in the upper pattern in terms of etching accuracy and optical path integrity; More importantly, this set of data is not a comparison of isolated samples, but a structure-response sequence based on the same material system, unified construction process, and gradually progressive variable conditions; the density distribution and spatial uniformity of the fracture islands not only affect the electrical properties of the interface, but also transmit stress, electric potential and interference offset signals to the upper optical structure through the intermediary mechanism of charge field interference; therefore, the presented phase response and pattern distortion changes have a clear structural causal chain, and the data in the table show a reasonable and continuous downward relationship, which is a true reflection of the coupling behavior between structural variables and optical output.

[0036] The above description is only a preferred embodiment of the present invention and is not intended to limit the present invention. Any modifications, equivalent substitutions, improvements, etc. made within the spirit and principles of the present invention should be included in the scope of protection of the present invention.

Claims

1. A medium-free holographic optical element based on grinding and polishing parameters, characterized in that: The optical element comprises the following three layers in sequence: The first layer is a main conductive layer composed of the following components by weight: 40 parts reduced graphene oxide, 22 parts silver nanowires, 12 parts polyvinyl alcohol composite dispersant, 25 parts deionized water, and 1 part interfacial stabilizer. The second layer structure is an interface buffer film, which is arranged between the main conductive layer and the pattern structure layer and is composed of the following components in proportion by mass: 80 parts of gallium, 14 parts of indium, 3 parts of tin, 1 part of tungsten nanoparticles, 1 part of sodium acetate, and 1 part of tributylphosphine; The third layer structure is a pattern structure layer, which is composed of the following components in proportion by mass: 80 parts of silicon nitride powder, 10 parts of lithium borate, 6 parts of potassium titanate, and 4 parts of lead boron glass flux.

2. The medium-free holographic optical element based on grinding and polishing parameters according to claim 1, characterized in that: The main conductive layer is compounded by coating and hot pressing to form a continuous conductive film layer, and the surface resistance of the main conductive layer is controlled within the range of 120 to 180 ohms per square; The interface buffer film is condensed by terminal polishing to form a plurality of disconnected fractured island structure blocks, wherein the boundaries of the fractured island structure blocks are discontinuously distributed, so as to cut off the equipotential coupling between the main conductive layer and the underlying pattern structure; The pattern structure layer is spray-dried and sintered to form a sub-wavelength pattern coding matrix. The matrix has a pattern carrier surface with Ra≤2nm and a periodic structure is formed by ion beam etching.

3. The medium-free holographic optical element based on grinding and polishing parameters according to claim 1, characterized in that: The silver nanowires are dispersed in a coating phase formed by a polyvinyl alcohol composite dispersant in the main conductive layer. The diameter of the silver nanowires is 40 nanometers and the length is 30 micrometers. The overall silver content of the silver nanowires accounts for 22 parts of the total mass of the main conductive layer in terms of the number ratio.

4. The medium-free holographic optical element based on grinding and polishing parameters according to claim 1, characterized in that: During the formation of the interface buffer film, the interface polishing temperature is controlled between 28°C and 38°C, so that the alloy system of gallium and indium grows along the tungsten nanoparticle induction area under charge drive, forming no less than 100 fractured island structure blocks per unit area, and the block size ranges from 0.3 to 1.8 microns.

5. The medium-free holographic optical element based on grinding and polishing parameters according to claim 1, characterized in that: The surface of the tungsten nanoparticles is coated with 0.3 parts of fluorinated polytrifluoroethylene to guide the potential distribution in the alloy system of gallium and indium to form asymmetry.

6. The medium-free holographic optical element based on grinding and polishing parameters according to claim 1, characterized in that: Before etching the pattern structure layer, the silicon nitride powder is spray-dried to control its particle size to D90≤300 nanometers, and then ion beam etching is performed to form a pattern coding structure with a period of 300 nanometers and a depth of 50 nanometers on the surface.

7. The medium-free holographic optical element based on grinding and polishing parameters according to claim 1, characterized in that: The main conductive layer and the interface buffer film are bonded to each other through a silane coupling agent. The silane coupling agent is 3-fluoropropyltriethoxysilane, and the amount used is 0.6 parts.

8. A process for processing a dielectric-free holographic optical element based on grinding and polishing parameters, characterized in that: include: Step S1: Preparation of the main conductive layer: The reduced graphene oxide, silver nanowires, polyvinyl alcohol composite dispersant, deionized water and an interfacial stabilizer are sequentially added into a stirring container, and mechanical stirring and ultrasonic dispersion are combined to form a stable and uniform dispersion. The dispersion was distributed on the carrier configuration plane by spin coating process, and the conductive film layer was constructed by hot pressing process, with the hot pressing temperature set to 80°C and the hot pressing duration set to 90 seconds; The formed conductive film layer is tested by a four-probe test method to output a surface resistance value, which is limited to fall between 120 ohms per square and 180 ohms per square; Step S2: Construction of interface buffer film: Gallium, indium, tin, tungsten nanoparticles, sodium acetate and tributylphosphine are mixed in sequence according to a preset mass ratio, and a multi-component liquid phase mixed system is generated by hot melting; The obtained liquid phase mixed system was spread on the surface of the main conductive layer using a blade coating method, and then a polishing-induced condensation treatment was performed. The polishing pressure was set to 200 g / cm2 and the interface temperature was controlled in the range of 28°C to 38°C. Under the guidance of the tungsten nanoparticle distribution, the gallium and indium alloy system performs a structural condensation process along the direction of the potential gradient, forming no less than 100 disconnected fractured island-like structural blocks, with the size of each block controlled between 0.3 microns and 1.8 microns; Step S3: Formation of pattern structure layer: Silicon nitride powder, lithium borate, potassium titanate and lead boron glass flux are mixed, and the particle size of the obtained mixture is controlled to D90≤300 nm by spray drying process; The dried material is subjected to a compression molding operation and sintered at 1400°C for 4 hours to generate a structural layer; Mechanical polishing is performed on the surface of the sintered structural layer, and the output surface roughness Ra does not exceed 2 nanometers; Reactive ion etching is used to perform pattern coding operations on the surface area of ​​the structural layer, with etching parameters set to a period of 300 nanometers and a depth of 50 nanometers to form a fixed coding pattern structure; Step S4: Structural integration and interface sealing: performing a face-to-face lamination process on the patterned structure layer after pattern etching and the double-layer structure including the interface buffer film; An interface plasma cleaning operation was performed in a nitrogen environment, followed by a hot press sealing operation with the hot press parameters being a temperature of 85°C, a pressure of 100 g / cm2, and a duration of 120 seconds; A 3-fluoropropyltriethoxysilane coupling agent is introduced between the layers in an amount of 0.6 parts. The coupling agent participates in the interface reaction during the hot pressing process to construct a bonding bridge chain structure.

9. The process for manufacturing a medium-free holographic optical element based on grinding and polishing parameters according to claim 8, characterized in that: In the polishing-induced condensation treatment of step S2, a grinding and polishing lubricant consisting of 0.2 parts of fluorosilicone oil and 1.5 parts of glycerol ether is introduced into the liquid phase mixed system, and under the temperature control of the interface temperature of 28°C to 38°C, a bidirectional linear scraping frequency of 60 times per minute is continuously applied for 90 seconds to induce the gallium-indium alloy to preferentially deposit in the tungsten nanoparticle distribution area and form an island structure block with a boundary fracture rate of not less than 85%.

10. The process for manufacturing a medium-free holographic optical element based on grinding and polishing parameters according to claim 8, characterized in that: In the mechanical polishing of step S3, a mirror polishing slurry composed of 0.02 micron cerium oxide and ammonium borate in a mass ratio of 10:1 is applied to the surface of the sintered pattern structure layer. Three cycles of mechanical polishing are continuously performed at a circular reciprocating trajectory of 90 times / minute under a pressure of 120 grams per square centimeter. In the final cycle, 0.3 parts of aminosilane solution are introduced as a critical buffer to induce the formation of a passivation layer on the surface of the glass phase, so that Ra is controlled within the range of 1.5-2 nanometers.

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