Autonomous power-up circuit after separation of satellite and rocket, and control method and control device of autonomous power-up circuit
By using an autonomous power-on circuit composed of PMOS and NMOS tubes after the separation of the satellite and rocket, combined with the design of relays and diodes, the problems of large conduction loss of PMOS tubes and delay circuit risks in the existing technology are solved, and efficient and reliable satellite autonomous power-on is achieved, which reduces the weight and volume of the system and improves the reliability of the launch mission.
Patent Information
- Application Number
- CN202511225853.X
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-08-29
- Publication Date
- 2025-10-03
- Estimated Expiration
- 2045-08-29
AI Technical Summary
The existing satellite's autonomous power-on circuit after rocket-satellite separation has large PMOS tube conduction losses, which limits its use in small satellite energy systems. In addition, the external delay circuit method poses risks to the overall operation of the satellite when the rocket launch is delayed.
The autonomous power-on circuit structure adopts a combination of PMOS and NMOS tubes, takes advantage of the low conduction loss characteristics of the NMOS tube, and combines the relay and diode design to achieve autonomous access and reliable power supply of the satellite battery pack, avoiding dependence on power devices.
It reduces the conduction loss of the PMOS tube, improves energy transmission efficiency, reduces system weight and volume, enhances the reliability of the overall launch mission, and avoids the risks brought by mechanical contact failure and timer in traditional solutions.
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Figure CN120750335A_ABST
Abstract
Description
Technical Field
[0001] The present application relates to the technical field of satellite energy systems, and in particular to an autonomous power-up circuit after separation of a satellite from a rocket, and a control method and control device thereof. Background Art
[0002] With the rapid development of the satellite industry, energy system design targets are being developed to achieve cost reduction, high power density, and high efficiency. By designing a reasonable and feasible autonomous power-up circuit for satellites after rocket-satellite separation, it is possible to achieve a scenario where the active segment of the satellite remains unpowered after rocket-satellite docking and autonomously power up after rocket-satellite separation. This reduces the number of joint testing procedures at the satellite launch site and facilitates the design of high power density, reliability, and safety for satellite energy systems.
[0003] Common existing methods for autonomous satellite power-up after rocket-satellite separation include using a P-channel metal oxide semiconductor field-effect transistor (PMOS) as a battery discharge switch. Upon rocket-satellite separation, the trip switch opens, turning the PMOS on to enable autonomous satellite power-up. However, due to the high conduction losses of the PMOS, this approach is limited to small satellite power systems with power outputs of only a few hundred watts. Another approach uses an external delay circuit. A reset timer monitors the time of rocket-satellite separation. Once the set time condition is reached, the satellite power-up circuit directly powers the satellite. However, this approach has significant drawbacks. During the rocket's active phase, the system timer must be pre-energized continuously. If the rocket launch is delayed for other reasons, pre-energizing the satellite poses a significant risk to overall satellite operation. Summary of the Invention
[0004] In response to at least one problem in the prior art, the present application proposes an autonomous power-on circuit after satellite-rocket separation, a control method and a control device thereof. The autonomous power-on circuit has a simple and reliable structure, does not require an external delay circuit, can reduce the conduction loss of the PMOS tube, improve energy transmission efficiency, and thereby improve the reliability of the overall launch mission.
[0005] In order to solve the above technical problems, this application provides the following technical solutions:
[0006] In a first aspect, the present application provides an autonomous power-up circuit for a satellite after separation from a rocket, comprising:
[0007] Power bus, satellite battery pack, PMOS tube and N-channel Metal Oxide Semiconductor Field Effect Transistor (NMOS tube);
[0008] Power bus, satellite battery pack, PMOS tube and NMOS tube;
[0009] The power bus is respectively connected to the satellite load equipment, the satellite battery pack, the PMOS tube and the NMOS tube, and the satellite battery pack is respectively connected to the PMOS tube and the NMOS tube;
[0010] After the satellite and rocket are separated, the PMOS tube is turned on, and the satellite battery pack supplies power to the satellite payload equipment via the PMOS tube and the power bus, completing the connection of the satellite battery pack;
[0011] After the satellite battery pack is connected, the satellite payload device turns on the NMOS tube and turns off the PMOS tube, and the satellite battery pack supplies power to the satellite payload device via the NMOS tube and the power bus.
[0012] In one embodiment, the autonomous power-on circuit after the satellite-rocket separation further includes: a relay and a satellite-rocket separation travel switch;
[0013] The source of the PMOS tube is directly connected to the satellite battery pack, and the gate of the PMOS tube is connected to the satellite battery pack via a relay, a satellite-rocket separation limit switch and the power busbar which are connected in sequence;
[0014] After the satellite-rocket separation, the relay is in the on state, and the satellite-rocket separation limit switch is closed, so that the PMOS tube is turned on;
[0015] After the satellite battery pack is connected, the satellite load device turns on the NMOS tube and turns off the PMOS tube by disconnecting the relay.
[0016] In one embodiment, the autonomous power-on circuit after the satellite-rocket separation further comprises: a diode;
[0017] The anode of the diode is connected to the PMOS tube, and the cathode of the diode is connected to the power bus.
[0018] In one embodiment, a circuit consisting of a resistor and a first capacitor connected in series is provided between the gate and the drain of the PMOS transistor, and a second capacitor is provided between the gate and the source of the PMOS transistor.
[0019] In one embodiment, the autonomous power-on circuit after the satellite-rocket separation further includes: a driving circuit, the driving circuit is connected to the NMOS tube, and the satellite payload equipment turns on the NMOS tube through the driving circuit.
[0020] In a second aspect, a control method for an autonomous power-on circuit after separation of a satellite and a rocket is provided, which is applied to the autonomous power-on circuit. The control method includes:
[0021] After the satellite battery pack is connected, the NMOS tube is turned on and the PMOS tube is turned off, and the satellite battery pack supplies power to the satellite payload device via the NMOS tube and the power bus;
[0022] Completing the access of the satellite battery pack means that after the satellite-rocket separation, the PMOS tube is turned on, and the satellite battery pack supplies power to the satellite payload equipment via the PMOS tube and the power bus.
[0023] In one embodiment, the control method further includes:
[0024] During the last power-on stage on the ground, the relay is turned on and the satellite-rocket separation travel switch is in the off state, causing the PMOS tube to be disconnected.
[0025] In one embodiment, the control method further includes:
[0026] If it is determined that the voltage of the satellite battery pack drops to an over-discharge protection threshold, the NMOS tube is disconnected.
[0027] In one embodiment, after disconnecting the NMOS transistor, the method further includes:
[0028] When the voltage difference between the power bus and the satellite battery pack is greater than the conduction voltage of the body-mounted diode of the NMOS tube, the satellite solar cell is used to charge the satellite battery pack through the body-mounted diode of the NMOS tube.
[0029] In a third aspect, the present application provides a control device for an autonomous power-on circuit after separation of a satellite and a rocket, comprising:
[0030] The power supply module is used to turn on the NMOS tube and disconnect the PMOS tube after the satellite battery pack is connected. The satellite battery pack supplies power to the satellite payload equipment via the NMOS tube and the power bus.
[0031] Completing the access of the satellite battery pack means that after the satellite-rocket separation, the PMOS tube is turned on, and the satellite battery pack supplies power to the satellite payload equipment via the PMOS tube and the power bus.
[0032] In a fourth aspect, the present application provides an electronic device comprising a memory, a processor, and a computer program stored in the memory, wherein the processor executes the computer program to implement the steps of the method.
[0033] In a fifth aspect, the present application provides a computer-readable storage medium, wherein the computer-readable storage medium stores a computer program / instruction, and the computer program / instruction implements the steps of the method when executed by a processor.
[0034] In a sixth aspect, the present application provides a computer program product, comprising a computer program / instruction, which implements the steps of the method when executed by a processor.
[0035] It can be seen from the above technical solution that the present application provides an autonomous power-on circuit after the separation of the satellite and the rocket, its control method and control device. Among them, the autonomous power-on circuit includes: a power bus, a satellite battery pack, a PMOS tube and an NMOS tube; the power bus is respectively connected to the satellite payload equipment, the satellite battery pack, the PMOS tube and the NMOS tube, and the satellite battery pack is respectively connected to the PMOS tube and the NMOS tube; after the separation of the satellite and the rocket, the PMOS tube is turned on, and the satellite battery pack supplies power to the satellite payload equipment via the PMOS tube and the power bus, completing the connection of the satellite battery pack; after completing the connection of the satellite battery pack, the satellite payload equipment turns on the NMOS tube, disconnects the PMOS tube, and the satellite battery pack turns on the NMOS tube, and the satellite battery pack turns on the PMOS tube. The satellite payload equipment is supplied with power via the NMOS tube and the power bus. The autonomous power-on circuit has a simple and reliable structure and does not require an external delay circuit. It can reduce the conduction loss of the PMOS tube, improve the energy transmission efficiency, and thus improve the reliability of the overall launch mission. Specifically, the PMOS tube is only used at the beginning of power supply. The subsequent PMOS tube is disconnected to pass power, which can reduce the conduction loss of the PMOS tube and improve the energy transmission efficiency by utilizing the low conduction loss characteristic of the NMOS tube. It can also avoid dependence on power devices such as power relays and power limit switches, and can reduce the volume and weight of the autonomous power-on circuit on the basis of reducing the conduction loss of the PMOS tube. BRIEF DESCRIPTION OF THE DRAWINGS
[0036] In order to more clearly illustrate the embodiments of the present application or the technical solutions in the prior art, the following briefly introduces the drawings required for use in the embodiments or the description of the prior art. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without any creative work.
[0037] Figure 1 This is a first structural block diagram of the autonomous power-up circuit of the satellite after the separation of the satellite and the rocket in the embodiment of the present application;
[0038] Figure 2This is a second structural block diagram of the autonomous power-up circuit after the satellite-rocket separation in an embodiment of the present application;
[0039] Figure 3 This is a third structural block diagram of the autonomous power-up circuit of the satellite after the separation of the satellite and the rocket in the embodiment of the present application;
[0040] Figure 4 This is a fourth structural block diagram of the autonomous power-up circuit of the satellite after the separation of the satellite and the rocket in the embodiment of the present application;
[0041] Figure 5 This is a schematic diagram of the autonomous power-up circuit after the satellite-rocket separation in the application example of this application;
[0042] Figure 6 This is a first flow chart of a method for controlling an autonomous power-on circuit after separation of a satellite from a rocket in an embodiment of the present application;
[0043] Figure 7 This is a second flow chart of the control method of the autonomous power-on circuit after the satellite-rocket separation in an embodiment of the present application;
[0044] Figure 8 This is a schematic diagram of the structure of the autonomous power-up circuit after the satellite-rocket separation in the application example of this application;
[0045] Figure 9 This is a structural block diagram of a control device for an autonomous power-on circuit after separation of a satellite and a rocket in an embodiment of the present application;
[0046] Figure 10 It is a schematic block diagram of the system structure of the electronic device according to an embodiment of the present application. DETAILED DESCRIPTION
[0047] In order to enable those skilled in the art to better understand the technical solutions in this specification, the technical solutions in the embodiments of this application will be clearly and completely described below in conjunction with the drawings in the embodiments of this application. Obviously, the embodiments described are only part of the embodiments of this application, not all of the embodiments. Based on the embodiments in this application, all other embodiments obtained by ordinary technicians in this field without making creative efforts are within the scope of protection of this application.
[0048] With the rapid development of miniaturized satellite technology, launching multiple satellites on a single rocket will become the primary method for microsatellite uplink. Furthermore, since the battery capacity of small commercial satellites is generally small, it is difficult to provide the long-term power supply required for the satellite at the launch site and on the active end. Therefore, the active end of the satellite on the rocket has been changed from a traditional powered state to an autonomous power supply after separation from the rocket. Traditional battery pack discharge switch designs use power relays or contactors, weighing several hundred grams. The mechanical contact life of a relay is generally 100,000 cycles, while that of a contactor is often only 5,000 to 10,000 cycles. Furthermore, the arcing generated during load switching can easily corrode the contacts and even cause them to fail.
[0049] Based on this, and to address the problems existing in the above-mentioned prior art, the embodiments of the present application provide a post-satellite-rocket separation autonomous power-up circuit, a control method, and a control device therefor. In the design of the battery discharge switch, the low conduction loss characteristic of the NMOS tube is utilized to improve energy transmission efficiency. At the same time, a diode is added to the autonomous power-up PMOS circuit to make the circuit unidirectionally conductive, thereby overcoming the problem of PMOS tube burnout and short-circuit failure that may occur when the discharge switch is disconnected and the battery pack is charged in an emergency state of the energy system. This is the first time that a PMOS tube is used in parallel with an NMOS tube in the design of the satellite battery pack discharge switch and autonomous access switch. Compared with traditional solutions, this approach can reduce weight by at least 50%, while overcoming the life and reliability issues of relay mechanical contacts. Furthermore, for satellites of different power levels, only the number of MOS tubes needs to be changed, without the need to add relays or contactors, which does not significantly increase system weight and has a significant energy density advantage. A simple and reliable circuit design can be used to achieve autonomous access to the power bus of the microsatellite after separation from the rocket and the satellite. A more reliable design can be adopted in the control process of enabling the autonomous access state and the battery charging path under abnormal power system conditions. This can avoid dependence on power devices and reduce the problem of large conduction losses of PMOS tubes. It has certain practical significance in improving energy transmission efficiency, reducing the volume and weight of microsatellites, and improving overall mission reliability.
[0050] In order to solve the problems existing in the above-mentioned prior art, the present application provides an autonomous power-on circuit after the separation of the satellite and the rocket, its control method and control device, and arranges an NMOS tube in the autonomous power-on circuit. By utilizing the low conduction loss characteristic of the NMOS tube, the conduction loss of the PMOS tube can be reduced, thereby improving the energy transmission efficiency; it can also overcome the risk of increased satellite weight and volume, or reduced reliability of the overall launch mission caused by the prior art's reliance on power-type devices or timers. A simple and reliable circuit design can be used to achieve autonomous access to the power bus after the separation of the microsatellite and the rocket, and a more reliable design is adopted in the battery charging path in the control process enabled by the autonomous access state and in the abnormal state of the power system, which has certain practical significance in reducing the volume and weight of the microsatellite and improving the overall mission reliability.
[0051] The details are described in the following embodiments.
[0052] In order to reduce the conduction loss of the PMOS tube, improve the energy transmission efficiency, and thus improve the reliability of the overall launch mission, this embodiment provides an autonomous power-on circuit after the satellite-rocket separation. Figure 1 As shown, the autonomous power-on circuit specifically includes the following contents:
[0053] A power bus 1, a satellite battery pack 2, a PMOS tube 3 and an NMOS tube 4; the satellite battery pack and the power bus are both connected to the PMOS tube; the power bus is respectively connected to the satellite payload equipment, the satellite battery pack, the PMOS tube and the NMOS tube, and the satellite battery pack is respectively connected to the PMOS tube and the NMOS tube.
[0054] After the separation of the satellite and the rocket, the PMOS tube is turned on, and the satellite battery pack supplies power to the satellite payload equipment via the PMOS tube and the power bus, completing the access of the satellite battery pack; after completing the access of the satellite battery pack, the satellite payload equipment turns on the NMOS tube and disconnects the PMOS tube, and the satellite battery pack supplies power to the satellite payload equipment via the NMOS tube and the power bus.
[0055] Specifically, the satellite payload equipment may include onboard power distribution equipment and a satellite service computer. After the satellite battery pack is connected, the service computer in the satellite payload equipment may turn on the NMOS transistor and turn off the PMOS transistor. The current provided by the satellite battery pack may flow through the PMOS transistor to the power bus, which then supplies power to the satellite payload equipment. After a preset duration, the service computer may turn on the NMOS transistor and turn off the PMOS transistor, allowing the current provided by the satellite battery pack to flow through the NMOS transistor to the power bus, which then supplies power to the satellite payload equipment. The preset duration is very short and can be set based on actual conditions.
[0056] Specifically, the autonomous power-on circuit may include one or multiple PMOS tubes in parallel, and the autonomous power-on circuit may include one or multiple NMOS tubes in parallel. The number of PMOS tubes and NMOS tubes may be set according to the power demand after the satellite-rocket separation and the maximum power demand of the mission mode, respectively. This application does not impose any restrictions on this.
[0057] Furthermore, in order to improve the reliability of the PMOS tube being turned on and off, as Figure 2 As shown, the autonomous power-on circuit after satellite-rocket separation further includes: a relay 5 and a satellite-rocket separation limit switch 6; the source of the PMOS tube is directly connected to the satellite battery pack, and the gate of the PMOS tube is connected to the satellite battery pack via the relay, the satellite-rocket separation limit switch and the power busbar connected in sequence; after satellite-rocket separation, the relay is in the on state, and the satellite-rocket separation limit switch is closed, so that the PMOS tube is turned on; after completing the connection of the satellite battery pack, the satellite payload equipment turns on the NMOS tube and disconnects the PMOS tube by disconnecting the relay.
[0058] Specifically, the mechanical part of the satellite-rocket separation limit switch is controlled by the mechanical interface between the satellite and the separation device. When the satellite separates, the contacts of the satellite-rocket separation limit switch are closed. When the satellite separates, the relay remains in the on state, and the satellite-rocket separation limit switch is closed, which can turn on the PMOS tube.
[0059] Furthermore, in order to improve the reliability of the autonomous power-up circuit, e.g. Figure 3 As shown, the positive line and the negative line of the power bus can be connected via a filter capacitor 7.
[0060] Specifically, the relay can be connected to the gate of the PMOS tube and one end of the satellite-rocket separation travel switch respectively, and the other end of the satellite-rocket separation travel switch is connected to the negative electrode 22 of the satellite battery pack via the negative line 12 of the power bus; the source of the PMOS tube is connected to the positive electrode 51 of the satellite battery pack, the drain of the PMOS tube and the source of the NMOS tube are both connected to the positive line 11 of the power bus, the drain of the NMOS tube is connected to the positive electrode 21 of the satellite battery pack, and the positive line of the power bus and the negative electrode of the satellite battery pack can be connected to the satellite payload equipment; Figure 4 As shown, a sampling resistor 8 may be provided on the negative line of the power bus, and the satellite payload device may be connected to the negative electrode of the satellite battery pack via the sampling resistor. The negative line of the power bus is grounded. The positive electrode of the satellite battery pack can flow the current provided by it to the positive line of the power bus via the source and drain of the NMOS transistor. The positive line of the power bus flows the current to the satellite payload device, and the satellite payload device can return the current to the negative electrode of the satellite battery pack.
[0061] Specifically, when there are multiple PMOS transistors connected in parallel, and multiple NMOS transistors connected in parallel, a relay can be connected to the gates of each PMOS transistor and one end of a satellite-rocket separation switch, the other end of which is connected to the negative terminal of the satellite battery pack via the negative line of the power bus. The source of each PMOS transistor is connected to the positive terminal of the satellite battery pack, the drain of each PMOS transistor is connected to the positive line of the power bus, the source of each NMOS transistor is connected to the positive line of the power bus, and the drain of each NMOS transistor is connected to the positive terminal of the satellite battery pack. During satellite-rocket separation, the relay can remain in an on state, the satellite-rocket separation switch is closed, causing each PMOS transistor to conduct, and the satellite battery pack to supply power to the satellite payload via each PMOS transistor and the power bus. The satellite payload drives each NMOS transistor to conduct, disconnecting the relay, causing each PMOS transistor to disconnect, and the satellite battery pack to supply power to the satellite payload via each NMOS transistor and the power bus.
[0062] In order to ensure that the circuit has unidirectional conductivity and avoid the problem of PMOS tube burning and short circuit failure caused by disconnecting the discharge switch and charging the battery pack in an emergency state of the energy system, such as Figure 4 As shown, in one embodiment, the autonomous power-on circuit after the satellite-rocket separation further includes: a diode 9; the positive electrode of the diode is connected to the PMOS tube, and the negative electrode of the diode is connected to the power bus.
[0063] Specifically, if there are multiple PMOS transistors, the drain of each PMOS transistor can be connected to the positive line of the power bus via a corresponding diode, with the anode of the diode connected to the drain of its corresponding PMOS transistor and the cathode of the diode connected to the power bus. This can prevent some current from flowing through the PMOS transistor after the NMOS transistor is disconnected, and as the temperature rises, the conduction voltage drop decreases, the current gradually increases, and the PMOS transistor burns out. The diode can be a Schottky diode, and the conduction direction of the Schottky diode is from the drain of the PMOS transistor to the positive line of the power bus.
[0064] In order to slow down the turn-on speed of the PMOS tube and reduce the surge current, in one embodiment, a circuit consisting of a resistor and a first capacitor in series is provided between the gate and drain of the PMOS tube, and a second capacitor is provided between the gate and source of the PMOS tube.
[0065] Specifically, the first capacitor is a capacitor between the gate and the drain of the PMOS transistor, and the second capacitor is a capacitor between the gate and the source of the PMOS transistor.
[0066] In order to improve the reliability of the on-off control of the NMOS tube, in one embodiment, the autonomous power-on circuit after the satellite-rocket separation further includes: a driving circuit, the driving circuit is connected to the NMOS tube, and the satellite payload equipment turns on the NMOS tube through the driving circuit.
[0067] Specifically, the driving circuit may be a radiation-resistant magnetic isolation integrated driving circuit, which may be connected to a satellite payload device, and the satellite payload device may implement on-off control of an NMOS transistor through the driving circuit.
[0068] To further illustrate this solution, this application provides an application example of an autonomous power-up circuit for a satellite after rocket-satellite separation. In this application example, the autonomous power-up circuit includes an autonomous PMOS circuit, a battery pack charge-discharge circuit, and a sampling and drive circuit. The autonomous PMOS circuit may include rocket-satellite separation switches S1 and S2, a relay K, autonomous PMOS transistors Q19-Q21, and diodes D1-D3. The battery pack charge-discharge circuit may include a filter capacitor, NMOS transistors Q1-Q18, a battery pack, and a power bus. The sampling and drive circuit may include a drive circuit and a sampling resistor. The function implemented by the rocket-satellite separation switch is equivalent to that implemented by the rocket-satellite separation trip switch. The function implemented by the autonomous PMOS transistor is equivalent to that implemented by the PMOS transistor.
[0069] like Figure 5As shown, one set of contacts of relay K is connected to the gate of PMOS tube Q19-Q21 through driving resistor and filter capacitor, and the other set of contacts is connected to the satellite-rocket separation travel switch (S1, S2). S1 and S2 are initially disconnected and connected at the separation moment and thereafter. The other end of the satellite-rocket separation travel switch is connected to the negative bus (i.e., the negative line of the power bus) and connected to the negative battery (i.e., the negative electrode of the satellite battery pack) through sampling resistor R0; it is connected to PMOS tube Q19-Q21 ( Figure 5 Only two of the PMOS tubes are shown in the figure) are connected in parallel, the source of the three PMOS tubes is connected to the positive electrode of the battery (i.e. the positive electrode of the battery pack), and the drains are connected in series with diodes D1-D3 ( Figure 5 Only two of the diodes are shown in the figure), then connected to the positive line of the power bus, the positive poles of diodes D1-D3 are connected to the drain of the PMOS tube, and the negative poles are connected to the positive line of the power bus; the battery pack charging and discharging NMOS tubes Q1-Q18 ( Figure 5 Only two NMOS tubes are shown in the figure) are connected in parallel, the drain of the NMOS tube is connected to the positive electrode of the battery pack, and the source is connected to the positive line of the power bus; the bus filter capacitor C0 is connected in parallel between the positive line of the bus (that is, the positive line of the power bus) and the negative line; the battery pack charging and discharging NMOS tubes use independent isolated drivers to achieve high-side drive.
[0070] The autonomous PMOS circuit is designed with three P-channel MOSFETs in parallel. Relay K also has two backup relays. The drive circuit uses a resistor divider. During the autonomous PMOS turn-on process, there is an inrush current. To suppress this inrush, a capacitor C2 is placed between the gate (G) and source (S) of each PMOS transistor. An RC snubber circuit consisting of a resistor R in series with capacitor C1 is placed between the gate (G) and drain (D). This slows the turn-on of the PMOS transistor and reduces the inrush current. Capacitor C1 can be equivalent to the first capacitor mentioned above, and C2 can be equivalent to the second capacitor.
[0071] The battery pack discharge switch is implemented using 18 parallel-connected NMOS transistors. A radiation-resistant magnetically isolated integrated drive circuit is used to control the NMOS transistors' on / off switching. The number of autonomously connected PMOS transistors, diodes, and battery pack charge and discharge NMOS transistors can be adjusted based on the satellite's post-rocket separation power requirements and the maximum power demand during mission mode.
[0072] In order to reduce the conduction loss of the PMOS tube, improve the energy transmission efficiency, and thus improve the reliability of the overall launch mission, the embodiment of the present application provides a control method for the autonomous power-on circuit after the satellite-rocket separation, which is applied to the autonomous power-on circuit. The execution subject of the control method can be a satellite service computer, and the control device of the autonomous power-on circuit after the satellite-rocket separation can be deployed in the satellite service computer, such as Figure 6 As shown, the control method includes:
[0073] Step 101: After completing the access of the satellite battery pack, turn on the NMOS tube and disconnect the PMOS tube, and the satellite battery pack supplies power to the satellite payload equipment via the NMOS tube and the power bus; wherein, completing the access of the satellite battery pack means that after the satellite-rocket separation, the PMOS tube is turned on, and the satellite battery pack supplies power to the satellite payload equipment via the PMOS tube and the power bus.
[0074] Specifically, after the satellite separates, the limit switch contacts close, connecting the gate of the PMOS transistor to the negative line of the power bus. The gate voltage drops from a floating state to a negative voltage, turning the PMOS transistor on. Once the PMOS transistor is turned on, the positive electrode of the battery pack is connected to the positive line of the power bus through the source and drain of the PMOS transistor. The current provided by the battery pack flows from the source to the drain of the PMOS transistor. Based on the satellite's initial power distribution state, power is supplied to initial power-on devices such as the satellite computer through the onboard power distribution equipment.
[0075] Specifically, the driver circuit can receive a control signal from the satellite's onboard computer to turn on the NMOS transistor. Once the NMOS transistor is turned on, the PMOS transistor is short-circuited. The onboard computer then sends a relay disconnect command, disabling the autonomous power-on function and shutting off the PMOS transistor. This prevents malfunction of the NMOS transistor's control function for battery pack charging and discharging caused by a trip switch failure. The preset duration can be set based on actual circumstances and is not limited in this application.
[0076] like Figure 7 As shown, in one embodiment, before step 101, the method further includes:
[0077] Step 001: During the last power-on phase on the ground, the relay is turned on and the satellite-rocket separation travel switch is in the off state, so that the PMOS tube is disconnected.
[0078] Specifically, the last power-on stage on the ground may indicate the last power-on stage on the ground; in the last power-on stage on the ground, the relay is turned on, and the satellite-rocket separation travel switch remains disconnected, so that the PMOS tube can be disconnected, and the autonomous access function of the power bus is in an enabled state.
[0079] In one embodiment, before step 001, the method further includes: disconnecting the relay during the satellite ground testing phase.
[0080] Specifically, during the satellite ground test phase, disconnecting the relay can disable the autonomous access function of the power bus, thereby reducing the satellite launch site joint test process.
[0081] In order to improve the overall reliability of the energy system in an emergency, in one embodiment, after step 101, the following steps are further included:
[0082] Step 102: If it is determined that the voltage of the satellite battery pack drops to an over-discharge protection threshold, the NMOS transistor is disconnected.
[0083] Specifically, the voltage of the satellite battery pack can be obtained in real time, and the voltage of the satellite battery pack can be monitored to see if it drops to the over-discharge protection threshold. The NMOS tube is then disconnected to prevent the battery pack from discharging.
[0084] In order to improve the overall reliability of the energy system in an emergency, in one embodiment, after step 102, the following steps are further included:
[0085] When the voltage difference between the power bus and the satellite battery pack is greater than the conduction voltage of the body-mounted diode of the NMOS tube, the satellite solar cell is used to charge the satellite battery pack through the body-mounted diode of the NMOS tube.
[0086] Specifically, the voltages of the power bus, the satellite battery pack, and the forward voltage of the NMOS transistor's body diode can be obtained. Based on the voltages of the power bus, the satellite battery pack, and the forward voltage of the NMOS transistor's body diode, it is determined whether the voltage difference between the power bus and the satellite battery pack is greater than the forward voltage of the NMOS transistor's body diode. After the satellite solar cell charges the satellite battery pack via the NMOS transistor's body diode, if the voltage of the satellite battery pack rises to a normal level, the NMOS transistor is closed. The satellite solar cell can be connected to the NMOS transistor's body diode.
[0087] To further illustrate this solution, in conjunction with the above-mentioned application example of the autonomous power-on circuit after satellite-rocket separation, this application provides an application example of a control method for the autonomous power-on circuit after satellite-rocket separation, which is specifically described as follows:
[0088] Step 1: After the separation of the rocket and satellite, the satellite battery pack is connected autonomously.
[0089] Two parallel backup relays, K1 and K2, serve as the enabling switches for the autonomous power-up circuit. During the satellite's ground testing phase, relays K1 and K2 are disconnected, disabling the autonomous power bus access function. During the final ground power-up, relays K1 and K2 are connected. The gate of the autonomous power-up PMOS transistor is connected to the negative power bus line via limit switches S1 and S2. The fixed points of the limit switches S1 and S2 contacts are connected to the negative power bus line. These switches remain disconnected until satellite-rocket separation, leaving the gate of the autonomous power-up PMOS transistor floating. The PMOS is disconnected, enabling the autonomous power bus access function. The autonomous power-up circuit after satellite-rocket separation can represent the satellite's autonomous power bus access circuit. Relay K, described above, can be composed of relays K1 and K2.
[0090] The mechanical parts of the limit switches S1 and S2 are controlled by the mechanical interface between the satellite and the separation device. When the satellite is separated, the contacts of the limit switches S1 and S2 are closed, so that the gate of the autonomously connected PMOS tube is connected to the negative line of the power bus. The gate voltage is pulled down from the floating state to the negative voltage, and the PMOS tube is turned on. Since an RC buffer circuit is set between the G and S poles and between the G and D poles of the PMOS tube, the conduction speed of the PMOS tube is reduced, effectively suppressing the generation of surge current.
[0091] After the autonomous access PMOS tube is turned on, the positive pole of the battery pack is connected to the positive line of the power bus through the S pole and D pole of the PMOS tube. The current flows from the S pole to the D pole of the PMOS tube. According to the initial power distribution status of the satellite, power is supplied to the initial power-on equipment such as the satellite computer through the on-board power distribution equipment.
[0092] At this point, the autonomous access of the satellite battery pack after the separation of the rocket and satellite is completed. When in use, the number of autonomously connected PMOS tubes can be adjusted according to the initial power demand.
[0093] Step 2: Support the power demand of satellite mission status.
[0094] After the battery pack completes autonomous access, the battery pack charge and discharge NMOS tube driver receives the satellite satellite service computer control signal to drive the parallel NMOS tubes Q1-Q18 to turn on. After the battery pack charge and discharge NMOS tubes are turned on, the autonomous access PMOS tubes are short-circuited. The satellite service computer will send relays K1 and K2 disconnect instructions to disable the autonomous power-on function and turn off the autonomous access PMOS tube to avoid abnormal control function of the battery pack charge and discharge NMOS tube caused by failure of the travel switch.
[0095] At this point, the satellite power bus is established, which can support the power demand under the satellite mission state. When in use, the number of NMOS tubes for charging and discharging the battery pack can be adjusted according to the maximum power consumption under the satellite mission mode.
[0096] Step 3: Control of autonomous power-on circuit under abnormal conditions.
[0097] In the event of an anomaly in the satellite energy system, causing the battery voltage to drop to the over-discharge protection threshold and the battery charge / discharge NMOS transistor to disconnect, a stable and reliable charging path is provided for the battery pack. In this emergency, the satellite solar cells charge the battery pack. Once the battery pack voltage returns to normal, the battery charge / discharge NMOS transistor closes, exiting the over-discharge protection state. The battery charge / discharge NMOS transistor performs functions equivalent to those of the aforementioned NMOS transistor.
[0098] like Figure 5 As shown, the battery charging and discharging NMOS transistor and the autonomous access PMOS transistor are connected in parallel between the battery pack's positive terminal and the positive power bus line. During normal operation, the battery pack discharges to the power bus through the NMOS transistor. When the satellite energy system enters an emergency state, the battery pack voltage drops and triggers the over-discharge protection function, the NMOS transistor shuts off to prevent battery pack discharge. When the difference between the power bus voltage and the battery pack voltage exceeds the conduction voltage of the NMOS transistor's body diode, the satellite solar cell can charge the battery pack through the NMOS transistor's body diode.
[0099] Since the autonomous access PMOS tube is only used for battery access when the satellite is first powered on, at which time the satellite power consumption is relatively low, an SMD packaged surface mount device was selected, and the thermal design of the PMOS tube was performed based on the initial power-on power of the satellite. The battery charging and discharging NMOS tube and the autonomous access PMOS tube are connected in parallel, and the body-mounted diodes of the NMOS and PMOS tubes are also connected in parallel. The forward voltage drop of the body-mounted diode has a negative temperature coefficient. In order to avoid the situation where some current flows through the PMOS tube after the NMOS tube is disconnected in an emergency, and as the temperature rises, the forward voltage drop decreases, the current gradually increases, and the PMOS tube burns out, such as Figure 8 As shown, this application example sets a Schottky diode at the drain of the autonomously connected PMOS tube. The diode conducts in the direction from the drain of the PMOS tube to the power bus, preventing the battery pack charging current from flowing through the diode installed on the autonomously connected PMOS tube body. Figure 8 Here, IRF5M5210 can represent a PMOS transistor, and JHCS10N56NAR1 can represent an NMOS transistor.
[0100] In order to reduce the conduction loss of the PMOS tube, improve the energy transmission efficiency, and thus improve the reliability of the overall launch mission, the present application provides an embodiment of a control device for an autonomous power-on circuit after the separation of a satellite and a rocket, which is used to realize all or part of the control method of the autonomous power-on circuit after the separation of the satellite and a rocket, see Figure 9 The control device for the autonomous power-on circuit after the satellite-rocket separation specifically includes the following contents:
[0101] The power supply module 01 is used to turn on the NMOS tube and disconnect the PMOS tube after completing the connection of the satellite battery pack. The satellite battery pack supplies power to the satellite payload equipment via the NMOS tube and the power bus. The connection of the satellite battery pack means that after the separation of the satellite and the rocket, the PMOS tube is turned on and the satellite battery pack supplies power to the satellite payload equipment via the PMOS tube and the power bus.
[0102] The embodiment of the control device for the autonomous power-on circuit after the separation of a satellite and a rocket provided in this specification can be specifically used to execute the processing flow of the embodiment of the control method for the autonomous power-on circuit after the separation of a satellite and a rocket. Its functions will not be described in detail here, and reference can be made to the detailed description of the embodiment of the control method for the autonomous power-on circuit after the separation of a satellite and a rocket.
[0103] Figure 10 A schematic diagram of the physical structure of an electronic device provided in an embodiment of the present invention, such as Figure 10 As shown, the electronic device includes: a memory 1001, a processor 1002, and a computer program stored in the memory 1001 and executable on the processor 1002. When the processor 1002 executes the computer program, the following method is implemented:
[0104] After the satellite battery pack is connected, the NMOS tube is turned on and the PMOS tube is turned off, and the satellite battery pack supplies power to the satellite payload device via the NMOS tube and the power bus;
[0105] Completing the access of the satellite battery pack means that after the satellite-rocket separation, the PMOS tube is turned on, and the satellite battery pack supplies power to the satellite payload equipment via the PMOS tube and the power bus.
[0106] This embodiment discloses a computer program product, which includes a computer program. When the computer program is executed by a processor, the following method is implemented:
[0107] After the satellite battery pack is connected, the NMOS tube is turned on and the PMOS tube is turned off, and the satellite battery pack supplies power to the satellite payload device via the NMOS tube and the power bus;
[0108] Completing the access of the satellite battery pack means that after the satellite-rocket separation, the PMOS tube is turned on, and the satellite battery pack supplies power to the satellite payload equipment via the PMOS tube and the power bus.
[0109] This embodiment provides a computer-readable storage medium, wherein the computer-readable storage medium stores a computer program. When the computer program is executed by a processor, the following method is implemented:
[0110] After the satellite battery pack is connected, the NMOS tube is turned on and the PMOS tube is turned off, and the satellite battery pack supplies power to the satellite payload device via the NMOS tube and the power bus;
[0111] Completing the access of the satellite battery pack means that after the satellite-rocket separation, the PMOS tube is turned on, and the satellite battery pack supplies power to the satellite payload equipment via the PMOS tube and the power bus.
[0112] Those skilled in the art will appreciate that embodiments of the present invention may be provided as methods, systems, or computer program products. Thus, the present invention may take the form of an entirely hardware embodiment, an entirely software embodiment, or an embodiment combining software and hardware aspects. Furthermore, the present invention may take the form of a computer program product implemented on one or more computer-usable storage media (including but not limited to magnetic disk storage, CD-ROM, optical storage, etc.) containing computer-usable program code.
[0113] The present invention is described with reference to flowcharts and / or block diagrams of methods, devices (systems), and computer program products according to embodiments of the present invention. It should be understood that each process and / or block in the flowcharts and / or block diagrams, as well as combinations of processes and / or blocks in the flowcharts and / or block diagrams, can be implemented by computer program instructions. These computer program instructions can be provided to a processor of a general-purpose computer, a special-purpose computer, an embedded processor, or other programmable data processing device to produce a machine, so that the instructions executed by the processor of the computer or other programmable data processing device generate instructions for implementing the processes in the flowcharts and / or block diagrams. Figure 1 a process or multiple processes and / or boxes Figure 1 A device that provides the functions specified in a block or multiple blocks.
[0114] These computer program instructions may also be stored in a computer readable memory that can direct a computer or other programmable data processing device to work in a specific manner, so that the instructions stored in the computer readable memory produce an article of manufacture comprising an instruction device, which implements the process Figure 1 a process or multiple processes and / or boxes Figure 1 The function specified in one or more boxes.
[0115] These computer program instructions can also be loaded onto a computer or other programmable data processing device so that a series of operational steps are executed on the computer or other programmable device to produce a computer-implemented process, thereby providing the instructions executed on the computer or other programmable device for implementing the process. Figure 1 a process or multiple processes and / or boxes Figure 1 A step that specifies a function in one or more boxes.
[0116] Throughout this specification, reference to terms such as "one embodiment," "a specific embodiment," "some embodiments," "for example," "example," "specific example," or "some examples" means that the specific features, structures, materials, or characteristics described in conjunction with the embodiment or example are included in at least one embodiment or example of the present invention. In this specification, schematic representations of the above terms do not necessarily refer to the same embodiment or example. Furthermore, the specific features, structures, materials, or characteristics described may be combined in any suitable manner in any one or more embodiments or examples.
[0117] The specific embodiments described above further illustrate the objectives, technical solutions and beneficial effects of the present invention in detail. It should be understood that the above description is only a specific embodiment of the present invention and is not intended to limit the scope of protection of the present invention. Any modifications, equivalent substitutions, improvements, etc. made within the spirit and principles of the present invention should be included in the scope of protection of the present invention.
Claims
1. An autonomous power-on circuit for a satellite after separation from a rocket, characterized in that: include: Power bus, satellite battery pack, PMOS tube and NMOS tube; The power bus is respectively connected to the satellite load equipment, the satellite battery pack, the PMOS tube and the NMOS tube, and the satellite battery pack is respectively connected to the PMOS tube and the NMOS tube; After the satellite and rocket are separated, the PMOS tube is turned on, and the satellite battery pack supplies power to the satellite payload equipment via the PMOS tube and the power bus, completing the connection of the satellite battery pack; After the satellite battery pack is connected, the satellite payload device turns on the NMOS tube and turns off the PMOS tube, and the satellite battery pack supplies power to the satellite payload device via the NMOS tube and the power bus.
2. The autonomous power-on circuit after satellite-rocket separation according to claim 1, characterized in that: Also includes: Relay and satellite-rocket separation travel switch; The source of the PMOS tube is directly connected to the satellite battery pack, and the gate of the PMOS tube is connected to the satellite battery pack via a relay, a satellite-rocket separation limit switch and the power busbar which are connected in sequence; After the satellite-rocket separation, the relay is in the on state, and the satellite-rocket separation limit switch is closed, so that the PMOS tube is turned on; After the satellite battery pack is connected, the satellite load device turns on the NMOS tube and turns off the PMOS tube by disconnecting the relay.
3. The autonomous power-on circuit after satellite-rocket separation according to claim 1 or 2, characterized in that: Also includes: diode; The anode of the diode is connected to the PMOS tube, and the cathode of the diode is connected to the power bus.
4. The autonomous power-on circuit after satellite-rocket separation according to claim 1, characterized in that: A circuit consisting of a resistor and a first capacitor connected in series is provided between the gate and the drain of the PMOS tube, and a second capacitor is provided between the gate and the source of the PMOS tube.
5. The autonomous power-on circuit after satellite-rocket separation according to claim 1, characterized in that: Also includes: A driving circuit is connected to the NMOS tube, and the satellite payload device turns on the NMOS tube through the driving circuit.
6. A method for controlling an autonomous power-on circuit after separation of a satellite and a rocket, characterized in that: Applied to the autonomous power-up circuit according to any one of claims 1 to 5, the control method comprises: After the satellite battery pack is connected, the NMOS tube is turned on and the PMOS tube is turned off, and the satellite battery pack supplies power to the satellite payload device via the NMOS tube and the power bus; Completing the access of the satellite battery pack means that after the satellite-rocket separation, the PMOS tube is turned on, and the satellite battery pack supplies power to the satellite payload equipment via the PMOS tube and the power bus.
7. The control method according to claim 6, characterized in that: Also includes: During the last power-on stage on the ground, the relay is turned on and the satellite-rocket separation travel switch is in the off state, causing the PMOS tube to be disconnected.
8. The control method according to claim 6, characterized in that: Also includes: If it is determined that the voltage of the satellite battery pack drops to an over-discharge protection threshold, the NMOS tube is disconnected.
9. The control method according to claim 8, characterized in that: After disconnecting the NMOS tube, the method further includes: When the voltage difference between the power bus and the satellite battery pack is greater than the conduction voltage of the body-mounted diode of the NMOS tube, the satellite solar cell is used to charge the satellite battery pack through the body-mounted diode of the NMOS tube.
10. A control device for an autonomous power-on circuit after separation of a satellite and a rocket, characterized in that: include: The power supply module is used to turn on the NMOS tube and disconnect the PMOS tube after the satellite battery pack is connected. The satellite battery pack supplies power to the satellite payload equipment via the NMOS tube and the power bus. Completing the access of the satellite battery pack means that after the satellite-rocket separation, the PMOS tube is turned on, and the satellite battery pack supplies power to the satellite payload equipment via the PMOS tube and the power bus.
11. An electronic device comprising a memory, a processor, and a computer program stored in the memory, wherein: The processor executes the computer program to implement the steps of the method according to any one of claims 6 to 9.
12. A computer-readable storage medium, characterized in that The computer-readable storage medium stores a computer program / instruction, which implements the steps of the method according to any one of claims 6 to 9 when executed by a processor.
13. A computer program product comprising a computer program / instructions, characterized in that When the computer program / instructions are executed by a processor, the steps of the method according to any one of claims 6 to 9 are implemented.
Citation Information
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