Manufacturing method of printed circuit board of notebook computer

Abstract

The invention discloses a manufacturing method of a notebook computer printed circuit board, which comprises the following steps: mixing and stirring resin and a nano ceramic filler to form a resin solution, coating the surface of a base material with the resin solution, and heating to a semi-cured state to obtain a composite base material; etching the composite base material according to a preset layout, alternately stacking the double-sided inner-layer circuit base materials and prepregs containing glass fiber materials, and performing vacuum hot pressing treatment to obtain a laminated structure, the number of the double-sided inner-layer circuit base materials being equal to the number of the prepregs; after chemical electroplating treatment is carried out on the laminated structure, etching treatment is carried out on the outer layer surface of the laminated structure according to a preset circuit pattern, and an outer layer circuit structure is formed; and coating solder resist ink on the outer circuit structure to form a solder resist layer to obtain the notebook computer printed circuit board. According to the invention, the interlayer bonding strength of the multi-layer printed circuit board can be obviously improved, so that the technical problem of insufficient performance stability of a high-density circuit board in the manufacturing process is systematically solved.

Description

Technical Field

[0001] The present application relates to the technical field of circuit board manufacturing, and in particular to a method for manufacturing a notebook computer printed circuit board. Background Art

[0002] The rapid growth of the notebook market is driving increasing demands for high performance, thinness, and reliability. As a core component of notebooks, printed circuit boards (PCBs) play a crucial role in signal transmission, power management, and component connectivity. Multilayer PCBs, particularly 12-layer PCBs, have become the preferred choice for high-performance notebooks due to their ability to support high-density circuit layouts and excellent electrical performance.

[0003] However, existing technologies for manufacturing multi-layer notebook PCBs face a core technical challenge: insufficient interlayer bonding strength. This issue directly impacts the PCB's structural stability and long-term reliability, leading to interlayer delamination or failure under high loads or complex operating environments. This makes it difficult to meet the high performance and durability requirements of modern notebook computers.

[0004] Existing technologies improve manufacturing quality by optimizing single process steps or introducing new equipment. However, these improvements often target only specific aspects and fail to address overall performance stability issues. For example, existing technologies enhance the corrosion resistance of circuit boards by improving surface treatment processes, but this fails to effectively address the reliability of interlayer connections. Another existing technology improves the sophistication of circuit patterns by increasing machining precision, but this can lead to reduced production efficiency due to increased process complexity.

[0005] Therefore, there is an urgent need for a new manufacturing method that can systematically solve the problem of insufficient performance stability in high-density circuit board manufacturing from the perspective of overall process design, so as to meet the requirements of laptops for high performance, lightness and long-term reliability. Summary of the Invention

[0006] The purpose of this application is to provide a method for manufacturing a notebook computer printed circuit board to solve the technical problem of insufficient interlayer bonding strength in the prior art.

[0007] To achieve this goal, this application adopts the following technical solutions: A method for manufacturing a notebook computer printed circuit board, comprising: Mixing a resin and a nano-ceramic filler and stirring to form a resin solution, applying the resin solution to a surface of a substrate and heating it to a semi-cured state to obtain a composite substrate; Etching the composite substrate according to a preset layout to obtain an inner layer circuit substrate; Alternately stacking double-sided inner layer circuit substrates and prepregs containing glass fiber material and subjecting them to vacuum hot pressing to obtain a laminated structure, wherein the number of the double-sided inner layer circuit substrates and the prepregs is equal; After chemically plating the laminated structure, etching the outer surface of the laminated structure according to a preset circuit pattern to form an outer circuit structure; Solder resist ink is coated on the outer layer circuit structure to form a solder resist layer to obtain a notebook computer printed circuit board.

[0008] Furthermore, the resin is a mixture of any one or more of polyimide resin, epoxy resin or phenolic resin.

[0009] Furthermore, the nano ceramic filler is a mixture of any one or more of alumina, zirconia, silicon nitride, boron nitride or silicon carbide.

[0010] Furthermore, the substrate is any one of copper foil, aluminum foil or nickel foil.

[0011] Furthermore, the steps of mixing and stirring the resin and the nano-ceramic filler to form a resin solution, applying the resin solution to the surface of the substrate and heating it to a semi-cured state to obtain a composite substrate include: The nano-ceramic filler, epoxy resin and polyimide resin are mixed in a mass ratio of 3:1 and placed in a stirring device for stirring to form a resin solution; Pre-treating the surface of the copper foil substrate with a dilute sulfuric acid solution, and coating the resin solution on the pre-treated surface of the copper foil substrate to obtain a primary coating substrate; The primary coated substrate is placed in a reaction kettle, baked at 80-90° C. for 10-12 minutes, and then heated to 150-160° C. at a rate of 10° C. / min and maintained for 15 minutes to allow the resin coating to reach a semi-cured state, thereby obtaining the composite substrate.

[0012] Furthermore, the step of etching the composite substrate according to the preset layout to obtain an inner layer circuit substrate includes: Applying a dry film photoresist on the surface of the composite substrate and heating it at 90-100° C. for 20-30 seconds to obtain a coated substrate; performing ultraviolet exposure treatment on the glue-coated substrate according to a preset layout to obtain an exposed substrate; Using a 0.8% mass concentration potassium carbonate solution as a developer, developing the exposed substrate with a developing device at a constant temperature of 20-25° C. to obtain a patterned substrate; Using an acidic copper sulfate etching solution with a concentration of 2.0 mol / L, etching the patterned substrate in an etching bath at a constant temperature of 30-32° C. for 15-20 seconds, then reducing the etching solution flow rate and etching for 25-30 seconds to obtain a primary circuit substrate; A 3% sodium hydroxide solution was used as a film removal solution to remove the primary circuit substrate at 40-45° C. to obtain an inner layer circuit substrate.

[0013] Furthermore, the step of alternately stacking double-sided inner layer circuit substrates and prepregs containing glass fiber material and performing vacuum hot pressing to obtain a laminated structure, wherein the number of the double-sided inner layer circuit substrates and the prepregs is equal, comprises: The prepreg containing the glass fiber material is immersed in a mixed solution containing nano-alumina particles and epoxy resin for immersion treatment to obtain a modified prepreg, wherein the particle size of the nano-alumina particles is 20 to 25 nanometers and the immersion time is 10 to 15 minutes; Alternately stacking a plurality of the modified prepregs and double-sided inner layer circuit substrates, and pressing them together using a hot press at 175-180° C. and 1.8-2 MPa for 60-80 minutes to obtain a pressed laminate structure; The laminated structure is scanned layer by layer using a laser device with a pulse energy of 0.4-0.5 mJ to form a plurality of micropores, thereby obtaining a laminated structure with interlayer interconnection channels.

[0014] Furthermore, the step of performing chemical electroplating on the laminated structure includes: Immersing the laminated structure in a colloidal activation solution containing 0.02-0.03 mol / L palladium chloride and 0.1-0.15 mol / L tin chloride for activation treatment, so that palladium ions form catalytic active sites on the inner walls of the micropores; The activated laminated structure is immersed in a chemical copper plating solution containing 0.05-0.06 mol / L copper sulfate, 0.1-0.15 mol / L formaldehyde and a complexing agent, and reacted at 48-50°C for 15 minutes to obtain a seed layer structure; The seed layer structure is placed in an electroplating solution containing 0.2-0.3 mol / L copper sulfate, 0.5-0.6 mol / L sulfuric acid and additives at 1.8-2 A / dm 2 The current density is set to 50-60 minutes at 25-30°C to obtain a conductive laminate structure.

[0015] Furthermore, the step of performing etching on the outer surface of the laminate structure according to the preset circuit pattern to form an outer circuit structure includes: coating a photoresist containing nano-silicon dioxide particles on the outer surface of the stacked structure, and baking at 90-95° C. for 5-10 minutes to obtain a photoresist-covered structure; Using a ferric chloride etching solution with a concentration of 3.0 mol / L, etching the photoresist covered structure in an etching tank at a constant temperature of 35-40° C. to obtain a preliminary outer layer structure; A 5% potassium hydroxide solution is used as a degumming solution to degumming the preliminary outer layer structure at 50-55° C. to obtain an outer layer circuit structure.

[0016] Furthermore, the step of applying solder resist ink on the outer layer circuit structure to form a solder resist layer to obtain a notebook computer printed circuit board includes: Applying solder resist ink to the surface of the outer circuit structure, wherein the solder resist ink comprises nano-alumina particles, a photosensitizer and a toughening agent to obtain an initial solder resist coating; performing ultraviolet exposure treatment on the initial solder resist coating using an ultraviolet light source to obtain a patterned solder resist coating; After developing the patterned solder resist coating with an alkaline developer, the patterned solder resist coating is subjected to a low-temperature curing treatment at 90-100° C. for 10-15 minutes to obtain the notebook computer printed circuit board.

[0017] Compared with the prior art, this application has the following beneficial effects: The manufacturing method of the laptop computer printed circuit board of the present application effectively enhances the mechanical strength and thermal stability of the substrate by mixing resin and nano-ceramic filler to form a high-performance resin solution and preparing a composite substrate; by alternately stacking double-sided inner layer circuit substrates and semi-cured sheets containing glass fiber materials and adopting vacuum hot pressing technology, the interlayer bonding strength and structural density are significantly improved, thereby effectively preventing interlayer delamination or failure under high load or complex environments (such as high temperature and high humidity); the combination of chemical electroplating and precise etching process enables the fineness of high-density circuit patterns and the superiority of electrical performance, and the application of solder mask improves the corrosion resistance and service life of the circuit board.

[0018] To sum up, this application, starting from the overall process flow, can significantly improve the interlayer bonding strength of multi-layer printed circuit boards, thereby systematically solving the overall technical problem of insufficient performance stability of high-density circuit boards during the manufacturing process, and meeting the comprehensive needs of modern laptops for high performance, lightness and long-term reliability. BRIEF DESCRIPTION OF THE DRAWINGS

[0019] In order to more clearly illustrate the embodiments of the present application or the technical solutions in the prior art, the following briefly introduces the drawings required for use in the embodiments or the description of the prior art. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying any creative labor.

[0020] The structures, proportions, sizes, etc. depicted in the drawings of this specification are only used to match the contents disclosed in the specification so as to facilitate understanding and reading by persons familiar with this technology. They are not intended to limit the conditions under which this application can be implemented, and therefore have no substantive technical significance. Any structural modifications, changes in proportional relationships, or adjustments in size should still fall within the scope of the technical contents disclosed in this application without affecting the efficacy and objectives that can be achieved by this application.

[0021] Figure 1 Schematic diagram of the overall steps of the manufacturing method of printed circuit boards for laptop computers. DETAILED DESCRIPTION

[0022] In order to make the purpose, features, and advantages of the invention of this application more obvious and easy to understand, the technical solutions in the embodiments of this application will be clearly and completely described below in conjunction with the drawings in the embodiments of this application. Obviously, the embodiments described below are only part of the embodiments of this application, not all of the embodiments. Based on the embodiments in this application, all other embodiments obtained by ordinary technicians in this field without making creative work are within the scope of protection of this application.

[0023] In the description of this application, it should be understood that the terms "upper", "lower", "top", "bottom", "inner", "outer", etc., indicating orientations or positional relationships, are based on the orientations or positional relationships shown in the accompanying drawings and are intended only to facilitate the description of this application and simplify the description. They do not indicate or imply that the devices or elements referred to must have a specific orientation, be constructed and operate in a specific orientation, and therefore should not be understood as limiting this application. It should be noted that when a component is considered to be "connected" to another component, it may be directly connected to the other component or there may be a centrally located component.

[0024] The technical solution of the present application will be further explained below with reference to the accompanying drawings and through specific implementation methods.

[0025] refer to Figure 1 The present application provides a method for manufacturing a notebook computer printed circuit board, comprising: S1: mixing a resin and a nano-ceramic filler and stirring to form a resin solution, applying the resin solution to a substrate surface and heating to a semi-cured state to obtain a composite substrate; In step S1, polyimide resin can be selected as the primary matrix material, and alumina and boron nitride (in a mass ratio of 10:1) can be selected as the nano-ceramic fillers. In practice, 1000 grams of polyimide resin, 90 grams of alumina, and 9 grams of boron nitride fillers can be placed in a high-speed stirring device operating at 2000 rpm and simultaneously treated with an ultrasonic dispersion device (at a frequency of 40 kHz) for approximately 30 minutes to uniformly disperse the nano-ceramic fillers in the resin, thereby forming a non-agglomerated, highly fluid resin solution. A high-purity copper foil (12 micron thick) is used as the substrate, and the resin solution is evenly coated on the copper foil surface using a coating device to achieve a uniform coating thickness (e.g., within a range of 10-15 microns). The ambient temperature during the coating process is controlled at 120 degrees Celsius, which allows the polyimide resin to gradually evaporate the solvent and enter a semi-cured state (i.e., stage B), forming a composite substrate with a certain degree of flexibility and adhesion. The coated substrate is plasma cleaned for 5 minutes using a plasma cleaning device with a power of 500 watts and a mixed plasma of argon and oxygen (in a ratio of 3:1) to remove organic contaminants from the surface. This removes surface roughness by increasing the surface roughness of the copper foil through physical and chemical effects (for example, increasing the surface roughness Ra from 0.2 microns to 0.5 microns), thereby significantly improving the adhesion between the resin coating and the copper foil. This surface modification effectively reduces dielectric loss (for example, the dielectric constant is reduced from 4.0 to 3.5) while increasing thermal conductivity (for example, from 0.5 W / m·K to 1.2 W / m·K), resulting in a single-sided copper-clad substrate with low dielectric loss and high thermal conductivity.

[0026] S2: etching the composite substrate according to a preset layout to obtain an inner layer circuit substrate; In step S2, the surface of the composite substrate is covered with a high-purity copper foil (e.g., with a thickness of 12 microns). In order to form a preset circuit pattern, a photoresist dry film is evenly coated on the surface of the copper foil using a coating device in a dust-free environment. The thickness of the photoresist dry film is controlled to be 25 microns. The photoresist is exposed according to a 12-layer circuit layout file designed by a computer-aided design using an ultraviolet exposure machine with a wavelength of 365 nanometers. This wavelength can effectively excite the photosensitizer in the photoresist to form a high-resolution latent image pattern. The computer-aided design (CAD) file contains circuit layout information, such as a circuit pattern with a line width and line spacing of 5 microns. For example, in actual operation, the substrate coated with the photoresist can be placed in a UV exposure machine, and a photomask can be used to align with the pattern in the CAD file. The exposure time is controlled within 10 seconds so that the photoresist undergoes a sufficient photochemical reaction in the exposed area and the unexposed area remains soluble. A 1% sodium carbonate solution is used as a developer to remove the photoresist in unexposed areas by spraying or immersion, thereby forming a precise circuit pattern template on the substrate surface. The low concentration of the sodium carbonate solution gently dissolves the unexposed photoresist while avoiding damage to the photoresist in the exposed areas. For example, the substrate can be placed in a developer tank, the developer temperature controlled at 25 degrees Celsius, and the development time controlled at 60 seconds. After development, the substrate is rinsed with deionized water to remove residual developer. This process ensures the clarity and edge precision of the circuit pattern template. For example, the formed pattern template can be accurate to 5 microns / 5 microns line width / line spacing. The exposed copper foil is etched in 30 seconds using a 2.5 mol / L acidic copper chloride etchant. The acidic copper chloride etchant has high copper etching ability and can complete the etching process in a short time, thereby reducing lateral erosion of the photoresist template and maintaining the high precision of the circuit pattern. A stripping solution is then used to remove the remaining photoresist, and the substrate is cleaned and dried to obtain the inner layer circuit substrate.

[0027] S3: alternately stacking double-sided inner layer circuit substrates and prepregs containing glass fiber material and performing vacuum hot pressing to obtain a laminated structure, wherein the number of the double-sided inner layer circuit substrates and the number of the prepregs are equal; In step S3, the prepreg is made from a low-flow epoxy resin system containing glass fiber reinforcement, with a thickness of 30 microns. Nanosilica fillers are added to enhance the material's mechanical strength and thermal stability. This prepreg flows and solidifies when heated, thereby bonding the multiple substrates together. For example, a prepreg made from E-glass fiber cloth impregnated with an epoxy resin containing nanosilica can have a dielectric constant as low as 3.8, making it suitable for high-frequency signal transmission and meeting the signal integrity requirements of laptop circuit boards. After preparing the double-sided inner layer circuit substrates and prepregs, six double-sided inner layer circuit substrates and six prepregs are alternately stacked in a substrate-prepreg-substrate order to form a 12-layer laminate. This alternating stacking ensures insulation and bonding between each inner layer circuit substrate through the prepregs, while maintaining symmetry between the layers to reduce the risk of warping during hot pressing. After stacking is completed, the laminate is pressed at 180 degrees Celsius and a pressure of 2 MPa using a vacuum hot press for 90 minutes. This process condition enables the epoxy resin in the semi-cured sheet to fully flow and solidify, thereby firmly bonding the multiple layers of substrate together. At the same time, the vacuum environment effectively eliminates bubbles between layers, avoiding the impact of bubble defects on the reliability of the circuit board. For example, a multi-layer vacuum hot press can be used to place the laminate between stainless steel pressing plates, set the heating rate to 3 degrees Celsius / minute, maintain a constant temperature after reaching 180 degrees Celsius, and press for 90 minutes under a uniform pressure of 2 MPa. During the pressing process, the vacuum degree is maintained below 10 Pa to ensure that there are no bubbles between layers and the bonding is tight. After pressing, the temperature is slowly lowered to room temperature to reduce internal stress. The resulting laminate structure has a smooth surface and excellent interlayer bonding strength. Interlayer interconnection channels are formed in the laminated structure through a laser drilling process. Specifically, a CO2 laser drilling device with a wavelength of 10.6 microns is used to scan and drill microholes with a diameter of 50 microns layer by layer with a pulse energy of 0.5 millijoules. These microholes are used as interlayer conductive holes (vias) to connect circuit patterns of different layers to achieve electrical interconnection of multi-layer circuits. For example, a high-precision CO2 laser drilling machine can be used to drill holes according to a preset hole layout through a computer-controlled scanning system. The laser pulse frequency is set to 10kHz, and the drilling time of a single hole is controlled within 0.1 seconds to ensure that the hole wall is smooth and there is no burning phenomenon. The 50-micron microhole size can meet the needs of high-density interconnection. At the same time, the high precision of laser drilling avoids the hole position deviation and substrate damage that may be caused by traditional mechanical drilling.

[0028] S4: After performing chemical electroplating on the laminated structure, etching is performed on the outer surface of the laminated structure according to a preset circuit pattern to form an outer circuit structure; In step S4, the purpose of chemical plating is to form a uniform conductive layer on the surface of the laminated structure and the inner wall of the micropores to ensure electrical connection between the layers of the circuit board and the conductivity of the outer layer circuit. In actual operation, the chemical plating process may include three sub-steps: desmearing, chemical copper plating and electrolytic copper plating. Desmearing is to remove the residues produced by the laminated structure during the drilling process, such as resin debris or glass fiber residue. The inner wall of the micropores can be cleaned with a potassium permanganate acidic solution with a concentration of 0.1 mol / L, and the processing time is about 10 minutes. This solution has strong oxidizing properties and can effectively decompose and remove organic matter remaining in the drilling process, while making the surface of the inner wall of the micropores slightly rough, thereby enhancing the adhesion of the subsequent copper plating layer. After completing the desmearing process, a thin copper seed layer is deposited on the inner wall of the micropores and the surface of the laminated structure as a conductive basis for subsequent electroplating. Chemical copper plating uses a chemical copper plating solution containing formaldehyde to react at 50 degrees Celsius to deposit a copper layer with a thickness of about 0.5 microns. Formaldehyde acts as a reducing agent in this process, reducing copper ions to metallic copper, which is deposited on the surface and pore walls of the laminated structure. In order to ensure the uniformity of the copper layer, the pH value and temperature of the solution need to be precisely controlled, for example, keeping the pH at around 12, and stirring the solution to ensure uniform contact with the substrate surface. After chemical copper plating, the laminated structure enters the electroplating copper stage, using a copper sulfate electroplating solution at a current density of 2 amperes per square decimeter for about 60 minutes, thereby depositing a copper layer with a thickness of about 15 microns on the inner wall and surface of the micropores. After the chemical electroplating process is completed, a uniform conductive copper layer has been formed on the surface of the laminated structure and the inner wall of the micropores, and etching is performed according to a preset circuit pattern to form an outer layer circuit structure. This process can use a process combining photolithography and etching, which is similar to the etching process of the inner layer circuit substrate in step S2, but with higher complexity and precision requirements for the outer layer circuit. A layer of photosensitive dry film or liquid photoresist is applied to the outer surface of the stacked structure to form a photoresist layer. Then, through UV exposure and development, the pre-set circuit pattern is transferred to the photoresist layer. This pre-set circuit pattern can be generated by circuit design software (such as Altium Designer or Cadence) and includes precise line width and spacing requirements.

[0029] S5: applying solder resist ink on the outer layer circuit structure to form a solder resist layer to obtain a notebook computer printed circuit board; In step S5, a coating device is used to apply a 20-micron thick liquid photosensitive green solder mask ink to the surface of the outer circuit structure of the circuit board. This ink contains nano-aluminum oxide particles with a particle size of 50 nanometers. The addition of these nanoparticles can significantly improve the wear resistance and thermal stability of the solder mask layer, making it less likely to crack or peel during high-temperature welding or long-term use. The coating device uses screen printing or roller coating technology to evenly cover the surface of the circuit board with ink. By squeezing the ink through a screen with a preset pattern, the ink is deposited on the surface of the circuit board according to the design requirements. After coating is completed, ultraviolet exposure and development treatment are carried out. The liquid photosensitive green solder mask ink is a photosensitive material whose characteristic is that it undergoes a chemical reaction under ultraviolet light, thereby changing its solubility. During the exposure process, the surface of the circuit board is covered with a mask with a preset pattern. The transparent areas on the mask correspond to the non-soldering areas where the solder mask layer needs to be retained, while the opaque areas correspond to the soldering areas that need to be exposed, such as pads or through-hole positions. UV light is applied through a photomask to the ink surface, causing the exposed areas to undergo a photocuring reaction, rendering them insoluble in the developer solution, while the unexposed areas remain soluble. The board is then cleaned with a developer solution (such as sodium carbonate solution) to remove any uncured ink, creating a precise solder mask pattern on the board surface. After the solder mask pattern is formed, the ink undergoes a curing process, heating it at 150°C for 30 minutes to fully cure and securely bond the ink to the board surface. This curing process can be performed in a hot air circulating oven, which provides uniform temperature distribution and avoids localized overheating or underheating. Sandblasting is used to treat exposed soldering areas to optimize soldering performance. Sandblasting involves applying a high-speed jet of fine abrasive particles (such as aluminum oxide) to slightly roughen exposed areas, such as pads or vias, increasing surface roughness. This improves solder adhesion and soldering quality, resulting in the final laptop printed circuit board.

[0030] In another embodiment, the stacking method can also be another one. In the initial stacking stage, a nano-ceramic reinforced semi-cured sheet with high thermal conductivity is selected as the bottom layer and combined with a thinner double-sided inner layer circuit substrate to enhance the bottom heat dissipation capability; in the middle stacking area, a semi-cured sheet with a high dielectric constant is introduced to be asymmetrically stacked with a thicker inner layer circuit substrate, wherein the thickness of the semi-cured sheet gradually increases according to a preset gradient to form a progressive dielectric layer structure, thereby optimizing the stability of high-frequency signal transmission; in the stacking stage close to the outer layer, a semi-cured sheet with a low thermal expansion coefficient is used. The chip is combined with a high-density interconnected inner layer circuit substrate, and the stacking angle is controlled (for example, rotating the stack between 15° and 30°) to reduce interlayer stress concentration and improve warpage resistance. During the stacking process, vertical conductive structures are introduced between specific layers through local embedded micro-via technology for different functional areas (such as power area, signal area and ground layer) to enhance the reliability of interlayer electrical connection. The entire stacking process is hot-pressed and cured in a vacuum environment through multi-stage temperature and pressure curve control, in which the temperature gradually increases from 120°C to 220°C and the pressure increases from 0.5 MPa to 2.0 MPa to ensure close adhesion between layers and no bubble defects. This multi-level asymmetric progressive stacking method can effectively improve the structural strength and thermal management capabilities of laptop printed circuit boards, and can also significantly improve high-frequency signal integrity and overall circuit performance, meeting the stringent requirements of high-performance laptops for complex circuit boards.

[0031] In another embodiment, a three-dimensional partitioned composite stacking method can also be used. Specifically, a multi-dimensional stacking blueprint is designed according to the functional partitioning of the circuit board (such as the high-frequency signal area, the power distribution area, and the low-speed signal area), and double-sided inner layer circuit substrates with different material properties and thicknesses are selected for partitioned composite stacking with prepregs containing glass fiber and nano-reinforced particles; in the bottom layer stacking stage, a prepreg with high thermal conductivity and low dielectric loss is combined with a thin, high-density inner layer circuit substrate, and a microgroove structure is pre-formed on the surface of the substrate by laser micromachining technology to embed heat-conducting metal microcolumns, thereby enhancing local heat dissipation capabilities; in the middle layer stacking stage, a prepreg with a gradient dielectric constant is introduced, and the resin content of each layer of the prepreg is precisely controlled (from 3 0% and gradually increased to 50%) and glass fiber orientation (staggered angle controlled at 45° to 60°) to form a non-uniform dielectric layer to optimize the impedance matching of high-frequency signals and reduce crosstalk; in the stacking area near the outer layer, a semi-cured sheet with a low thermal expansion coefficient is combined with an inner layer circuit substrate with a high interconnection density, and a reinforced fiber grid is embedded in the high stress area through local pressure technology to improve the resistance to mechanical shock and warping; during the stacking process, selective electrical connection between layers is achieved in different functional partitions, and by adding an ultra-thin graphene conductive layer between specific layers, the signal transmission speed and heat diffusion efficiency are further improved; this partitioned stacking method can improve the signal integrity, thermal management efficiency and mechanical stability of laptop printed circuit boards.

[0032] In one embodiment, the resin is a mixture of any one or more of polyimide resin, epoxy resin or phenolic resin, the nano-ceramic filler is a mixture of any one or more of alumina, zirconium oxide, silicon nitride, boron nitride or silicon carbide, and the substrate is any one of copper foil, aluminum foil or nickel foil.

[0033] In one embodiment, the steps of mixing and stirring a resin and a nano-ceramic filler to form a resin solution, applying the resin solution to a surface of a substrate, and heating the mixture to a semi-cured state to obtain a composite substrate include: The nano-ceramic filler, epoxy resin and polyimide resin are mixed in a mass ratio of 3:1 and placed in a stirring device for stirring to form a resin solution; Pre-treating the surface of the copper foil substrate with a dilute sulfuric acid solution, and coating the resin solution on the pre-treated surface of the copper foil substrate to obtain a primary coating substrate; The primary coated substrate is placed in a reaction kettle, baked at 80-90° C. for 10-12 minutes, and then heated to 150-160° C. at a rate of 10° C. / min and maintained for 15 minutes to allow the resin coating to reach a semi-cured state, thereby obtaining the composite substrate.

[0034] In this example, nano-ceramic fillers, epoxy resin, and polyimide resin are used as the primary raw materials. Nano-ceramic fillers have high hardness, high thermal stability, and excellent electrical insulation properties. The nano-ceramic fillers, epoxy resin, and polyimide resin are stirred in a stirring apparatus at a mass ratio of 3:1 to form a uniform resin solution. This evenly disperses the nano-ceramic fillers in the resin matrix and prevents agglomeration. Nanoparticles, due to their high specific surface area and high surface energy, are prone to agglomeration, which can affect the composite material's performance. Copper foil is used as the substrate and surface pretreated with a dilute sulfuric acid solution. This solution effectively removes the oxide layer on the copper foil surface and increases surface roughness through micro-etching, thereby improving the bond between the resin and the copper foil. The copper foil is immersed in the dilute sulfuric acid solution (concentration of 5% to 10%) for a period of 30 seconds to 2 minutes, depending on the surface condition of the copper foil. The copper foil is then thoroughly rinsed with deionized water to remove any residual acid and dried to a clean, water-free surface. During the resin coating process, the resin solution is applied to the pretreated copper foil substrate to form a primary coating. A coating thickness control machine is used to adjust the coating thickness based on the final product requirements, for example, within a range of 50-100 microns. The primary coating is then placed in a reactor and baked to semi-cure the resin coating. The baking temperature is maintained at 80-90°C for 10-12 minutes, followed by a temperature ramp of 10°C / min to 150-160°C and held for 15 minutes. The initial 80-90°C baking phase primarily evaporates the solvent in the resin solution and promotes initial cross-linking between the resin molecules. The subsequent temperature ramp further promotes the curing reaction. By controlling the temperature ramp rate (10°C / min), thermal stress concentration or coating cracking caused by excessive heating can be avoided. After 15 minutes at 150-160°C, the resin coating reaches a semi-cure state. At this point, the resin molecules have formed a partially cross-linked network but still retain a certain degree of fluidity, making it suitable for subsequent processing. It is worth noting that the heat treatment must be performed in a reactor, which suggests that controlled environmental conditions, such as a vacuum or inert gas atmosphere, may be necessary to prevent oxidation of the copper foil at high temperatures or unwanted side reactions with the resin. After the heat treatment is completed, the composite substrate is slowly cooled to room temperature to avoid internal stress accumulation caused by rapid cooling.

[0035] In one embodiment, the step of etching the composite substrate according to the preset layout to obtain the inner layer circuit substrate includes: Applying a dry film photoresist on the surface of the composite substrate and heating it at 90-100° C. for 20-30 seconds to obtain a coated substrate; performing ultraviolet exposure treatment on the glue-coated substrate according to a preset layout to obtain an exposed substrate; Using a 0.8% mass concentration potassium carbonate solution as a developer, developing the exposed substrate with a developing device at a constant temperature of 20-25° C. to obtain a patterned substrate; Using an acidic copper sulfate etching solution with a concentration of 2.0 mol / L, etching the patterned substrate in an etching bath at a constant temperature of 30-32° C. for 15-20 seconds, then reducing the etching solution flow rate and etching for 25-30 seconds to obtain a primary circuit substrate; A 3% sodium hydroxide solution was used as a film removal solution to remove the primary circuit substrate at 40-45° C. to obtain an inner layer circuit substrate.

[0036] In this embodiment, a dry film photoresist is applied to the surface of a composite substrate and heated at 90-100°C for 20-30 seconds to form a uniform, well-adhesive photoresist film on the composite substrate. Dry film photoresist is a photosensitive material that undergoes a chemical reaction under ultraviolet light, forming soluble or insoluble regions. After coating, the substrate is placed in a heating device and baked at a temperature range of 90-100°C for 20-30 seconds. The coated substrate is then exposed to ultraviolet light according to a preset layout to produce an exposed substrate. This UV exposure transfers the preset circuit pattern onto the dry film photoresist through a photochemical reaction. The preset layout exists in the form of a photomask, which is engraved with the precise circuit pattern design. When exposed to ultraviolet light, the transparent areas of the photomask allow light to pass through, causing a photochemical reaction in the corresponding areas of the dry film photoresist, while the opaque areas protect the underlying photoresist, leaving it intact. Using a 0.8% mass concentration of potassium carbonate solution as a developer, the exposed substrate is developed by a developer at a constant temperature of 20-25°C to obtain a patterned substrate. The purpose of the development process is to remove the photoresist areas that are soluble after exposure, thereby forming a patterned photoresist mask consistent with the preset layout on the substrate surface. Potassium carbonate solution, as a developer, has a mild alkalinity and can effectively dissolve the photoresist parts that undergo photochemical reactions after exposure, while the photoresist in the unexposed areas is retained due to its stable chemical properties. The development equipment can adopt a spray or immersion method. By controlling the flow rate and spray pressure of the developer, the developer is fully in contact with the substrate surface while avoiding physical damage to the photoresist mask. After development, a clear patterned photoresist mask is formed on the substrate surface, exposing the copper foil areas to be etched. The patterned substrate is then etched using a 2.0 mol / L acidic copper sulfate etchant in an etching bath maintained at a constant temperature of 30-32°C. This etching process is divided into two stages: an initial etching period of 15-20 seconds, followed by a reduction in the etchant flow rate and a further 25-30 seconds, resulting in a preliminary circuit substrate. This two-stage etching process is designed to optimize etching results. In the first stage (15-20 seconds), a higher etchant flow rate ensures full contact between the etchant and the substrate surface, rapidly removing the surface copper foil and forming a preliminary circuit outline. Subsequently, a reduction in the flow rate and an extended etching time (25-30 seconds) refine the etching process and avoid over-etching that could result in insufficient line width or irregular edges. Maintaining a constant temperature of 30-32°C maintains the chemical reactivity of the etchant, ensuring a stable etching rate and preventing uneven etching due to temperature fluctuations. The primary circuit substrate was stripped using a 3% sodium hydroxide solution at 40-45°C to obtain the inner layer circuit substrate. The purpose of the stripping process is to remove the photoresist mask from the substrate surface, exposing the copper circuit pattern formed after etching.Sodium hydroxide solution, used as a stripping solution, effectively dissolves dry-film photoresist while exhibiting no significant corrosion to copper circuitry. The stripping temperature is controlled between 40 and 45°C to ensure the stripping solution's chemical activity and rapid dissolution of the photoresist while preventing potential damage to the substrate or circuitry caused by high temperatures. The stripping process can be performed using either an immersion or spraying method. By controlling the stripping solution concentration and treatment time, the photoresist can be completely removed while preventing residue from affecting subsequent processes. After stripping, the substrate surface reveals a clear inner-layer circuit pattern, effectively forming the inner-layer circuit substrate.

[0037] In one embodiment, the step of alternately stacking double-sided inner layer circuit substrates and prepregs containing glass fiber material and performing vacuum hot pressing to obtain a laminated structure, wherein the number of double-sided inner layer circuit substrates and prepregs is equal, comprises: The prepreg containing the glass fiber material is immersed in a mixed solution containing nano-alumina particles and epoxy resin for immersion treatment to obtain a modified prepreg, wherein the particle size of the nano-alumina particles is 20 to 25 nanometers and the immersion time is 10 to 15 minutes; Alternately stacking a plurality of the modified prepregs and double-sided inner layer circuit substrates, and pressing them together using a hot press at 175-180° C. and 1.8-2 MPa for 60-80 minutes to obtain a pressed laminate structure; The laminated structure is scanned layer by layer using a laser device with a pulse energy of 0.4-0.5 mJ to form a plurality of micropores, thereby obtaining a laminated structure with interlayer interconnection channels.

[0038] In this embodiment, a prepreg (prepreg) is a semi-cured epoxy resin composite material containing glass fibers. The prepreg is immersed in a mixed solution containing nano-alumina particles and epoxy resin for impregnation to produce a modified prepreg. The nano-alumina particles, with a particle size of only 20-25 nanometers, have an extremely high specific surface area, significantly enhancing the material's thermal conductivity and mechanical strength while also improving the prepreg's dielectric properties. The prepreg is completely immersed in the solution for 10-15 minutes to allow the solution to fully penetrate the glass fibers while avoiding changes in material properties caused by prolonged immersion. After impregnation, the prepreg is removed and dried to remove excess solvent and maintain the semi-cured state, thereby producing a modified prepreg. Multiple modified prepregs are alternately stacked with a double-sided inner circuit substrate, with one double-sided inner circuit substrate placed at the bottom, covered with a modified prepreg, followed by a second double-sided inner circuit substrate, and so on, until the desired number of layers is reached. During the stacking process, the layers must be aligned, especially the circuit pattern on the substrate, to match the design requirements. This can be achieved using alignment equipment or optical alignment systems. After stacking, the entire stack is vacuum-pressed using a hot press at a temperature of 175-180°C, a pressure of 1.8-2 MPa, and a pressing time of 60-80 minutes. This temperature range allows the epoxy resin in the modified prepreg to fully flow and cure, forming a strong interlayer bond; the pressure range ensures a tight fit between the layers, eliminating air bubbles and preventing interlayer gaps; and the pressing time ensures complete curing of the resin while avoiding material degradation caused by prolonged pressing. The vacuum environment effectively reduces oxidation reactions, further improving the quality of the laminate. A laser scan is used to form multiple micropores layer by layer in the laminated structure, resulting in a laminate with interconnected channels between the layers. The laser uses a pulse energy setting of 0.4-0.5 mJ to precisely control the size and depth of the micropores, avoiding thermal damage to surrounding materials. In practice, a laser device scans each layer according to a pre-set drilling pattern. Ultraviolet lasers or CO2 lasers can be used due to their high precision and high energy. The formation of microvias not only physically connects the circuits between layers but also provides a pathway for subsequent electroplating or conductive filling processes.

[0039] In one embodiment, the step of performing chemical electroplating on the stacked structure includes: Immersing the laminated structure in a colloidal activation solution containing 0.02-0.03 mol / L palladium chloride and 0.1-0.15 mol / L tin chloride for activation treatment, so that palladium ions form catalytic active sites on the inner walls of the micropores; The activated laminated structure is immersed in a chemical copper plating solution containing 0.05-0.06 mol / L copper sulfate, 0.1-0.15 mol / L formaldehyde and a complexing agent, and reacted at 48-50°C for 15 minutes to obtain a seed layer structure; The seed layer structure is placed in an electroplating solution containing 0.2-0.3 mol / L copper sulfate, 0.5-0.6 mol / L sulfuric acid and additives at 1.8-2 A / dm 2 The current density is set to 50-60 minutes at 25-30°C to obtain a conductive laminate structure.

[0040] In this embodiment, the laminated structure is immersed in a colloidal activation solution containing 0.02-0.03 mol / L palladium chloride and 0.1-0.15 mol / L tin chloride for activation. Catalytic active sites are formed on the inner wall and surface of the micropores of the laminated structure. Palladium chloride (PdCl2) acts as a catalyst precursor and interacts with tin chloride (SnCl2) in the colloidal activation solution to form a colloidal palladium-tin complex. Tin chloride acts as a stabilizer to prevent the palladium ions from aggregating too quickly. At the same time, through redox reactions (such as SnCl2), the palladium ions are activated. 2+ Oxidized to Sn 4+ ) makes palladium ions (Pd 2+ ) is reduced to metallic palladium (Pd 0) and adsorbed as nanoparticles onto the surface of the laminate and the inner walls of the micropores. These palladium metal particles have high catalytic activity, initiating copper deposition. The palladium chloride concentration in the activation solution is 0.02-0.03 mol / L, and the tin chloride concentration is 0.1-0.15 mol / L. This concentration range ensures uniform distribution of the palladium particles and sufficient catalytic activity while avoiding the colloid instability and costly effects of excessively high concentrations. The activation treatment is performed at or slightly above room temperature. The laminate must be immersed for a sufficient time (several minutes) to allow the inner walls of the micropores to fully contact the activation solution to achieve uniform distribution of catalytic sites. After treatment, the laminate is rinsed with deionized water to remove excess colloidal particles and residual ions. The activated laminate is then immersed in an electroless copper plating solution containing 0.05-0.06 mol / L copper sulfate, 0.1-0.15 mol / L formaldehyde, and a chelating agent at 48-50°C for 15 minutes to form a seed layer. This chemical copper plating step utilizes the principle of electroless deposition, and the reduction reaction of copper ions is triggered by a catalyst (i.e., the palladium particles deposited in the previous step) to form a thin and uniform copper seed layer. The main components of the chemical copper plating solution include copper sulfate (CuSO4) as a source of copper ions, formaldehyde (HCHO) as a reducing agent, and a chelating agent to stabilize the solution and control the reaction rate. The concentration of copper sulfate is controlled at 0.05~0.06 mol / L, which can provide an appropriate amount of copper ions to make the deposition rate moderate while avoiding solution instability or rough copper layer caused by excessive concentration. The formaldehyde concentration is 0.1~0.15 mol / L, which provides sufficient reducing power. It is oxidized to formic acid under the action of palladium catalyst, and at the same time, Cu 2+ Reduced to metallic copper (Cu 0) is deposited on the surface of the laminate structure. A complexing agent (such as EDTA or potassium sodium tartrate) forms a complex with copper ions, preventing premature precipitation in the solution and regulating the deposition rate for a uniform and dense copper layer. The reaction temperature is controlled between 48 and 50°C. This temperature range accelerates the redox reaction of formaldehyde while preventing solution decomposition or copper layer degradation due to excessively high temperatures. The reaction time is 15 minutes, sufficient to form a seed layer of moderate thickness (0.5 to 2 microns). The seed layer structure is then electroplated in a plating solution containing 0.2 to 0.3 mol / L copper sulfate, 0.5 to 0.6 mol / L sulfuric acid, and additives at a current density of 1.8 to 2 A / dm² at 25 to 30°C for 50 to 60 minutes to produce the final conductive laminate structure. This copper electroplating step further thickens the copper layer by applying an applied current, forming a conductive layer with excellent conductivity and mechanical strength. In the electroplating solution, the copper sulfate concentration is 0.2-0.3 mol / L, providing sufficient copper ions to support efficient electrodeposition. The sulfuric acid concentration is 0.5-0.6 mol / L, increasing the conductivity of the solution while maintaining an acidic environment to prevent copper ion hydrolysis. Additives (including brighteners, levelers, and inhibitors) can improve the surface smoothness of the copper layer, reduce pinholes or cracks, and improve deposition uniformity. The current density is 1.8-2 A / dm 2 This range enables rapid deposition of the copper layer while avoiding burning or roughening caused by excessive current. The electroplating temperature is controlled at 25~30°C, which helps maintain solution stability and copper layer quality while facilitating operation. The electroplating time is 50~60 minutes, which can form a copper layer of moderate thickness to meet the conductivity and durability requirements of the conductive laminate structure. During the electroplating process, appropriate electrodes (such as soluble copper anodes) are used and the solution is circulated to ensure a stable copper ion concentration and uniform deposition. After electroplating, the laminate structure needs to be cleaned and dried to remove residual plating solution and prevent oxidation.

[0041] In one embodiment, the step of performing etching on the outer surface of the stacked structure according to the preset circuit pattern to form the outer circuit structure includes: coating a photoresist containing nano-silicon dioxide particles on the outer surface of the stacked structure, and baking at 90-95° C. for 5-10 minutes to obtain a photoresist-covered structure; Using a ferric chloride etching solution with a concentration of 3.0 mol / L, etching the photoresist covered structure in an etching tank at a constant temperature of 35-40° C. to obtain a preliminary outer layer structure; A 5% potassium hydroxide solution is used as a degumming solution to degumming the preliminary outer layer structure at 50-55° C. to obtain an outer layer circuit structure.

[0042] In this embodiment, a photoresist containing nano-silica particles is applied to the outer surface of a laminate structure, forming a uniform photoresist film on the laminate surface. Photoresist is a photosensitive material, and the nano-silica particles therein enhance the physical properties of the photoresist. Spin coating can be used to apply the photoresist. By placing the laminate structure on a high-speed rotating coating machine, the photoresist is evenly distributed on the surface under the action of centrifugal force. After coating, the photoresist-covered laminate structure is baked at a temperature of 90-95°C for 5-10 minutes. Baking within this specific temperature range effectively removes volatile components in the photoresist while preventing thermal decomposition or performance degradation of the photoresist due to excessively high temperatures. The photoresist-covered structure is etched using a 3.0 mol / L ferric chloride etching solution in an etching bath maintained at a constant temperature of 35-40°C to form a preliminary outer layer structure. Material from the outer surface of the laminate structure is selectively removed according to a predetermined circuit pattern to form the desired circuit structure. A 3.0 mol / L concentration of ferric chloride etchant provides sufficient chemical activity for rapid metal etching, while avoiding excessively high concentrations that could lead to excessively fast or uneven etching rates. Etching in an etching bath maintained at a constant temperature of 35-40°C stabilizes the chemical reaction rate of the etchant and reduces the impact of temperature fluctuations on etching accuracy. The etching bath is equipped with a constant temperature control system, maintained at a constant temperature by a circulating water bath or heating device. After etching is complete, the remaining photoresist layer on the initial outer structure is removed through a stripping process to reveal the final outer circuit structure. This process is performed using a 5% potassium hydroxide solution at 50-55°C. Potassium hydroxide solution is a strongly alkaline stripping agent that effectively dissolves photoresist. The alkaline solution chemically reacts with the organic components in the photoresist, rapidly decomposing and removing the photoresist layer. Controlling the stripping temperature between 50-55°C accelerates the stripping reaction while preventing potential damage to the laminated structure or circuit pattern caused by high temperatures. After the desizing is completed, the outer surface of the laminated structure will completely expose the preset circuit pattern, forming the final outer circuit structure.

[0043] It is worth noting that the preset circuit pattern in the above embodiment can be designed in advance by computer and a mask can be made, and the design process can be completed in computer-aided design (CAD) software, such as professional tools such as Altium Designer, Cadence or EAGLE. The designer draws the wiring pattern of the outer layer circuit in the CAD software based on the electrical performance requirements and physical size limitations of the circuit board, including conductive lines, pads, through-holes and other key features. During the drawing process, the designer makes the solder mask layer accurately cover the non-welding area based on the coverage of the solder mask layer, while exposing the pads and through-holes that need to be soldered. To achieve this goal, the designer will generate a dedicated layer of the solder mask layer in the CAD software. This layer defines the areas that need to be covered and exposed by the solder mask ink to form a solder mask window pattern.

[0044] In one embodiment, the step of applying solder resist ink on the outer layer circuit structure to form a solder resist layer to obtain a laptop computer printed circuit board includes: Applying solder resist ink to the surface of the outer circuit structure, wherein the solder resist ink comprises nano-alumina particles, a photosensitizer and a toughening agent to obtain an initial solder resist coating; performing ultraviolet exposure treatment on the initial solder resist coating using an ultraviolet light source to obtain a patterned solder resist coating; After developing the patterned solder resist coating with an alkaline developer, the patterned solder resist coating is subjected to a low-temperature curing treatment at 90-100° C. for 10-15 minutes to obtain the notebook computer printed circuit board.

[0045] In this embodiment, the outer layer circuit structure is a conductive pattern formed by etching copper foil on a substrate. The solder resist ink is applied using screen printing or spraying techniques, ensuring uniform coverage of non-solderable areas while avoiding covering solder pads or through-holes. The solder resist ink contains nano-alumina particles, a photosensitizer, and a toughening agent. The nano-alumina particles significantly improve the wear and heat resistance of the solder resist layer. The addition of the photosensitizer imparts photocuring properties to the ink, while the toughening agent enhances the solder resist layer's flexibility, preventing cracking due to thermal expansion and contraction or mechanical stress. After application, the initial solder resist coating forms a uniform thin film on the surface of the circuit board. Using photolithography equipment and a pre-designed mask, the mask contains a pattern corresponding to the circuit board design, allowing ultraviolet light to selectively penetrate and illuminate the initial solder resist coating. Because the solder resist ink contains a photosensitizer, it undergoes a photochemical reaction under UV light, causing the ink molecules in the exposed areas to crosslink and solidify, forming a structure insoluble in developer, while the ink in the unexposed areas remains soluble. In practice, the wavelength and intensity of the UV light source must be precisely controlled based on the characteristics of the solder mask ink, staying within the 350-400 nm range. Exposure time is adjusted based on the ink thickness and sensitivity of the photosensitizer. After exposure, the initial solder mask coating is separated into cured and uncured areas, forming a preliminary patterned solder mask. Development removes the uncured ink by placing the circuit board in an alkaline developer solution, either spraying or immersing. The developer can be sodium carbonate or sodium hydroxide solution, with its concentration and temperature optimized based on the ink's chemical properties. The developer dissolves the ink in the unexposed areas, while the cured patterned areas remain on the circuit board surface, forming a clear solder mask pattern. After development, the circuit board is cleaned and dried to remove any residual developer and moisture. A subsequent low-temperature curing process, performed at 90-100°C for 10-15 minutes, further enhances the physical and chemical stability of the solder mask. Low-temperature curing not only fully hardens the solder mask but also improves its adhesion to the circuit board surface while avoiding potential damage to other components of the board (such as the substrate or copper foil) caused by high temperatures. Curing is typically performed in an oven, with precise control of temperature and time achieved through programmable equipment for repeatable and consistent process. After curing is complete, the solder mask is finally formed, covering the non-solderable areas of the board, leaving the pads and through-holes exposed, resulting in a laptop printed circuit board that meets the design requirements.

[0046] As described above, the above embodiments are only used to illustrate the technical solutions of the present application, rather than to limit them. Although the present application has been described in detail with reference to the above embodiments, those skilled in the art should understand that they can still modify the technical solutions described in the above embodiments, or make equivalent replacements for some of the technical features therein. However, these modifications or replacements do not deviate the essence of the corresponding technical solutions from the spirit and scope of the technical solutions of the embodiments of the present application.

Claims

1. A method for manufacturing a notebook computer printed circuit board, characterized in that: include: Mixing a resin and a nano-ceramic filler and stirring to form a resin solution, applying the resin solution to a surface of a substrate and heating it to a semi-cured state to obtain a composite substrate; Etching the composite substrate according to a preset layout to obtain an inner layer circuit substrate; Alternately stacking double-sided inner layer circuit substrates and prepregs containing glass fiber material and subjecting them to vacuum hot pressing to obtain a laminated structure, wherein the number of the double-sided inner layer circuit substrates and the prepregs is equal; After chemically plating the laminated structure, etching the outer surface of the laminated structure according to a preset circuit pattern to form an outer circuit structure; Solder resist ink is coated on the outer layer circuit structure to form a solder resist layer to obtain a notebook computer printed circuit board.

2. The method for manufacturing a notebook computer printed circuit board according to claim 1, wherein: The resin is a mixture of any one or more of polyimide resin, epoxy resin or phenolic resin.

3. The method for manufacturing a notebook computer printed circuit board according to claim 1, wherein: The nano ceramic filler is a mixture of any one or more of alumina, zirconia, silicon nitride, boron nitride or silicon carbide.

4. The method for manufacturing a notebook computer printed circuit board according to claim 1, wherein: The substrate is any one of copper foil, aluminum foil or nickel foil.

5. The method for manufacturing a notebook computer printed circuit board according to claim 1, wherein: The steps of mixing the resin and the nano-ceramic filler and stirring to form a resin solution, applying the resin solution to the surface of the substrate and heating it to a semi-cured state to obtain a composite substrate include: The nano-ceramic filler, epoxy resin and polyimide resin are mixed in a mass ratio of 3:1 and placed in a stirring device for stirring to form a resin solution; Pre-treating the surface of the copper foil substrate with a dilute sulfuric acid solution, and coating the resin solution on the pre-treated surface of the copper foil substrate to obtain a primary coating substrate; The primary coated substrate is placed in a reaction kettle, baked at 80-90° C. for 10-12 minutes, and then heated to 150-160° C. at a rate of 10° C. / min and maintained for 15 minutes to allow the resin coating to reach a semi-cured state, thereby obtaining the composite substrate.

6. The method for manufacturing a notebook computer printed circuit board according to claim 1, wherein: The step of etching the composite substrate according to the preset layout to obtain an inner layer circuit substrate includes: Applying a dry film photoresist on the surface of the composite substrate and heating it at 90-100° C. for 20-30 seconds to obtain a coated substrate; performing ultraviolet exposure treatment on the glue-coated substrate according to a preset layout to obtain an exposed substrate; Using a 0.8% mass concentration potassium carbonate solution as a developer, developing the exposed substrate with a developing device at a constant temperature of 20-25° C. to obtain a patterned substrate; Using an acidic copper sulfate etching solution with a concentration of 2.0 mol / L, etching the patterned substrate in an etching bath at a constant temperature of 30-32° C. for 15-20 seconds, then reducing the etching solution flow rate and etching for 25-30 seconds to obtain a primary circuit substrate; A 3% sodium hydroxide solution was used as a film removal solution to remove the primary circuit substrate at 40-45° C. to obtain an inner layer circuit substrate.

7. The method for manufacturing a notebook computer printed circuit board according to claim 1, wherein: The step of alternately stacking double-sided inner layer circuit substrates and prepregs containing glass fiber material and performing vacuum hot pressing to obtain a laminated structure, wherein the number of the double-sided inner layer circuit substrates and the prepregs is equal, comprises: The prepreg containing the glass fiber material is immersed in a mixed solution containing nano-alumina particles and epoxy resin for immersion treatment to obtain a modified prepreg, wherein the particle size of the nano-alumina particles is 20 to 25 nanometers and the immersion time is 10 to 15 minutes; Alternately stacking a plurality of the modified prepregs and double-sided inner layer circuit substrates, and pressing them together using a hot press at 175-180° C. and 1.8-2 MPa for 60-80 minutes to obtain a pressed laminate structure; The laminated structure is scanned layer by layer using a laser device with a pulse energy of 0.4-0.5 mJ to form a plurality of micropores, thereby obtaining a laminated structure with interlayer interconnection channels.

8. The method for manufacturing a notebook computer printed circuit board according to claim 7, wherein: The step of performing chemical electroplating on the laminated structure comprises: Immersing the laminated structure in a colloidal activation solution containing 0.02-0.03 mol / L palladium chloride and 0.1-0.15 mol / L tin chloride for activation treatment, so that palladium ions form catalytic active sites on the inner walls of the micropores; The activated laminated structure is immersed in a chemical copper plating solution containing 0.05-0.06 mol / L copper sulfate, 0.1-0.15 mol / L formaldehyde and a complexing agent, and reacted at 48-50°C for 15 minutes to obtain a seed layer structure; The seed layer structure is placed in an electroplating solution containing 0.2-0.3 mol / L copper sulfate, 0.5-0.6 mol / L sulfuric acid and additives at 1.8-2 A / dm 2 The current density is set to 50-60 minutes at 25-30°C to obtain a conductive laminate structure.

9. The method for manufacturing a notebook computer printed circuit board according to claim 1, wherein: The step of performing etching on the outer surface of the laminate structure according to the preset circuit pattern to form an outer circuit structure includes: coating a photoresist containing nano-silicon dioxide particles on the outer surface of the stacked structure, and baking at 90-95° C. for 5-10 minutes to obtain a photoresist-covered structure; Using a ferric chloride etching solution with a concentration of 3.0 mol / L, etching the photoresist covered structure in an etching tank at a constant temperature of 35-40° C. to obtain a preliminary outer layer structure; A 5% potassium hydroxide solution is used as a degumming solution to degumming the preliminary outer layer structure at 50-55° C. to obtain an outer layer circuit structure.

10. The method for manufacturing a notebook computer printed circuit board according to claim 1, wherein: The step of applying solder resist ink on the outer layer circuit structure to form a solder resist layer to obtain a notebook computer printed circuit board includes: Applying solder resist ink to the surface of the outer circuit structure, wherein the solder resist ink comprises nano-alumina particles, a photosensitizer and a toughening agent to obtain an initial solder resist coating; performing ultraviolet exposure treatment on the initial solder resist coating using an ultraviolet light source to obtain a patterned solder resist coating; After developing the patterned solder resist coating with an alkaline developer, the patterned solder resist coating is subjected to a low-temperature curing treatment at 90-100° C. for 10-15 minutes to obtain the notebook computer printed circuit board.

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