Large area / wafer level CMOS compatible two-dimensional material intercalation doping tools, processes, and methods including synthetic graphene doping
By designing an intercalation doping device to uniformly dope large-area wafer-level two-dimensional materials at low temperature, the problems of uneven doping and high cost in the existing technology are solved, and the feasibility of low-temperature doping and device protection in CMOS technology are realized.
Patent Information
- Application Number
- CN202480014396.7
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Priority Date
- 2023-12-01
- Filing Date
- 2024-01-12
- Publication Date
- 2025-10-03
AI Technical Summary
Existing technologies make it difficult to uniformly dope large-area wafer-level two-dimensional materials under low-temperature conditions, especially in CMOS technology, resulting in an uneven doping process, high cost, and possible damage to active devices.
An intercalation doping device is designed, including a reaction chamber, a heater and a dopant applying device, which can apply a temperature of 25°C to 500°C to a wafer or substrate with a diameter of 25 mm to 450 mm within a pressure range of 2 bar to 500 bar, and perform intercalation doping through a gas phase, liquid phase or solid phase dopant.
It achieves uniform doping of large-area wafer-level two-dimensional materials at low temperature, reduces costs, and avoids damage to active devices. It is suitable for fields such as microelectronics, optoelectronics, bioelectronics and quantum computing.
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Figure CN120752380A_ABST
Abstract
Description
[0001] CROSS-REFERENCE TO RELATED APPLICATIONS
[0002] This application references U.S. patent application No. 17 / 863,232, filed on July 12, 2022, entitled “Low-Temperature / BEOL-Compatible Highly Scalable Graphene Synthesis Tool”; U.S. patent application No. 17 / 857,954, filed on July 5, 2022, entitled “Low-Temperature / BEOL-Compatible Highly Scalable Graphene Synthesis Tool”; and U.S. provisional patent application No. 63 / 218,498, filed on July 6, 2021, entitled “Wafer-Level CMOS-Compatible Graphene Synthesis Tool”; as related applications, the entire contents of the foregoing applications are incorporated herein by reference.
[0003] In addition, this application claims priority to U.S. patent application No. 18 / 527,043 filed on December 1, 2023, which claims domestic priority to U.S. Provisional Patent Application No. 63 / 441,766 filed on January 27, 2023, entitled "Large-Area / Wafer-Scale CMOS-Compatible Two-Dimensional Material Doping Tools, Processes, and Methods Including Synthetic Graphene Doping," the entire contents of the foregoing applications are incorporated herein by reference. Background Art
[0004] In many applications, including microelectronics, it is often necessary to tune the electrical conductivity of atomically thin, two-dimensional (2D) layered materials, including synthetic multilayer graphene (MLG) or any layered semiconductor material (such as molybdenum disulfide (MoS2) or tungsten disulfide (WS2)). Typically, this involves increasing the carrier concentration of electrons or holes or other charge carriers. This increase in carrier concentration can be achieved through a process called doping, which involves inserting or adsorbing certain atoms or molecules into the host material, thereby inducing charge transfer between the dopant and the material (such as MLG). In some cases, doping can also be achieved by designing the placement of the dopant at specific crystallographic sites to cause it to become electrically active or ionized (thus generating excess electrons or holes). Sometimes, the dopant may require thermal annealing to mobilize the dopant, for example, using applied thermal energy to move arsenic (As) atoms in single crystal silicon from interstitial sites in the silicon to alternative crystal sites in the silicon. In order to integrate any MLG / layered material doping process into CMOS technology, dedicated large-area (200 / 300 / 450 / XXXmm) reactors need to be designed. These reactors must also operate below the current and expected back-end of line (BEOL) thermal budget (<450°C) and at high pressure (1-500 bar). This doping acceleration can include temperature or pressure, or a combination of both effects.
[0005] In the emerging field of atomically thin two-dimensional (2D) materials, graphene or MLG (essentially a single or multiple layers of carbon atoms arranged in a hexagonal lattice) in particular can now be synthesized directly on a desired substrate (typically a dielectric or metal). Previously, a transfer step was required (graphene / MLG synthesized on a metal catalyst film and then deposited onto the desired substrate), which was considered infeasible and cost-ineffective in the mainstream electronics (or CMOS) industry due to contamination, defect / wrinkle generation and other issues with the transferred graphene / MLG. In addition, doping MLG or other 2D materials by traditional methods has previously posed many challenges. The leading candidates for future interconnect material selection are graphene / MLG layers that must be doped to meet characteristic resistivity targets. These are preferred materials in several BEOL (referring to the process steps after the formation of active devices (such as transistors and diodes) in chip manufacturing) applications, especially on-chip interconnects.
[0006] Due to the geometry, such as the layered structure of many 2D materials, intercalation doping can be used to minimize the bulk resistivity of single or multilayer stacks. Intercalation doping involves inserting dopant atoms / molecules from the sidewalls of these materials by diffusion, which has been shown to be feasible for 2D materials with narrow geometries (linewidths). Accelerating this doping process by applying temperature and / or pressure can make the doping process productive and cost-effective.
[0007] Doping at relatively low temperatures (<450°C) is required in a wide range of applications covering microelectronics, optoelectronics, bioelectronics, quantum computing, antennas (5G / 6G / THz), etc. However, to achieve such doping, especially on large "wafer-level" (e.g., 200mm, 300mm, 450mm, etc.) substrates, and within a reasonable time scale, requires the design and manufacture of a novel device that can allow a wide range of temperatures and pressures to be uniformly applied over the entire surface area of a semiconductor wafer or other substrate. The core component of such a device is a reactor that can not only accommodate such large-area substrates, but also allow a chemical purification environment, heating of large-area substrates with acceptable temperature uniformity, and application of relatively large and uniform pressures (e.g., up to 7000psi, 500 bar, etc., but within the fracture limit of the substrate) to the wafer / substrate by pneumatic and / or mechanical means through a simple mechanism. Note that in some examples, atmospheric pressure can be used.
[0008] For example, the growing demand for such large-area devices is in the emerging field of atomically thin two-dimensional (2D) materials, particularly graphene or MLG. Such graphene / MLG layers are the preferred materials in several BEOL applications, particularly in on-chip interconnects. However, BEOL interconnects must be efficiently synthesized and doped under a strict thermal budget of <450°C to avoid any damage to the underlying active devices (e.g., transistors, diodes, etc., via impurity diffusion). Therefore, increased pressure manipulation is very important to achieve doping at these relatively low temperatures within an acceptable time scale suitable for high-volume manufacturing environments.
[0009] The devices and doping techniques described herein are also extendable to a wide range of substrates of different materials (e.g., glass), geometries (e.g., square), and configurations (e.g., multi-level), as well as to other applications that inherently require a low thermal budget (<450°C). Summary of the Invention
[0010] In one aspect, an intercalation doping device that promotes the insertion of dopant atoms, ions or molecules into a layered 2D material, the device comprising: a reaction chamber, wherein a single or multiple wafers or substrates are arranged in the reaction chamber, wherein a pressure is applied to at least one surface of the single or multiple wafers or substrates in the range of 2 bar to 500 bar, and wherein the single or multiple wafers or substrates have a diameter or two side margins of 25 mm to 450 mm; a heater, wherein the heater applies heat to the single or multiple wafers or substrates, and wherein the single or multiple wafers or substrates comprise a temperature of 25°C to 500°C; and a dopant applying device, wherein the dopant applying device comprises at least a valve and a pipe for bringing the dopant from the outside to the inside of the reaction chamber, wherein the dopant applying device comprises at least a dopant crucible arranged in the reaction chamber, wherein the dopant comprises a solid phase, liquid phase or gas phase material, and wherein the dopant comprises an intercalation dopant.
[0011] On the other hand, an intercalation doping device that promotes the insertion of dopant atoms, ions or molecules into a layered 2D material comprises: a reaction chamber, wherein a single or multiple wafers or substrates are arranged in the reaction chamber, wherein a pressure is applied to at least one surface of the single or multiple wafers or substrates in the range of 2 bar to 500 bar, and wherein the single or multiple wafers or substrates have a diameter or two side margins of 25 mm to 450 mm; a heater, wherein the heater applies heat to the single or multiple wafers or substrates, and wherein the single or multiple wafers or substrates comprise a temperature of 25°C to 500°C; and a dopant applying device, wherein the dopant applying device comprises at least a valve and a pipe for bringing the dopant from the outside to the inside of the reaction chamber, wherein the dopant applying device comprises at least a dopant crucible arranged in the reaction chamber, wherein the dopant comprises a material in a solid phase, liquid phase or gas phase, and wherein the dopant comprises an intercalation dopant, and wherein the single or multiple wafers or substrates comprise single-layer, few-layer or multi-layer graphene strips.
[0012] On the other hand, a method for intercalation doping, wherein the intercalation doping includes a device that promotes the insertion of dopant atoms, ions or molecules into a layered 2D material, the method comprising: providing a reaction chamber, a heater and a dopant applying device; providing a single or multiple wafers or substrates, wherein the single or multiple wafers or substrates are arranged in the reaction chamber, wherein the single or multiple wafers or substrates have a diameter or two side margins of 25 mm to 450 mm; applying heat to the single or multiple wafers or substrates via the heater, wherein the single or multiple wafers or substrates include a temperature of 25°C to 500°C, and applying a pressure in the range of 2 bar to 500 bar to at least one surface of the single or multiple wafers or substrates; wherein the dopant applying device brings and / or contains a dopant into the reaction chamber, wherein the dopant includes a material in a solid phase, liquid phase or gas phase, wherein the dopant includes an intercalation dopant, wherein the single or multiple wafers or substrates include single-layer, few-layer or multi-layer graphene strips; and processing the single or multiple wafers or substrates in the presence of at least one of the intercalation dopants at the temperature and the pressure. BRIEF DESCRIPTION OF THE DRAWINGS
[0013] The present application may be best understood by reference to the following description taken in conjunction with the accompanying drawings, in which like parts may be referred to by like numerals.
[0014] Figure 1A An exemplary batch / single wafer processing apparatus is shown that is capable of inserting vapor-phase dopant atoms or molecules into single-layer, few-layer, or multi-layer graphene (MLG) or any other layered or non-layered material of arbitrary geometry and thickness synthesized by any method by pneumatic pressurization of the wafer;
[0015] Figure 1B Shown according to some embodiments Figure 1A An exemplary apparatus schematic of a similar apparatus with the capability to use solid / liquid dopants (vaporized into gases) and pneumatic pressurization of substrates / wafers;
[0016] Figure 2 A second exemplary apparatus schematic and process is shown for introducing gas into a reaction chamber and pressurizing a dopant (a gas or a liquid / solid vaporized into a gas) by gas pressurization for doping a single or multiple wafers / substrates placed horizontally, according to some embodiments;
[0017] Figure 2A According to some embodiments, at least Figure 2 A third exemplary apparatus schematic diagram of a process / reaction chamber within an apparatus of which, among other features, non-contact pressurized accelerated doping on a horizontally positioned substrate / wafer by a piston; and
[0018] Figure 3 A fourth exemplary apparatus schematic is shown for direct contact mechanical pressurization of a gaseous or solid / liquid dopant source (evaporated to gas or non-gas), in accordance with some embodiments.
[0019] The above drawings are a representative collection and do not represent all possible forms of the invention. DETAILED DESCRIPTION
[0020] The present invention discloses a system, method and article of manufacture for a variety of low temperature / BEOL compatible highly scalable doping tools that are configured to allow efficient doping of difficult-to-do materials. An example of a difficult-to-do material is high-quality single-layer and multi-layer graphene, which is becoming the material of choice for scaling of microelectronic interconnects. The following description is intended to enable one of ordinary skill in the art to make and use the various embodiments. Descriptions of specific devices, techniques and applications are provided as examples only. Various modifications to the embodiments described herein will be apparent to one of ordinary skill in the art, and the general principles defined herein may be applied to other embodiments and applications without departing from the spirit and scope of the various embodiments.
[0021] Reference throughout this specification to "one embodiment," "an embodiment," "an example," or similar language means that a particular feature, structure, or characteristic described in connection with the embodiment is included in at least one embodiment of the present invention. Thus, appearances of the phrases "in one embodiment," "in an embodiment," and similar language throughout this specification may, but do not necessarily, all refer to the same embodiment.
[0022] In addition, the features, structures or characteristics of the present invention can be combined in one or more embodiments in any appropriate manner. In the following description, many specific details are provided, such as embodiments of programming, software modules, user selections, network transactions, database queries, database structures, hardware modules, hardware circuits, hardware chips, etc., to provide a thorough understanding of the embodiments of the present invention. However, those skilled in the art will recognize that the present invention can be implemented without one or more specific details, or can be implemented using other methods, components, materials, etc. In other cases, well-known structures, materials or operations are not shown or described in detail to avoid obscuring aspects of the present invention.
[0023] The schematic flow charts included herein are generally described as logical flow charts. Thus, the described order and the labeled steps represent one embodiment of the proposed method. Other steps and methods that are equivalent in function, logic, or effect to one or more steps of the illustrated method or portions thereof can be envisioned. In addition, the format and symbols employed are provided to explain the logical steps of the method and are understood not to limit the scope of the method. Although various arrow types and line types may be employed in the flow charts, they should not be understood to limit the scope of the corresponding method. In fact, some arrows or other connectors may be used to indicate only the logical flow of the method. For example, an arrow may indicate a waiting or monitoring period of unspecified duration between the enumerated steps of the described method. In addition, the order in which a particular method occurs may strictly adhere to the order of the corresponding steps shown, or it may not strictly adhere to the order of the corresponding steps shown.
[0024] definition
[0025] The back-end of the line (BEOL) is the second part of IC fabrication, where interconnects and other circuit elements are formed between and on individual devices (primarily transistors) on the wafer (eg, metallization layers) separated by intra- and / or inter-layer insulators.
[0026] Complementary Metal Oxide Semiconductor (CMOS) is a metal oxide semiconductor field effect transistor (MOSFET) fabrication process that uses complementary and multiply electrically symmetric pairs of p-type and n-type MOSFETs to implement at least logic functions.
[0027] A grain boundary (GB) is the interface between two grains and / or crystallites in a polycrystalline material.
[0028] Graphene is an allotrope of carbon consisting of a single layer of atoms arranged in a two-dimensional honeycomb lattice.
[0029] Graphene nanoribbons (GNRs) are strips of graphene with a width less than about one hundred (100) nm.
[0030] Graphite is a layered crystalline form of the element carbon, with its atoms arranged and covalently bonded within the layers to form a hexagonal structure.
[0031] Intercalation Doping: Intercalation refers to the reversible insertion of molecules or ions between compound layers (e.g., potassium ions between graphite layers). Doping is the addition of impurities to a material. Dopants (impurity ions) are incorporated into the material's crystal lattice. N-type dopants donate electrons to the material. P-type dopants accept electrons from the material. This alters the charge carrier density and, therefore, the material's electronic properties.
[0032] Intercalation dopants: Numerous studies exist in the literature. Specifically for graphene, recent work by Kaustav Banerjee et al. includes, for example, J. Jiang, Jae Hwan Chu, and Kaustav Banerjee, “CMOS-Compatible Doped-Multilayer-Graphene Interconnects for Next-Generation VLSI,” IEDM 2018, pp. 799–802, 34.5.1–4; and J. Jiang, et al., “Intercalation doped multilayer-graphene-nanoribbons for next-generation interconnects,” Nano Letters, vol. 17, no. 3, pp. 1482–1488, 2017.
[0033] Piezoelectricity refers to the accumulation of electrical charge in certain solid materials in response to applied mechanical stress.
[0034] A resistance temperature detector (RTD) is a sensor used to measure temperature by monitoring the change in the resistance of a conductor with temperature. The RTD element can consist of a length of thin wire wrapped around a heat-resistant ceramic or glass core, but other constructions can also be used.
[0035] Silicon dioxide is an oxide of silicon and is an insulator with the chemical formula SiO2.
[0036] A wafer is a thin slice of semiconductor (eg, crystalline silicon, germanium) used to manufacture integrated circuits, etc.
[0037] Example Large Area / Wafer-Level Low Temperature / BEOL Compatible Highly Scalable Doping Tool: Batch / Single Wafer; Dopant = Gaseous; Substrate Pressurization = Gas
[0038] Note that the following exemplary embodiments discuss doping materials by way of example. However, other doping devices or methods may be used in other exemplary embodiments.
[0039] If at least Figure 1A 、 1B , 2, 3 and 4, various exemplary apparatuses and methods are used to insert dopant atoms or molecules in solid / liquid (vaporized to gas or non-gas) or gas phase into single-layer, few-layer or multi-layer graphene (MLG) or any other layered material synthesized by any method and having arbitrary geometry and thickness. Figure 1A A schematic diagram of an exemplary batch (although single wafers / substrates can be run in this apparatus) doping apparatus and an exemplary process are shown. For example, graphene / MLG doping can be described, for example, by pressure- and temperature-accelerated vapor-phase doping, particularly but not limited to intercalation doping of MLG. The process and apparatus are not limited to intercalation doping of MLG; rather, many other materials can be doped using this apparatus using other methods.
[0040] like Figure 1A As shown, batch processing apparatus 100 may include, but is not limited to, at least: a reaction chamber 102, a reaction chamber door and seal 104, a substrate / wafer 105, a paddle 106, a dopant process gas / mist inlet 108, an entire reactor process chamber volume 110, a multi-way high pressure valve 112, a piston chamber volume 114, pump purge and pressurization gas 116, a boost / exhaust pump 118, a piston motion axis 120, a piston chamber 122, a solenoid or screw motor 124, a piston 126, a chamber sidewall heater 130, additional provision for gases 3 and 4 if desired 132, a pump to chamber valve 134, a gas panel 140, a dopant gas mixing block 142, an MFC (mass flow controller) isolation valve (isolation valve) valve) – output 146, MFC (mass flow controller) 148, MFC isolation valve – input 150, gas regulator 152, particle filter 154, dopant 1 gas cylinder 156, dopant 2 gas cylinder 157 and clean room gas service facilities 158.
[0041] The reaction chamber 102 may include an encapsulated steel pressure vessel capable of withstanding the applied pressure and temperature, and a tubular liner that may use materials such as high-quality, high-purity quartz. The reaction chamber 102 may include openings, such as a reaction chamber door and seal 104, a dopant process gas / mist inlet 108 (which may be integrated with a high-pressure shut-off valve), and an opening for a pressurization device through a multi-way high-pressure valve 112. The reaction chamber door and seal 104 can be opened (after the reaction chamber 102 is vented of toxic gases and then brought to atmospheric pressure), and the substrate / wafer 105 can be loaded onto a paddle 106, which may include a quartz "boat" (not shown) with slots to hold the substrate / wafer 105 in a desired position, typically parallel to a spacing determined by engineering calculations and considerations of uniformity. However, there are many alternatives for how to hold substrates and wafers and process them. In the embodiment of FIG1 , the batch processing apparatus 100 is depicted in a horizontal configuration. An alternative batch processing apparatus 100 can be rotated 90 degrees to form a vertical high pressure processing chamber. The reaction chamber 102 can include a system (not shown) for mixing input gases and / or providing movement and exhaust of process gases, which can be located at the opposite end from the gas input.
[0042] The paddle 106, the reaction chamber door and seal 104, and the substrate / wafer 105 can be moved into the reaction chamber 102 until the reaction chamber door and seal 104 are closed and sealed. The movement of the paddle 106 and the loading of the substrate / wafer 105 onto the boat and then onto the paddle 106 can be performed by a robot (not shown) to at least minimize the generation of defects (such as quartz dust) and manual labor. As a result, the substrate / wafer 105 is now completely within the reaction chamber 102. At least the temperature of the substrate / wafer 105 can be balanced. Dopant gases and / or single or multiple gas mixtures suitable for doping the substrate / wafer 105 can be introduced into the reaction chamber 102 via various MFCs. Note that these gases can be heated or can be at approximately room temperature (to provide at least part of the required pressurization from a fixed volume and heated gas), and can also be at high pressure or the entire reactor processing chamber volume 110 inside the reaction chamber 102 can be placed at some or all of the required high pressure. Pressure regulation can be performed by moving the multi-way high pressure valve 112 to the desired position and utilizing the booster pump 118 (providing pressurized gas via the pump purge and pressurized gas 116) and opening the pump-to-chamber valve 134. Alternatively, or in combination, the volume (for a given T, a decrease in V will increase P) and thereby regulate the internal pressure of the entire reactor process chamber volume 110 can be changed by utilizing the piston 126 moved by the solenoid or screw motor 124 in the direction of the piston movement axis 120. The pressure of the dopant gas within the entire reactor process chamber volume 110 will accelerate the likelihood of dopant atoms being implanted into the surfaces and sidewalls of structures (e.g., interconnects) of the substrate / wafer 105.
[0043] The acceleration of dopant atoms impinging on the surface of substrate / wafer 105 and the resulting solid-state diffusion rate through a portion of substrate / wafer 105 can also be accelerated / increased by raising the temperature of substrate / wafer 105 via at least chamber sidewall heaters 130 and dopant gas supplied to the entire interior of reactor processing chamber volume 110 via dopant process gas / mist inlet 108. Note: The dopant gas injected into the entire interior of reactor processing chamber volume 110 via dopant process gas / mist inlet 108 can also be preheated or cooled based on engineering and chemical calculations and considerations. The temperature range within the entire interior of reactor processing chamber volume 110, and at least the equilibrium temperature of substrate / wafer 105, can be from approximately 25°C to approximately 500°C, with a uniformity of less than ±5°C. The entire interior of reactor processing chamber volume 110 can be designed to accommodate substrates / wafers 105 with a diameter of at least 450 mm (for circular wafers) or 450 mm side-to-side (for square / rectangular substrates). The pressure inside the entire reactor processing chamber volume 110 can range from about 20 psi, about 30 psi, about 40 psi, about 50 psi, about 60 psi, about 70 psi, about 80 psi, about 90 psi, about 100 psi, about 110 psi, about 120 psi, about 130 psi, about 150 psi, about 200 psi, about 250 psi, about 300 psi, about 350 psi, about 400 psi, about 450 psi, and can be greater than about 500 psi, or 1-500 bar, depending on engineering and design goals, choices and considerations.
[0044] Gas pressure acceleration of dopant movement can be achieved in at least four ways: 1) by heating the gas in a fixed volume of at least the reactor processing chamber 110; 2. by adding additional gas molecules to a fixed volume of at least the reactor processing chamber 110; 3. by reducing the total volume of the reactor processing chamber 110 and the piston chamber volume 114 ("piston type"); and 4. by utilizing the boost / exhaust pump 118 to pump gas through / from the pump purge and pressurization gas 116, thereby increasing the pressure inside at least the reactor processing chamber 110.
[0045] The dopant supplied to the interior of the entire reactor processing chamber volume 110 may include a gas panel 140 and a cleanroom gas service facility 158. Although gaseous dopant delivery is shown in FIG1 , liquid dopant can be delivered to the interior of the entire reactor processing chamber volume 110 by at least bubbling a carrier gas, such as N2, Ar, etc. (non-reactive), or a reactive carrier gas, such as O2, through a liquid dopant, such as POCl3, etc. A typical gas panel may include a collection of an MFC isolation valve-output 146, an MFC (mass flow controller) 148, an MFC isolation valve-input 150, a gas regulator 152, and a particle filter 154. Each "line" of these components can be supplied with dopant gas from a dopant 1 gas cylinder 156 and a dopant 2 gas cylinder 157, respectively, which can be located in the cleanroom gas service facility 158. If desired, additional setup 132 for gases 3 and 4 can include liquid dopants as well as solid dopants (e.g., powders are heated to release the dopant metal and then an inert carrier gas can "carry" the dopant injection gas) to the dopant gas mixing block 142 and ultimately through the dopant process gas / mist inlet 108 into the interior of the entire reactor processing chamber volume 110.
[0046] For the embodiments of the materials used in the specification, the doping process can be carried out as follows. The substrate / wafer 105 is loaded onto the paddle 106 and then all moved and loaded into the reaction chamber 102 and the entire reactor processing chamber volume 110. The substrate / wafer 105 has been patterned with the MLG interconnect layer by photolithography as required; the MLG is etched so that the MLG sidewalls are exposed for intercalation doping. Dopant gases can be run to fill the entire reactor processing chamber volume 110, such as PH3 and O2, and the reaction chamber temperature has been balanced at, for example, about 400°C. The pressure can be adjusted to a pressure suitable for the size of the MLG interconnect lines on the substrate / wafer 105. The pressure inside the entire reactor processing chamber volume 110 can be maintained for a period of 10-60 minutes, or even longer, depending on engineering calculations and considerations, to dope various geometries of MLG lines to the desired sheet resistance. After the pressure is reduced and the lines are purged to remove dopants and reactive gases, the paddle 106 can be safely removed from the reaction chamber 102 and the substrate / wafer 105 can be removed for further processing.
[0047] Another implementation is a large area / wafer-level low temperature / BEOL compatible highly scalable doping tool: batch / single wafer; dopant = solid / liquid vaporized to gas; substrate pressurization = gas
[0048] Figure 1B A schematic diagram of an exemplary batch (although a single wafer / substrate can be run in the apparatus) doping apparatus and an exemplary process are shown. Figure 1B and embodiments thereof having Figure 1A Aspects of the embodiments. For example, graphene / MLG doping can be described, for example, by solid / liquid (vaporized to gas) phase doping with pressure and temperature acceleration, particularly but not limited to intercalation doping of MLG. The process and apparatus are not limited to intercalation doping of MLG; rather, many other materials can be doped using the apparatus using other methods.
[0049] like Figure 1B As shown, batch (although single substrates / wafers can be processed) processing apparatus 101 may include, but is not limited to, at least: a reaction chamber 102 (dashed line), a reaction chamber door and seal 104, a substrate / wafer 105, a paddle 106, a dopant process gas / mist inlet 108, an entire reactor process chamber volume 110, a multi-way high pressure valve 112, a piston chamber volume 114, a pump purge and pressurization gas 116, a boost / exhaust pump 118, a piston motion axis 120, a piston chamber 122, a solenoid or screw motor 124, a piston 126, and a chamber sidewall heater 110. 30, solid source temperature controller 131, additional setup for gases 3 and 4 132 (if required), pump to chamber valve 134, solid source to chamber valve 135, gas panel 140, dopant gas mixing block 142, MFC isolation valve – output 146, MFC (mass flow controller) 148, MFC isolation valve – input 150, gas regulator 152, particle filter 154, dopant 1 gas cylinder 156, dopant 2 gas cylinder 157, clean room gas service facilities 158, solid source crucible 160 and solid / slurry / liquid source material 162.
[0050] The reaction chamber 102 may include an encapsulated steel pressure vessel capable of withstanding the applied pressures and temperatures, and a tubular liner that may utilize materials such as high-quality, high-purity quartz. The reaction chamber 102 may include openings such as a reaction chamber door and seal 104, a dopant process gas / mist inlet 108 (which may be integrated with a high-pressure shutoff valve), and an opening (via a multi-way high-pressure valve 112) for pressurization equipment (as well as a potential location for placing solid / slurry / liquid source material 162 via a solid source to chamber valve 135). The reaction chamber door and seal 104 may be opened (after the reaction chamber 102 is vented of toxic / reactive gases and returned to atmospheric pressure), and the substrate / wafer 105 may be loaded onto a paddle 106, which may include a quartz "boat" (not shown) with slots to maintain the substrate / wafer 105 in a desired position, generally parallel to a spacing determined by uniformity requirements through engineering calculations and considerations.
[0051] However, there are many alternative methods for holding and handling substrates and wafers. Figure 1BIn the embodiment of FIG. 1 , the batch processing apparatus 100 is depicted in a horizontal configuration. As another embodiment, the batch processing apparatus 100 can be rotated 90 degrees in the z-direction to form a vertical high-pressure processing chamber. The reaction chamber 102 can include a system for mixing input gases (possibly a dopant gas mixing block 142) and / or for providing movement and exhaust of process gases (not shown) during operation (as well as purge gases in idle or door-open situations), which can be located at the opposite end from the gas input. The dopant process gas / mist inlet 108 can have many alternative configurations, such as a showerhead, a quartz injector, heated or cooled gas lines, etc., depending on engineering and chemical considerations and choices.
[0052] The paddle 106, the reaction chamber door and seal 104, and the substrate / wafer 105 can be moved into the reaction chamber 102 until the reaction chamber door and seal 104 are closed and sealed. Manual and / or automatic latches, gears, etc. (not shown) can be used to provide a sufficiently strong mechanical seal of the reaction chamber door and seal 104 to maintain the pressure of the reaction chamber 102 and safe operation. The movement of the paddle 106 and the loading of the substrate / wafer 105 onto the boat and then onto the paddle 106 can be performed by a robot (not shown) to at least minimize defect generation (such as quartz dust) and manual labor. Therefore, the substrate / wafer 105 is now completely within the reaction chamber 102. At least the temperature of the substrate / wafer 105 can be balanced.
[0053] Dopant gases and / or mixtures of single or multiple types of gases suitable for doping the substrate / wafer 105 can be introduced into the reaction chamber 102 via various MFCs. Note that these gases can be heated or can be at approximately room temperature (so as to provide at least some of the desired pressurization from a fixed volume and heated gas), and can also be at high pressure or to place the entire reactor processing chamber volume 110 within the reaction chamber 102 at some or all of the desired high pressure. Pressure regulation can be performed by moving the multi-way high pressure valve 112 to the desired position and utilizing the booster pump 118 (providing pressurized gas by pumping purge and pressurized gas 116) and opening the pump-to-chamber valve 134. Alternatively, or in combination, the total volume (for a given T, decreasing V will increase P) and, therefore, the pressure within at least the entire reactor processing chamber volume 110 can be varied by utilizing a piston 126 moved in the direction of the piston's axis of motion 120 by a solenoid or screw motor 124.
[0054] The pressure of the dopant gas within the entire reactor processing chamber volume 110 will accelerate the possibility of dopant atoms being implanted into the surfaces and sidewalls of structures (e.g., interconnects) on the substrate / wafer 105, as well as from a solid or liquid source in contact with the top structure of the substrate / wafer 105. For example, a doped SOG (P-SOG, B-SOG, BP-SOG, etc.) can be applied to the substrate / wafer 105 prior to T and P acceleration of the tool processing device 101. For example, a solid layer saturated or substantially saturated with the desired dopant atoms can be deposited on the substrate / wafer 105 prior to processing in the processing device 101. Similarly, the formation of a doped layer covering at least the substrate / wafer 105 can be part of a process within the processing device 101; for example, such as bubbling a carrier gas through POCl3 plus O2 gas, operating in the reaction chamber 102, to form phosphorus-doped glass (PSG) deposited on the substrate / wafer 105 and the interior surfaces of the reaction chamber 102. Alternatively, a solid dopant, such as arsenic or FeCl3 powder or slurry, as a solid / slurry / liquid source material 162, can be placed in a solid source crucible 160 and then appropriately heated by a solid source temperature controller 131 for degassing, thereby providing solid source doping via a gaseous state, accompanied by temperature and pressure acceleration. Alternatively, the solid / slurry / liquid source material 162 can be placed within the reaction chamber 102, but this eliminates the need for independent temperature control of the solid / slurry / liquid source material 162. Note that significant pressure can be achieved simply by heating the gas within a fixed volume of the enclosed / isolated reaction chamber 102.
[0055] The acceleration of dopant atoms impinging on the surface of substrate / wafer 105 and the resulting solid-state diffusion rate through a portion of substrate / wafer 105 can also be accelerated / increased by increasing the temperature of substrate / wafer 105 and dopant gas. These gases can be applied via dopant process gas / mixture inlet 108 to the entire interior of reactor processing chamber volume 110, which is heated by at least chamber sidewall heater 130. Note: The dopant gas injected into the entire interior of reactor processing chamber volume 110 via dopant process gas / mist inlet 108 can also be preheated or cooled based on engineering and chemical calculations and considerations. The temperature range within the entire interior of reactor processing chamber volume 110, and at least the equilibrium temperature of substrate / wafer 105, can be from approximately 25°C to approximately 500°C, with a uniformity of less than ±5°C. The entire interior of reactor processing chamber volume 110 can be designed to accommodate substrates / wafers 105 with a diameter of at least 450 mm (for circular wafers) or 450 mm side-to-side (for square / rectangular substrates). The tool processing apparatus 101 can be modified to accommodate substrates in a continuous format. The pressure within the entire reactor processing chamber volume 110 can range from about 20 psi, about 30 psi, about 40 psi, about 50 psi, about 60 psi, about 70 psi, about 80 psi, about 90 psi, about 100 psi, about 110 psi, about 120 psi, about 130 psi, about 150 psi, about 200 psi, about 250 psi, about 300 psi, about 350 psi, about 400 psi, about 450 psi, and can be greater than about 500 psi, or 1-500 bar, depending on engineering and design goals, choices, and considerations.
[0056] Gases and material dopants that can form solids / liquids (glass is just a viscous liquid) as dopants supplied to the interior of the entire reactor process chamber volume 110 may include gas panels 140 and clean room gas service facilities 158. Although Figure 1B, but liquid dopants can be delivered throughout the reactor process chamber volume 110 by at least bubbling a carrier gas, such as N2, Ar, etc. (non-reactive), or which can include a reactive carrier gas, such as O2, through a liquid dopant, such as POCl3, etc. A typical gas panel can include the group of MFC isolation valve - output 146, MFC (mass flow controller) 148, MFC isolation valve - input 150, gas regulator 152, and particle filter 154. Each "line" of these components can be supplied with dopant gas from a dopant 1 gas cylinder 156 and a dopant 2 gas cylinder 157, respectively, which can be located in the clean room gas service facility 158. If desired, additional setup 132 for gases 3 and 4 may additionally include liquid dopants as well as solid dopants (e.g., powders are heated to release the dopant metal and then an inert carrier gas can “carry” the dopant injection gas) to the dopant gas mixing block 142 and ultimately through the dopant process gas / mist inlet 108 into the interior of the entire reactor processing chamber volume 110.
[0057] As an example of the materials used herein, MLG is formed and then intercalation doped. The doping process can proceed as follows. A substrate / wafer 105 is loaded onto a paddle 106, which is then moved and loaded into the reactor chamber 102 and the entire reactor processing volume 110. The substrate / wafer 105 already has an MLG interconnect layer patterned as desired by photolithography; the MLG is etched to expose the MLG sidewalls for intercalation doping. A dopant gas, such as PH3 and O2, is run to fill the entire reactor processing volume 110. The dopant gas can be configured to form a doped glass, for example, and the reactor temperature is equilibrated at approximately 400°C. The pressure can be adjusted to a pressure appropriate for the dimensions of the MLG interconnect lines on the substrate / wafer 105 (see "At least four ways to increase pressure" in the previous paragraph). The pressure within the entire reactor processing volume 110 can be maintained for 10-60 minutes, or even longer, depending on engineering calculations and considerations, to achieve the desired sheet resistance for various MLG line geometries. After the pressure is reduced and the lines are evacuated / purged to remove dopants and reactive gases, the paddle 106 can be removed from the reaction chamber 102 and the substrate / wafer 105 can be removed for further processing.
[0058] Another embodiment is a large area / wafer-level low temperature / BEOL compatible highly scalable doping tool: Platform - single / multiple; Dopant = solid / liquid vaporized to gas; Substrate pressurization = gas
[0059] Figure 2An exemplary schematic diagram of an embodiment of a non-contact pressure system utilizing piston-type gas pressure generation, specifically solid / liquid dopants (vaporized into gas) and horizontal single or multiple wafer / substrate stages is shown. The exemplary piston-type gas pressure generation system 200 may include, but is not limited to, a substrate / wafer 202, a slit 206, a process chamber volume 204, a heated base plate 208, a valve 207, a piston 218, a minimum volume process chamber 210, a solenoid or screw motor 212, a piston volume 214, a piston motion axis 220, a chamber sidewall heater 230, a solid source temperature controller 231, a solid source to chamber valve 235, a solid source crucible 260, and a solid source material 262. The exemplary piston-type gas pressure generation system 200 may also include a gas system drawn in blue shading, which is taken from Figure 1B And can be similar to it.
[0060] The exemplary piston-type gas pressure generating system 200 utilizes the combined gas laws, allowing the machine operator to manipulate volume and temperature, typically through software control means, to affect the pressure applied to the top surface of the substrate / wafer 202. This can accelerate the diffusion of dopant atoms or molecules through the material desired to be doped, such as graphene, such as a single-layer or few-layer graphene structure, or a multi-layer graphene (MLG) structure. Doping of the graphene layer can be performed from the sidewalls of the graphene wire or ribbon structure to provide more efficient and effective doping primarily through intercalation doping.
[0061] As described in more detail herein, the substrate / wafer 202 can enter the minimum volume processing chamber 210 through the slit 206 and be placed on top of the heated base 208. Thermal control of the wafer and gas can be performed by at least the heated base 208 and various chamber sidewall heaters 230, which is determined by engineering choices and considerations / trade-offs. Alternative methods of heating the gas and wafer can include, for example, heating lamps, etc. The heated base 208 can include a rotation function to allow for improved temperature uniformity of thermal treatment, which may include doping treatments, the use of intercalating agents, and some thin film forming processes. This rotation function of the heated base 208 can be combined with most of the contactless pressure functions to provide diffusion acceleration for diffusion pairs and doping processes (such as intercalation doping). The processing chamber of the present invention is interchangeable with the reaction chamber.
[0062] The pressure on top of the substrate / wafer 202 can be determined by Figure 2The piston system shown (and the pressure increase as the gas is heated within a fixed volume) is controlled. By moving piston 218 in the direction of piston motion axis 220 via solenoid or screw motor 212, the process chamber volume 204 plus piston volume 214 can be changed from its initial volume (204+214) to its final volume (204+214-the volume of piston 218 inserted). This changes the total volume without expanding the size of the container walls, thereby increasing the pressure in process chamber volume 204 and piston volume 214.
[0063] Another embodiment operation of the processing chamber 210 is now described. A clean and dry substrate / wafer 202 can be placed on the heated base 208 through the slit 206. A small vacuum pump (not shown) can bring the processing chamber 204 to 100-300 mTorr, and the heated base 208 can bring the substrate / wafer 202 to approximately 200°C to dry the wafer. The vacuum pump (not shown) can also be used to hold the wafer / substrate 202 firmly on the heated base 208 and can assist in the dehydration process of the substrate / wafer 202. The substrate / wafer 202 can have a doped layer already deposited thereon, or the piston gas pressure generating system 200 can be configured to deposit a doped layer, for example, POCl3 doped SiO2. These are at least in the present invention. Figure 1B Now, in addition to temperature, gas pressure can also be used to accelerate the movement of dopant atoms from the doped layer of wafer 202 through the material to be doped, such as single crystal silicon or MLG. The temperature and time under applied gas pressure can be controlled to achieve the desired dopant movement. As at least in the present invention, Figure 1A As described in the above, the dopant supplied to the surface of the substrate / wafer 202 may be derived from an implanted ( Figure 2 1 ) into the reaction chamber 210. The gas may be pressurized and / or the reaction chamber may be pressurized to increase the likelihood that dopant atoms are on the surface of the substrate / wafer 202 and, as desired, implanted and diffused into the top structures, regions, or layers of the wafer / substrate 202. Note: The heated base plate 208 may be configured as a multi-wafer / substrate support, such as a wafer stage, to process multiple wafers simultaneously, thereby increasing tool productivity (see partial top view exploded schematic).
[0064] In addition, another embodiment of the present invention includes a direction in which the pressurizing cylinder piston volume 214 and the moving piston 218 are perpendicular to each other instead of being perpendicular to each other. Figure 2 Alternatively, the pressurized cylinder piston volume 214 and the moving piston 218 may be placed directly above each wafer / substrate 202 and the heated base plate 208, similar to the cylinders of a large internal combustion engine, such as a six-cylinder automobile engine. Figure 2AAn exemplary schematic diagram of one embodiment of such a non-contact pressure system utilizing a piston-cylinder to generate gas pressure above a substrate / wafer, with gas / solid / liquid dopants and single or multiple wafer / substrate stages is shown, showing a portion of the entire tool. Figure 2A Implementations may include Figure 2 and Figure 1B Many implementations of both.
[0065] An exemplary piston-cylinder gas pressure generating system 299 may include, but is not limited to, a substrate / wafer 202, a slot 206 (see Figure 2 ), process chamber / reactor internal volume 204, heating base 208, valve 207 (see Figure 2 ), piston 266, solenoid or screw motor 268, piston 266 to motor 268 shaft 264, piston movement direction 270, process chamber sidewall 262, chamber sidewall heater 230 (see Figure 2 ), heating chassis 208 shaft 280, heating chassis 208 support structure 278, solid vaporization structure 235, 231, 260, 262 (see Figure 2 ), a main substrate / wafer 272, a doping layer 276 (optional), an exemplary structure to be doped 274 (or a substrate of interest, such as glass, etc.), and a substrate (typically silicon) 272. Similarly, the exemplary piston-cylinder gas pressure generating system 299 may also include a gas system drawn in blue shading, which is taken from Figure 1B and can be similar thereto; similarly, the pump and solid / slurry / liquid dopant source sections are shaded in blue, taken from Figure 1B And similar to it.
[0066] The optional (if configured for solid / liquid doping) doping layer 276 can be formed by depositing a highly doped layer that serves as a dopant source, for example, in a diffusion tube (such as POCl3) by a doping CVD or PECVD process. Alternatively, the optional doping layer 276 can be formed by depositing a thin layer of oxide and doping the oxide via a PLAD process or conventional ion implantation. Furthermore, the optional doping layer 276 can include spin-on doped glass (d-SOG) or other organic material that can be baked and degassed before applying pressure, or not baked and degassed and left "soft". The exemplary structure 274 to be doped can include an MLG interconnect structure after etching and cleaning so that the MLG edge is exposed to the optional doping layer 276 or the bare exposed structure is exposed to the processing chamber / reactor interior volume 204. NOTE: Figure 2A Only the process reactor / chamber portion of the tool / apparatus is shown and may be used with Figure 2 The parts are combined to show a substantially complete high-level diagram of the tool.
[0067] use Figure 2A + Figure 2 A typical process flow for the tool may include the following steps: a substrate / wafer 202 may be placed / loaded through slots 206 onto a heated base plate 208 with raised pins (not shown). The pins may be retracted, and the host substrate / wafer 272 on the back side of the substrate / wafer 202 may be securely contacted with the heated base plate 208. At least the chamber sidewalls 262 and piston 266 may be retracted upward to avoid obstructing the loading of the substrate / wafer 202. At least the chamber sidewalls 262 may now be lowered to contact and seal the heated base plate 208. (This sealing requirement may be less stringent by having the pressure chamber surround the majority of the exemplary piston-cylinder gas pressure generation system 299.) During the dopant layer deposition step, a gap may be left between the chamber sidewalls 262 and the heated base plate 208. The chamber / reactor interior volume 204 may be purged, evacuated, and repeated according to engineering data and selection. The heated base plate 208 and chamber sidewall heaters 230 may be used to bring the substrate / wafer 202 to the desired temperature. The piston 266 can be moved by a solenoid or screw motor 268 through the piston 266 to the shaft 264 of the motor 268 to make the volume of the process chamber / reactor interior volume 204 smaller, thereby increasing the gas pressure inside the process chamber / reactor interior volume 204 and on the top surface of the optional doping layer 276 or the top surface of the exemplary structure to be doped 274 for direct gas doping. The position of the piston 266 can be adjusted to obtain the desired pressure in the process chamber / reactor interior volume 204 and the top surface of the exemplary structure to be doped 274 or the optional doping layer 276. This can be maintained or adjusted by vibrating or moving the piston 266 to change the applied pressure to achieve the desired pressure (and temperature) acceleration for doping of the exemplary structure to be doped 274.
[0068] Another embodiment is a large area / wafer-level low temperature / BEOL compatible highly scalable doping tool: Platform - single / multiple; Dopant = gas / solid / liquid vaporized to gas or not vaporized; Substrate pressurization = direct contact mechanical
[0069] Figure 3A schematic diagram of an exemplary batch (although a single wafer / substrate can be run in this apparatus) doping apparatus and an exemplary process are shown that introduces gases into a process chamber 310 for the purpose of doping an exemplary substrate / wafer 202, and uses mechanical pressure and temperature to accelerate the doping process. The mechanical pressure in this exemplary tool / apparatus 300 is by direct contact mechanical pressure. The exemplary substrate / wafer 202 can include a variety of materials in a variety of configurations, ready for doping; however, the example used is a substrate / wafer 202 that is a single crystal silicon wafer, on which a thick oxide structure is formed, the thick oxide structure having openings etched into the silicon. The in-situ doping tool / apparatus 300 may include, but is not limited to, at least: a heated top plate 340, a heated bottom plate 208, a processing or reaction chamber 310, a substrate / wafer 202 comprising silicon with an oxide structure on a top layer, a motor 302, a mechanical / turbo pump 304, a shaft 305 from the motor 302 to the top plate 340, a control valve 306, an exhaust port 308, a purge port 311, a bottom heating power supply 350, a shaft 354 from the bottom heating power supply 350 to the heated bottom plate 208, a gas showerhead 312, a dopant gas mixing block 314, an MFC isolation valve - output 316, an MFC (mass flow controller) 318, an MFC isolation valve - input 320, a gas regulator 322, a particle filter 324, a dopant 1 gas cylinder 326, a dopant 2 gas cylinder 327, a clean room gas service facility 328, a gas panel 330, and additional settings 332 for gases 3 and 4 (if required). The exemplary apparatus and process includes introducing a carrier gas with a dopant into the chamber at a suitable pressure to allow the dopant to diffuse / migrate into the silicon having an oxide structure. This can be done directly in the disclosed process chamber with top and bottom heated disks; or in another chamber embodiment described herein. If plasma is required to enhance the process, electrodes can be provided in each disk to achieve this purpose, or a remote / downstream plasma source can be considered. The above method can be performed in other chamber embodiments discussed in this application (e.g., pressurized batch chambers, at least Figure 1 herein).
[0070] For example, dopants are inserted into the topmost single crystal silicon surface by physical contact with a solid dopant material (as has been previously done in the industry with boron doping using boron disks in contact with Si). Here, after the wafer with the single crystal silicon and oxide structure is introduced, a solid doping disk (functionally similar to the optional doping layer 276) can also be introduced into a chamber with, for example, a top heater and a bottom heater. The solid doping disk can be placed on top of the wafer formed of the single crystal silicon and oxide structure. The top heating disk will then be applied gently, at first, and then gradually increased to the required pressure, in order to push the doping disk towards the front (top) surface of the substrate / wafer 202. The pressure level will be set to a value that optimizes dopant diffusion. Heaters and electric fields (not shown) can be applied as needed to facilitate the process. As at least Figure 2A As described in the relevant description sections of this document, if a liquid or solid type dopant source is desired, the substrate / wafer 202 may include at least a doping layer 276 (optional), an exemplary structure to be doped 274 (or substrate of interest, such as glass, etc.), and a substrate (typically silicon) 272.
[0071] Pressure on the substrate / wafer 202 can be mechanically achieved by pressing a heated top plate 340 onto the top of a solid doping plate that is positioned on top of the structure to be doped (e.g., the exemplary MLG interconnect structures discussed herein, and the current single crystal silicon and oxide structure examples), thereby forcing dopants into the device single crystal silicon and oxide structures and regions. High temperatures, as described above, can also be applied to help induce doping of the desired single crystal silicon and oxide structures and regions. This process may be subject to stringent surface cleanliness requirements and may have higher defectivity than more modern doping processes disclosed herein. The solid doping plate may comprise a relatively soft layer of doping material, such as PECVD BPSG or PSG, or a doped SOG (spin-on-glass) layer that is soft enough to be pressed by, for example, the pressure applied by the heated top plate 340 into the spaces between exposed interconnects on the substrate / wafer 202, the interconnects comprising, for example, molecularly aligned materials such as MLG, thereby promoting some intercalation doping from / through the sidewalls of the MLG interconnects.
[0072] Exemplary embodiments
[0073] Other configurations of the reactor that apply other forms of heat and / or pressure to the substrate are now discussed. Note that the above configuration is only one of many. Alternative configurations may include, but are not limited to:
[0074] - a heating membrane subjected to high pressure (e.g. pneumatic or hydraulic);
[0075] - Clamshell configuration with high temperature and high pressure heating of N2, Ar, and other gases;
[0076] - Large-scale batch reactors with the same features as above;
[0077] - A clamshell configuration, in which the methods of heating and applying pressure to the substrate detailed previously can be combined. For example, high-temperature, high-pressure gas can be introduced; high pressure can be introduced while heating the substrate using a bottom heater, which heats the high-temperature gas to achieve pressure and maintain temperature, etc.;
[0078] - a quartz body with a substrate placed on a susceptor, inductively heated and pressure-loaded using high-pressure gas; and
[0079] - May also include a lamp array in the quartz body for final temperature control.
[0080] The following sections provide certain operating ranges for the system, as well as parameter ranges for desired material structure, composition, etc., for optimal process results.
[0081] Note that the reactor can be implemented as a batch reactor and / or a single substrate (wafer) reactor. Note that in a single substrate configuration, finer substrate-to-substrate process control can be achieved than using a batch reactor. By using a wafer stack between two heaters, it is also possible to create a batch processing approach using a single wafer architecture.
[0082] Alternative doping methods
[0083] Another disclosed apparatus system can also be used to introduce dopants into wafers and structures on or within wafers, as the chamber infrastructure allows for this operation. The literature lists at least six methods for carrier doping of materials: 1) boron or nitrogen substitutional doping; 2) deposition of alkali metal atoms; 3) adsorption of gases such as NO2; 4) charge transfer from conjugated organic molecules; 5) liquid phase interaction of graphene and dopant molecules; and 6) spin coating of a mixture of, for example, TCNQ and PMMA.References in the above doping list may include at least Hans He, et al.; "Uniform doping of graphene close to the Dirac point by polymer-assisted assembly of molecular dopants", Nature Communications, 27September 2018, pp.1-7.; and V. Narendar, et al., "First Principle Study ofDoped Graphene for FET Applications", Silicon vol.11, pp.277-286(2019).; and R.Ishikawa, et al., "Doping graphene films via chemically mediated chargetransfer," Nanoscale Research Letters, vol.6, pp.111-116(2011); the entirety of all of the forgoing are incorporated by reference.Intercalation doping isdescribed in at least W.Liu, J.Kang and K.Banerjee, “Characterization of FeCl3Intercalation Doped CVD Few-Layer Graphene,” IEEE Electron Device Letters, Vol. 37, No. 9, pp. 1246-1249, Sept. 2016; and J. Jiang, J. H. Chu, and K. Banerjee, "CMOS-compatible doped-multilayer-graphene interconnects for next-generation VLSI," IEEE IEDM, 2018, pp: 34.5.1-34.5.4.; the entire contents of the above are incorporated herein by reference. Many of these may not be practical for certain types of doping challenges, such as charge transfer via surface adsorption doping.
[0084] Intercalation doping applications often require access to the “edges” of layered structures, as doping directly through the tight matrix of layered atoms is very difficult. Therefore, the required lithography and etching processes required for this particular interconnect layer using layered materials (such as graphene / MLG) can be performed. The wafer can then be cleaned and a layer of dopant source can be deposited, either in a separate machine or within the process chamber of the apparatus described herein. The dopant can then be driven into the exposed MLG sidewalls using the temperature and pressure capabilities of the apparatus described herein. The wafer can then be removed from the processing chamber and the doped layer can be selectively removed, or in some applications, the doped layer can remain on the wafer as a blanket layer to mitigate dopant outdiffusion from the MLG lines.
[0085] At least the apparatus described in Figures 1-3 may include a transfer chamber for loading the substrate / wafer X02 into the reactor / processing chamber, which may be used to pre-treat the substrate / wafer X02 before the wafer is moved from the transfer chamber to the reactor / processing chamber. The pre-treatment of the substrate / wafer X02 may include rotation and / or translation movement of the wafer to fix, for example, the alignment of a "notch" or "flat edge" or some other substrate (wafer) crystallographic orientation indicator to align the wafer to a constant or variable position before transferring to the reactor / processing chamber. The pre-treatment of the wafer may include heating the wafer to perhaps dry the moisture of the wafer and / or prepare the temperature of the wafer so that the heating can shorten or enhance the processing performed in the reactor / processing chamber. The pre-treatment of the wafer may include purging the transfer chamber with an inert gas (e.g., N2, Ar, He, etc.) or a reactive gas (e.g., O2, O3, etc.). Pretreatment of the wafer may include various exposures to the electromagnetic spectrum, such as UV, X-rays, IR, which may be used to activate or place specific atoms into an excited state, such as RTA (rapid thermal annealing) or RTO (rapid thermal oxidation). Pretreatment of the wafer may include plasma exposure of the wafer, for example, to clean the wafer surface, or chemically activate portions of the wafer surface for other processing (e.g., growing oxide, deactivating the wafer surface, etc.).
[0086] Various combinations and sub-combinations of at least the pretreatment options disclosed above can be performed, for example, creating a pretreatment such as heating the wafer and exposing the wafer to UV light under an O2 or O3 purge / atmosphere (oxidizing. Reducing atmospheres may also be useful, particularly for wafer cleaning) to form a thin oxide on part or all of the surface of the wafer, etc.
[0087] "Substrates / wafers" can include various sizes (e.g., diameters such as about 450 mm, about 400 mm, about 300 mm, about 200 mm, about 150 mm, etc.). When viewed from above the substrate / wafer, the substrate / wafer can include other overall (ignoring notches, flat edges, etc.) shapes, such as round, square, rectangular, etc. The substrate / wafer composition can include, for example, crystalline substances such as elemental silicon, germanium, aluminum, copper alloys, SiGe, aluminum, h-BN, various glasses (amorphous or crystalline), amorphous forms of Si, Ge, etc. The substrate / wafer composition can include, for example, a variety of materials such as SOI (silicon on insulator), GeOI, etc. The operator / user / robot can place the wafer / substrate into the transfer chamber. The machine can be configured to perform this loading in an automated manner, including using wafer containers such as FOUPs.
[0088] The reactor / processing chamber and the transfer chamber can be connected by a slot structure. The machine control software can be configured to automatically open the slot once the pressures in the two chambers are equalized. A hardwired backup control system with redundant pressure sensors can be included in the device to ensure that wafers can be safely transferred only when the pressures between the reactor / processing chamber and the transfer chamber are equal.
[0089] The reactor / processing chamber can be the main chamber (or reactor) for growing or depositing various layers (e.g., doped layers) on the wafer, in addition to accelerating the diffusion of dopants. However, due to contamination and particle problems, the growth of many materials, such as graphene (and / or other carbon materials), requires a dedicated chamber. A substrate slightly larger than 450 mm in size can be located in the reactor / processing chamber. The reactor / processing chamber can be equipped with a heating system to heat the inner wall of the reactor / processing chamber, so that not only can the processing requirements be met, but also cleaning and maintenance can be performed more easily or less frequently. Depending on the process details, the gases used, and other engineering considerations, the inner wall of the reactor / processing chamber may also include a cooling system to suppress the bypass deposition of the process gas reaction, so that longer chamber cleaning and maintenance cycles can be achieved and in-situ process and film defects can be suppressed, which are caused by particles deposited on the inner wall falling onto the wafer or being blown onto the wafer by the process gas flow.
[0090] A heated top plate or plate may also be located within the reactor / processing chamber (e.g., see heated top plate 340). The heated top plate 340 and / or the heated bottom plate 208 may include their own heating mechanisms (e.g., heating power supply 350 shown for bottom plate 208). In this way, both the bottom plate on which the wafers are placed and the heated top plate may be independently heated and individually temperature controlled by the machine software. For example, the bottom plate may be heated while the top plate may be maintained at approximately room temperature (or vice versa). The heated top plate and / or the heated bottom plate may be configured to include independently controllable zones on the plate; for example, concentric rings with different temperature controls, pizza-like slices as temperature control zones, etc. Combinations of the above may also be configured.
[0091] The lining surfaces (covering plates: e.g., heated top plate 340 and / or heated bottom plate 208, and the inner walls of the reactor / processing chamber 310) can be made of graphite, but other materials such as aluminum nitride, quartz, silicon carbide coated graphite, etc. can also be used. Several such materials are possible - generally speaking, materials that allow for good heat transfer and pressure distribution are considered. Particle formation may also be affected by surface finish, deposited film adhesion, thermal expansion coefficient, etc. The reactor / processing chamber 310 and other chambers described herein can include the ability to ignite a plasma, such as using NF3 & Ar, to provide an in-situ internal chamber surface cleaning process, which can help minimize particle contamination of the wafer surface or the formation of embedded thin film defects, thereby extending chamber maintenance cycles.
[0092] The mechanical / turbo pump 304 may be used to control the pressure in the reactor / process chamber 310 and / or the transfer chamber (not shown). The mechanical pump may be used to reduce the pressure in the reactor / process chamber (e.g., 10 -3 A turbo pump can be a more powerful pump that is used to reduce the pressure even further (e.g., 10 -7 The low pressure is intended to purge the chamber of any impurities during part of the operating cycle.
[0093] The heating power supply 350 can heat and control the temperature on the heating base plate 208. This can be accomplished with a uniformity of ±5°C (and / or near-zero non-uniformity) across the entire heating base plate 208. Both the heating top plate 340 and the heating base plate 208 can include multiple thermocouples or alternative temperature sensing devices embedded within each plate to provide temperature input to a temperature control system (e.g., a proportional feedback control system, etc.). The heating base plate 208 can generate heat via a current resistor from the heating power supply 212, or for certain temperature ranges can be heated by water (not shown), or can be heated by a light source (not shown) placed inside the reactor / processing chamber 310 to illuminate at least the heating base plate 208.
[0094] The heated top plate 340 can be moved up and down along an axis 352 that is perpendicular to the bottom area surface of the heated top plate 340 and the top area surface of the heated bottom plate 208. The heated top plate 340 can have an independent heat supply. The heated top plate 340 can be operated to generate mechanical pressure on the substrate / wafer; for example, using the axis 305, a motor, a screw jack movement, etc. In addition to or instead of mechanical pressure, gas pressure can also be used. The purpose of applying pressure is to enable a higher dopant diffusion rate within the top doped layer of the substrate / wafer 202, or to achieve a higher dopant diffusion rate into the base material of the substrate / wafer 202, such as single crystal silicon, SiO2 as glass (as a network modifier), etc.
[0095] See at least patent applications 63 / 123,587 and PCT / US21 / 61361 and at least papers J. Jiang, et al., "Intercalation doped multilayer-graphene-nanoribbons for next generation interconnect," Nano Letters, 17(3), pp. 1482-1488, 2017; and J. Jiang, et al., "All-carbon interconnect scheme integrating graphene wires and carbon-nanotube-vias," IEEE IEDM, pp.14.3.1-14.3.4, 2017.; and J. Jiang, et al., "CMOS-Compatible Doped-Multilayer-Graphene Interconnects for Next-Generation VLSI," IEEE IEDM, pp. 34.5.1-34.5.4, 2018.; and K. Agashiwala, et al. al., “Reliability and Performance of CMOS-Compatible Multi-Level Graphene Interconnects Incorporating Vias” IEEE IEDM, 2020; and K. Agashiwala, et al., “Demonstration of CMOS-Compatible Multi-Level Graphene Interconnects with Metal Vias” IEEE Transactions on Electron Devices, vol. 68, No. 4, April 2021, pp. 2063-2091.; All of the foregoing are incorporated herein by reference.
[0096] The heated top plate 340 can be moved to provide mechanical pressure on the substrate / wafer 202 when it is located on the heated bottom plate 208. For example, such mechanical pressure can be about 20 psi, about 30 psi, about 40 psi, about 50 psi, about 60 psi, about 70 psi, about 80 psi, about 90 psi, about 100 psi, about 110 psi, about 120 psi, about 130 psi, about 150 psi, about 200 psi, about 250 psi, about 300 psi, about 350 psi, about 400 psi, about 450 psi, and can be greater than about 500 psi, or from 1-500 bar. When the heated top plate 340 applies mechanical pressure to the top surface of the substrate / wafer 202, the pressure of the reactor / processing chamber 310 can be maintained at a lower value. The pressure of the reactor / processing chamber 310 can be, for example, 10 -6 to 10 -7 The pressure of the reactor / processing chamber 310 can be regulated by at least one mechanical / turbo pump 216.
[0097] The pressure applied to the diffusion at the top surface of the substrate / wafer 202 can also be generated by alternative means; for example, by utilizing the reactor / processing chamber 310 (or another sub-chamber therein) and generating the pressure by applying a high-pressure gas to the interior of the reactor / processing chamber 310. Another alternative could be piston-type generation of gas pressure, which can provide a lower particle count within the reactor / processing chamber 310 and still avoid contact with the wafer top surface.
[0098] Note that when the substrate / wafer 202 has a temperature below ~450°C, it can be compatible with the CMOS / BEOL thermal budget. The BEOL process steps are semiconductor integrated circuit formation steps that occur after the front-end process transistor fabrication. Once the manufacturing process has built the transistors on the wafer, subsequent processing steps should be within the thermal budget of ~450°C to avoid damaging the transistors and various junctions that could cause shorts and reliability issues. Not all applications of the tools described herein will be subject to this temperature limitation. For example, doping of junctions in single crystal silicon, dopant diffusion through spacer materials, etc. are examples in semiconductor manufacturing where the temperature limit may be much higher, perhaps around 650°C or 900°C. Similarly, processing using glass substrates can also be done, for example, in a roll-to-roll-like layout, and requires temperatures above 450°C.
[0099] Reactor / process chamber pressure can be calibrated and monitored using pressure sensors that can be placed on the steps of the susceptor, by monitoring the current drawn by a motor that applies inter-surface pressure, by using flexures configured as strain gauges embedded in the liner material, etc. Similarly, temperature can be monitored using thermocouples and RTDs mounted in the susceptor, using IR sensors, phosphorus-based sensors, and laser spectroscopic sensors for chemical and / or elemental determination, etc.
[0100] in conclusion
[0101] Although the present invention has been described with reference to specific exemplary embodiments, various modifications and changes may be made to these embodiments without departing from the broader spirit and scope of the various embodiments. Accordingly, the specification and drawings are to be regarded in an illustrative rather than a restrictive sense.
Claims
1. An intercalation doping device that facilitates the insertion of dopant atoms, ions, or molecules into a layered 2D material, the device comprising: reaction chamber, wherein a single or multiple wafers or substrates are arranged in the reaction chamber, wherein a pressure in the range of 2 bar to 500 bar is applied to at least one surface of the wafer or wafers or substrates, and wherein the single or multiple wafers or substrates have a diameter or side margins of 25 mm to 450 mm; heater, wherein the heater is used to heat the single or multiple wafers or substrates, and wherein the single or multiple wafers or substrates comprise a temperature of 25°C to 500°C; and a dopant application device, The dopant applying device comprises at least a valve and a pipe for bringing the dopant from the outside to the inside of the reaction chamber, wherein the dopant applying device comprises a dopant crucible at least arranged in the reaction chamber, wherein the dopant comprises a solid, liquid or gaseous material, and The dopant comprises an intercalation dopant.
2. The device according to claim 1, wherein Intercalation doping refers to the reversible insertion of atoms, molecules or ions between the layers of the layered 2D material.
3. The device according to claim 1, wherein The pressure is applied in the form of a gas.
4. The device according to claim 1, wherein The pressure is applied mechanically.
5. The device according to claim 1, wherein The reaction chamber is vertically oriented.
6. The device according to claim 1, wherein The reaction chamber is oriented horizontally.
7. The device according to claim 1, wherein The single or multiple wafers or substrates include a single layer, a few layers or multiple layers of graphene or other layered 2D materials.
8. An intercalation doping device that facilitates the insertion of dopant atoms, ions, or molecules into a layered 2D material, the device comprising: reaction chamber, wherein a single or multiple wafers or substrates are arranged in the reaction chamber, wherein a pressure in the range of 2 bar to 500 bar is applied to at least one surface of the wafer or wafers or substrates, and wherein the single or multiple wafers or substrates have a diameter or side margins of 25 mm to 450 mm; heater, wherein the heater is used to heat the single or multiple wafers or substrates, and wherein the single or multiple wafers or substrates comprise a temperature of 25°C to 500°C; and a dopant application device, The dopant applying device comprises at least a valve and a pipe for bringing the dopant from the outside to the inside of the reaction chamber, wherein the dopant applying device comprises a dopant crucible at least arranged in the reaction chamber, wherein the dopant comprises a solid, liquid or gaseous material, and wherein the dopant comprises an intercalation dopant, and The single or multiple wafers or substrates include single-layer, few-layer or multi-layer graphene strips.
9. The device according to claim 8, wherein Intercalation doping refers to the reversible insertion of atoms, molecules or ions between the layers of the layered 2D material.
10. The device according to claim 8, wherein The pressure is applied in the form of a gas.
11. The device according to claim 8, wherein The pressure is applied mechanically.
12. The device according to claim 8, wherein The reaction chamber is oriented horizontally.
13. The device according to claim 8, wherein The reaction chamber is vertically oriented.
14. The device according to claim 8, wherein The single or multiple wafers or substrates include layered 2D materials.
15. A method of intercalation doping, wherein the intercalation doping comprises using a device to promote the insertion of dopant atoms, ions or molecules into a layered 2D material, the method comprising: providing a reaction chamber, a heater, and a dopant application device; Provide single or multiple wafers or substrates, wherein the single or multiple wafers or substrates are arranged in the reaction chamber, wherein the single or multiple wafers or substrates have a diameter or side margins of 25 mm to 450 mm; applying heat to the single or multiple wafers or substrates via the heater, wherein the single or multiple wafers or substrates comprise a temperature of 25°C to 500°C, applying a pressure in the range of 2 bar to 500 bar to at least one surface of the wafer or wafers; wherein the dopant applying device brings and / or contains the dopant into the reaction chamber, The dopant comprises a solid, liquid or gaseous material. wherein the dopant comprises an intercalation dopant, wherein the single or multiple wafers or substrates include single, few or multiple layers of graphene ribbons; and The single or multiple wafers or substrates are processed in the presence of at least one of the intercalation dopants at the temperature and the pressure.
16. The method according to claim 15, wherein Intercalation doping refers to the reversible insertion of atoms, molecules or ions between the layers of the layered 2D material.
17. The method according to claim 15, further comprising: treating said single or multiple wafers or substrates in the presence of at least one said intercalation dopant at said temperature and said pressure for a specified time, wherein the specific time is at least half of the maximum width of the graphene strip divided by the intercalation doping rate, wherein the intercalation doping rate depends on the type or kind of the at least one intercalation dopant used, and The intercalation doping rate depends on the temperature and the applied pressure.
18. The method according to claim 15, wherein The pressure is applied in the form of a gas.
19. The method according to claim 15, wherein The pressure is applied mechanically.
20. The method according to claim 15, wherein The single or multiple wafers or substrates include layered 2D materials.
Citation Information
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