Method of processing semiconductor wafer using double-sided polishing operation

Abstract

A method of processing a semiconductor wafer includes placing the wafer in a carrier such that a first grinding wheel engages the front surface of the wafer and a second grinding wheel engages the back surface of the wafer. The method also includes performing a first grinding operation in which the first and second grinding wheels rotate in a counter-rotating manner and the wafer rotates in a first direction that matches a direction of rotation of the first grinding wheel, thereby removing a portion of the front surface and / or the rear surface of the wafer. The method also includes performing a second grinding operation in which the first and second grindstone are rotated in a counter-rotating manner and the wafer is rotated in a second direction that matches the direction of rotation of the second grindstone, thereby removing another portion of the front and / or back surfaces of the wafer.

Description

[0001] Cross-reference to related applications

[0002] This application claims priority to U.S. Patent Application No. 18 / 160,071, filed January 26, 2023, the contents of which are incorporated herein in their entirety. TECHNICAL FIELD

[0003] The field relates generally to simultaneous double-side polishing of semiconductor wafers, and more particularly, to methods of processing semiconductor wafers using multiple double-side polishing operations. BACKGROUND

[0004] Semiconductor wafers (e.g., single-crystal silicon wafers) are commonly used to produce integrated circuit chips on which electrical circuitry is printed. Precise circuitry requires the wafer surfaces to be extremely flat and parallel to each other to ensure that the circuitry can be properly printed across the entire surface of the wafer. To achieve this, wafer processing techniques can be used to improve certain characteristics (e.g., flatness and parallelism) of the wafers after they are cut from ingots (e.g., a crystalline silicon ingot grown using a Czochralski growth process or a float zone growth process).

[0005] Simultaneous double-side polishing operates on both faces of a semiconductor wafer at the same time. Double-side polishing equipment typically includes a pair of static pressure pads and a pair of grinding wheels to perform a polishing operation on the wafer surfaces. The pads and wheels are oriented in a relative mirror image relationship with respect to one or more wafers supported therebetween in a vertical orientation. The static pressure pads can create a fluid barrier by introducing a polishing fluid (e.g., water) between the respective pad and the wafer surface that limits or prevents the rigid pads from physically contacting the wafer during polishing. This barrier reduces damage to the wafer that can be caused by physical clamping and allows the wafer to move (rotate) tangentially with respect to the pad surface with less friction. The grinding wheels are rotated and engage the respective wafer surfaces to remove portions of the respective wafer surfaces. The wafer is also rotated between the grinding wheels and the static pressure pads. Rotation of the wafer can be achieved by a drive ring that engages a notch formed in a circumferential edge of the wafer.

[0006] This “BACKGROUND” section is intended to introduce the reader to various aspects of art that can be related to various aspects of the present disclosure that are described and / or claimed below. This discussion is believed to be helpful in providing the reader with background information to facilitate a better understanding of the various aspects of the present disclosure. Accordingly, it should be understood that these statements are to be read in this light, and not as admissions of prior art. SUMMARY

[0007] One aspect is a method of processing a semiconductor wafer using a double-sided lapping apparatus including a first lapping wheel, a second lapping wheel, and a carrier for supporting the wafer between the first lapping wheel and the second lapping wheel. The wafer has a front surface and a back surface. The method includes placing the wafer in the carrier such that the first lapping wheel engages the front surface of the wafer and the second lapping wheel engages the back surface of the wafer. The method also includes performing a first lapping operation of the double-sided lapping apparatus in which the first lapping wheel and the second lapping wheel are rotated relative to each other in a counter-rotational manner and the wafer is rotated in a first direction that matches a rotational direction of the first lapping wheel, thereby removing a first portion of at least one of the front surface and the back surface of the wafer. The method also includes performing a second lapping operation of the double-sided lapping apparatus in which the first lapping wheel and the second lapping wheel are rotated relative to each other in a counter-rotational manner and the wafer is rotated in a second direction that matches a rotational direction of the second lapping wheel, thereby removing a second portion of at least one of the front surface and the back surface of the wafer.

[0008] Another aspect is a method of processing a semiconductor wafer using a double-sided lapping apparatus including a first lapping wheel, a second lapping wheel, and a carrier for supporting the wafer between the first lapping wheel and the second lapping wheel. The wafer has a front surface and a back surface. The method includes placing the wafer in the carrier such that the first lapping wheel engages the front surface of the wafer and the second lapping wheel engages the back surface of the wafer. The method also includes performing a first lapping operation of the double-sided lapping apparatus in which the first lapping wheel and the second lapping wheel are rotated relative to each other in a counter-rotational manner and the wafer is rotated in a wafer rotation direction that matches a rotational direction of one of the first lapping wheel and the second lapping wheel, thereby removing a first portion of at least one of the front surface and the back surface of the wafer. The method also includes performing a second lapping operation of the double-sided lapping apparatus in which at least one process parameter is adjusted relative to the first lapping operation, thereby removing a second portion of at least one of the front surface and the back surface of the wafer to enhance at least one of in-plane displacement, warpage, and nano-topology of the wafer.

[0009] Another aspect is a method of processing semiconductor wafers using a double-sided lapping apparatus that includes first laps, second laps each corresponding to one of the first laps, and carriers for supporting each of the wafers between one of the first laps and the corresponding second lap during a lapping operation. Each wafer has a front surface and a back surface. The method includes, for each wafer, placing the wafer in the respective carrier such that the first lap engages the front surface of the respective wafer and the corresponding second lap engages the back surface of the respective wafer. The method also includes performing a first lapping operation of the double-sided lapping apparatus in which the first laps and the corresponding second laps are rotated relative to each other in a counter-rotational manner and the respective wafers are rotated in a first direction that matches a direction of rotation of the first laps, thereby removing a first portion of at least one of the front surface and the back surface of the respective wafers. The method also includes performing a second lapping operation of the double-sided lapping apparatus in which the first laps and the corresponding second laps are rotated relative to each other in a counter-rotational manner and the respective wafers are rotated in a second direction that matches a direction of rotation of the second laps, thereby removing a second portion of at least one of the front surface and the back surface of the respective wafers.

[0010] Various improvements exist to the above-identified features relating to the various aspects of the disclosure. Further features can also be incorporated into these various aspects. These improvements and additional features can exist individually or in any combination. For instance, various features discussed below relating to one or more of the illustrated embodiments can be incorporated into any of the above-identified aspects of the disclosure, alone or in any combination. Likewise, the brief summary presented above is merely intended to acquaint the reader with certain aspects and contexts of the disclosure and is not intended to be limiting. BRIEF DESCRIPTION OF DRAWINGS

[0011] Figure 1 is a schematic cross-section of a pair of laps and a pair of corresponding static pressure pads of a double-sided lapping apparatus;

[0012] Figure 2 is Figure 1 is a schematic front view of one of the laps and the corresponding static pressure pad of the double-sided lapping apparatus of

[0013] Figure 3 is a schematic perspective view of a semiconductor wafer positioned between the laps shown in Figure 1

[0014] Figure 4A and 4B is a schematic view of an example process flow of a plurality of double-sided lapping operations performed on semiconductor wafers;

[0015] Figure 5 ​is a plot of wafer in-plane displacement for the example process shown in Figure 4A and 4B is a plot of wafer in-plane displacement for the example process shown in

[0016] Figure 6 is a plot of wafer warpage for the example process shown in Figure 4A and 4B is a plot of wafer warpage for the example process shown in

[0017] Figure 7 is a plot of wafer surface nanotopography for the example process shown in Figure 4A and 4B is a plot of wafer surface nanotopography for the example process shown in

[0018] Figures 8A to 8C is a schematic diagram of another example process flow of multiple double side polishing operations performed on a semiconductor wafer;

[0019] Figure 9 is a plot of wafer in-plane displacement for the example process shown in Figures 8A to 8C is a plot of wafer in-plane displacement for the example process shown in

[0020] Figure 10 is a plot of wafer warpage for the example process shown in Figures 8A to 8C is a plot of wafer warpage for the example process shown in

[0021] Figure 11 is a plot of wafer surface nanotopography for the example process shown in Figures 8A to 8C is a plot of wafer surface nanotopography for the example process shown in

[0022] The same reference characters refer to the same components throughout the drawings. DETAILED DESCRIPTION

[0023] A suitable "semiconductor wafer" (which can also be referred to as a "silicon wafer" or a "wafer") includes a single crystalline silicon wafer, such as a silicon wafer obtained, for example, by slicing a wafer from a single crystalline silicon ingot formed by the Czochralski process or the float zone process. Each semiconductor wafer includes a central axis, a front surface, and a back surface that is generally parallel to the front surface. The front and back surfaces are generally perpendicular to the central axis. A circumferential edge extends between the front and back surfaces. The wafer can be of any suitable diameter, including, for example, 200 millimeters (mm), 300 mm, 450 mm diameter.

[0024] Reference is made to Figures 1 to 3, a portion of a double-side lapping apparatus is schematically shown and generally indicated at 100. Non-limiting examples of double-side lapping machines suitable for double-side lapping apparatus 100 include the model DXSG320 and the model DXSG300A manufactured by Koyo Machine Industries Co., Ltd. Lapping apparatus 100 includes a pair of grinding wheels 102 and 104 and a pair of hydrostatic pads 106 and 108. During the lapping operation, a semiconductor wafer W is placed between grinding wheels 102 and 104 and between hydrostatic pads 106 and 108. Grinding wheel 102 and hydrostatic pad 106 are located on one side of wafer W, and grinding wheel 104 and hydrostatic pad 108 are located on the opposite side of wafer W. Semiconductor wafer W has two opposing, generally parallel surfaces 130 and 132, one of which may be referred to as the front surface 130 of wafer W and the other as the back surface 132 of wafer W. When wafer W is placed between grinding wheels 102 and 104 and between static pressure pads 106 and 108, front surface 130 faces grinding wheel 102 and static pressure pad 106, and back surface 132 faces grinding wheel 104 and static pressure pad 108. Thus, during the grinding operation, both surfaces 130 and 132 of wafer W are ground simultaneously. This improves the flatness and parallelism of surfaces 130 and 132 of wafer W prior to subsequent wafer processing steps, such as polishing and circuit system printing.

[0025] like Figure 1 As shown in FIG, wafer W is suitably supported within the grinding apparatus 100 in a substantially vertical position such that the central axis 134 of wafer W is substantially perpendicular to the vertical axis V. Alternatively, wafer W may be supported in another orientation (e.g., in a substantially horizontal position) within the grinding apparatus 100. In the example grinding apparatus 100, a single wafer W is placed between grinding wheels 102 and 104 and between static pads 106 and 108 for a grinding operation. A single wafer W or multiple wafers W (i.e., two or more wafers W) may be placed in the grinding apparatus 100 for performing a grinding operation on each of the wafers. The grinding apparatus 100 may include multiple pairs of grinding wheels 102 and 104 and multiple pairs of static pads 106 and 108, wherein each pair of grinding wheels 102 and 104 and each pair of static pads 106 and 108 operates on one of the multiple wafers W for a grinding operation.

[0026] The grinding wheels 102 and 104 each include a grinding surface 110 and 112, respectively. The grinding wheels 102 and 104 are mounted on the grinding apparatus 100 via shafts 114 and 116, respectively. The grinding wheels 102 and 104 are substantially identical to each other. The grinding wheels 102 and 104 are oriented on the shafts 114 and 116 such that the grinding surfaces 110 and 112 face each other. In addition, when a wafer is placed between the grinding wheels 102 and 104, the grinding surface 110 faces the front surface 130 of the wafer W and the grinding surface 112 faces the back surface 132 of the wafer W.

[0027] The grinding surfaces 110 and 112 of the respective grinding wheels 102 and 104 can include an outwardly extending annular grinding ring 111 and 113. Each grinding ring 111 and 113 can be defined by an annular array of grinding teeth. As shown in Figure 1 and 2 The annular grinding rings 111 and 113 extend circumferentially at or near the periphery of the respective grinding surfaces 110 and 112. The grinding wheels 102 and 104 can be cup-shaped such that the annular grinding rings 111 and 113 define the peripheral edges of the grinding surfaces 110 and 112 and the remaining portions of the respective grinding surfaces 110 and 112 depend inwardly from the grinding rings 111 and 113. The grinding rings 111 and 113 can define the portions of the respective grinding surfaces 110 and 112 that engage the respective front surface 130 and back surface 132 of the wafer W to facilitate the grinding operation, and the remaining portions of the grinding surfaces 110 and 112 can not engage the wafer W during the grinding operation. Alternatively, the grinding wheels 102 and 104 can have any configuration that enables the grinding surfaces 110 and 112 or portions thereof to properly engage the wafer W and facilitate the grinding operation. The description of the grinding surfaces 110 and 112 engaging the wafer W includes instances in which at least a portion of the grinding surfaces 110 and 112 (e.g., the grinding rings 111 and 113) engage the wafer W.

[0028] The grinding wheels 102 and 104 can be attached or connected to a motor or actuator (not shown) via the shafts 114 and 116. The motor or actuator enables the grinding wheels 102 and 104 to move in rotational and translational movements relative to the rotational axis 118. The translational movements of the grinding wheels 102 and 104 enable the grinding surfaces 110 and 112 to engage the front surface 130 and back surface 132 of the wafer W, respectively, for the grinding operation. During the grinding operation, rotational movements of the grinding wheels 102 and 104 are performed to remove portions of the front surface 130 and back surface 132 of the wafer W, thereby improving the flatness and parallelism of the surfaces 130 and 132 of the wafer W.

[0029] As shown in Figure 2 and 3, the grinding wheels 102 and 104 include openings 115 and 117 extending therethrough, respectively. The openings 115 and 117 enable a grinding fluid (e.g., water) to be supplied between the grinding surfaces 110 and 112 and the wafer W during the grinding operation. The grinding wheels 102 and 104 are fluidly coupled to the grinding wheels 102 and 104 via a grinding fluid source 152 (e.g., Figure 1 132 ), a lapping fluid (e.g., water) is supplied to openings 115 and 117. The lapping fluid flows through openings 115 and 117 and is injected into the front surface 130 and back surface 132 of the wafer W. The lapping surfaces 110 and 112 act upon the lapping fluid against the front surface 130 and back surface 132 of the wafer W to remove material from the surface of the wafer W, resulting in relatively flat surfaces 130 and 132. During the lapping operation, the flow rate of the lapping fluid supplied to openings 115 and 117 via source 152 can be adjusted to adjust the removal profile on the front and back surfaces 130 and 132 of the wafer W. For example, source 152 can include a pump that is selectively controlled to adjust the flow rate of the lapping fluid supplied to the grinding wheels 102 and 104. The lapping fluid can be independently supplied to each of the openings 115 and 117, and the flow rate of the lapping fluid supplied to each of the openings 115 and 117 can be independently controlled. More than one grinding fluid source 152 may be included in the apparatus 100 to independently supply grinding fluid to the grinding wheels 102 and 104. Alternatively, grinding fluid may be supplied to the grinding wheels 102 and 104 via the same source 152 and the same flow rate may be supplied to each grinding wheel 102 and 104.

[0030] Static pads 106 and 108 are mounted on a static support base (not shown) of polishing apparatus 100. One or both of static pads 106 and 108 may be attached or connected to the respective static support base and a motor or actuator (not shown) that enables translational movement of one or both of static pads 106 relative to rotation axis 118. Static pads 106 and 108 are not configured to rotate, as the pads remain substantially stationary during polishing operations. Static pads 106 and 108 each have a pad surface 120 and 122, respectively. Static pads 106 and 108 are substantially identical to one another, and pad surfaces 120 and 122 are substantially flat. Static pads 106 and 108 are oriented such that pad surfaces 120 and 122 face each other. Furthermore, when a wafer is positioned between static pads 106 and 108, pad surface 120 faces the front surface 130 of wafer W, and pad surface 122 faces the back surface 132 of wafer W.

[0031] like Figure 2As shown in FIG, each of the static pressure pads 106 and 108 is generally disc-shaped. Suitably, each static pressure pad has a diameter that is greater than the diameter of the semiconductor wafer W to be ground. Circular, open portions 124 and 126 are formed in the static pressure pads 106 and 108, respectively. The open portions 124 and 126 are formed near the outer peripheral surfaces of the static pressure pads 106 and 108, respectively, so that the static pressure pads 106 and 108 have a circular, open portion. Figure 2 The openings 124 and 126 are sized and shaped to receive respective grinding wheels 102 and 104 therein. The grinding wheels 102 and 104 are positioned within the respective openings 124 and 126 and suitably extend beyond the circumferential edge 140 of the wafer W. The grinding wheels 102 and 104 can also rotate relative to the static pressure pads 106 and 108 during the grinding operation.

[0032] Still refer to Figure 2 , each of the hydrostatic pads 106 and 108 includes a recess 128 formed in the respective pad surface 120 and 122. Abrasive fluid (e.g., water) is supplied to the recess 128 from a grinding fluid source 152 that is fluidly connected to the recess 128. The grinding fluid source 152 can be the same source 152 that is fluidly connected to the grinding wheels 102 and 104, or a different grinding fluid source 152 can be included in the apparatus 100 for supplying grinding fluid to the hydrostatic pads 106 and 108. The apparatus 100 can include separate grinding fluid sources 152 to independently supply grinding fluid to the grinding wheels 102 and 104 and to independently supply grinding fluid to the hydrostatic pads 106 and 108, respectively. The grinding fluid supplied to the recess 128 can be the same grinding fluid as the grinding fluid supplied to the grinding wheels 102 and 104 or a different grinding fluid. The polishing fluid supplied to the static pressure pads 106 and 108 is injected onto the front surface 130 and the back surface 132 of the wafer W through the recess 128. The polishing fluid supplied through the recess 128 forms a fluid layer between the static pressure pads 106 and 108 and the wafer W. During the polishing operation, when the polishing surfaces 110 and 112 operate on the surfaces 130 and 132 of the wafer W, the wafer W is statically supported between the polishing surfaces 110 and 112. The support state of the wafer W between the static pressure pads 106 and 108 can be adjusted by controlling the flow rate of the polishing fluid supplied to the recess 128.

[0033] Return Reference Figure 1Wafer W is placed in the grinding apparatus 100 and supported by a wafer carrier (not shown) positioned between the grinding wheels 102 and 104 and between the hydrostatic pads 106 and 108. During the grinding operation, wafer W is rotated by a suitable mechanism. For example, wafer W is rotated by a drive ring 136. Drive ring 136 rotates wafer W relative to grinding wheels 102 and 104 and hydrostatic pads 106 and 108. Pawls or tabs 138 of drive ring 136 typically engage wafer W at notches N formed in a circumferential edge 140 of wafer W, causing the wafer to rotate about its central axis 134. Simultaneously, grinding wheels 102 and 104 engage the respective front and rear surfaces 130 and 132 of wafer W and rotate in counter-rotating fashion (i.e., in opposite directions). One of wheels 102 or 104 rotates in the same direction as wafer W, while the other wheel 102 or 104 rotates in the opposite direction to wafer W.

[0034] The grinding wheels 102 and 104 are oriented so that the radial axes 119a and 119b of the grinding wheels 102 and 104 (eg Figure 3 ) extend substantially parallel to the respective front and back surfaces 130, 132 of the wafer W, and thus substantially parallel to the vertical axis V. One or both of the grinding wheels 102 and 104 may be oriented or tilted at an oblique angle relative to the front and back surfaces 130, 132 of the wafer W such that the diametral axes 119a and / or 119b extend at an oblique angle relative to the vertical axis V, as will be described below with reference to FIG. Figure 8A The orientation or "tilt" of the grinding wheels 102 and 104 may be selected to control the removal profile of the respective surfaces 130 and 132 of the wafer W during the grinding operation.

[0035] Still refer to Figure 1 The lapping apparatus 100 also includes a controller 142 that allows an operator to select and control process parameters of the lapping apparatus 100 during a lapping operation. For example, the operator can select a rotational direction of the wafer W, a rotational speed of the wafer W, a rotational speed of one or more of the grinding wheels 102 and 104, an orientation or "tilt" of one or both of the grinding wheels 102 and 104, and / or a flow rate of the lapping fluid supplied to the grinding wheels 102 and 104. The controller 142 is connected to and in communication with the grinding wheels 102 and 104 (e.g., via motors or actuators operatively connected thereto), the static pressure pads 106 and 108 (e.g., via motors or actuators operatively connected thereto), the lapping fluid source 152 (e.g., and a lapping fluid pump of the lapping fluid source 152), and the drive ring 136.

[0036] Controller 142 can be any known computing device or computer system and includes one or more processors 144 and a memory area 146. Processor 144 executes instructions stored in memory area 146. The term "processor" (as used herein) refers to a central processing unit, a microprocessor, a microcontroller, a reduced instruction set circuit (RISC), an application-specific integrated circuit (ASIC), a logic circuit, and any other circuit or processor capable of performing the functions described herein. The foregoing are examples and are not intended to limit the definition and / or meaning of the term "processor" in any way. Additionally, one or more processors 144 can be located in a single computing device or in multiple computing devices operating in parallel.

[0037] For example, processor-executable instructions for receiving and processing input received from an operator (e.g., via user interface 148) and controlling process parameters of the polishing apparatus 100 based on the processed input received from the operator are stored in memory area 146. Memory area 146 may include, but is not limited to, any computer operating hardware suitable for storing and / or retrieving processor-executable instructions and / or data. Memory area 146 may include random access memory (RAM), such as dynamic RAM (DRAM) or static RAM (SRAM); read-only memory (ROM), erasable programmable read-only memory (EPROM), electrically erasable programmable read-only memory (EEPROM), and non-volatile RAM (NVRAM). Furthermore, memory area 146 may include multiple storage units, such as hard disks or solid-state disks in a redundant array of inexpensive disks (RAID) configuration. Memory area 146 may include a storage area network (SAN) and / or network attached storage (NAS) system. In some embodiments, memory area 146 includes memory integrated into controller 142. For example, controller 142 may include one or more hard disk drives as memory area 146. Memory area 146 may also include memory external to controller 142 and accessible by multiple computing devices. The above memory types are examples only, and thus are not limiting of the types of memory that may be used to store processor-executable instructions and / or data.

[0038] Controller 142 also includes a user input device 148 or user interface 148 for receiving input from an operator. The information may be one or more selected process parameters for the grinding operation. Input device 148 may include, for example, a keyboard, a pointing device, a mouse, a stylus, a touch-sensitive panel (e.g., a touchpad or touchscreen), a gyroscope, an accelerometer, a position detector, or an audio input device. A single component (e.g., a touchscreen) may function as both an output device (e.g., a media output component) for controller 142 and an input device 148.

[0039] The controller 142 may also include a communication interface 150 that is communicatively connected to one or more remote devices. The communication interface 150 may include, for example, a wired or wireless network adapter or a wireless data transceiver for use with a mobile phone network (e.g., Global System for Mobile Communications (GSM), 3G, 4G, or Bluetooth) or other mobile data network (e.g., Worldwide Interoperability for Microwave Access (WIMAX)).

[0040] refer to Figures 1 to 3 During operation, a wafer W is placed in a wafer carrier between the grinding wheels 102, 104 and the static pressure pads 106, 108. The grinding apparatus 100 can be equipped for simultaneously grinding a plurality of wafers W and can include a plurality of pairs (e.g., two or more pairs) of grinding wheels 102 and 104, and a plurality of pairs (e.g., two or more pairs) of static pressure pads 106 and 108 corresponding to the pairs of grinding wheels 102 and 104. A plurality of wafers W can be placed in the grinding apparatus 100 for the grinding operation. Each of the wafers W is placed between a corresponding pair of grinding wheels 102 and 104 and a corresponding pair of static pressure pads 106 and 108.

[0041] When a wafer W is placed between the grinding wheels 102 and 104 and / or the hydrostatic pads 106 and 108, the grinding wheels 102 and 104 and / or the hydrostatic pads 106 and 108 may be in an initial or "idle" position. In the idle position, the grinding wheels 102 and 104 and / or the hydrostatic pads 106 and 108 may be positioned a distance from the wafer W. The grinding wheels 102 and 104 and / or the hydrostatic pads 106 and 108 are then brought into abrasive engagement with the wafer W by translational movement of the grinding wheels 102 and 104 and / or the hydrostatic pads 106 and 108 toward the respective surfaces 130 and 132 of the wafer W.

[0042] When the grinding wheels 102 and 104 and the hydrostatic pads 106 and 108 engage the respective surfaces 130 and 132 of the wafer W, the grinding wheels 102 and 104 and the hydrostatic pads 106 and 108 suitably apply a clamping force to the wafer. The clamping force applied by the grinding wheels 102 and 104 can be independent of the clamping force applied by the hydrostatic pads 106 and 108. Thus, the grinding wheels 102 and 104 and the hydrostatic pads 106 and 108 can support the wafer W independently of one another. The clamping pressure of the grinding wheels 102 and 104 on the wafer W is centered about the rotational axis 118 of the grinding wheels, and the clamping pressure of the hydrostatic pads 106 and 108 on the wafer W is centered about the central axis 134 of the wafer W. During grinding, the clamping pressure applied by the grinding wheels 102 and 104 is suitably aligned with the clamping pressure applied by the static pressure pads 106 and 108 so that the wafer W remains in plane (ie, does not bow) and is evenly ground by the grinding wheels 102 and 104 .

[0043] To perform the polishing operation, the polishing pads 102 and 104 are rotated at suitable rotational speeds that engage the front surface 130 and the back surface 132 of the wafer W. The polishing pads 102 and 104 are rotated in counter-rotation (i.e., in opposite directions from each other). Suitable rotational speeds for the polishing pads 102 and 104 include, for example, speeds between 3000 rpm and 5400 rpm. During polishing, the wafer W is also rotated at a suitable wafer rotational speed. The wafer W is rotated in the same direction as one of the polishing pads 102 or 104 and thus, in the opposite direction as the other of the polishing pads 102 or 104. Suitable wafer rotational speeds include, for example, speeds between 12 rpm and 48 rpm. The front surface 130 and the back surface 132 of the wafer W are covered by the polishing surfaces 110 and 112 and the pad surfaces 120 and 122 to ensure that the polishing operation is performed completely across the surfaces 130 and 132. During polishing, a polishing fluid (e.g., water) is injected onto the front surface 130 and the back surface 132 of the wafer W via the openings 115 and 117 of the polishing pads 102 and 104. The polishing surfaces 110 and 112 work the polishing fluid against the front surface 130 and the back surface 132 of the wafer W to remove material from the surfaces of the wafer W to result in flatter surfaces 130 and 132. The polishing fluid (e.g., water) is also supplied via the pockets 128 of the static pressure pads 106 and 108. The polishing fluid supplied via the pockets 128 forms a fluid layer between the static pressure pads 106 and 108 and the wafer W, and the wafer W is statically supported between the polishing surfaces 110 and 112 during the polishing operation as the polishing surfaces 110 and 112 operate against the surfaces 130 and 132 of the wafer W.

[0044] The polishing "recipe" design is set with effort to produce a target removal profile of the surfaces 130 and 132 of the wafer W via the polishing operation and to achieve desired wafer flatness characteristics (e.g., shape, warp, and / or nano-topology of the wafer). The polishing recipe determines various process parameters that are controlled during the double-side polishing operation. An operator can select the process parameters via the controller 142. For example, the operator can select polishing process parameters via the controller 142, such as, for example, a rotational direction of the wafer W, a rotational speed of the wafer W, a rotational speed of one or both of the polishing pads 102 and 104, an orientation or "tilt" of one or both of the polishing pads 102 and 104, and / or a flow rate of the polishing fluid supplied to the polishing pad 102 and / or 104.

[0045] Recently, as integrated circuit chips have rapidly become more miniaturized, the flatness specifications for semiconductor wafers used in their production have become increasingly stringent. This trend continues to place stringent demands on acceptable wafer flatness parameters, such as, for example, site backside ideal flatness / range (SBIR), global backside ideal flatness / range (GBIR), site frontside minimum square focal plane range (SFQR), and edge site frontside minimum square focal plane range (ESFQR). Generally, these wafer flatness parameters are determined after additional processing (e.g., polishing) has been performed on the wafer surface. However, meeting these wafer flatness parameters requires satisfying certain flatness characteristics (e.g., shape, warp, and / or nanotopology) of double-sided polished wafers.

[0046] It has been found that conventional double-side grinding operations, which include only one grinding operation, do not consistently achieve the necessary wafer characteristics. Because a large number of double-side ground wafers may not have wafer flatness characteristics that meet current requirements, significant yield loss can result. The delay between the time a double-side ground wafer with undesirable flatness characteristics (e.g., nanotopographic features) is produced and the time the wafer is discovered to be unsuitable for further processing can exacerbate yield loss. This is because wafer flatness metrics (e.g., nanotopology, warp, and / or shape) cannot be measured before the double-side ground wafer is polished. At this stage, a considerable amount of time may have passed since the wafer was double-sided processed, which can further increase yield loss because, before the problem is identified and corrected, several additional wafers may have been double-sided ground in the interim, each with undesirable flatness characteristics. Furthermore, wafers that do not meet specifications cannot be used after the wafer has been polished. Therefore, double-side ground wafers that are unsuitable for further processing to produce wafer substrates for device manufacturing (e.g., in the production of integrated circuit chips) may need to be scrapped once defects are discovered during subsequent processing (e.g., after the polishing process).

[0047] In an example method, multiple (i.e., two or more) grinding operations are performed on a single wafer W (or on multiple wafers W simultaneously) to achieve desired wafer flatness characteristics (e.g., wafer shape, warp, and / or nanotopology). In a first grinding operation, the first grinding wheel 102 and the second grinding wheel 104 are rotated relative to each other in a counter-rotating manner, and the wafer W (or wafers W) are rotated in a wafer rotation direction that matches the rotation direction of one of the grinding wheels 102 and 104, and a first portion of at least one of the front surface 130 and the back surface 132 of the wafer is removed. In a second grinding operation, at least one process parameter is adjusted relative to the first grinding operation, and a second portion of at least one of the front surface 130 and the back surface 132 of the wafer W (or wafers W) is removed to enhance the wafer flatness characteristics of the wafer W (or wafers W), such as in-plane displacement, warp, and / or nanotopology of the wafer W. For example, the rotational direction of the wafer W, the rotational speed of the wafer W, the rotational speed of one or both of the grinding wheels 102 and 104, the orientation or "tilt" of one or both of the grinding wheels 102 and 104, and / or the flow rate of the grinding fluid supplied to the grinding wheels 102 and / or 104 may be adjusted for the second grinding operation. Further grinding operations (e.g., a third grinding operation, a fourth grinding operation, a fifth grinding operation, a sixth grinding operation) may be performed, and the process parameters may be adjusted for each grinding operation. Any number of grinding operations may be performed, for example, between 2 and 10 grinding operations, and at least one process parameter may be adjusted for each grinding operation.

[0048] Return Reference Figure 4A and 4B The example process flow includes a first grinding operation performed on a plurality of wafers W using the grinding apparatus 100 (in Figure 4A ) and a second grinding operation (indicated generally at 200a in Figure 4B (generally indicated at 200b in FIG. 1 ). Figure 4A and 4B The process flow shown in FIG. 1 can be performed on multiple wafers W simultaneously or can be performed on a single wafer W.

[0049] like Figure 4A As shown in FIG, in a first grinding operation 200a, the wafer W is rotated in a first direction that matches the rotation direction of the grinding wheel 104. Figure 4BIn the second grinding operation 200b shown in FIG, the wafer W is rotated in a second direction that matches the rotation direction of the second grinding wheel 102. Although the wafer W is rotated in a direction that matches one of the grinding wheels 102 and 104 in each of operations 200a and 200b, the rotational speeds of the wafer W and each of the grinding wheels 102 and 104 may be different. For example, the wafer W may be suitably rotated at a rotational speed between 12 rpm and 48 rpm in both the first and second wafer directions. In each of the first grinding operation 200a and the second grinding operation 200b, the grinding wheels 102 and 104 may be suitably rotated at a rotational speed between 3000 rpm and 5400 rpm. Figure 4A and 4B The process flow shown in the figure is not limited to the specific sequence shown. For example, the second grinding operation 200b can be performed before the first grinding operation 200a. Additional grinding operations can be performed before, after, or as intermediate grinding operations between the first grinding operation 200a and the second grinding operation 200b.

[0050] In addition to changing the rotational direction of the wafer W, one or more other process parameters may also be adjusted between the first and second grinding operations 200a, 200b. For example, the rotational speed of the wafer W, the rotational speed of one or both of the grinding wheels 102 and 104, the orientation or "tilt" of one or both of the grinding wheels 102 and 104, and / or the flow rate of the grinding fluid supplied to the grinding wheels 102 and / or 104 may be adjusted between the first and second grinding operations 200a, 200b. In one example, the wafer W is rotated at different speeds between the first and second grinding operations 200a, 200b. For example, in the first grinding operation 200a, the wafer W is rotated in a first direction at a first rotational speed between 12 rpm and 24 rpm, and in the second grinding operation 200b, the wafer W is rotated in a second direction at a second rotational speed between 24 rpm and 36 rpm. In another example, at least one of the grinding wheels 102 and 104 may have a different orientation or "tilt" relative to the wafer W between the first grinding operation 200a and the second grinding operation 200b. For example, in the first grinding operation 200a, at least one of the grinding wheels 102 and 104 may be positioned in a first orientation with the radial axes 119a and / or 119b substantially parallel to the front and back surfaces 130, 132 of the wafer W and the vertical axis V; and in the second grinding operation 200b, at least one of the grinding wheels 102 and 104 may be positioned in a second orientation with the radial axes 119a and / or 119b at an oblique angle to the front and back surfaces 130, 132 of the wafer W and the vertical axis V. In another example, the grinding fluid may be supplied to the grinding wheels 102 and / or 104 at different flow rates between the first grinding operation 200a and the second grinding operation 200b. Any combination of the above-described adjusted process parameters may be applied between the first polishing operation 200 a and the second polishing operation 200 b .

[0051] refer to Figures 5 to 7 , compared to the double-sided grinding operation which consists of only one grinding operation, Figure 4A and 4B The process flow shown in FIG. 1 results in improved wafer flatness characteristics for double-sided ground wafers. Specifically, performing a double-sided ground operation is performed compared to performing only one grinding operation. Figure 4A and 4B The first and second polishing operations shown in FIG enhance in-plane displacement, warpage, and nanotopology of the wafer W. For example, wafer flatness characteristics may be determined by using a KLA-Tencor wafer inspection system (Milpitas, California) utilizing WaferSight2 or WaferSight2+ analysis hardware. Figure 5 It is shown that when the first polishing operation 200a and the second polishing operation 200b are performed, the in-plane displacement of the wafer is reduced. Figure 6 It is shown that wafer warpage is reduced when the first polishing operation 200a and the second polishing operation 200b are performed. Figure 7 It is shown that when the first polishing operation 200a and the second polishing operation 200b are performed, the nanotopology of the wafer is improved.

[0052] refer to Figures 8A to 8C , another example process flow is shown in FIG, wherein a first grinding operation is performed on a wafer W using a grinding apparatus 100 (in Figure 8A ), a second grinding operation (indicated generally at 300a in Figure 8B ) and a third grinding operation (indicated generally at 300b in Figure 8C (roughly indicated at 300c in FIG. ). Figures 8A to 8C The process flow shown in FIG can be performed on multiple wafers W at the same time or can be performed on a single wafer W. Figure 8A As shown in FIG, in a first grinding operation 300a, wafer W is rotated in a first direction that matches the rotation direction of grinding wheel 104. Furthermore, each of grinding wheels 102 and 104 is oriented such that radial axes 119a and 119b extend at oblique angles relative to front and back surfaces 130 and 132 of wafer W and vertical axis V. Thus, grinding wheels 102 and 104 rotate about rotation axes 118a and 118b, respectively, that are offset from central axis 134 of wafer W. Grinding wheels 102 and 104 may be oriented at the same or different angles. In some examples, only one of grinding wheels 102 and 104 is oriented at an angle relative to surfaces 130 and 132 and vertical axis V, and the other of grinding wheels 102 and 104 is oriented such that the respective radial axis 119a or 119b extends substantially parallel to surfaces 130 and 132 and vertical axis V. The bevel angles of the grinding wheels 102 and 104, measured as the angles formed between the radial axes 119a and 119b and the vertical axis V, respectively, may have a shape ranging from about 0.000001° to about 0.0005°, such as from about 0.00001° to about 0.0001°, or from about 0.00005° to about 0.0001°. For ease of illustration and description, Figure 8A The tilt of the grinding wheels 102 and 104 shown in FIG. 1 is exaggerated.

[0053] exist Figure 8BIn the second grinding operation 300b shown in FIG. , the wafer is rotated in a second direction that matches the rotational direction of the second grinding wheel 102. Furthermore, in the second grinding operation 300b, the grinding wheels 102 and 104 are oriented substantially parallel to the front and back surfaces 130 and 132 of the wafer W and the vertical axis V. The rotational speed of one or both of the wafer W and / or the grinding wheels 102 and 104 can be adjusted between the first and second grinding operations 300a and 300b. For example, in the first grinding operation 300a, the wafer W can be rotated at speeds of 12 rpm and 24 rpm, while in the second grinding operation, the wafer W can be rotated at speeds of 24 rpm and 36 rpm. The grinding fluid can be supplied to the grinding wheels 102 and / or 104 at different flow rates between the first and second grinding operations 300a and 300b. During the second grinding operation 300b, the grinding wheels 102 and 104 can also rotate at a different speed than in the first grinding operation 300a. Suitable rotational speeds for each of the grinding wheels 102 and 104 for the first and second grinding operations 300a and 300b may be selected from speeds between 3000 rpm and 5400 rpm.

[0054] In the third grinding operation 300c, as Figure 8C As shown in FIG. 1 , the wafer is rotated in a first direction, similar to the first grinding operation 300a ( Figure 8A ). In addition, the grinding wheels 102 and 104 are oriented substantially parallel to the front and back surfaces 130, 132 of the wafer W and the vertical axis V, similar to the second grinding operation 300b ( Figure 8B The rotational speed of one or both of the wafer W and / or grinding wheels 102 and 104 can be adjusted for the third grinding operation 300c. For example, the wafer W can be rotated at a speed between 12 rpm and 24 rpm, similar to the speed of the first grinding operation 300a, or the wafer W can be rotated at a speed between 24 rpm and 36 rpm, similar to the speed of the second grinding operation 300b. For the third grinding operation 300c, the grinding fluid can be supplied to the grinding wheels 102 and / or 104 at a flow rate different from that of the first and / or second grinding operations 300a and 300b. During the third grinding operation 300c, the grinding wheels 102 and 104 can also be rotated at a speed different from that of the first and / or second grinding operations 300a and 300b. A suitable rotational speed for each of the grinding wheels 102 and 104 for the third grinding operation 300c can be selected from a speed between 3000 rpm and 5400 rpm.

[0055] The adjusted parameters of the polishing operations 300a-300c shown above are examples, and the polishing process parameters may be adjusted in any alternative manner between the polishing operations 300a-300c to achieve wafer flatness characteristics. Figures 8A to 8CThe process flow illustrated in FIG. 3 is not limited to the particular sequence illustrated in the figure. For example, the third polishing operation 300c can be performed before the first polishing operation 300a and / or the second polishing operation 300b. The second polishing operation 300b can be performed before the first polishing operation 300a. The first polishing operation 300a can be performed after the second polishing operation 300b and / or the third polishing operation 300c. Additional polishing operations can be performed before, after, or as intermediate polishing operations to the first polishing operation 300a, the second polishing operation 300b, and the third polishing operation 300c.

[0056] Referring to Figures 9 to 11 Compared to a double-side polishing operation that includes only one polishing operation, Figures 8A to 8C The process flow illustrated in FIG. 3 can result in improved planarity characteristics of a double-side polished wafer. In particular, compared to performing only one polishing operation, performing Figures 8A to 8C The first, second, and third polishing operations illustrated in FIG. 3 enhance the in- plane displacement, warpage, and nano-topology of the wafer W. For example, wafer planarity characteristics can be determined by using a KLA wafer inspection system (Milpitas, CA) that utilizes WaferSight2 or WaferSight2+ analysis hardware. Figure 9 It is shown that the in-plane displacement of the wafer is reduced when the polishing operations 300a-c are performed. Figure 10 It is shown that the warpage of the wafer is reduced when the polishing operations 300a-c are performed. Figure 11 It is shown that the nano-topology of the wafer is improved when the polishing operations 300a-c are performed. In addition, Figures 9 to 11 It is further shown that wafer planarity characteristics can be improved between the second polishing operation 300b and the third polishing operation 300c. Thus, providing a further polishing operation facilitates optimizing wafer planarity characteristics resulting from a double-side polishing process.

[0057] The method of the present disclosure has several advantages as compared to conventional methods for processing semiconductor wafers using double-side polishing. By performing multiple (i.e., two or more) polishing operations on a semiconductor wafer, wafer planarity characteristics can be significantly improved. In particular, polishing process parameters are adjusted and optimized between the multiple polishing operations to achieve desired wafer planarity characteristics. This results in semiconductor wafers that are capable of meeting stringent planarity requirements needed for device manufacturing (e.g., in the production of integrated circuit chips). Thus, manufacturing costs and yield loss associated with low quality semiconductor wafers can be substantially reduced. Polishing process parameters can also be adjusted to consistently produce semiconductor wafers with desired wafer planarity characteristics to further improve yield and reduce manufacturing costs associated with low quality wafers.

[0058] As used herein, the terms "about," "substantially," "substantially," and "approximately" when used in conjunction with a range of size, concentration, temperature or other physical or chemical property or characteristic are intended to encompass variations that may exist in the upper and / or lower limits of the range for the property or characteristic, including variations resulting, for example, from rounding, measurement methods or other statistical variations.

[0059] When introducing elements of the present disclosure or embodiments thereof, the articles "a," "an," and "the" are intended to mean that there are one or more of the elements. The terms "comprising," "including," and "having" are intended to be inclusive and mean that additional elements may be present in addition to the listed elements. The use of terms indicating a particular orientation (e.g., "top," "bottom," "side," "lower," "upper," etc.) is for convenience of description and does not require any particular orientation of the items being described.

[0060] As various changes could be made in the above constructions and methods without departing from the scope of the disclosure, it is intended that all matter contained in the above description and shown in the accompanying drawings shall be interpreted as illustrative and not in a limiting sense.

[0061] This written description uses examples to disclose the invention, including the best mode, and also to enable any person skilled in the art to practice the invention, including making and using any devices or systems and performing any incorporated methods. The patentable scope of the invention is defined by the claims and may include other examples that occur to those skilled in the art. Such other embodiments are intended to be within the scope of the claims if they have structural elements that do not differ from the literal language of the claims, or if they include equivalent structural elements with insubstantial differences from the literal language of the claims.

Claims

1. A method for processing a semiconductor wafer using a double-side grinding apparatus, the double-side grinding apparatus comprising a first grinding wheel, a second grinding wheel, and a carrier for supporting the wafer between the first grinding wheel and the second grinding wheel, the wafer having a front surface and a back surface, the method comprising: placing the wafer in the carrier such that the first grinding wheel engages the front surface of the wafer and the second grinding wheel engages the back surface of the wafer; performing a first grinding operation of the double-side grinding apparatus, wherein the first grinding wheel and the second grinding wheel rotate relative to each other in a counter-rotating manner and the wafer rotates in a first direction matching the rotational direction of the first grinding wheel, thereby removing a first portion of at least one of the front surface and the back surface of the wafer; and A second grinding operation of the double-side grinding apparatus is performed, wherein the first grinding wheel and the second grinding wheel are rotated in a counter-rotating manner relative to each other and the wafer is rotated in a second direction matching the rotation direction of the second grinding wheel, thereby removing a second portion of at least one of the front surface and the back surface of the wafer.

2. The method of claim 1 , wherein performing the second grinding operation comprises rotating the at least one of the first grinding wheel, the second grinding wheel, and the wafer at a second rotational speed different from a first rotational speed of the at least one of the first grinding wheel, the second grinding wheel, and the wafer during the first grinding operation. 3 . The method of claim 2 , wherein performing the second grinding operation comprises rotating the wafer at a second rotational speed different from a first rotational speed of the wafer during the first grinding operation. The method of claim 3 , wherein the second rotational speed of the wafer is greater than the first rotational speed of the wafer.

5. The method of claim 1 , wherein performing the second grinding operation comprises positioning the at least one of the first grinding wheel and the second grinding wheel relative to the wafer in a second orientation different from a first orientation of the at least one of the first grinding wheel and the second grinding wheel during the first grinding operation.

6. The method of claim 5 , wherein in one of the first and second orientations, the at least one of the first and second grinding wheels is oriented at an oblique angle relative to the wafer, and in the other of the first and second orientations, the at least one of the first and second grinding wheels is oriented substantially parallel to the wafer. 7 . The method of claim 1 , wherein performing the second lapping operation comprises supplying the lapping fluid to the double-side lapping apparatus at a second flow rate that is different from a first flow rate of the lapping fluid supplied during the first lapping operation.

8. The method of claim 1 , further comprising performing a third grinding operation wherein the first grinding wheel and the second grinding wheel are rotated relative to each other in a counter-rotating manner and the wafer is rotated in the first direction, thereby removing a third portion of at least one of the front surface and the back surface of the wafer.

9. The method of claim 1 , wherein performing the second grinding operation further comprises adjusting, relative to the first grinding operation, at least one process parameter selected from the group consisting of a rotational speed of the wafer, a rotational speed of the first grinding wheel, a rotational speed of the second grinding wheel, an orientation of the first grinding wheel relative to the wafer, an orientation of the second grinding wheel relative to the wafer, and a flow rate of a grinding fluid supplied to the double-side grinding apparatus.

10. The method of claim 1, wherein performing the second grinding operation thereby removing the second portion of at least one of the front surface and the back surface of the wafer enhances at least one of in-plane displacement, warpage, and nanotopology of the wafer.

11. A method for processing a semiconductor wafer using a double-side grinding apparatus, the double-side grinding apparatus comprising a first grinding wheel, a second grinding wheel, and a carrier for supporting the wafer between the first grinding wheel and the second grinding wheel, the wafer having a front surface and a back surface, the method comprising: placing the wafer in the carrier such that the first grinding wheel engages the front surface of the wafer and the second grinding wheel engages the back surface of the wafer; performing a first grinding operation of the double-side grinding apparatus, wherein the first grinding wheel and the second grinding wheel rotate relative to each other in a counter-rotating manner and the wafer rotates in a wafer rotation direction that matches a rotation direction of one of the first grinding wheel and the second grinding wheel, thereby removing a first portion of at least one of the front surface and the back surface of the wafer; and A second polishing operation of the double-side polishing apparatus is performed, wherein at least one process parameter is adjusted relative to the first polishing operation to thereby remove a second portion of at least one of the front surface and the back surface of the wafer to enhance at least one of in-plane displacement, warp, and nanotopology of the wafer.

12. The method of claim 11 , wherein the at least one process parameter is selected from the group consisting of a rotational direction of the wafer, a rotational speed of the wafer, a rotational speed of the first grinding wheel, a rotational speed of the second grinding wheel, an orientation of the first grinding wheel relative to the wafer, an orientation of the second grinding wheel relative to the wafer, and a flow rate of a grinding fluid supplied to the double-side grinding apparatus.

13. The method of claim 11 , further comprising performing a third polishing operation of the double-side polishing apparatus, wherein at least one process parameter is adjusted relative to the first polishing operation or the second polishing operation to thereby remove a third portion of at least one of the front surface and the back surface of the wafer to enhance at least one of in-plane displacement, warp, and nanotopology of the wafer.

14. The method of claim 11, wherein performing the second grinding operation comprises rotating the wafer in an opposite wafer direction that matches a rotational direction of the other of the first and second grinding wheels.

15. The method of claim 11, wherein the at least one process parameter is a rotational speed of the wafer, wherein performing the second grinding operation comprises rotating the wafer at a second rotational speed greater than a first rotational speed of the wafer during the first grinding operation.

16. The method of claim 11 , wherein the at least one process parameter comprises at least one of an orientation of the first grinding wheel relative to the wafer and an orientation of the second grinding wheel relative to the wafer, wherein performing the second grinding operation comprises positioning the at least one of the first grinding wheel and the second grinding wheel relative to the wafer in a second orientation different from a first orientation of the at least one of the first grinding wheel and the second grinding wheel during the first grinding operation.

17. The method of claim 11, wherein the at least one process parameter comprises a flow rate of a grinding fluid supplied to the double-side grinding apparatus, wherein performing the second grinding operation comprises supplying the grinding fluid to the double-side grinding apparatus at a second flow rate that is different from a first flow rate of the grinding fluid supplied during the first grinding operation.

18. A method for processing semiconductor wafers using a double-side grinding apparatus, the double-side grinding apparatus comprising first grinding wheels, second grinding wheels each corresponding to one of the first grinding wheels, and a carrier for supporting each of the wafers between one of the first grinding wheels and the corresponding second grinding wheel during a grinding operation, each wafer having a front surface and a back surface, the method comprising, for each wafer: placing the wafer in the respective carrier such that the first grinding wheel engages the front surface of the respective wafer and the corresponding second grinding wheel engages the back surface of the respective wafer; performing a first grinding operation of a double-side grinding apparatus, wherein the first grinding wheel and the corresponding second grinding wheel rotate relative to each other in a counter-rotating manner and the corresponding wafer rotates in a wafer rotation direction matching the rotation direction of the first grinding wheel, thereby removing a first portion of at least one of the front surface and the back surface of the corresponding wafer; and A second grinding operation of the double-side grinding apparatus is performed, wherein the first grinding wheel and the corresponding second grinding wheel are rotated relative to each other in a counter-rotating manner and the corresponding wafer is rotated in a second direction matching the rotational direction of the second grinding wheel, thereby removing a second portion of at least one of the front surface and the back surface of the corresponding wafer.

19. The method of claim 18 , further comprising, for each wafer, performing a third grinding operation, wherein at least one process parameter selected from the group consisting of a rotational speed of the corresponding wafer, a rotational speed of the first grinding wheel, a rotational speed of the second grinding wheel, an orientation of the first grinding wheel relative to the corresponding wafer, an orientation of the second grinding wheel relative to the corresponding wafer, and a flow rate of a grinding fluid supplied to the double-side grinding apparatus is adjusted relative to at least one of the first grinding operation and the second grinding operation.

20. The method of claim 18, wherein performing the second grinding operation thereby removing the second portion of at least one of the front surface and the back surface of the respective wafer enhances at least one of in-plane displacement, warpage, and nanotopology of the respective wafer.

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