Constant current source circuit and LED driving circuit using same

Abstract

The invention discloses a constant current source circuit, which is characterized in that the value of a first voltage is adjusted by adjusting the resistance value of a reference setting resistor, the value of the first voltage is increased to a value of a preset multiple according to a value interval in which the value of the first voltage is located, and then the value of the first voltage is used as a current reference signal; and the numerical value of the first current sampling signal is also increased by the same multiple and then input to the two input ends of the error amplification circuit, so that the influence of the offset voltage of the error amplifier is offset, and the precision of the current source circuit is improved.

Description

Technical Field

[0001] The present invention relates to the field of power electronics technology, and more particularly to a constant current source circuit and an LED driving circuit using the same. Background Art

[0002] At present, the common constant current control circuit generally forms a series relationship with the LED load, such as Figure 1 As shown, error amplifier A0 receives a current reference signal Vref at one input and a current sampling signal Vsen generated by sampling resistor R0 at the other. By controlling transistor M0, which is coupled in series with the LED load, to operate in a linear state, the current flowing through the LED load is constant and controllable. However, error amplifier A0 inherently has a system offset voltage Voff, which is superimposed on the current sampling signal Vsen, causing deviations in the control signal output by error amplifier A0. If the offset voltage Voff is positive, the constant current control circuit will misinterpret the actual current as too high, thereby reducing the driver output and causing the LED current to fall below the set value represented by the current reference signal Vref. If the offset voltage Voff is negative, the constant current control circuit will misinterpret the actual current as too low and increase the driver output, causing the LED current to exceed the set value represented by the current reference signal Vref. The presence of the offset voltage results in poor current accuracy in the output of the constant current control circuit, preventing precise dimming of the LED load. Summary of the Invention

[0003] In view of this, the present invention provides a constant current source circuit, which improves the accuracy of the current source circuit by reducing the influence of the offset voltage of the error amplifier.

[0004] In a first aspect, a constant current source circuit is provided, characterized in that it includes:

[0005] A transistor, connected in series with the load;

[0006] an error amplifying circuit, configured to receive the second current sampling signal and the current reference signal, and generate a control signal for the transistor according to an error between the two;

[0007] The gain adjustment circuit is used to increase the values ​​of the first voltage and the first current sampling signal representing the current flowing through the transistor to predetermined multiples of the current values ​​and respectively serve as the current reference signal and the second current sampling signal, thereby offsetting the influence of the offset voltage of the error amplifier circuit.

[0008] Preferably, the value of the first voltage is determined by the resistance of a reference setting resistor.

[0009] Preferably, the first voltage is proportional to the resistance of the reference setting resistor, which is configured as an external resistor outside the chip.

[0010] Preferably, the gain adjustment circuit determines the value of the predetermined multiple by detecting the value of the first voltage.

[0011] Preferably, the gain adjustment circuit is configured such that the value of the multiple corresponds to the value range of the value of the first voltage.

[0012] Preferably, the trend of the value of the first voltage is opposite to the trend of the value of the multiple, and the smaller the value of the first voltage, the larger the value of the multiple.

[0013] Preferably, the gain adjustment circuit comprises:

[0014] a comparison circuit for comparing the first voltage with a plurality of threshold voltages to generate a comparison result;

[0015] a first adjustment circuit for increasing the value of the first voltage to a corresponding multiple of the current reference signal according to the comparison result;

[0016] a second adjustment circuit coupled in series with the transistor for obtaining and adjusting the first current sampling signal to the corresponding multiple of the second current sampling signal.

[0017] Preferably, the first adjustment circuit comprises a voltage dividing circuit composed of a first resistor and a second resistor connected in series, wherein the first voltage is input at a common node of the second end of the first resistor and the first end of the second resistor, the second end of the second resistor is grounded, and the current reference signal is generated at the first end of the first resistor, and the value of the first voltage is increased by adjusting the resistance of the first resistor and / or the second resistor.

[0018] Preferably, the second adjustment circuit comprises an adjustable current sampling resistor coupled in series with the transistor, which is used to obtain the first current sampling signal, and the value of the first current sampling signal is increased by adjusting the resistance of the current sampling resistor.

[0019] Preferably, the second adjustment circuit comprises a fixed current sampling resistor coupled in series with the transistor and a multiple adjustment circuit, the fixed current sampling resistor is used to obtain the first current sampling signal, and the value of the first current sampling signal is increased by adjusting the amplification gain of the multiple adjustment circuit.

[0020] Preferably, any one of the first resistor, the second resistor and the voltage sampling resistor comprises n sub-resistor units connected in series, wherein each sub-resistor unit comprises a sub-resistor and a first switch coupled in parallel with the sub-resistor, the first switch being turned off when the current sub-resistor unit is working, and the first switch being turned on when the current sub-resistor unit is not working.

[0021] Preferably, the first regulating circuit receives a first current proportional to the reference setting resistor, the first current flowing through the first resistor and the second resistor, the first voltage being generated at a common node of the first resistor and the second resistor, and the current reference signal being generated at a first end of the first resistor.

[0022] Preferably, the first regulating circuit further comprises a third resistor, a third error amplifier and a third transistor, wherein the third resistor receives the first current proportional to the reference setting resistor, the first voltage being generated at the third resistor, the non-inverting input of the third error amplifier receiving the first voltage, the inverting input of the third error amplifier being coupled to the common node of the first resistor and the second resistor, the output of the third error amplifier being coupled to the control terminal of the third transistor, and the third transistor being coupled in series with the voltage dividing circuit to generate the current reference voltage at the first end of the first resistor.

[0023] Preferably, the constant current source circuit further comprises a first voltage generating circuit configured to generate the first voltage inversely proportional to the resistance of the reference setting resistor based on the reference setting resistor.

[0024] Preferably, the first voltage generating circuit comprises:

[0025] a first error amplifier having a non-inverting input receiving a reference voltage within a chip, an inverting input coupled to a common node of a first transistor coupled in series with the reference setting resistor, and an output coupled to a control terminal of the first transistor to generate a second current inversely proportional to the reference setting resistor at the first transistor, wherein the reference setting resistor is coupled to a ground potential; and

[0026] a first current mirror circuit configured to mirror the second current to generate the first current, wherein the first voltage is proportional to the first current.

[0027] Preferably, the first current mirror circuit comprises:

[0028] a second error amplifier, whose non-inverting input is coupled to a common node of the first transistor and the fifth resistor, and whose inverting input is coupled to a common node of the second transistor and the fourth resistor, and whose output is coupled to the control terminal of the second transistor to generate the first current on the second transistor.

[0029] Preferably, the ratio of the second current to the first current is adjusted by adjusting the ratio of the resistance values of the fifth resistor and the fourth resistor.

[0030] Preferably, the first voltage generating circuit comprises:

[0031] a first error amplifier, whose non-inverting input receives a reference voltage inside a chip, and whose inverting input is coupled to a common node of a first transistor and a reference setting resistor, and whose output is coupled to the control terminal of the first transistor to generate a second current on the first transistor in inverse proportion to the reference setting resistor, wherein the reference setting resistor is coupled to a supply voltage; and

[0032] a sixth resistor, which receives the second current and forms the first voltage on the sixth resistor.

[0033] Preferably, the current source circuit further comprises a digital dimming circuit, which is connected between the gain adjusting circuit and the error amplifier circuit, and is configured to adjust the value of the current reference signal according to a received dimming signal to further adjust the current flowing through the transistor.

[0034] In a second aspect, the present application provides an LED driving circuit, comprising:

[0035] an LED load, and

[0036] the constant current source circuit as described above.

[0037] The present application aims to provide a constant current source circuit, which adjusts the value of the first voltage by adjusting the resistance value of the reference setting resistor, and according to the value range in which the value of the first voltage is located, increases the value of the first voltage to a value of a predetermined multiple as the current reference signal, and at the same time, increases the value of the first current sampling signal to the same multiple and inputs it to the two input terminals of the error amplifier circuit, thereby offsetting the influence of the offset voltage of the error amplifier, and further improving the accuracy of the current source circuit. BRIEF DESCRIPTION OF DRAWINGS

[0038] In order to make the technical solutions of the embodiments of the present application or the prior art clearer, the accompanying drawings needed in the embodiments or prior art description will be briefly introduced. Obviously, the accompanying drawings in the following description only aim at the embodiments of the present application, and for those skilled in the art, other drawings can be obtained without creative effort based on the provided drawings.

[0039] Figure 1 Fig. 1 is a schematic diagram of a constant current control circuit of the prior art;

[0040] Figure 2 Fig. 2 is a schematic diagram of a constant current source circuit of the first embodiment of the present application;

[0041] Fig. 3 is a schematic diagram of a gain adjusting circuit of the present application;

[0042] Figure 4 Fig. 4 is a schematic diagram of a structure of a variable resistor of the present application;

[0043] Figure 5 Fig. 5 is a schematic diagram of a constant current source circuit of the second embodiment of the present application;

[0044] Figure 6 Fig. 6 is a schematic diagram of a constant current source circuit of the third embodiment of the present application;

[0045] Figure 7 Fig. 7 is a schematic diagram of a constant current source circuit of the fourth embodiment of the present application. DETAILED DESCRIPTION

[0046] The present application will be described below based on the embodiments, but the present application is not limited to these embodiments only. In the following detailed description of the present application, some specific details are described in detail. The present application can also be understood without these details by those skilled in the art. In order to avoid confusion of the essence of the present application, the well-known methods, processes, procedures, elements and circuits are not described in detail.

[0047] In addition, those skilled in the art should understand that the accompanying drawings provided herein are for illustrative purposes only, and the drawings are not necessarily drawn to scale.

[0048] Meanwhile, it should be understood that in the following description, "circuit" refers to a conductive loop formed by at least one element or sub-circuit through electrical or electromagnetic connection. When an element or circuit is said to be "connected to" another element or said to be "connected between" two nodes, it can be directly coupled or connected to another element or there can be intermediate elements between the elements, and the connection between the elements can be physical, logical or a combination thereof. On the contrary, when an element is said to be "directly coupled to" or "directly connected to" another element, it means that there is no intermediate element between the two.

[0049] Unless the context clearly requires otherwise, throughout the description and the claims, the words "comprise", "comprising", and the like are to be construed in an inclusive sense as opposed to an exclusive or exhaustive sense; that is to say, in the sense of "including, but not limited to".

[0050] In the description of the application, it should be understood that the terms "first", "second" and the like are used to describe purposes only, and cannot be understood as indicating or implying relative importance. In addition, in the description of the application, unless otherwise stated, the meaning of "a plurality of" is two or more.

[0051] Figure 2 The schematic diagram of the constant current source circuit of the first embodiment of the application. As shown in the figure, in the embodiment of the application, the constant current source circuit 20 comprises a transistor M0, an error amplifier circuit 23, a current sampling resistor R0, a gain adjustment circuit 21 and a first voltage generating circuit 22. Figure 2

[0052] Specifically, the transistor M0 is connected in series with the load through the pin PIN, where the load can be an LED or other electrical equipment based on constant current driving, which is not limited by the application. The error amplifier circuit 23 is used to receive a second current sampling signal Vsen representing the current flowing through the transistor M0 and a current reference signal Vref, so as to generate a control signal Vg of the transistor M0 according to the error of the two. Here, the error amplifier circuit 23 is illustrated by an error amplifier A0.

[0053] The constant current source circuit is generally in series with the load, and the current flowing through the load is constant and controllable by controlling the transistor M0 to work in a linear state. The transistor M0 is connected between the load and the current sampling resistor R0. One end of the current sampling resistor R0 is connected to the source of the transistor M0. The gate of the transistor M0 is connected to the output of the error amplifier A0. One input end (the same phase input end) of the error amplifier A0 inputs the current reference signal Vref, and the other input end (the opposite phase input end) is connected to the source of the transistor M0. Since the current flowing through the transistor M0 forms a voltage drop on the current sampling resistor R0, this makes the voltage at the opposite phase input end of the error amplifier A0 represent the current flowing through the transistor M0, and thus the output of the error amplifier A0 changes with the load current, forming a current closed loop. The transistor M0 works in a linear state under the control of the control signal Vg output by the error amplifier A0, and adjusts the current flowing through itself, so that it is consistent with the current reference signal Vref.

[0054] ​It is noted that the transistor M0 in the embodiments of the present application is a N-type metal oxide semiconductor transistor (MOSFET). It is understood that other electrically controlled switching devices, such as bipolar transistors (BJT) or insulated gate bipolar transistors (IGBT), can also be applied in the present application.

[0055] The first voltage generating circuit 22 is configured to generate a first voltage Vch related to the resistance value of the reference setting resistor Rset based on the resistance value of the reference setting resistor Rset. In one embodiment, the reference setting resistor Rset is an external resistor arranged outside the chip; in another embodiment, the reference setting resistor Rset is an internal resistor arranged inside the chip. In one embodiment, the value of the first voltage Vch is inversely proportional to the resistance value of the reference setting resistor Rset; in another embodiment, the value of the first voltage Vch is directly proportional to the resistance value of the reference setting resistor Rset; in yet another embodiment, the value of the first voltage Vch is linearly related to the resistance value of the reference setting resistor Rset. The present application does not limit this, which depends on the specific application scenario.

[0056] The gain adjusting circuit 21 is configured to receive the first voltage Vch and increase the value of the first voltage Vch to a certain value. In one embodiment, the gain adjusting circuit 21 increases the value of the first voltage Vch to a predetermined multiple and takes the increased value as a current reference signal Vref, and at the same time, increases the value of the first current sampling signal Vsen ， by the same multiple and takes the increased value as a second current sampling signal, so as to offset the influence of the offset voltage Voff of the error amplifier A0 in the error amplifying circuit 23. In the present embodiment, the first current sampling signal Vsen ， is a sampling signal representing the current flowing through the transistor M0.

[0057] The offset voltage refers to a small DC offset voltage appearing at the output end due to manufacturing defects (such as transistor mismatch) when the input of the error amplifier is zero, and the typical value is in the range of microvolts (μV) to millivolts (mV). In the error amplifier, the offset voltage will introduce an output offset, which will cause errors when comparing the reference voltage (here, the current reference signal Vref) and the feedback voltage (here, the second current sampling signal Vsen), thereby affecting the stability, accuracy and steady-state error of the closed-loop system. The output error rate of the error amplifier is related to the value of the input signal. The higher the value of the input signal, the less the influence of the offset voltage on the accuracy of the output signal; the lower the value of the input signal, the greater the influence of the offset voltage on the accuracy of the output signal.

[0058] Therefore, the gain adjusting circuit 21 of the embodiment of the present application aims to reduce the influence of the offset voltage on the accuracy of the output signal of the error amplifier A0 by increasing the input signal of the error amplifier A0, and further reduce the influence of the offset voltage on the stability and accuracy of the closed loop system.

[0059] Further, the gain adjusting circuit 21 also amplifies the value of the first voltage Vch by detecting the value of the first voltage Vch. Preferably, the gain adjusting circuit 21 determines the value of the multiple K for amplifying the value of the first voltage Vch according to the value interval in which the value of the first voltage Vch is located, i.e. Vref = K*Vch. In one implementation, the gain adjusting circuit 21 is configured such that the value of the multiple corresponds to the value interval in which the value of the first voltage Vch is located one by one. In another implementation, the gain adjusting circuit 21 is configured such that the variation trend of the value of the first voltage Vch is opposite to the variation trend of the value of the multiple K, i.e. the smaller the value of the first voltage Vch is, the larger the value of the multiple K is. In yet another implementation, the gain adjusting circuit 21 is configured such that the variation trend of the value of the first voltage Vch is the same as the variation trend of the value of the multiple K, i.e. the smaller the value of the first voltage Vch is, the smaller the value of the multiple K is.

[0060] In a preferred implementation, the gain adjusting circuit 21 compares the first voltage Vch with a plurality of threshold voltages Vth1, Vth2, …, VthN to generate a comparison result Vc, and determines the value interval in which the value of the first voltage Vch is located according to the comparison result. In other implementations, since the value of the first voltage Vch is related to the resistance value of the reference setting resistor Rset, the gain adjusting circuit 21 can also determine the value interval in which the value of the first voltage Vch is located according to the resistance value of the reference setting resistor Rset.

[0061] The gain adjusting circuit 21 increases the value of the first voltage to a value of a predetermined multiple as the current reference signal Vref, and correspondingly, increases the value of the first current sampling signal Vsen ， to the same multiple as the second current sampling signal Vsen to be compared with, so as to ensure the accuracy of the error comparison and offset the influence of the offset voltage Voff of the error amplifier A0.

[0062] Therefore, the embodiment of the present application adjusts the value of the first voltage Vch by adjusting the resistance value of the reference setting resistor, and increases the value of the first voltage to a value of a predetermined multiple as the current reference signal Vref according to the value interval in which the value of the first voltage Vch is located, while correspondingly increasing the value of the first current sampling signal Vsen ，The value of the first voltage Vch is also increased to the same multiple to be a second current sampling signal Vsen, and both are input to two input terminals of an error amplifier circuit, so as to offset the influence of the offset voltage Voff of the error amplifier A0, and further improve the precision of the current source circuit.

[0063] Figure 3A Fig. 1 is a schematic diagram of a gain adjusting circuit according to an embodiment of the present application. The gain adjusting circuit 31 of the embodiment of the present application comprises a comparison circuit 311, a first adjusting circuit 312 and a second adjusting circuit 313.

[0064] The comparison circuit 311 is used to compare the first voltage Vch with a plurality of threshold voltages Vth1, Vth2, …, VthN to generate a comparison result Vc, which represents the value interval of the value of the first voltage Vch. In the embodiment of the present application, the threshold voltages are three Vth1, Vth2 and Vth3, and in other embodiments, the number of threshold voltages can also be other values, which are not limited in the present application.

[0065] In the embodiment of the present application, the comparison circuit comprises a comparator CMP, one input terminal of which receives the first voltage Vch, and the other input terminal receives the plurality of threshold voltages Vth1, Vth2, …, VthN respectively, and outputs the comparison result Vc at the output terminal. It should be understood that the above-mentioned comparison circuit is only one of the circuit structures for generating the above-mentioned comparison result, and other circuit structures suitable for generating the above-mentioned comparison result are also within the protection scope of the embodiment of the present application.

[0066] The first adjusting circuit 312 is used to receive the first voltage Vch, and increase the value of the first voltage Vch to K times of the current value according to the comparison result Vc. In a preferred embodiment, the first adjusting circuit 312 comprises a voltage dividing circuit composed of a first resistor R1 and a second resistor R2 connected in series, wherein the second terminal of the first resistor R1 and the first terminal of the second resistor R2 receive the first voltage Vch, the second terminal of the second resistor R2 is connected to the ground potential, and a current reference signal Vref is generated at the first terminal of the first resistor R1, Vref = Vch * K = Vch * (R1 + R2) / R2, so that the value of the first voltage Vch can be increased to a predetermined multiple K of the current value by adjusting the resistance values of the first resistor R1 and / or the second resistor R2, K = (R1 + R2) / R2. The resistor whose resistance value needs to be adjusted among the first resistor R1 and the second resistor R2 is set as an adjustable resistor.

[0067] The second adjusting circuit 313 is coupled with the transistor M0 in series, which is used to obtain and adjust the first current sampling signal Vsen ， to K times of the current value. In a preferred embodiment, as shown in Fig. 1, the second adjusting circuit 313 comprises a third resistor R3 and a fourth resistor R4 connected in series, wherein the second terminal of the third resistor R3 and the first terminal of the fourth resistor R4 receive the first current sampling signal Vsen, the second terminal of the fourth resistor R4 is connected to the ground potential, and a second current reference signal Vref2 is generated at the first terminal of the third resistor R3, Vref2 = Vsen * K = Vsen * (R3 + R4) / R4, so that the value of the first current sampling signal Vsen can be increased to a predetermined multiple K of the current value by adjusting the resistance values of the third resistor R3 and / or the fourth resistor R4, K = (R3 + R4) / R4. The resistor whose resistance value needs to be adjusted among the third resistor R3 and the fourth resistor R4 is set as an adjustable resistor. Figure 3AAs shown, the second regulating circuit 313 includes an adjustable current sampling resistor R0 coupled in series with the transistor M0, and the adjustable current sampling resistor R0 is used to obtain the first current sampling signal Vsen ， By adjusting the resistance of the adjustable current sampling resistor R0, the first current sampling signal Vsen ， The second current sampling signal Vsen is obtained after the value of is increased to K times the current value; in another preferred embodiment, as Figure 3B As shown, the second regulating circuit 314 includes a fixed current sampling resistor R7 coupled in series with the transistor M0 and a multiple regulating circuit 3141. The fixed current sampling resistor R7 is used to obtain the first current sampling signal Vsen. ， , the first current sampling signal Vsen is adjusted by the multiplier adjustment circuit 3141 ， After the value of is increased to K times of the current value, the second current sampling signal Vsen is obtained.

[0068] Figure 4 In a preferred embodiment, any one of the first resistor, the second resistor and the adjustable current sampling resistor R0 can be Figure 4 The structure shown here is illustrated using the first resistor R1 as the structure. The first resistor R1 comprises n series-connected sub-resistance units, each of which includes a sub-resistance R1i and a first switch k1i coupled in parallel with the sub-resistance R1i. Here, i is an integer greater than or equal to 1 and less than or equal to n. When the sub-resistance R1i is active, the first switch k1i is off; when the sub-resistance R1i is not active, the first switch k1i is on. Thus, the first resistor R1 can change its resistance by controlling the corresponding first switches k1i using n control signals. When the resistance of the first resistor R1 needs to be increased, the number of disconnected first switches k1i can be increased; when the resistance of the first resistor R1 needs to be decreased, the number of disconnected first switches k1i can be decreased. The number of n control signals is determined by a multiplier K. A larger value of n ensures greater accuracy in the resistance of the first resistor R1. It should be understood that the present invention does not limit the value of n; any value that meets the system accuracy requirements is within the scope of this application.

[0069] Figure 5 FIG2 is a schematic diagram of a constant current source circuit according to a second embodiment of the present invention. In this embodiment of the present invention, the constant current source circuit 50 includes a transistor M0, an error amplifier circuit 23, an adjustable current sampling resistor R0, a gain adjustment circuit 51, and a first voltage generating circuit 52. The connection method and operating principle of the transistor M0, the error amplifier circuit 23, and the adjustable current sampling resistor R0 are the same as those in the first embodiment and are not further described here.

[0070] In the embodiment of the present application, the first voltage generating circuit 52 comprises a first error amplifier A1 and a first current mirror circuit. The non-inverting input terminal of the first error amplifier A1 receives a reference voltage VBG in the chip, and the inverting input terminal is coupled to the common node of the first transistor M1 and the reference setting resistor Rset coupled in series. Here, the reference setting resistor Rset is taken as an example of an external resistor, and the external resistor Rset is coupled to the ground potential. The output terminal of the first error amplifier A1 is coupled to the control terminal of the first transistor M1, so that the voltage on the external resistor Rset is equal to the reference voltage VBG, i.e. VBG=Rset*I2. On this basis, it can be known that the second current I2 flowing through the first transistor M1 and the external resistor Rset is inversely proportional to the resistance value of the external resistor Rset.

[0071] The first current mirror circuit is used to mirror or mirror amplify the second current I2 to generate the first current I1. Here, the first current mirror circuit comprises a second error amplifier A2, a second transistor M2, and a fourth resistor R4 and a fifth resistor R5.

[0072] Specifically, the non-inverting input terminal of the second error amplifier A2 is coupled to the common node of the first transistor M1 and the fifth resistor R5 coupled in series, the inverting input terminal is coupled to the common node of the second transistor M2 and the fourth resistor R4 coupled in series, and the output terminal is coupled to the control terminal of the second transistor M2 to generate the first current I1 on the second transistor M2. The first terminals of the fourth resistor R4 and the fifth resistor R5 both receive the supply voltage VDD. Since the voltages at the first terminals of the fourth resistor R4 and the fifth resistor R5 are the same, i.e. both are the supply voltage VDD, and the second terminals are coupled to the two input terminals of the second error amplifier A2 respectively, the second transistor M2 is controlled to be on and off so that the voltages at the two input terminals of the second error amplifier A2 are the same, i.e. the voltages at the second terminals of the fourth resistor R4 and the fifth resistor R5 are the same, and the voltages at the two terminals of the fourth resistor R4 and the fifth resistor R5 are the same. The voltages VR5 on the fifth resistor R5 and VR4 on the fourth resistor R4 can be represented as follows: VR5=I2*R5=VR4=I1*R4. Therefore, the first voltage generating circuit 52 can adjust the ratio of the second current I2 to the first current I1 by adjusting the ratio of the resistance values of the fifth resistor R5 and the fourth resistor R4. In one implementation, if the resistance values of the fifth resistor R5 and the fourth resistor R4 are equal, the current values of the second current I2 and the first current I1 are also equal; in another implementation, if the resistance values of the fifth resistor R5 and the fourth resistor R4 are not equal, the current value of the first current I1 is I2*R5 / R4.

[0073] It should be understood that the above-mentioned first current mirror circuit is only a preferred circuit structure, and other circuit structures suitable for current mirroring are also within the protection scope of the embodiment of the present application.

[0074] Meanwhile, it should be understood that the first voltage generating circuit described above is only one of the circuit structures that can generate the first current, and other circuit structures that can generate the first current are within the protection scope of the embodiments of the present application.

[0075] In the embodiments of the present application, the gain adjusting circuit 51 comprises a comparison circuit 511, a first adjusting circuit 512 and a second adjusting circuit 513. The comparison circuit 511 and the second adjusting circuit 513 have the same circuit structure, connection mode and working principle as the comparison circuit 311 and the second adjusting circuit 313 in the first embodiment, and thus will not be described here.

[0076] The first adjusting circuit 512 is configured to receive the first voltage Vch and increase the value of the first voltage Vch to K times of the current value according to the comparison result Vc. In the embodiments of the present application, the first adjusting circuit 512 comprises a voltage dividing circuit composed of a first resistor R1 and a second resistor R2 connected in series, wherein the second end of the first resistor R1 and the first end of the second resistor R2 receive the first voltage Vch, the second end of the second resistor R2 is connected to the ground potential, and a current reference signal Vref is generated at the first end of the first resistor R1, Vref = Vch*K = Vch*(R1+R2) / R2, so that the value of the first voltage Vch can be increased to K times of the current value by adjusting the resistance values of the first resistor R1 and / or the second resistor R2, K = (R1+R2) / R2. The resistor whose resistance value needs to be adjusted among the first resistor R1 and the second resistor R2 is set as an adjustable resistor.

[0077] The first adjusting circuit 512 further comprises a third resistor R3, a third error amplifier A3 and a third transistor M3, wherein the third resistor R3 receives the first current I1 in proportional relationship with the external resistor Rset, the first voltage Vch is formed on the third resistor R3, the non-inverting input end of the third error amplifier A3 receives the first voltage Vch, the inverting input end is coupled to the common node of the first resistor R1 and the second resistor R2, the output end is coupled to the control end of the third transistor M3, the third transistor M3 is coupled in series with the voltage dividing circuit composed of the first resistor R1 and the second resistor R2, and the current reference voltage Vref is generated at the common node of the first resistor R1 and the third transistor M3.

[0078] In the embodiment of the present application, the greater the reference setting resistance Rset is set, the smaller the value of the first voltage Vch is, and the greater the influence of the offset voltage Voff of the error amplifier A0 on the final output load current is. The embodiment of the present application detects the value range in which the first voltage Vch is located, and adjusts the resistance values of the first resistance R1, the second resistance R2 and the resistance R0 according to the comparison result, so as to increase the value of the input voltage of the later-stage operational amplifier (error amplifier A0), thereby reducing the influence of the offset voltage, and further improving the precision of the output current.

[0079] Preferably, when the load connected in series with the transistor M0 is an LED, the constant current source circuit 50 further comprises a digital dimming circuit DAC connected between the gain adjustment circuit 51 and the error amplifier A0, for adjusting the value of the current reference signal Vref according to a received digital dimming signal, so as to further adjust the current flowing through the transistor M0, thereby realizing a corresponding dimming function.

[0080] Figure 6 A schematic diagram of a constant current source circuit of a third embodiment of the present application. The constant current source circuit 60 comprises a transistor M0, an error amplifier A0, an adjustable current sampling resistance R0, a gain adjustment circuit 61 and a first voltage generation circuit 62. The connection mode and working principle of the transistor M0, the error amplifier A0, the adjustable current sampling resistance R0 and the first voltage generation circuit 62 are the same as those in the first and second embodiments, and will not be described here again. The difference between the embodiment of the present application and the second embodiment is only that the structure of the first adjustment circuit 612 is different.

[0081] In the embodiment of the present application, the first adjustment circuit 612 comprises a voltage dividing circuit composed of a first resistance R1 and a second resistance R2 connected in series. The first adjustment circuit 612 receives a first current I1 which is inversely proportional to the external resistance Rset, the first current I1 flows through the second resistance R2, and a first voltage Vch is formed on the second resistance R2. Wherein, the second end of the first resistance R1 and the first end of the second resistance R2 generate the first voltage Vch, the second end of the second resistance R2 is connected to the ground potential, and a current reference signal Vref is generated at the first end of the first resistance R1, Vref = Vch * K = Vch * (R1 + R2) / R2, so that the value of the first voltage Vch can be increased to K times of the current value by adjusting the resistance values of the first resistance R1 and / or the second resistance R2, K = (R1 + R2) / R2. The resistance which needs to be adjusted in the first resistance R1 and the second resistance R2 is set as an adjustable resistance. The structure of the first adjustment circuit 612 of the embodiment of the present application is relatively simple, which can reduce the volume and cost of the system.

[0082] Figure 7Fig. 4 is a schematic diagram of a constant current source circuit according to a fourth embodiment of the present application. The constant current source circuit 70 comprises a transistor M0, an error amplifier A0, an adjustable current sampling resistor R0, a gain adjustment circuit 71 and a first voltage generating circuit 72. The connection mode and working principle of the transistor M0, the error amplifier A0, the adjustable current sampling resistor R0 and the gain adjustment circuit 71 are the same as those in the first and second embodiments, and thus will not be described again. The difference between the fourth embodiment and the second embodiment is only that the structure of the first voltage generating circuit 72 is different.

[0083] In the fourth embodiment, the first voltage generating circuit 72 comprises a first error amplifier A1 and a first transistor M1. The non-inverting input terminal of the first error amplifier A1 receives a reference voltage VBG in the chip, the inverting input terminal is coupled to the common node of the first transistor M1 and a reference setting resistor Rset coupled in series, and the output terminal is coupled to the control terminal of the first transistor M1 to generate a first current I1 on the first transistor M1. The other end of the reference setting resistor Rset is coupled to a supply voltage VDD, the first transistor M1 is a P-type field effect transistor, and the first current I1 flows through a sixth resistor R6 to generate a first voltage Vch = R6*I1 on the sixth resistor R6.

[0084] When the first voltage generating circuit 72 is working, the first transistor M1 is controlled to be on or off so that the voltages at the two input terminals of the first error amplifier A1 are equal, i.e. VBG = VDD-Rset*I1. Since the supply voltage VDD and the reference voltage VBG in the chip are fixed, the value of the first current I1 is inversely proportional to the resistance value of the reference setting resistor Rset.

[0085] The above only describes the preferred embodiments of the present application and is not used to limit the present application. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present application should be included in the protection scope of the present application.

Claims

1. A constant current source circuit, characterized in that: include: A transistor, connected in series with the load; an error amplifying circuit, configured to receive the second current sampling signal and the current reference signal, and generate a control signal for the transistor according to an error between the two; The gain adjustment circuit is used to increase the values ​​of the first voltage and the first current sampling signal representing the current flowing through the transistor to predetermined multiples of the current values ​​and respectively serve as the current reference signal and the second current sampling signal, thereby offsetting the influence of the offset voltage of the error amplifier circuit.

2. The constant current source circuit according to claim 1, characterized in that: The value of the first voltage is determined by the resistance of the reference setting resistor.

3. The constant current source circuit according to claim 2, characterized in that: The value of the first voltage is proportional to the resistance of the reference setting resistor, and the reference setting resistor is configured as an external resistor disposed outside the chip.

4. The constant current source circuit according to claim 1, characterized in that: The gain adjustment circuit determines the value of the predetermined multiple by detecting the numerical value of the first voltage.

5. The constant current source circuit according to claim 4, characterized in that: The gain adjustment circuit is configured to ensure that the value of the multiple corresponds one-to-one to the numerical interval of the first voltage.

6. The constant current source circuit according to claim 4, characterized in that: The change trend of the value of the first voltage is opposite to the change trend of the value of the multiple. When the value of the first voltage is smaller, the value of the multiple is larger.

7. The constant current source circuit according to claim 1, characterized in that: The gain adjustment circuit comprises: a comparison circuit, configured to compare the first voltage with a plurality of threshold voltages to generate a comparison result; a first regulating circuit, configured to increase the value of the first voltage to a corresponding multiple of the current value according to the comparison result to obtain the current reference signal; The second regulating circuit is coupled in series with the transistor, and is used for acquiring and regulating the first current sampling signal to increase it to the corresponding multiple of the current value to obtain the second current sampling signal.

8. The constant current source circuit according to claim 7, characterized in that: The first adjustment circuit includes a voltage divider circuit consisting of a first resistor and a second resistor connected in series, wherein the first voltage is input at a common node between the second end of the first resistor and the first end of the second resistor, the second end of the second resistor is connected to the ground potential, and the current reference signal is generated at the first end of the first resistor. The value of the first voltage is increased by adjusting the resistance value of the first resistor and / or the second resistor.

9. The constant current source circuit according to claim 8, characterized in that: The second regulating circuit includes an adjustable current sampling resistor coupled in series with the transistor. The adjustable current sampling resistor is used to obtain the first current sampling signal. The value of the first current sampling signal is increased by adjusting the resistance of the current sampling resistor.

10. The constant current source circuit according to claim 8, characterized in that: The second regulating circuit includes a fixed current sampling resistor coupled in series with the transistor and a multiplication regulating circuit. The fixed current sampling resistor is used to obtain the first current sampling signal. The value of the first current sampling signal is increased by adjusting the amplification gain of the multiplication regulating circuit.

11. The constant current source circuit according to claim 9 or 10, characterized in that: Any one of the first resistor, the second resistor and the voltage sampling resistor includes n sub-resistance units connected in series, wherein each sub-resistance unit includes a sub-resistance and a first switch coupled in parallel with the sub-resistance, and when the current sub-resistance unit is involved in work, the first switch is turned off; when the current sub-resistance unit is not involved in work, the first switch is turned on.

12. The constant current source circuit according to claim 8, characterized in that: The first regulating circuit receives a first current proportional to the reference setting resistor. The first current flows through the first resistor and the second resistor, generates the first voltage at a common node between the first and second resistors, and generates the current reference signal at a first end of the first resistor.

13. The constant current source circuit according to claim 8, characterized in that: The first regulation circuit also includes a third resistor, a third error amplifier and a third transistor, wherein the third resistor receives a first current that is proportional to the resistor, and forms the first voltage on the third resistor. The non-inverting input terminal of the third error amplifier receives the first voltage, the inverting input terminal is coupled to the common node of the first resistor and the second resistor, the output terminal is coupled to the control terminal of the third transistor, and the third transistor is coupled in series with the voltage divider circuit to generate the current reference voltage at the first end of the first resistor.

14. The constant current source circuit according to claim 3, characterized in that: The constant current source circuit further includes a first voltage generating circuit for generating the first voltage in inverse proportion to the resistance value of the reference setting resistor based on the reference setting resistor.

15. The constant current source circuit according to claim 14, characterized in that: The first voltage generating circuit includes: a first error amplifier having a non-inverting input receiving an internal reference voltage, an inverting input coupled to a common node of a first transistor and a reference setting resistor coupled in series, and an output coupled to a control terminal of the first transistor to generate a second current in the first transistor that is inversely proportional to the reference setting resistor, wherein the reference setting resistor is coupled to ground potential; and a first current mirror circuit for mirroring the second current to generate the first current, wherein the first voltage is proportional to the first current.

16. The constant current source circuit according to claim 15, characterized in that: The first current mirror circuit includes: A second error amplifier has a non-inverting input terminal coupled to a common node of the first transistor and the fifth resistor coupled in series, an inverting input terminal coupled to a common node of the second transistor and the fourth resistor coupled in series, and an output terminal coupled to the control terminal of the second transistor to generate the first current on the second transistor.

17. The constant current source circuit according to claim 16, characterized in that: The ratio of the second current to the first current is adjusted by adjusting the resistance ratio of the fifth resistor to the fourth resistor.

18. The constant current source circuit according to claim 12, wherein: The first voltage generating circuit includes: a first error amplifier having a non-inverting input receiving a reference voltage within the chip, an inverting input coupled to a common node of a first transistor and a reference setting resistor coupled in series, an output coupled to a control terminal of the first transistor to generate a second current on the first transistor that is inversely proportional to the reference setting resistor, wherein the reference setting resistor is coupled to a power supply voltage; and a sixth resistor receiving the second current to form the first voltage on the sixth resistor.

19. The constant current source circuit according to claim 1, wherein: It also includes a digital dimming circuit connected between the gain adjustment circuit and the error amplification circuit, which is used to adjust the value of the current reference signal according to the received dimming signal to further adjust the current flowing through the transistor.

20. An LED driving circuit, comprising: LED loads, and The constant current source circuit according to any one of claims 1 to 19.

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