Mask preparation method for two-dimensional semiconductor solution method selected area doping and mask

Abstract

The application discloses a mask preparation method for two-dimensional semiconductor solution method selected area doping and the mask, wherein the preparation method comprises sequentially depositing a first dielectric layer and a second dielectric layer on the surface of the two-dimensional semiconductor, and the etching rate of the second dielectric layer in a first dielectric layer removing liquid is less than that of the first dielectric layer; an etching process is used to remove the second dielectric layer and part of the first dielectric layer in a target doping area, so that the target doping area retains at least 0.1 nm of the first dielectric layer, and the first dielectric layer is removed by using a first dielectric layer removing liquid before solution method selected area doping. The first dielectric layer and the second dielectric layer provided by the application serve as the protective layers of non-target doping areas, the target doping area retains part of the first dielectric layer, damage to the two-dimensional semiconductor in the target doping area caused by the etching process is avoided, and when the first dielectric layer in the target doping area is removed before solution method selected area doping, the damage degree of the second dielectric layer is small, and the second dielectric layer is protected to the maximum extent.

Description

Technical Field

[0001] This invention relates to the field of two-dimensional semiconductor solution doping technology, and particularly to a method for preparing a mask for selective doping of two-dimensional semiconductor solutions and the mask thereof. Background Technology

[0002] Solution-based doping of two-dimensional (2D) semiconductor materials is one of the most feasible methods currently available, as it causes minimal damage to the material. One challenge of solution-based 2D semiconductor doping is selective doping, which involves protecting non-target doping areas with a mask. If photoresist is used as the mask, the organic solvent used to remove it after doping can reduce the doping effect. Alternatively, using a hard mask process—depositing a hard mask layer as a protective layer before etching away the target doping area—is difficult because controlling the etching process to terminate at the 2D semiconductor surface is challenging due to the atomically thin nature of the material, making it susceptible to damage during etching. Therefore, the mask and its fabrication are key technical challenges in solution-based selective doping of 2D semiconductors. Summary of the Invention

[0003] The technical problem to be solved by the present invention is to provide a method for preparing a mask for selective doping of two-dimensional semiconductors using solution method and the mask itself, which can realize selective doping of solution method and protect non-target doping regions.

[0004] To address the aforementioned technical problems, the first objective of this invention is to provide a method for fabricating a mask for selective doping of two-dimensional semiconductor solutions, comprising the following steps:

[0005] S1. Deposit a first dielectric layer on the surface of a two-dimensional semiconductor;

[0006] S2. Deposit a second dielectric layer on the surface of the first dielectric layer, wherein the first dielectric layer and the second dielectric layer satisfy the following condition: in the first dielectric layer removal solution, the etching rate of the second dielectric layer is less than the etching rate of the first dielectric layer.

[0007] S3. The etching process removes all of the second dielectric layer and part of the first dielectric layer of the target doped region, so that the target doped region retains at least 0.1 nm of the first dielectric layer;

[0008] S4. Before selective doping of the two-dimensional semiconductor using the solution method, the first dielectric layer retained in step S3 is removed using a first dielectric layer removal solution.

[0009] Preferably, the material of the first dielectric layer is selected from Al2O3, SiO2, or ZrO2, and the thickness is 1nm-1μm; the material of the second dielectric layer is selected from HfO2 or Si3N4, and the thickness is 1nm-1μm.

[0010] Preferably, the first medium layer removal solution is selected from one of tetramethylammonium hydroxide solution, hydrochloric acid, ammonium tungstate, ammonium metatungstate, phosphoric acid, hydrofluoric acid, and BOE solution.

[0011] Preferably, the deposition process for both the first dielectric layer and the second dielectric layer is atomic layer deposition.

[0012] Preferably, step S3 further includes defining the target doped region by photolithography before the etching process, and removing the photoresist after the etching process.

[0013] Preferably, the etching in step S3 is a dry etching process or a wet etching process, wherein the etching solution in the wet etching process is one of hydrochloric acid, phosphoric acid, nitric acid, hydrofluoric acid, or BOE solution.

[0014] Preferably, the doping solution used in step S4 for selective doping by solution method is selected from one of tetramethylammonium hydroxide solution, hydrochloric acid, ammonium tungstate, and ammonium metatungstate.

[0015] To address the aforementioned technical problems, a second objective of this invention is to provide a mask for selective doping of two-dimensional semiconductors using a solution method, comprising a first dielectric layer and a second dielectric layer, wherein the first dielectric layer is located on the surface of the two-dimensional semiconductor, and the second dielectric layer is located on the surface of the first dielectric layer; the target doping region covers only the first dielectric layer, and its thickness is at least 0.1 nm, which is less than the thickness of the first dielectric layer in the non-target doping region;

[0016] Before selective doping in the solution method, the first dielectric layer of the target doped region is removed using a first dielectric layer removal solution.

[0017] Preferably, the material of the first dielectric layer is selected from Al2O3, SiO2, or ZrO2, and the thickness is 1nm-1μm; the material of the second dielectric layer is selected from HfO2 or Si3N4, and the thickness is 1nm-1μm.

[0018] Preferably, the first medium layer removal solution is selected from one of tetramethylammonium hydroxide solution, hydrochloric acid, ammonium tungstate, ammonium metatungstate, phosphoric acid, hydrofluoric acid, and BOE solution.

[0019] The present invention provides a method for fabricating a mask for selective doping of two-dimensional semiconductors using solution method. In this method, during the etching process to remove the mask layer, a first dielectric layer of at least 0.1 nm is retained in the target doping region. This effectively prevents potential damage to the two-dimensional semiconductor in the target doping region from the etching process. Subsequently, the retained first dielectric layer in the target doping region is removed using a first dielectric layer removal solution before solution-based selective doping, thus achieving doping of the target doping region. Simultaneously, since the etching rate of the second dielectric layer in the first dielectric layer removal solution is lower than that of the first dielectric layer, the etching process of the retained first dielectric layer in the target doping region has minimal impact on the second dielectric layer in the non-target doping region, maximizing the protection of the second dielectric layer and thus effectively protecting the two-dimensional semiconductor in the non-target doping region. After doping, only the residual doping solution needs to be removed; there is no need to remove the first and second dielectric layers. The gate dielectric layer can then be grown directly. When the doped two-dimensional semiconductor is applied to a top-gate field-effect transistor, it exhibits excellent electrical characteristics, meeting the application requirements. Furthermore, the method for fabricating a mask for selective doping of two-dimensional semiconductors using solution method provided by the present invention is simple, has good process stability, and is suitable for widespread application. Attached Figure Description

[0020] To more clearly illustrate the technical solution of the present invention, the accompanying drawings used in the present invention will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0021] Figure 1 This is the fabrication process flow of the mask for two-dimensional semiconductor solution doping according to Embodiment 1 of the present invention;

[0022] Figure 2 It is the process of solution doping of two-dimensional semiconductors for doping the candidate region;

[0023] Figure 3 This is a schematic diagram of the top-gate field-effect transistor structure according to Embodiment 2 of the present invention;

[0024] Figure 4 These are the transfer characteristic curves of transistor A and the comparison transistor A in this invention;

[0025] Figure 5 These are the transfer characteristic curves of transistor B and the comparison transistor B in this invention;

[0026] Figure 6 These are the transfer characteristic curves of transistor C and the comparison transistor C in this invention;

[0027] Figure 7 These are the transfer characteristic curves of transistor D and the comparison transistor D in this invention;

[0028] Figure 8 These are the transfer characteristic curves of transistor E and the comparison transistor E in this invention;

[0029] Wherein, 1-substrate; 2-two-dimensional semiconductor; 3-first dielectric layer; 4-second dielectric layer; 5-photoresist; 6-doping solution; 10-substrate; 11-doped two-dimensional semiconductor; 12-first dielectric layer; 13-second dielectric layer; 14-source; 15-drain; 16-gate dielectric layer; 17-gate. Detailed Implementation

[0030] The technical solutions of the present invention will now be clearly and completely described with reference to the accompanying drawings. Obviously, the described embodiments are only some, not all, of the embodiments of the present invention. All other embodiments obtained by those skilled in the art based on the embodiments of the present invention without creative effort are within the scope of protection of the present invention.

[0031] Example 1: Fabrication of a mask for selective doping of two-dimensional semiconductors using solution method.

[0032] refer to Figure 1 This invention illustrates a method for fabricating a mask for selective doping of a two-dimensional semiconductor using a solution method, wherein 1 is a substrate, 2 is a two-dimensional semiconductor, 3 is a first dielectric layer, 4 is a second dielectric layer, and 5 is a photoresist.

[0033] The preparation method includes the following steps:

[0034] S1. Deposit a first dielectric layer on the surface of a two-dimensional semiconductor;

[0035] S2. Deposit a second dielectric layer on the surface of the first dielectric layer, wherein the first dielectric layer and the second dielectric layer satisfy the following condition: in the first dielectric layer removal solution, the etching rate of the second dielectric layer is less than the etching rate of the first dielectric layer.

[0036] S3. The etching process removes all of the second dielectric layer and part of the first dielectric layer of the target doped region, so that the target doped region retains at least 0.1 nm of the first dielectric layer;

[0037] S4. Before selective doping of the two-dimensional semiconductor using the solution method, the first dielectric layer retained in step S3 is removed using a first dielectric layer removal solution.

[0038] In this invention, a first dielectric layer and a second dielectric layer are sequentially deposited on the surface of a two-dimensional semiconductor as a protective layer for non-target doped regions. Then, an etching process removes the entire second dielectric layer from the target doped region. Since it is difficult to precisely control the etching process to terminate at the interface between the two-dimensional semiconductor and the first dielectric layer, a portion of the first dielectric layer needs to be retained in the target doped region to avoid potential damage to the two-dimensional semiconductor from the etching process. The retained first dielectric layer in the target doped region can be removed with a first dielectric removal solution before doping. The thickness of the retained first dielectric layer is not critical, but due to process limitations, at least 0.1 nm of the first dielectric layer must be retained in this invention. Because the etching rate of the first dielectric layer in the first dielectric removal solution is greater than that of the second dielectric layer, the damage to the second dielectric layer is minimized during the removal of the first dielectric layer from the target doped region, maximizing the protection of the second dielectric layer and thus effectively protecting the two-dimensional semiconductor material in the non-target region.

[0039] In this invention, the two-dimensional semiconductor material is a transition metal chalcogenide, such as tungsten diselenide (WSe2), molybdenum disulfide (MoS2), molybdenum ditelluride (MoTe2), etc. The preparation process of these two-dimensional semiconductor materials is relatively mature and can be directly applied to this invention. Depending on the requirements, the number of layers of the two-dimensional semiconductor material can be 1-30.

[0040] In one specific embodiment, the first dielectric layer is selected from Al2O3, SiO2, or ZrO2, and has a thickness of 1 nm-1 μm; the second dielectric layer is selected from HfO2 or Si3N4, and has a thickness of 1 nm-1 μm. It is understood that in this specific embodiment, the first dielectric layer is preferably formed at a higher etching rate in the first dielectric layer removal solution than the second dielectric layer, for example, using Al2O3, SiO2, or ZrO2, or a dielectric layer with Al2O3, SiO2, or ZrO2 as the main components; the second dielectric layer is, for example, using HfO2, Si3N4, or a dielectric layer with HfO2 or Si3N4 as the main components. It should be noted that the material of the second dielectric layer is preferably the same as that of the gate dielectric layer to facilitate the fabrication of the gate dielectric layer and to minimize the impact on the equivalent oxide thickness; preferably, the deposition processes for both the first and second dielectric layers are atomic layer deposition processes.

[0041] In one specific embodiment, the first dielectric layer removal solution is selected from one of tetramethylammonium hydroxide solution, hydrochloric acid, ammonium tungstate, ammonium metatungstate, phosphoric acid, hydrofluoric acid, and BOE solution. Understandably, the selection principle for the first dielectric layer removal solution is to remove the first dielectric layer remaining in the target doping region without damaging the two-dimensional semiconductor material. Preferably, when the doping solution used meets the selection requirements for the first dielectric layer removal solution, it is preferred to use it as the first dielectric layer removal solution. For example, tetramethylammonium hydroxide solution can be used as a doping solution to achieve n-type doping of the two-dimensional semiconductor material, and at the same time, it can also be used as the first dielectric layer removal solution. Therefore, the two-dimensional semiconductor to be doped can be directly immersed in tetramethylammonium hydroxide solution to remove the first dielectric layer and perform n-type doping of the two-dimensional semiconductor material, saving operation steps.

[0042] In one specific implementation, step S3 further includes defining the target doped region by photolithography before the etching process, and removing the photoresist after the etching process.

[0043] In this specific embodiment, the photolithography process includes spin coating of photoresist, exposure and development of the target doped region, removal of photoresist from the target doped region, and retention of photoresist in the non-target doped region to prevent damage to the mask (first dielectric layer and second dielectric layer) of the non-target doped region during the etching of the second dielectric layer and part of the first dielectric layer.

[0044] In one specific implementation, the etching process in step S3 may employ either dry etching or wet etching. When using dry etching, since the etching process can easily damage the two-dimensional semiconductor material, it is necessary to control the retention of a first dielectric layer with a thickness of at least 0.1 nm to protect the two-dimensional semiconductor material. It should be noted that dry etching and wet etching are conventional processes and will not be described in detail here. After etching, the photoresist in the non-target doped region is removed to obtain the two-dimensional semiconductor doped in the desired region.

[0045] In one specific embodiment, the doping solution used in step S4 for selective doping is selected from tetramethylammonium hydroxide solution, hydrochloric acid, ammonium tungstate, and ammonium metatungstate. The solution-based doping process for the two-dimensional semiconductor to be selectively doped is as follows: Figure 2 (Where 6 is the doping solution) As shown, the two-dimensional semiconductor material to be doped is immersed in the doping solution. After the required immersion time, it is taken out and then blown with an inert gas such as nitrogen to remove the residual doping solution and then dried.

[0046] Example 2: Electrical characteristics test.

[0047] In this embodiment, a top-gate field-effect transistor is fabricated using the two-dimensional semiconductor material with the doped region obtained in Example 1, employing conventional semiconductor processes. Specifically, the source and drain electrodes are first fabricated on the surface of the two-dimensional semiconductor using electron beam evaporation. Then, the transistor channel region is defined using photolithography and etching. Next, a first dielectric layer and a second dielectric layer are sequentially deposited using atomic layer deposition. The doped region is then defined using photolithography. Following this, the second dielectric layer and part of the first dielectric layer in the doped region are removed using etching. After removing the photoresist from the non-target doped region, the transistor is placed in a doping solution to remove the remaining first dielectric layer and to dope the target doped region. After doping, the transistor is removed, and the residual doping solution is removed by nitrogen blowing. A gate dielectric layer is then fabricated using atomic layer deposition. Finally, a gate electrode is deposited on the surface of the gate dielectric layer to obtain the top-gate field-effect transistor, the structure of which is as follows: Figure 3 As shown, 10 is the substrate, 11 is the doped two-dimensional semiconductor, 12 is the first dielectric layer, 13 is the second dielectric layer, 14 is the source, 15 is the drain, 16 is the gate dielectric layer, and 17 is the gate electrode.

[0048] Transistor A: The substrate is aluminum oxide; the two-dimensional semiconductor material is a single layer of MoS2; both the source and drain are 50 nm thick metallic Au; the mask layer for the non-target doped region on the surface of the two-dimensional semiconductor is 3 nm of Al2O3 and 3 nm of HfO2, wherein the Al2O3 layer is deposited on the surface of the two-dimensional semiconductor material, and the HfO2 layer is deposited on the surface of the Al2O3 layer; the doping solution is tetramethylammonium hydroxide solution with a concentration of 5% and a doping time of 10 min; the gate dielectric layer is 10 nm thick HfO2; the gate is 50 nm thick metallic Au; as a comparison, a contrast transistor A is simultaneously fabricated on the same two-dimensional semiconductor material in the undoped region adjacent to the doped region, i.e., compared with transistor A, the contrast transistor A does not undergo a doping process; the transfer characteristic curves of transistor A and contrast transistor A are shown in [reference needed]. Figure 4 The red curve represents the transfer characteristic curve of transistor A, and the gray curve represents the transfer characteristic curve of the control transistor A. By comparison, it can be seen that the undoped control transistor A exhibits n-type characteristics, while transistor A exhibits degenerate semiconductor characteristics. This indicates that selective doping of two-dimensional semiconductor materials using the solution method has been achieved, and the doping effect is strong, with good electrical characteristics that meet the application requirements.

[0049] Transistor B: The two-dimensional semiconductor material is a single layer of WSe2; both the source and drain are 50 nm thick metallic Au; the mask layer for the non-target doped region on the surface of the two-dimensional semiconductor is 3 nm of Al2O3 and 3 nm of HfO2, wherein the Al2O3 layer is deposited on the surface of the two-dimensional semiconductor material, and the HfO2 layer is deposited on the surface of the Al2O3 layer; the doping solution is tetramethylammonium hydroxide solution with a concentration of 5% and a doping time of 2 min; the gate dielectric layer is 20 nm thick HfO2; the gate is 50 nm thick metallic Au; as a comparison, a contrast transistor B is simultaneously fabricated on the same two-dimensional semiconductor material in the undoped region adjacent to the doped region. Compared with transistor B, the contrast transistor B does not undergo a doping process; the transfer characteristic curves of transistor B and contrast transistor B are shown in [reference needed]. Figure 5 The blue curve represents the transfer characteristic curve of transistor B, and the gray curve represents the transfer characteristic curve of the control transistor B. By comparison, it can be seen that the undoped control transistor B exhibits p-type characteristics, while transistor B exhibits n-type characteristics. This indicates that selective doping of two-dimensional semiconductor materials using the solution method has been achieved, and the doping effect is strong, with good electrical characteristics that meet the application requirements.

[0050] Transistor C: The two-dimensional semiconductor material is a single layer of WSe2; both the source and drain are 50 nm thick metallic Au; the mask layer for the non-target doped region on the surface of the two-dimensional semiconductor is 3 nm of Al2O3 and 3 nm of HfO2, wherein the Al2O3 layer is deposited on the surface of the two-dimensional semiconductor material, and the HfO2 layer is deposited on the surface of the Al2O3 layer; the doping solution is a hydrochloric acid solution with a concentration of 10%, and the doping time is 2 min; the gate dielectric layer is 20 nm thick HfO2; the gate is 50 nm thick metallic Au; as a comparison, a contrast transistor C is simultaneously fabricated on the same two-dimensional semiconductor material in the undoped region adjacent to the doped region. Compared with transistor C, the contrast transistor C does not undergo a doping process; the transfer characteristic curves of transistor C and contrast transistor C are shown in [reference needed]. Figure 6 The orange curve represents the transfer characteristic curve of transistor C, and the gray curve represents the transfer characteristic curve of the control transistor C. By comparison, it can be seen that the undoped control transistor C exhibits p-type characteristics, while transistor C exhibits n-type characteristics. This indicates that selective doping of two-dimensional semiconductor materials using the solution method has been achieved, and the doping effect is strong, with good electrical characteristics that meet the application requirements.

[0051] Transistor D: The two-dimensional semiconductor material is a single layer of WSe2; both the source and drain are 50 nm thick metallic Au; the mask layer for the non-target doped region on the surface of the two-dimensional semiconductor is 3 nm of Al2O3 and 3 nm of HfO2, wherein the Al2O3 layer is deposited on the surface of the two-dimensional semiconductor material, and the HfO2 layer is deposited on the surface of the Al2O3 layer; the doping solution is ammonium tungstate solution with a concentration of 10 mmol / L, and the doping time is 10 min; the gate dielectric layer is 20 nm thick HfO2; the gate is 50 nm thick metallic Au; as a comparison, a contrast transistor D is simultaneously fabricated on the same two-dimensional semiconductor material in the undoped region adjacent to the doped region. Compared with transistor D, the contrast transistor D does not undergo a doping process; the transfer characteristic curves of transistor D and contrast transistor D are shown in [reference needed]. Figure 7 The blue curve represents the transfer characteristic curve of transistor D, and the gray curve represents the transfer characteristic curve of the control transistor D. By comparison, it can be seen that the undoped control transistor D exhibits p-type characteristics, while transistor D exhibits better p-type characteristics. This indicates that selective doping of two-dimensional semiconductor materials using the solution method has been achieved, and the doping effect is strong, with good electrical characteristics that meet the application requirements.

[0052] Transistor E: The two-dimensional semiconductor material is a single layer of WSe2; both the source and drain are 50 nm thick metallic Au; the mask layer for the non-target doped region on the surface of the two-dimensional semiconductor is 3 nm of Al2O3 and 3 nm of HfO2, wherein the Al2O3 layer is deposited on the surface of the two-dimensional semiconductor material, and the HfO2 layer is deposited on the surface of the Al2O3 layer; the doping solution is ammonium metatungstate solution with a concentration of 100 mmol / L, and the doping time is 10 min; the gate dielectric layer is 20 nm thick HfO2; the gate is 50 nm thick metallic Au; as a comparison, a contrast transistor E is simultaneously fabricated on the same two-dimensional semiconductor material in the undoped region adjacent to the doped region. Compared with transistor E, the contrast transistor E does not undergo a doping process; the transfer characteristic curves of transistor E and contrast transistor E are shown in [reference needed]. Figure 8 The green curve represents the transfer characteristic curve of transistor E, and the gray curve represents the transfer characteristic curve of the control transistor E. By comparison, it can be seen that the undoped control transistor E exhibits p-type characteristics, while transistor E exhibits better p-type characteristics. This indicates that selective doping of two-dimensional semiconductor materials using the solution method has been achieved, and the doping effect is strong, with good electrical characteristics that meet the application requirements.

[0053] The above description is only a preferred embodiment of the present invention and is not intended to limit the present invention. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of the present invention should be included within the scope of protection of the present invention.

Claims

1. A method for selective doping of a two-dimensional semiconductor solution, characterized in that, Includes the following steps: S1. Deposit a first dielectric layer on the surface of a two-dimensional semiconductor; S2. Deposit a second dielectric layer on the surface of the first dielectric layer, wherein the first dielectric layer and the second dielectric layer satisfy the following condition: in the first dielectric layer removal solution, the etching rate of the second dielectric layer is less than the etching rate of the first dielectric layer. S3. The etching process removes all of the second dielectric layer and part of the first dielectric layer of the target doped region, so that the target doped region retains at least 0.1 nm of the first dielectric layer; S4. Before selective doping of the two-dimensional semiconductor using the solution method, the first dielectric layer retained in step S3 is removed with a first dielectric layer removal solution. The removal solution is selected from one of tetramethylammonium hydroxide solution, hydrochloric acid, ammonium tungstate, and ammonium metatungstate. After removing the first dielectric layer, the two-dimensional semiconductor is doped with the removal solution.

2. The method as described in claim 1, characterized in that, The first dielectric layer is made of Al2O3, SiO2, or ZrO2, with a thickness of 1nm-1μm; the second dielectric layer is made of HfO2 or Si3N4, with a thickness of 1nm-1μm.

3. The method as described in claim 1, characterized in that, The deposition processes for both the first and second dielectric layers are atomic layer deposition processes.

4. The method as described in claim 1, characterized in that, Step S3 also includes defining the target doped region by photolithography before the etching process, and removing the photoresist after the etching process.

5. The method as described in claim 1, characterized in that, The etching in step S3 is either a dry etching process or a wet etching process, wherein the etching solution for the wet etching process is one of hydrochloric acid, phosphoric acid, nitric acid, hydrofluoric acid, or BOE solution.

6. A solution-doped two-dimensional semiconductor, prepared by the solution-doped two-dimensional semiconductor method of any one of claims 1-5.

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