Linear voltage regulator and error amplifying circuit thereof
By introducing a current compensation module and a voltage detection module into the linear regulator and dynamically adjusting the compensation current according to load changes, the problem of output voltage undershoot of the linear regulator during load jumps is solved, achieving the effect of both low loss and stability.
Patent Information
- Application Number
- CN202510781772.1
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-06-11
- Publication Date
- 2025-10-17
AI Technical Summary
When the load of a linear regulator changes from light load to heavy load, the output voltage undershoots significantly. Existing technologies are difficult to effectively compensate for this, resulting in increased circuit losses and affected stability.
An error amplifier circuit for a linear voltage regulator is designed, which includes an error amplifier, a current compensation module and a voltage detection module. By detecting the differential voltage between the reference voltage and the feedback voltage, it is determined whether the current compensation condition is met. The compensation current is injected only when necessary to stabilize the output voltage.
It effectively reduces circuit loss, ensures circuit stability, avoids unnecessary increase of quiescent current, and improves output voltage stability.
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Figure CN120811292A_ABST
Abstract
Description
TECHNICAL FIELD
[0001] Embodiments of the present disclosure relate to the technical field of integrated circuits, and in particular to a linear voltage regulator and an error amplifier circuit thereof. BACKGROUND
[0002] When the output load of a linear voltage regulator, such as a low dropout regulator (LDO), jumps from light load to heavy load, a large voltage dip of the output voltage of the linear voltage regulator occurs, which needs to be limited within a certain range to ensure the normal operation of the load circuit. The error amplifier voltage generated inside the linear voltage regulator differs greatly between light load and heavy load, so when the load jumps from light load to heavy load, the error amplifier voltage is pulled up.
[0003] When a rapid steep load current jump occurs, a dynamic current pulse can be used to compensate the error amplifier voltage. When a slow long-time current jump occurs, since the dynamic current pulse compensates for the current increment in a short time and cannot really charge the compensation capacitor, but generates a voltage lift on the compensation resistor, a single compensation current pulse cannot continue to function. At present, for a load large current jump with a relatively slow rising slope and a long duration, an adaptive mode can be used to increase the overall current or increase the input pair transistor static current to improve, but this will generate a large static current loss and affect the stability of the circuit. SUMMARY
[0004] The present disclosure provides a linear voltage regulator and an error amplifier circuit thereof, which can reduce circuit loss while ensuring circuit stability.
[0005] In a first aspect, the present disclosure provides an error amplifier circuit of a linear voltage regulator, comprising an error amplifier, a current compensation module, and a voltage detection module.
[0006] The error amplifier is configured to receive a reference voltage and a feedback voltage of the linear voltage regulator, and determine an error amplifier voltage of the reference voltage and the feedback voltage.
[0007] The voltage detection module is configured to, when the output load of the linear voltage regulator jumps from light load to heavy load, determine whether the linear voltage regulator satisfies a current compensation condition according to a differential voltage of the reference voltage and the feedback voltage.
[0008] The current compensation module is configured to, when the current compensation condition is satisfied, inject a compensation current into an output terminal of the error amplifier to generate a compensation in a final convergence direction of the output voltage of the linear voltage regulator; and when the current compensation condition is not satisfied, stop injecting the compensation current.
[0009] In some embodiments of the present disclosure, the voltage detection module is further configured to generate an enable signal when the sum of the feedback voltage and a first current compensation threshold voltage is less than the reference voltage during a decrease of the output voltage of the linear voltage regulator; and generate a disable signal when the sum of the feedback voltage and the first current compensation threshold voltage is greater than the reference voltage.
[0010] In some embodiments of the present disclosure, the voltage detection module comprises a first transistor, a second transistor, a third transistor, a fourth transistor, a fifth transistor and a first resistor. A first end of the first transistor and a first end of the second transistor are connected to a power supply voltage, a control end of the first transistor is connected to a control end of the second transistor, a second end of the first transistor and a second end of the third transistor, a second end of the second transistor is connected to a second end of the fourth transistor and an enable end of the current compensation module.
[0011] A control end of the third transistor is connected to the feedback voltage, a control end of the fourth transistor is connected to the reference voltage, a first end of the fourth transistor is connected to a first end of the first resistor, a second end of the first resistor is connected to a second end of the fifth transistor and a first end of the third transistor, a first end of the fifth transistor is connected to ground.
[0012] In some embodiments of the present disclosure, the voltage detection module is further configured to generate the enable signal when the sum of the feedback voltage and a second current compensation threshold voltage is less than the reference voltage during an increase of the output voltage; and generate the disable signal when the sum of the feedback voltage and the second current compensation threshold voltage is greater than the reference voltage; the second current compensation threshold voltage is less than the first current compensation threshold voltage.
[0013] In some embodiments of the present disclosure, the voltage detection module further comprises a second resistor and a sixth transistor, the second resistor and the sixth transistor are connected in parallel between the second end of the first resistor and the second end of the fifth transistor.
[0014] The sixth transistor is configured to short the second resistor when the sum of the feedback voltage and the first current compensation threshold voltage is less than the reference voltage during a decrease of the output voltage; and connect the second resistor when the sum of the feedback voltage and the second current compensation threshold voltage is greater than the feedback voltage during an increase of the output voltage.
[0015] In some embodiments of the present disclosure, the voltage detection module further comprises a first inverter, a second inverter and a Schmitt trigger, an input terminal of the Schmitt trigger is connected to a second terminal of the second transistor and a second terminal of the fourth transistor, an output terminal of the Schmitt trigger is connected to an input terminal of the second inverter through the first inverter, and an output terminal of the second inverter is connected to an enable terminal of the current compensation module.
[0016] In some embodiments of the present disclosure, the current compensation module comprises a current generation unit and an output unit, an input terminal of the current generation unit is connected to a power supply voltage, an output terminal of the current generation unit is connected to an output terminal of the error amplifier through the output unit, and a control terminal of the current generation unit is connected to a bias terminal of the error amplifier.
[0017] The current generation unit is configured to generate the compensation current according to the bias current of the error amplifier. The output unit is configured to inject the compensation current to the output terminal of the error amplifier when the enable signal is received, and stop injecting the compensation current to the output terminal of the error amplifier when the non-enable signal is received.
[0018] In some embodiments of the present disclosure, the current generation unit comprises a seventh transistor and an eighth transistor, a first terminal of the seventh transistor is connected to the power supply voltage, a second terminal of the seventh transistor is connected to an input terminal of the output unit through the eighth transistor, and a control terminal of the seventh transistor is connected to the bias terminal of the error amplifier.
[0019] The output unit comprises a ninth transistor, a first terminal of the ninth transistor is connected to the output terminal of the current generation unit, a second terminal of the ninth transistor is connected to the output terminal of the error amplifier, and a control terminal of the ninth transistor is connected to the output terminal of the voltage detection module.
[0020] In some embodiments of the present disclosure, the error amplifier comprises a bias current source, a first field effect transistor, a second field effect transistor, a third field effect transistor, a fourth field effect transistor, a fifth field effect transistor, a sixth field effect transistor, a seventh field effect transistor, an eighth field effect transistor, a ninth field effect transistor, a tenth field effect transistor, and a compensation unit. A power supply voltage is connected to a first end of the first field effect transistor and a first end of the second field effect transistor through the bias current source, a control end of the first field effect transistor is connected to the feedback voltage, a control end of the second field effect transistor is connected to the reference voltage, a second end of the first field effect transistor is connected to a first end of the eighth field effect transistor and a second end of the tenth field effect transistor, a second end of the second field effect transistor is connected to a first end of the seventh field effect transistor and a second end of the ninth field effect transistor, a control end of the ninth field effect transistor is connected to a control end of the tenth field effect transistor, a second end of the seventh field effect transistor, and a second end of the fifth field effect transistor, and a first end of the ninth field effect transistor and a first end of the tenth field effect transistor are grounded.
[0021] A control end of the seventh field effect transistor is connected to a control end of the eighth field effect transistor, a control end of the third field effect transistor is connected to a control end of the fourth field effect transistor and a control end of the current compensation module, and a second end of the eighth field effect transistor is connected to an output end of the compensation unit, an output end of the error amplifier, an output end of the current compensation module, and a second end of the sixth field effect transistor.
[0022] A control end of the fifth field effect transistor is connected to a control end of the sixth field effect transistor, a first end of the fifth field effect transistor is connected to a second end of the third field effect transistor, a first end of the sixth field effect transistor is connected to a second end of the fourth field effect transistor, and a first end of the third field effect transistor and a first end of the fourth field effect transistor are connected to the power supply voltage.
[0023] In a second aspect, the present disclosure provides a linear voltage regulator comprising any error amplifier circuit provided in the first aspect.
[0024] In the technical solution of the present disclosure, an error amplifier circuit of a linear voltage regulator is provided, which comprises an error amplifier, a current compensation module, and a voltage detection module. When the load of the linear voltage regulator jumps from light load to heavy load, the voltage detection module determines whether the linear voltage regulator meets the current compensation condition according to the differential voltage between the reference voltage and the feedback voltage. When the current compensation condition is met, the current compensation module injects a compensation current into the output end of the error amplifier to compensate the output voltage in the final convergence direction. When the current compensation condition is not met, the current compensation module stops injecting the compensation current. In this way, the output voltage is compensated in the final convergence direction only when the output voltage drops too much during the jump from light load to heavy load, which can reduce the static current and reduce the circuit loss while ensuring the stability of the circuit. BRIEF DESCRIPTION OF DRAWINGS
[0025] In order to more clearly illustrate the technical solutions of the embodiments of the present application, the drawings needed to be used in the embodiment description will be briefly introduced as follows. It should be known that the drawings described below only relate to some embodiments of the present disclosure, but not limit the present disclosure, in which:
[0026] Figure 1 A circuit schematic diagram of an error amplifier of an LDO provided by the prior art.
[0027] Figure 2 A waveform schematic diagram of error amplifier voltage and output voltage when the output load of an LDO provided by the prior art jumps from light load to heavy load.
[0028] Figure 3 A structural schematic diagram of an error amplifier circuit provided by the embodiments of the present disclosure.
[0029] Figure 4 A circuit schematic diagram of an error amplifier circuit provided by the embodiments of the present disclosure.
[0030] Figure 5 A waveform schematic diagram of error amplifier voltage and output voltage when the output load of a linear voltage regulator provided by the embodiments of the present disclosure jumps from light load to heavy load.
[0031] Figure 6 A circuit schematic diagram of another error amplifier circuit provided by the embodiments of the present disclosure. DETAILED DESCRIPTION
[0032] In order to make the objects, technical solutions and advantages of the embodiments of the present disclosure clearer, the technical solutions of the embodiments of the present disclosure will be described clearly and completely below with reference to the drawings. Obviously, the described embodiments are part of the embodiments of the present disclosure, rather than all the embodiments. Based on the described embodiments of the present disclosure, all other embodiments obtained by those skilled in the art without any creative effort also belong to the scope of protection of the present disclosure.
[0033] Unless otherwise defined, all terms (including technical and scientific terms) used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this present subject matter belongs. It will be further understood that terms, such as those defined in commonly used dictionaries, should be interpreted as having a meaning that is consistent with their meaning in the context of the specification and relevant art and will not be interpreted in an idealized or overly formal sense unless expressly so defined herein. As used herein, the statement that two or more parts are "connected" together shall mean that the parts are joined directly or via one or more intermediaries.
[0034] The phrase "embodiment" is mentioned in the present disclosure means that the specific features, structures or characteristics described in combination with the embodiment can be contained in at least one embodiment of the present application. The phrase "embodiment" appearing at various places in the specification does not necessarily refer to the same embodiment, nor is it an independent or alternative embodiment to other embodiments. It is explicitly and implicitly understood by those skilled in the art that the embodiments described in the present disclosure can be combined with other embodiments.
[0035] In addition, the terms "first", "second" and the like in the description and claims of the present disclosure or the above-mentioned drawings are used to distinguish different objects, and are not used to describe a specific order, and can explicitly or implicitly include one or more of the features.
[0036] The term "and / or" in the present disclosure is only a description of the association relationship of the associated objects, which means that there can be three relationships, for example, A and / or B, which can represent the three cases of existence of A, existence of A and B, and existence of B. In addition, the character " / " in this paper generally represents that the front and rear associated objects are a "or" relationship.
[0037] In the description of the present disclosure, unless otherwise specified, the meaning of "a plurality of" and "at least two" is two or more (including two), and similarly, "a plurality of groups" and "at least two groups" means two groups or more (including two groups).
[0038] In order to enable those skilled in the art to better understand the scheme of the present application, the technical solutions in the embodiments of the present application will be described clearly and completely in combination with the drawings.
[0039] Figure 1 A circuit schematic diagram of an error amplifier in an LDO provided by the prior art is shown in Figure 1 The error amplifier 10 includes a bias current source 11, a first field effect transistor PM1, a second field effect transistor PM2, a third field effect transistor PM3, a fourth field effect transistor PM4, a fifth field effect transistor PM5, a sixth field effect transistor PM6, a seventh field effect transistor NM1, an eighth field effect transistor NM2, a ninth field effect transistor NM3, a tenth field effect transistor NM4, and a compensation unit 12.
[0040] The first end of the first field effect transistor PM1 and the first end of the second field effect transistor PM2 are connected by the power supply voltage Vdd through the bias current source 11, the control end of the first field effect transistor PM1 is connected with the feedback voltage Vfb, the control end of the second field effect transistor PM2 is connected with the reference voltage Vref, the second end of the first field effect transistor PM1 is connected with the first end of the eighth field effect transistor NM2 and the second end of the tenth field effect transistor NM4, the second end of the second field effect transistor PM2 is connected with the first end of the seventh field effect transistor NM1 and the second end of the ninth field effect transistor NM3, the control end of the ninth field effect transistor NM3 is connected with the control end of the tenth field effect transistor NM4, the second end of the seventh field effect transistor NM1 and the second end of the fifth field effect transistor PM5, the first end of the ninth field effect transistor NM3 and the first end of the tenth field effect transistor NM4 are grounded.
[0041] The control end of the seventh field effect transistor NM1 is connected with the control end of the eighth field effect transistor NM2, the control end of the third field effect transistor PM3 is connected with the control end of the fourth field effect transistor PM4, the second end of the eighth field effect transistor NM2 is connected with the output end of the compensation unit 12, the output end of the error amplifier 10 and the second end of the sixth field effect transistor PM6. The control end of the fifth field effect transistor PM5 is connected with the control end of the sixth field effect transistor PM6, the first end of the fifth field effect transistor PM5 is connected with the second end of the third field effect transistor PM3, the first end of the sixth field effect transistor PM6 is connected with the second end of the fourth field effect transistor PM4, the first end of the third field effect transistor PM3 and the first end of the fourth field effect transistor PM4 are connected with the power supply voltage Vdd.
[0042] The bias current source 11 includes the eleventh field effect transistor PM7, the first end of the eleventh field effect transistor PM7 is connected with the power supply voltage Vdd, the second end of the eleventh field effect transistor PM7 is connected with the first end of the first field effect transistor PM1 and the first end of the second field effect transistor PM2, the bias current source 11 can provide bias current to the first field effect transistor PM1 and the second field effect transistor PM2.
[0043] The compensation unit 12 includes the compensation resistance Rc and the compensation capacitor Cc, wherein the first end of the compensation resistance Rc is connected with the output end of the error amplifier 10, the second end of the compensation resistance Rc is grounded through the compensation capacitor Cc. The compensation unit 12 can generate a main pole and a compensation zero to ensure the stability of the LDO operation, however, the error amplification voltage Veao output by the error amplifier 10 is quite different when the load is light and heavy, so when the output load of the LDO jumps from light load to heavy load, the error amplification voltage Veao will be pulled up, as shown in Figure 2 Figure 2 The waveform diagram of the error amplification voltage and the output voltage when the output load of the LDO provided by the prior art jumps from light load to heavy load.
[0044] Continuing to refer to Figure 2 When the output load of the LDO jumps from light load to heavy load, the voltage drop across the compensation capacitor Cc and the voltage drop across the compensation resistor Rc caused by the current injected into the compensation capacitor Cc superimpose to form an error amplifier voltage Veao that continues to rise until the error amplifier voltage Veao overshoots, at which time the current is no longer injected into the compensation capacitor Cc, and the voltage drop across the compensation resistor Rc caused by the current disappears, causing the error amplifier voltage Veao to drop. In the current application, the rate at which the load current jumps from light load to heavy load (0.1 A / μs) is not very fast, and during the short period of time when the error amplifier voltage Veao overshoots, the output voltage Vout of the LDO will have a certain voltage recovery.
[0045] Subsequently, the error amplifier voltage Veao fluctuates between overvoltage and undervoltage of the final steady-state voltage until it finally stabilizes at the steady-state voltage, while the output voltage Vout continues to drop and then rises after a period of time, causing the output voltage Vout to undershoot less than expected and perform worse.
[0046] For such a slow-rising load current jump with a long duration, dynamic current pulse compensation cannot be used for fast and steep load current jumps, because the current increment in a short period of time cannot really charge the compensation capacitor Cc, but only causes a voltage rise across the compensation resistor Rc. In the case of a long-time sustained increase in the load current, a single compensation current pulse cannot continue to function, and the output voltage Vout will continue to decrease, as shown in Figure 2 .
[0047] In related technologies, an adaptive approach can be used to increase the overall current or input pair tube quiescent current when the load current is large, to improve the undershoot of the output voltage Vout. However, this solution introduces additional and larger static losses and affects circuit stability.
[0048] Therefore, the present disclosure provides an error amplifier circuit, which includes an error amplifier, a current compensation module, and a voltage detection module. When the load of a linear regulator jumps from light load to heavy load, the voltage detection module determines whether the linear regulator satisfies a current compensation condition according to a differential voltage between a reference voltage and a feedback voltage. When the current compensation condition is satisfied, the current compensation module injects a compensation current into an output terminal of the error amplifier to compensate for the output voltage in the final convergence direction. When the current compensation condition is not satisfied, the current compensation module stops injecting the compensation current. In this way, the output voltage is compensated in the final convergence direction only when the output voltage undershoots too much during the jump from light load to heavy load, which can reduce the quiescent current to reduce circuit losses while ensuring circuit stability.
[0049] The technical solutions provided by the present disclosure are described in detail below with reference to several specific embodiments.
[0050] Figure 3 A schematic diagram of the structure of an error amplifier circuit provided by an embodiment of the present disclosure is shown in FIG. Figure 3 As shown, the error amplifying circuit 100 includes an error amplifier 110 , a current compensation module 120 and a voltage detection module 130 .
[0051] Among them, the first input terminal of the error amplifier 110 and the first input terminal of the voltage detection module 130 are connected to the feedback voltage Vfb, the second input terminal of the error amplifier 110 and the second input terminal of the voltage detection module 130 are connected to receive the reference voltage Vref, the output terminal of the error amplifier 110 is connected to the output terminal of the current compensation module 120, and the enable terminal of the current compensation module 120 is connected to the output terminal of the voltage detection module 130.
[0052] The error amplifier 110 is configured to receive a reference voltage Vref and a feedback voltage Vfb from the linear regulator and determine an amplified error voltage Veao between the reference voltage Vref and the feedback voltage Vfb. The voltage detection module 130 is configured to determine whether the linear regulator meets current compensation conditions based on the differential voltage between the reference voltage Vref and the feedback voltage Vfb when the output load of the linear regulator changes from a light load to a heavy load.
[0053] The current compensation module 120 is configured to, when the current compensation condition is met, inject the compensation current Ic into the output end of the error amplifier 110 to compensate the output voltage Vout of the linear regulator in a final convergence direction; when the current compensation condition is not met, stop injecting the compensation current Ic.
[0054] For example, Figure 4 A circuit diagram of an error amplifier circuit provided by an embodiment of the present disclosure is shown in FIG. Figure 4 As shown, the error amplifier 110 is connected to Figure 1 The circuit structure of the error amplifier 10 is the same as that of the error amplifier 10, which will not be described here in detail. Figure 1 The difference of the error amplifier 10 shown is that the control terminal of the fourth field effect transistor PM4 is also connected to the control terminal of the current compensation module 120 , and the second terminal of the eighth field effect transistor NM2 is also connected to the output terminal of the current compensation module 120 .
[0055] When the feedback voltage Vfb is less than the reference voltage Vref, the error amplified voltage Veao is pulled up. When the feedback voltage Vfb is greater than the reference voltage Vref, the error amplified voltage Veao is pulled down. When the linear regulator jumps from light load to heavy load, the output voltage Vout continues to drop, that is, the feedback voltage Vfb continues to drop. The feedback voltage Vfb will be less than the reference voltage Vref, and the error amplified voltage Veao will be pulled up. Figure 5 As shown,Figure 5 The waveform diagram of error amplification voltage and output voltage when the output load of the linear voltage regulator provided by the embodiment of the present disclosure jumps from light load to heavy load is shown.
[0056] As shown in Figure 4 The voltage detection module 130 includes a first transistor Q1, a second transistor Q2, a third transistor Q3, a fourth transistor Q4, a fifth transistor Q5, and a first resistor R1. The first end of the first transistor Q1 and the first end of the second transistor Q2 are connected to the power supply voltage Vdd, the control end of the first transistor Q1 is connected to the control end of the second transistor Q2, the second end of the first transistor Q1, and the second end of the third transistor Q3, and the second end of the second transistor Q2 is connected to the second end of the fourth transistor Q4 and the enable end of the current compensation module 120.
[0057] The control end of the third transistor Q3 is connected to the feedback voltage Vfb, the control end of the fourth transistor Q4 is connected to the reference voltage Vref, the first end of the fourth transistor Q4 is connected to the first end of the first resistor R1, the second end of the first resistor R1 is connected to the second end of the fifth transistor Q5 and the first end of the third transistor Q3, and the first end of the fifth transistor Q5 is connected to the ground.
[0058] The voltage detection module 130 internally generates a first current compensation threshold voltage Vr1, and the first current compensation threshold voltage Vr1 is related to the resistance value of the first resistor R1. The voltage detection module 130 can compare the sum of the first current compensation threshold voltage Vr1 and the feedback voltage Vfb with the reference voltage Vref, and generate a corresponding control signal Ctrl.
[0059] As shown in Figure 5 As the output voltage Vout continues to drop, the feedback voltage Vfb further decreases. During the drop of the output voltage Vout, when the feedback voltage Vfb has not yet decreased to a voltage lower than the reference voltage Vref by the first current compensation threshold voltage Vr1, Vfb>Vref-Vr1, i.e. Vfb+Vr1>Vref, the generated control signal Ctrl continues to be a non-enable signal such as a high-level signal. When the feedback voltage Vfb decreases to a voltage lower than the reference voltage Vref by the first current compensation threshold voltage Vr1, Vfb<Vref-Vr1, i.e. Vfb+Vr1<Vref, the generated control signal Ctrl is an enable signal EN, for example, a low-level signal.
[0060] Continuing to refer to Figure 4The current compensation module 120 comprises a current generating unit 121 and an output unit 122. An input end of the current generating unit 121 is connected to the power supply voltage Vdd. An output end of the current generating unit 121 is connected to the output end of the error amplifier 110 through the output unit 122. A control end of the current generating unit 121 is connected to the bias end of the error amplifier 110.
[0061] As shown in Figure 4 The current generating unit 121 comprises a seventh transistor Q7 and an eighth transistor Q8. The seventh transistor Q7 is connected to the power supply voltage Vdd. A second end of the seventh transistor Q7 is connected to the input end of the output unit 122 through the eighth transistor Q8. A control end of the seventh transistor Q7 is connected to the bias end of the error amplifier 110. The bias end of the error amplifier 110 is the control end of the bias current source 11.
[0062] The bias end of the error amplifier 110 can be connected to the control end of the third field effect transistor PM3 and the control end of the fourth field effect transistor PM3. The control end of the third field effect transistor PM3, the control end of the fourth field effect transistor PM3, the control end of the bias current source 11 and the control end of the seventh transistor Q7 receive a bias voltage. The control end of the eighth transistor Q8, the control end of the fifth field effect transistor PM3 and the control end of the sixth field effect transistor PM6 receive another bias voltage. The seventh transistor Q7 can generate a compensation current Ic based on the bias current output by the bias current source 11.
[0063] The output unit 122 comprises a ninth transistor Q9. A first end of the ninth transistor Q9 is connected to the output end of the current generating unit 121. A second end of the ninth transistor Q9 is connected to the output end of the error amplifier 110. A control end of the ninth transistor Q9 is connected to the output end of the voltage detection module 130.
[0064] When the control signal Ctrl is the enable signal EN, the ninth transistor Q9 is turned on to turn on the output end of the current generating unit 121 and the output end of the error amplifier 110. The compensation current Ic generated by the current generating unit 121 is injected into the output end of the error amplifier 110 to charge the output end of the error amplifier 110. At this time, when the feedback voltage Vfb is stabilized at a value higher than the reference voltage Vref by an offset, the entire error amplifier 110 can reach balance.
[0065] Therefore, compared with not increasing the error amplification voltage Veao of the current compensation module 120, the average fluctuation of the error amplification voltage Veao is higher after the current compensation module 120 is added. The output voltage Vout no longer continuously decreases, but remains stable and slowly rises, as shown in Figure 5 .
[0066] When the output voltage Vout rises to not satisfy the current compensation condition, the control signal Ctrl is a non-enable signal The ninth transistor Q9 is turned off to disconnect the output end of the current generating unit 121 and the output end of the error amplifier 110, and then the compensation current Ic generated by the current generating unit 121 stops being injected into the output end of the error amplifier 110. At this time, the error amplification voltage Veao and the output voltage Vout fall to a certain extent, wherein the error amplification voltage Veao falls due to the sudden decrease in the voltage difference when the current injected into the compensation capacitor Cc flows through the compensation resistor Rc, and finally the error amplification voltage Veao and the output voltage Vout tend to be stable.
[0067] Since the compensation current Ic is smaller than the total current of the branch itself, and during the undershoot of the output voltage Vout, the correction direction of the output voltage Vout by the current compensation module 120 is the direction of the final convergence voltage, that is, the compensation of the output voltage Vout in the final convergence direction, which realizes negative feedback, and therefore does not affect the stability of the circuit.
[0068] In summary, in the embodiment of the present disclosure, when the load of the linear voltage regulator jumps from light load to heavy load, the voltage detection module 130 determines whether the linear voltage regulator satisfies the current compensation condition according to the differential voltage of the reference voltage Vref and the feedback voltage Vfb, when the current compensation condition is satisfied, the current compensation module 120 injects the compensation current Ic into the output end of the error amplifier 110 to compensate the output voltage Vout in the final convergence direction, when the current compensation condition is not satisfied, the current compensation module 120 stops injecting the compensation current Ic, so that the compensation of the output voltage Vout in the final convergence direction is only performed when the output voltage Vout undershoots too much during the jump from light load to heavy load, which can reduce the static current and reduce the circuit loss while ensuring the stability of the circuit.
[0069] In some embodiments, the voltage detection module 130 is further configured to, during the rising process of the output voltage Vout, generate an enable signal EN when the sum of the feedback voltage Vfb and the second current compensation threshold voltage Vr2 is less than the reference voltage Vref; generate a non-enable signal Ctrl when the sum of the feedback voltage Vfb and the second current compensation threshold voltage Vr2 is greater than the reference voltage Vref. The second current compensation threshold voltage Vr2 is less than the first current compensation threshold voltage Vr1.
[0070] For example, Figure 6 Another circuit schematic diagram of an error amplification circuit provided by the embodiment of the present disclosure is as follows: Figure 6As shown, the voltage detection module 130 further includes a second resistor R2 and a sixth transistor Q6 , wherein the second resistor R2 and the sixth transistor Q6 are connected in parallel between the second end of the first resistor R1 and the second end of the fifth transistor Q5 .
[0071] During the decreasing process of the output voltage Vout, when the sum of the feedback voltage Vfb and the first current compensation threshold voltage Vr1 is less than the reference voltage Vref, the sixth transistor Q6 is turned on to short-circuit the second resistor R2. At this time, the current compensation threshold voltage generated within the voltage detection module 130 decreases from the first current compensation threshold voltage Vr1 to the second current compensation threshold voltage Vr2. The first current compensation threshold voltage Vr1 depends on the sum of the resistance values of the first resistor R1 and the second resistor R2, while the second current compensation threshold voltage Vr2 depends on the resistance value of the first resistor R1.
[0072] Since the compensation current Ic is injected into the output terminal of the error amplifier 110 at this time, the output voltage Vout begins to rise. During the process of the output voltage Vout rising, the voltage detection module 130 compares the sum of the second current compensation threshold voltage Vr2 and the feedback voltage Vfb with the reference voltage Vref and generates a corresponding control signal Ctrl.
[0073] During the rising process of the output voltage Vout, when the feedback voltage Vref has not yet risen to a voltage lower than the reference voltage Vref by the second current compensation threshold voltage Vr2, Vfb <Vref-Vr2,即Vfb+Vr2<Vref,生成的控制信号Ctrl持续为使能信号EN。
[0074] When the feedback voltage Vfb rises to a voltage lower than the reference voltage Vref by the second current compensation threshold voltage Vr2, Vfb>Vref-Vr2, that is, Vfb+Vr2>Vref, the generated control signal Ctrl is a non-enable signal. At this time, the sixth transistor Q6 is turned off to connect to the second resistor R2, and the current compensation threshold voltage generated inside the voltage detection module 130 increases from the second current compensation threshold voltage Vr2 to the first current compensation threshold voltage Vr1, so as to continue to judge whether the current compensation condition is met when the output voltage Vout drops next time.
[0075] It should be noted that the third transistor Q3 and the fourth transistor Q4 must be matched to avoid the voltage detection module 130 outputting the enable signal EN when the feedback voltage Vfb is equal to or slightly higher than the reference voltage Vref. If this happens, a positive feedback loop will be formed, causing the output voltage Vout to oscillate.
[0076] In the embodiments of the present disclosure, during the rising process of the output voltage Vout, when the sum of the feedback voltage Vfb and the second current compensation threshold voltage Vr2 is less than the reference voltage Vref, the voltage detection module 130 generates the enable signal EN, and when the sum of the feedback voltage Vfb and the second current compensation threshold voltage Vr2 is greater than the reference voltage Vref, the voltage detection module 130 generates the disable signal Since the second current compensation threshold voltage Vr2 is less than the first current compensation threshold voltage Vr1, a hysteresis voltage can be generated in the voltage detection module 130, so as to avoid the output voltage Vout from rising again when it is corrected, and the control signal Ctrl repeatedly jumps between the disable signal and the enable signal EN, thereby reducing the undershoot amplitude of the output voltage Vout, and improving the correction effect of the undershoot of the output voltage Vout.
[0077] In some embodiments, still referring to Figure 6 , the voltage detection module 130 further includes a first inverter INV1, a second inverter INV2, and a Schmitt trigger 131. The input end of the Schmitt trigger 131 is connected to the second end of the second transistor Q2 and the second end of the fourth transistor Q4, the output end of the Schmitt trigger 131 is connected to the input end of the second inverter INV2 through the first inverter INV1, and the output end of the second inverter INV2 is connected to the enable end of the current compensation module 120.
[0078] For example, the control end of the sixth transistor Q6 is connected to the output end of the first inverter INV1 and the input end of the second inverter INV2, and the sixth transistor Q6 is an NMOS.
[0079] During the falling process of the output voltage Vout, when the sum of the feedback voltage Vfb and the first current compensation threshold voltage Vr1 is greater than the reference voltage Vref, the input end of the Schmitt trigger 131 is at a high level, and the output end of the first inverter INV2 is at a low level, so that the sixth transistor Q6 is turned off. When the sum of the feedback voltage Vfb and the first current compensation threshold voltage Vr1 is less than the reference voltage Vref, the input end of the Schmitt trigger 131 is at a low level, and the output end of the first inverter INV2 is at a high level, so that the sixth transistor Q6 is turned on.
[0080] During the rising process of the output voltage Vout, when the sum of the feedback voltage Vfb and the second current compensation threshold voltage Vr2 is greater than the reference voltage Vref, the input end of the Schmitt trigger 131 is at a high level, and the output end of the first inverter INV2 is at a low level, so that the sixth transistor Q6 is turned off. When the sum of the feedback voltage Vfb and the second current compensation threshold voltage Vr2 is less than the reference voltage Vref, the input end of the Schmitt trigger 131 is at a low level, and the output end of the first inverter INV2 is at a high level, so that the sixth transistor Q6 is turned on.
[0081] The embodiments of the present disclosure also provide a linear voltage regulator, comprising any error amplifier circuit 100 provided by the above embodiments.
[0082] For example, the linear voltage regulator can be an LDO, and the linear voltage regulator comprises the error amplifier circuit 100, a feedback network and a power transistor, wherein the feedback network is connected between an output terminal of the linear voltage regulator and a ground, and the power transistor is connected between an input terminal and the output terminal of the linear voltage regulator. A first input terminal of the error amplifier circuit 100 is connected to an output terminal of the feedback network, a second input terminal of the error amplifier circuit 100 is connected to a reference voltage Vref, and an output terminal of the error amplifier circuit 100 is connected to a control terminal of the power transistor.
[0083] The linear voltage regulator provided by the embodiments of the present disclosure comprises the error amplifier circuit 100 provided by any of the above embodiments, has the same functional modules and beneficial effects as the error amplifier circuit 100, and thus will not be described here.
[0084] Unless otherwise explicitly indicated in the context, the singular form of the words used herein and in the appended claims includes the plural, and vice versa. Thus, when referring to the singular, the plural of the corresponding term is generally included. Similarly, the expressions "comprise" and "include" are to be interpreted as inclusive rather than exclusive. Likewise, the terms "include" and "or" should be interpreted as inclusive, unless explicitly prohibited from such interpretation in the context. Where the term "example" is used in the present text, the "example" is merely an illustrative and explanatory one, and should not be considered as exclusive or extensive.
[0085] The above describes several embodiments of the present disclosure in detail, but it is obvious that those skilled in the art can make various modifications and variations to the embodiments of the present disclosure without departing from the spirit and scope of the present disclosure. The protection scope of the present disclosure is defined by the appended claims.
Claims
1. An error amplifier circuit for a linear voltage regulator, characterized in that: Including error amplifier, current compensation module and voltage detection module; The error amplifier is configured to receive a reference voltage and a feedback voltage of the linear regulator and determine an error amplified voltage between the reference voltage and the feedback voltage; The voltage detection module is configured to determine whether the linear regulator meets the current compensation condition according to the differential voltage between the reference voltage and the feedback voltage when the output load of the linear regulator jumps from a light load to a heavy load; The current compensation module is configured to, when the current compensation condition is met, inject a compensation current into the output terminal of the error amplifier to compensate the output voltage of the linear regulator in a final convergence direction; When the current compensation condition is not met, injecting the compensation current is stopped.
2. The error amplifier circuit according to claim 1, wherein: The voltage detection module is further configured to generate an enable signal when the sum of the feedback voltage and the first current compensation threshold voltage is less than the reference voltage during the decrease of the output voltage of the linear regulator; When the sum of the feedback voltage and the first current compensation threshold voltage is greater than the reference voltage, a disable signal is generated.
3. The error amplifier circuit according to claim 2, wherein: The voltage detection module includes a first transistor, a second transistor, a third transistor, a fourth transistor, a fifth transistor and a first resistor; The first end of the first transistor and the first end of the second transistor are connected to a power supply voltage, the control end of the first transistor is connected to the control end of the second transistor, the second end of the first transistor and the second end of the third transistor, and the second end of the second transistor is connected to the second end of the fourth transistor and the enable end of the current compensation module; The control end of the third transistor is connected to the feedback voltage, the control end of the fourth transistor is connected to the reference voltage, the first end of the fourth transistor is connected to the first end of the first resistor, the second end of the first resistor is connected to the second end of the fifth transistor and the first end of the third transistor, and the first end of the fifth transistor is grounded.
4. The error amplifier circuit according to claim 3, wherein: The voltage detection module is further configured to generate the enable signal when the sum of the feedback voltage and the second current compensation threshold voltage is less than the reference voltage during the rising process of the output voltage; When the sum of the feedback voltage and the second current compensation threshold voltage is greater than the reference voltage, the disable signal is generated; and the second current compensation threshold voltage is less than the first current compensation threshold voltage.
5. The error amplifier circuit according to claim 4, wherein: The voltage detection module further includes a second resistor and a sixth transistor; The second resistor and the sixth transistor are connected in parallel between the second end of the first resistor and the second end of the fifth transistor; The sixth transistor is configured to short-circuit the second resistor when the sum of the feedback voltage and the first current compensation threshold voltage is less than the reference voltage during the decrease of the output voltage; and to connect the second resistor when the sum of the feedback voltage and the second current compensation threshold voltage is greater than the feedback voltage during the increase of the output voltage.
6. The error amplifier circuit according to claim 3, wherein: The voltage detection module further includes a first inverter, a second inverter and a Schmitt trigger; The input end of the Schmitt trigger is connected to the second end of the second transistor and the second end of the fourth transistor, the output end of the Schmitt trigger is connected to the input end of the second inverter through the first inverter, and the output end of the second inverter is connected to the enable end of the current compensation module.
7. The error amplifier circuit according to claim 2, wherein: The current compensation module includes a current generating unit and an output unit; The input end of the current generating unit is connected to the power supply voltage, the output end of the current generating unit is connected to the output end of the error amplifier through the output unit, and the control end of the current generating unit is connected to the bias end of the error amplifier; The current generating unit is configured to generate the compensation current according to the bias current of the error amplifier; The output unit is configured to, when receiving the enable signal, inject the compensation current into the output terminal of the error amplifier; and when receiving the disable signal, stop injecting the compensation current into the output terminal of the error amplifier.
8. The error amplifier circuit according to claim 7, wherein: The current generating unit includes a seventh transistor and an eighth transistor; A first terminal of the seventh transistor is connected to the power supply voltage, a second terminal of the seventh transistor is connected to the input terminal of the output unit through the eighth transistor, and a control terminal of the seventh transistor is connected to the bias terminal of the error amplifier; The output unit includes a ninth transistor, a first end of the ninth transistor is connected to the output end of the current generating unit, a second end of the ninth transistor is connected to the output end of the error amplifier, and a control end of the ninth transistor is connected to the output end of the voltage detection module.
9. The error amplifier circuit according to any one of claims 1 to 8, wherein: The error amplifier includes a bias current source, a first field effect transistor, a second field effect transistor, a third field effect transistor, a fourth field effect transistor, a fifth field effect transistor, a sixth field effect transistor, a seventh field effect transistor, an eighth field effect transistor, a ninth field effect transistor, a tenth field effect transistor and a compensation unit; The power supply voltage is connected to the first end of the first field-effect transistor and the first end of the second field-effect transistor through the bias current source, the control end of the first field-effect transistor is connected to the feedback voltage, the control end of the second field-effect transistor is connected to the reference voltage, the second end of the first field-effect transistor is connected to the first end of the eighth field-effect transistor and the second end of the tenth field-effect transistor, the second end of the second field-effect transistor is connected to the first end of the seventh field-effect transistor and the second end of the ninth field-effect transistor, the control end of the ninth field-effect transistor is connected to the control end of the tenth field-effect transistor, the second end of the seventh field-effect transistor, and the second end of the fifth field-effect transistor, and the first end of the ninth field-effect transistor and the first end of the tenth field-effect transistor are grounded; The control end of the seventh field effect transistor is connected to the control end of the eighth field effect transistor, the control end of the third field effect transistor is connected to the control end of the fourth field effect transistor and the control end of the current compensation module, and the second end of the eighth field effect transistor is connected to the output end of the compensation unit, the output end of the error amplifier, the output end of the current compensation module, and the second end of the sixth field effect transistor; The control end of the fifth field effect transistor is connected to the control end of the sixth field effect transistor, the first end of the fifth field effect transistor is connected to the second end of the third field effect transistor, the first end of the sixth field effect transistor is connected to the second end of the fourth field effect transistor, and the first end of the third field effect transistor and the first end of the fourth field effect transistor are connected to the power supply voltage.
10. A linear voltage regulator, characterized in that: The invention comprises the error amplifier circuit according to any one of claims 1 to 9.