Metal bump thinning method and TEM sample preparation method

Abstract

The invention provides a metal bump thinning method and a TEM sample preparation method, and belongs to the field of semiconductor manufacturing, and the method comprises the steps: providing a substrate with a passivation layer and a metal bump; forming a protective adhesive layer on the passivation layer, the protective adhesive layer at least covering the contact position of the metal bump and the passivation layer, and exposing the protective adhesive layer from the top surface of the metal bump; and removing partial thickness of the metal bump by adopting a wet etching process. Before wet etching, the protection adhesive layer is formed on the passivation layer, the protection adhesive layer can protect the contact position of the metal bump and the passivation layer, and the phenomenon that when the metal bump is etched, an etching agent drills into the passivation layer from the contact position of the metal bump and the passivation layer to corrode the internal structure of the passivation layer is avoided; protecting the morphology of the original defect on the chip sample; and then TEM sample preparation is carried out, and a sample preparation protection layer can be well formed on the side wall of the metal bump, so that the sample preparation success rate is improved, and meanwhile, the problem of sample modification dislocation can be avoided.

Description

Technical Field

[0001] The present application relates to the field of semiconductor technology, and in particular to a method for thinning a metal bump and a TEM sample preparation method. Background Art

[0002] Chip failure is inevitable during the development, production and use of the chip. As people's requirements for product quality and reliability continue to increase, failure analysis is becoming more and more important. Chip failure analysis can help designers find design defects, mismatches in process parameters, or improper design and operation.

[0003] Flip chip technology is mainly divided into two categories. One is soldering reflow solder balls. Although lead-free soldering materials are already very mature, the solder becomes liquid at high temperatures, which may cause bridging between adjacent solder bumps and is not suitable for fine-pitch flip chip applications; the other is bonding through non-reflowable columnar metal bumps, in which the metal bumps are electrically connected to the substrate through hot press soldering or anisotropic conductive adhesive.

[0004] Failure analysis of flip-chips revealed defects often occurring at the wafer's edge, located between two adjacent metal bumps. OM (Optical Microscope) observation revealed a purple-red, irregular shape, and contact with the edge of the metal bump. Scanning Electron Microscope (SEM) observation revealed no defects in the chip's surface passivation layer, confirming the defect's location beneath the passivation layer. Because the extent and initial location of the defect are uncertain during failure analysis of such chips, direct TEM (Transmission Electron Microscope) sampling and cross-sectional morphology observation is optimal. However, due to the high height of the flip-chip metal bumps, sample preparation is challenging and the success rate is low. Summary of the Invention

[0005] In view of this, the embodiments of the present application are dedicated to providing a metal bump thinning method and a TEM sample preparation method to solve the problems of existing chip metal bumps being too high, resulting in difficulty in TEM sample preparation and low success rate.

[0006] On one hand, the present application provides a method for thinning a metal bump, comprising: Providing a substrate, wherein the substrate has a passivation layer and a metal bump, wherein the passivation layer is located on the substrate, and the metal bump is located on the passivation layer and extends into the passivation layer; forming a protective adhesive layer on the passivation layer, wherein the protective adhesive layer at least covers the contact position between the metal bump and the passivation layer, and the top surface of the metal bump is exposed from the protective adhesive layer; and A wet etching process is used to remove part of the thickness of the metal bump.

[0007] In some embodiments, a liquid protective adhesive is laid on the passivation layer, and the liquid protective adhesive is cured to form the protective adhesive layer, which also covers the top surface of the passivation layer.

[0008] In some embodiments, after the liquid protective adhesive is cured, the protective adhesive layer covers the top surface of the passivation layer and the sidewalls and top surface of the metal bump, and the protective adhesive layer is ground until the top surface of the metal bump is exposed.

[0009] In some embodiments, the protective adhesive layer is ground along the arrangement direction of the metal bumps.

[0010] In some embodiments, before grinding the protective rubber layer, the protective rubber layer is dipped in a solvent and wiped to planarize the protective rubber layer.

[0011] In some embodiments, the step of laying a liquid protective adhesive on the passivation layer and curing the liquid protective adhesive comprises: Placing the substrate on a heating platform for heating, placing solid hot melt adhesive particles on the passivation layer, and melting the hot melt adhesive particles to form liquid hot melt adhesive; The substrate is removed from the heating platform, and the liquid hot melt adhesive is solidified upon cooling to form the protective adhesive layer; Alternatively, the step of laying a liquid protective adhesive on the passivation layer and curing the liquid protective adhesive comprises: dripping liquid thermosetting glue or liquid photosensitive glue on the passivation layer; The liquid thermosetting adhesive is heated or the liquid photosensitive adhesive is irradiated with special light to solidify the liquid thermosetting adhesive or the liquid photosensitive adhesive to form the protective adhesive layer.

[0012] In some embodiments, the passivation layer comprises a metal interconnection layer and a metal adhesion layer, the metal adhesion layer is located on the metal interconnection layer, and the metal bump is located on the metal interconnection layer.

[0013] In some embodiments, after a portion of the thickness of the metal bump is removed by a wet etching process, the remaining thickness of the metal bump is 0.2 μm to 2 μm.

[0014] Some embodiments of the present application further provide a TEM sample preparation method, comprising: Provide chip samples to be analyzed; thinning the metal bumps of the chip sample using the metal bump thinning method; and The protective adhesive layer is removed, and the chip sample is subjected to TEM sample preparation.

[0015] In some embodiments, the step of preparing the chip sample for TEM comprises: forming a sample preparation protection layer in a target area of ​​the chip sample, wherein the sample preparation protection layer covers the top surface and sidewalls of the metal bumps in the target area and covers the top surface of the passivation layer in the target area; Grooving downwards from both sides of the sample preparation protective layer to form grooves extending into the chip sample; Cutting the target area from the chip sample to form a TEM sample; and The TEM specimen is trimmed to form a TEM sample.

[0016] The metal bump thinning method and TEM sample preparation method provided in the present application include providing a substrate having a passivation layer and a metal bump, the passivation layer being located on the substrate, and the metal bump being located on the passivation layer and extending into the passivation layer; forming a protective adhesive layer on the passivation layer, the protective adhesive layer at least covering the contact position between the metal bump and the passivation layer, and the top surface of the metal bump exposing the protective adhesive layer; and using a wet etching process to remove part of the thickness of the metal bump. The unexpected effect of the present application is: before wet etching to remove part of the thickness of the metal bump, a protective glue layer is first formed on the passivation layer, and the protective glue layer can protect the contact position between the metal bump and the passivation layer, thereby preventing the etchant from penetrating into the interior of the passivation layer from the contact position between the metal bump and the passivation layer when etching the metal bump, corroding the internal structure of the passivation layer, and protecting the morphology of the original defects on the chip sample; after thinning the metal bump and then performing TEM sampling, the sampling protection layer can be better formed on the side wall of the metal bump, thereby improving the success rate of sampling; at the same time, the height difference between the metal bump and the top surface of the passivation layer is reduced, which can avoid the problem of sample repair misalignment. BRIEF DESCRIPTION OF THE DRAWINGS

[0017] Figure 1 A partial schematic diagram of the chip sample to be analyzed under an optical microscope.

[0018] Figure 2 Schematic diagram of the sample preparation protective layer under a scanning electron microscope.

[0019] Figure 3 Schematic diagram of the groove under a scanning electron microscope.

[0020] Figure 4Schematic diagram of part of the film layer under the metal bump.

[0021] Figure 5 This is a partial schematic diagram of the chip sample after being immersed in the etchant under an optical microscope.

[0022] Figure 6 Schematic diagram of the new defect under a scanning electron microscope.

[0023] Figure 7 This is a flow chart of a method for thinning a metal bump provided in one embodiment of the present application.

[0024] Figure 8 A schematic diagram of the structure of a chip sample provided in one embodiment of the present application.

[0025] Figure 9 A schematic diagram of a structure for forming a protective adhesive layer on a passivation layer according to an embodiment of the present application.

[0026] Figure 10 A schematic diagram of solid hot melt adhesive particles under an optical microscope provided in one embodiment of the present application.

[0027] Figure 11 A schematic diagram of a local metal bump under an optical microscope provided in accordance with an embodiment of the present application.

[0028] Figure 12 This is a schematic diagram of a metal bump provided in an embodiment of the present application after a wet etching process.

[0029] Figure 13 This is a schematic diagram of a metal bump after a wet etching process under an optical microscope provided in one embodiment of the present application.

[0030] Figure 14 This is a flow chart of a TEM sample preparation method provided in one embodiment of the present application.

[0031] Figure 15 A schematic diagram of a chip sample after removing the protective adhesive layer provided in an embodiment of the present application.

[0032] Figure 16 A schematic diagram of cutting grooves downward from both sides of a sample preparation protective layer provided in one embodiment of the present application.

[0033] Figure 17 for Figure 16 A partially enlarged schematic diagram of the groove in .

[0034] Wherein, the accompanying drawings are marked as follows: 100 - substrate; 101 - first metal bump; 201 - metal bump; 102 - first metal adhesion layer; 202 - metal adhesion layer; 103 - first metal interconnection layer; 203 - metal interconnection layer; 200 - passivation layer; 300 - protective adhesive layer; 301 - hot melt adhesive particles. DETAILED DESCRIPTION

[0035] Currently, when preparing TEM samples, the chip sample to be analyzed will first be used to determine the target area (area to be analyzed) through an optical microscope and undergo preliminary processing. Figure 1 This is a partial schematic diagram of the chip sample to be analyzed under an optical microscope. Figure 1 The rectangular block in the figure is the location of the first metal bump, and the purple area is the location of the defect. This allows us to determine the target area in the chip sample (the location of the defect and the area adjacent to the defect in the first metal bump).

[0036] Afterwards, a focused ion beam (FIB) is used to form a sample preparation protection layer on the target area. The sample preparation protection layer needs to better cover the sidewalls and top surface of the first metal bump and the passivation layer on the chip surface. Figure 2 Schematic diagram of the protective layer of the sample preparation under a scanning electron microscope. Figure 2 As can be seen from the figure, due to the high height of the first metal bump, the focused ion beam cannot form a sample preparation protection layer on the sidewall of the first metal bump, resulting in the sidewall of the first metal bump being unable to be protected, which in turn leads to sample preparation failure.

[0037] Next, under the protection of the sample preparation protective layer, a focused ion beam is used to cut an opening into the chip sample to form a groove. Figure 3 is a schematic diagram of the groove under a scanning electron microscope, as shown in Figure 3 As shown in the figure, due to the excessive height of the first metal bump, the height difference between the top surface of the first metal bump and the passivation layer on the chip surface is too large, and the hardness of the metal is much greater than that of the passivation layer. The ion beam has different etching ratios on the first metal bump and the passivation layer, resulting in misalignment of the sidewalls of the groove during cutting ( Figure 3 The dotted lines in the figure show that the sidewalls of the groove are not parallel and have misalignment), which leads to an ion beam curtain effect in the cross-sectional morphology of the groove, thereby affecting the contact position between the first metal bump and the passivation layer ( Figure 3 Observation of the original morphology of the dotted circle in the figure.

[0038] Before TEM sample preparation, a portion of the thickness of the first metal bump can be removed by a wet etching process. For example, if the material of the first metal bump is gold, the chip sample to be analyzed can be immersed in an etchant for about 15 minutes to remove a portion of the thickness of the first metal bump. Figure 4is a schematic diagram of a portion of the film layer below the first metal bump 101, as shown in Figure 4 As shown, there is usually a first metal adhesion layer 102 and a first metal interconnection layer 103 under the first metal bump 101. The first metal bump 101 is located on the first metal adhesion layer 102, and the first metal adhesion layer 102 is located on the first metal interconnection layer 103. The material of the first metal adhesion layer 102 can usually be tungsten (W), and the material of the first metal interconnection layer 103 is usually aluminum (AL). When the first metal adhesion layer 102 has defects such as holes or holes, the wet etching etchant will be along the contact position between the first metal bump 101 and the first metal adhesion layer 102 ( Figure 4 The chip sample is drilled into the first metal adhesion layer 102 (as indicated by the arrow), and then passes through the defects of the first metal adhesion layer 102 and reacts with the first metal interconnection layer 103, causing new defects in the first metal interconnection layer 103 and destroying the morphology of the original defects of the chip sample. Figure 5 This is a partial schematic diagram of a chip sample after being immersed in an etchant under an optical microscope. Figure 6 Schematic diagram of the new defect under scanning electron microscope, Figure 5 and Figure 6 As shown, after the chip sample to be analyzed is immersed in the etchant, new defects are generated in the first metal interconnection layer 103 ( Figure 5 and Figure 6 The original defect morphology of the chip sample is destroyed (as shown by the dotted circle in the figure). In addition, since the wet etching process is usually isotropic, even shortening the etching time cannot safely protect the original defect morphology of the chip sample.

[0039] Based on this, the present application provides a method for thinning a metal bump and a TEM sample preparation method, including providing a substrate having a passivation layer and a metal bump, the passivation layer being located on the substrate, and the metal bump being located on the passivation layer and extending into the passivation layer; forming a protective adhesive layer on the passivation layer, the protective adhesive layer at least covering the contact position between the metal bump and the passivation layer, and the top surface of the metal bump exposing the protective adhesive layer; and using a wet etching process to remove part of the thickness of the metal bump. Before wet etching to remove part of the thickness of the metal bump, the present application first forms a protective adhesive layer on the passivation layer. The protective adhesive layer can protect the contact position between the metal bump and the passivation layer, and prevent the etchant from penetrating into the passivation layer from the contact position between the metal bump and the passivation layer when etching the metal bump, thereby corroding the internal structure of the passivation layer and protecting the morphology of the original defects on the chip sample. After thinning the metal bump, TEM sampling is performed, and a sampling protection layer can be better formed on the side wall of the metal bump, thereby improving the success rate of sampling. At the same time, the height difference between the metal bump and the top surface of the passivation layer is reduced, which can avoid the problem of sample repair misalignment.

[0040] The following will be combined with the drawings in the embodiments of this application to clearly and completely describe the technical solutions in the embodiments of this application. Obviously, the embodiments described are only part of the embodiments of this application, not all of the embodiments. Based on the embodiments in this application, all other embodiments obtained by ordinary technicians in this field without making creative efforts are within the scope of protection of this application.

[0041] An embodiment of the present application provides a method for thinning a metal bump. Figure 7 This is a flow chart of a method for thinning a metal bump provided in one embodiment of the present application, as shown in FIG. Figure 7 As shown, the metal bump thinning method includes: Step S100: providing a substrate, wherein the substrate has a passivation layer and metal bumps, wherein the passivation layer is located on the substrate, and the metal bumps are located on the passivation layer and extend into the passivation layer; Step S200: forming a protective adhesive layer on the passivation layer, wherein the protective adhesive layer at least covers the contact position between the metal bump and the passivation layer, and the top surface of the metal bump is exposed from the protective adhesive layer; and Step S300: removing a portion of the thickness of the metal bump by a wet etching process.

[0042] Figures 8 to 13 The schematic diagram of the structure corresponding to the corresponding steps of the metal bump thinning method provided in one embodiment of the present application is shown below. Figures 8 to 13 A method for thinning a metal bump provided in an embodiment of the present application is described in detail.

[0043] Figure 8 This is a schematic diagram of the structure of a chip sample provided in one embodiment of the present application. Figure 8 As shown, step S100 is performed to provide a substrate 100. The material of the substrate 100 can be selected from silicon, silicon-on-insulator, germanium, silicon-germanium, or germanium-on-insulator. Various device structures can be formed in and / or on the substrate 100. For example, trench isolation structures, source-drain regions, and well regions can be formed in the substrate 100, and gate structures, capacitor structures, etc. can be formed on the substrate 100. The substrate 100 has a passivation layer 200 and metal bumps 201. The passivation layer 200 is located on the substrate 100 and on the surface of the chip sample to protect the internal structure of the chip sample. The metal bumps 201 are located on the passivation layer 200 and extend into the passivation layer 200. Of course, other film layers can also be present between the substrate 100 and the passivation layer 200, but the passivation layer 200 should be located on the top surface of the chip sample, and a portion of the metal bumps 201 is located on the passivation layer 200, while another portion extends into the passivation layer 200.

[0044] Please continue reading Figure 8The passivation layer 200 further includes a metal interconnect layer 203 and a metal adhesion layer 202. The metal adhesion layer 202 is located on the metal interconnect layer 203, and the metal bump 201 is located on the metal adhesion layer 202. The metal interconnect layer 203 and the metal bump 201 are interconnected by the metal adhesion layer 202. In some embodiments, the passivation layer 200 can have a single-layer structure or a multi-layer structure. Other film layers can also be formed in the passivation layer 200, depending on the specific structure of the chip sample. Examples are not provided here.

[0045] Figure 9 FIG. 1 is a schematic diagram of a structure of forming a protective adhesive layer 300 on a passivation layer 200 according to an embodiment of the present application. Figure 9 As shown, step S200 is performed to form a protective adhesive layer 300 on the passivation layer 200. The protective adhesive layer 300 needs to at least cover the contact position between the metal bump 201 and the passivation layer 200, while the top surface of the metal bump 201 needs to be exposed from the protective adhesive layer 300. In some embodiments, the protective adhesive layer 300 can simultaneously cover the top surface of the passivation layer 200 and the contact position between the metal bump 201 and the passivation layer 200, thereby simplifying the manufacturing process. In other words, the protective adhesive layer 300 covers the passivation layer 200 and has a certain thickness to cover the contact position between the metal bump 201 and the passivation layer 200.

[0046] It is understandable that the top surface of the protective adhesive layer 300 can be lower than the top surface of the metal bump 201 or flush with the top surface of the metal bump 201, so that the top surface of the metal bump 201 is exposed from the protective adhesive layer 300; of course, the top surface of the protective adhesive layer 300 can also be higher than the top surface of the metal bump 201, and the top surface of the metal bump 201 can be exposed by grooves in the top surface of the protective adhesive layer 300.

[0047] In some embodiments, a liquid protective adhesive can be applied on the passivation layer 200. After the liquid protective adhesive solidifies, a protective adhesive layer 300 is formed. Because the liquid protective adhesive is highly fluid, when applied on the passivation layer 200, the liquid protective adhesive flows onto the passivation layer 200, rather than being confined to the contact areas between the metal bumps 201 and the passivation layer 200. Therefore, after the protective adhesive layer 300 is formed, the protective adhesive layer 300 covers the top surface of the passivation layer 200 and the contact areas between the metal bumps 201 and the passivation layer 200.

[0048] The liquid protective adhesive can be liquid hot melt adhesive, liquid thermosetting adhesive or liquid photosensitive adhesive (UV adhesive), that is, the material of the protective adhesive layer 300 can be hot melt adhesive, thermosetting adhesive and photosensitive adhesive, but it should not be limited to this. The material of the protective adhesive layer 300 can also be other adhesive materials that have both solid and liquid states and the two states can be converted into each other.

[0049] Furthermore, when laying the liquid protective glue on the passivation layer 200, in order to ensure that after the liquid protective glue is cured, the top surface of the metal bump 201 is exposed to the protective glue layer 300, the amount of the liquid protective glue can be precisely controlled so that the top surface of the formed protective glue layer 300 is lower than the top surface of the metal bump 201 or is flush with the top surface of the metal bump 201.

[0050] In some embodiments, a certain amount of liquid protective adhesive can be applied to the passivation layer 200 based on experience. After the liquid protective adhesive cures, the protective adhesive layer 300 can cover the top surface of the passivation layer 200 and the sidewalls and top surface of the metal bumps 201. The protective adhesive layer 300 can then be polished to expose the top surface of the metal bumps 201. This eliminates the need to precisely control the amount of liquid protective adhesive, simplifying the manufacturing process.

[0051] Optionally, when grinding the protective rubber layer 300, the protective rubber layer 300 can be ground along the arrangement direction of the metal bumps 201. In this way, the ground metal will be embedded in the protective rubber layer 300 due to its ductility to prevent the protective rubber layer 300 from being further ground. At the same time, the protective rubber layer 300 is not easily carried away by the grinding liquid.

[0052] In some embodiments, before grinding the protective rubber layer 300, a cotton swab or other tool can be used to dip into a solvent and wipe the protective rubber layer 300 back and forth. The protective rubber layer 300 will be diluted after contact with the solvent. After wiping the protective rubber layer 300 back and forth, the protective rubber layer 300 can be more uniform and flat, so that the protective rubber layer 300 is flattened, which is beneficial to the subsequent grinding process.

[0053] In some embodiments, the solvent may be an organic solvent such as acetone or alcohol, which will not be described one by one here.

[0054] Next, the specific steps of forming the protective adhesive layer 300 on the passivation layer 200 will be described in detail by taking the liquid protective adhesive as liquid hot melt adhesive as an example.

[0055] Figure 10 This is a schematic diagram of solid hot melt adhesive particles under an optical microscope provided in one embodiment of the present application. Figure 10As shown, substrate 100 is first placed on a heating table and heated. Then, solid hot melt adhesive particles 301 are placed on substrate 100 and heated together. The hot melt adhesive particles 301 melt to form liquid hot melt adhesive (the liquid hot melt adhesive at this time is the liquid protective adhesive). The liquid hot melt adhesive flows until it at least covers the top surface of passivation layer 200 and the contact points between metal bumps 201 and passivation layer 200. Substrate 100 is removed from the heating table, and the liquid hot melt adhesive is pre-cooled and rapidly solidifies, forming protective adhesive layer 300. It is understood that due to the large number of hot melt adhesive particles 301 and the relatively thick protective adhesive layer 300, the protective adhesive layer 300 covers the top surface of passivation layer 200 and the contact points between metal bumps 201 and passivation layer 200, and also covers the top surface of metal bumps 201. At this time, the top surface of metal bumps 201 is not exposed outside the protective adhesive layer 300.

[0056] Next, use a cotton swab dipped in acetone solvent and wipe the protective adhesive layer 300 back and forth to make the surface of the protective adhesive layer 300 more flat; then, along the arrangement direction of the metal bumps 201 ( Figure 10 The protective glue layer 300 is ground (in the direction indicated by the arrow) until the top surface of the metal bump 201 is exposed. Figure 11 A schematic diagram of a local metal bump under an optical microscope provided in one embodiment of the present application, from Figure 11 As can be seen in the figure, after grinding the protective glue layer 300, the top surface of the metal bump 201 is exposed from the protective glue layer 300, and the protective glue layer 300 can still well protect the top surface of the passivation layer 200 and the contact position between the metal bump 201 and the passivation layer 200.

[0057] Of course, in some embodiments, if there are fewer hot melt adhesive particles 301, the protective adhesive layer 300 will also be thinner. The protective adhesive layer 300 can cover the top surface of the passivation layer 200 and the contact position between the metal bump 201 and the passivation layer 200, but does not cover the top surface of the metal bump 201. At this time, the top surface of the metal bump 201 can expose the protective adhesive layer 300, thereby omitting the wiping and grinding steps.

[0058] In some embodiments, the liquid protective adhesive may also be a liquid thermosetting adhesive or a liquid photosensitive adhesive. In this case, the liquid thermosetting adhesive or liquid photosensitive adhesive may be first dripped onto the substrate, covering at least the top surface of the passivation layer 200 and the contact areas between the metal bumps 201 and the passivation layer 200 (and of course, also covering the top surfaces of the metal bumps 201). Next, the liquid thermosetting adhesive or liquid photosensitive adhesive may be heated or irradiated with special light (such as ultraviolet light) to cure the liquid thermosetting adhesive or liquid photosensitive adhesive, thereby forming a protective adhesive layer 300. Subsequently, wiping and polishing steps may be performed depending on the height of the protective adhesive layer 300.

[0059] Step S300 is performed to remove a portion of the thickness of metal bump 201 using a wet etching process. For example, the material of metal bump 201 can be gold, and the etchant of the wet etching process can be aqua regia. Substrate 100 is immersed in aqua regia to completely submerge metal bump 201. After a certain period of time (e.g., 1 minute), the metal bump 201 can be removed and cleaned. Figure 12 This is a schematic diagram of the metal bump 201 provided in one embodiment of the present application after a wet etching process is performed. Figure 13 This is a schematic diagram of a metal bump 201 after a wet etching process under an optical microscope provided in one embodiment of the present application, as shown in FIG. Figure 12 and Figure 13 As shown, after the wet etching process is performed, part of the thickness of the metal bump 201 is removed, and the height of the metal bump 201 becomes shorter, thereby achieving the function of thinning the metal bump 201.

[0060] It can be understood that, since a protective adhesive layer 300 is first formed on the passivation layer 200 before wet etching to remove part of the thickness of the metal bump 201, the protective adhesive layer 300 can protect the contact position between the metal bump 201 and the passivation layer 200, thereby preventing the etchant from penetrating into the interior of the passivation layer 200 from the contact position between the metal bump 201 and the passivation layer 200 when etching the metal bump 201, thereby corroding the internal structure of the passivation layer 200 (metal interconnection layer 203), and protecting the morphology of the original defects on the chip sample.

[0061] It should be noted that after the wet etching process removes part of the thickness of the metal bump 201, the remaining thickness of the metal bump 201 should not be too thin. If it is too thin, the film layers (metal adhesion layer 202 and metal interconnect layer 203) below the metal bump 201 will be easily corroded during the wet etching process, resulting in the destruction of the original defect morphology. The remaining thickness of the metal bump 201 should also not be too thick. If it is too thick, it will not effectively reduce the height of the metal bump 201. Therefore, the thickness of the metal bump 201 can be 0.2μm to 2μm, but should not be limited to this.

[0062] Based on this, an embodiment of the present application also provides a TEM sample preparation method. Figure 14 This is a flow chart of a TEM sample preparation method provided in one embodiment of the present application, as shown in FIG. Figure 14 As shown, the TEM sample preparation method includes: Step S400: providing a chip sample to be analyzed; Step S500: thinning the metal bumps of the chip sample using a metal bump thinning method; and Step S600: removing the protective adhesive layer and performing TEM sample preparation on the chip sample.

[0063] Specifically, step S400 is first performed to provide a chip sample to be analyzed. The chip sample can be a finished chip or a semiconductor structure formed during the chip preparation process. Figure 8 As shown, the chip sample includes a substrate 100, a passivation layer 200, and a metal bump 201. The passivation layer 200 is located on the substrate 100 and on the top surface of the chip sample to protect the internal structure of the chip sample. The metal bump 201 is located on the passivation layer 200 and extends into the passivation layer 200. In some embodiments, various device structures are also formed in and / or on the substrate 100.

[0064] A metal interconnect layer 203 and a metal adhesion layer 202 are also formed within the passivation layer 200. The metal adhesion layer 202 is located on the metal interconnect layer 203, and the metal bump 201 is located on the metal adhesion layer 202. The metal interconnect layer 203 and the metal bump 201 are interconnected by the metal adhesion layer 202. In some embodiments, the passivation layer 200 can have a single-layer structure or a multi-layer structure. Other film layers can also be formed within the passivation layer 200, depending on the specific structure of the chip sample. Examples are not provided here.

[0065] In some embodiments, the metal interconnect layer 203 may be a target film layer to be analyzed, but the present invention is not limited thereto. The target film layer may be one or more films below the metal bump 201 .

[0066] Next, step S500 is performed to thin the metal bumps 201 of the chip sample using the above-mentioned metal bump thinning method. Since the metal bump thinning method has been described in detail above, it will not be repeated here.

[0067] Execute step S600, as Figure 15 As shown, the protective adhesive layer 300 is removed, and then the chip sample is placed in a FIB device, and TEM sample preparation is performed on the chip sample in the FIB device.

[0068] In some embodiments, the protective adhesive layer 300 may be removed using solvents such as acetone, which is a relatively simple operation.

[0069] The specific steps for preparing chip samples for TEM in a FIB device can be described as follows: First, a sample preparation protective layer is formed within the target region of the chip sample. The sample preparation protective layer covers the top surface and sidewalls of the metal bumps 201 within the target region, as well as the top surface of the passivation layer 200 within the target region. Since the metal bumps 201 are thinned and reduced in height in step S500, the sample preparation protective layer can be well formed on the sidewalls of the metal bumps 201, protecting the sidewalls of the metal bumps 201. This can effectively protect the target region and preserve other structures other than the metal bumps 201 to the greatest extent possible, thereby increasing the success rate of sample preparation.

[0070] In some embodiments, a FIB apparatus can employ a combination of an E beam (electron beam) and an I beam (ion beam) to form a double-layered sample preparation protective layer. This combination of E and I beams provides a more defined edge and contour. Alternatively, either an E beam or an I beam alone can be employed to form a single-layered sample preparation protective layer.

[0071] It should be understood that the target area is the area where the TEM sample needs to be made, so the target area needs to include the target film layer; and the size of the sample preparation protective layer can be designed according to the actual size of the target area. The sample preparation protective layer can define the target area, thereby facilitating subsequent cutting.

[0072] Next, grooves are cut downward from both sides of the sample preparation protective layer to form grooves extending into the chip sample. The bottom of the groove needs to be lower than the bottom of the target film layer. Figure 16 A schematic diagram of a method of cutting grooves downward from both sides of a sample preparation protective layer according to an embodiment of the present application. Figure 16 In the embodiment, the material of the metal bump 201 is gold (Au), the material of the sample protection layer is platinum (Pt), and the passivation layer 200 is PV (Passivation). Since the sample protection layer can define the target area, grooves are vertically cut downward from opposite sides of the sample protection layer to form two grooves extending from the surface of the chip sample to the inside of the chip sample ( Figure 16 Only one groove is shown in the figure), the two grooves are located on opposite sides of the sample preparation protective layer.

[0073] It is understandable that, since the metal bump 201 is thinned, the height difference between the metal bump 201 and the top surface of the passivation layer 200 is reduced, thereby avoiding the problem of trimming misalignment. Figure 17 for Figure 16 A partial enlarged schematic diagram of the groove in Figure 17 It can be seen that the side wall of the groove is a plane and no misalignment occurs.

[0074] Next, the inner wall of the groove near the target area (or near the sample preparation protective layer) can be trimmed to ensure the edges of the subsequently formed sample are neat and the outline of the target film layer is clearly visible. After that, the target area is cut off from the chip sample, separating the target area from the chip sample to form a TEM sample.

[0075] Next, the surface of the TEM sample can be trimmed to remove impurity ions that splash back onto the surface of the TEM sample during cutting. Then, the surface of the TEM sample is thinned using an appropriate beam current until the thickness of the TEM sample reaches the required level, forming a TEM sample.

[0076] In summary, in the metal bump thinning method and TEM sample preparation method provided in the embodiments of the present application, a substrate is provided, which has a passivation layer and a metal bump, the passivation layer is located on the substrate, and the metal bump is located on the passivation layer and extends into the passivation layer; a protective adhesive layer is formed on the passivation layer, the protective adhesive layer at least covers the contact position between the metal bump and the passivation layer, and the top surface of the metal bump exposes the protective adhesive layer; a wet etching process is used to remove part of the thickness of the metal bump. The unexpected effect of the present application is that before wet etching to remove part of the thickness of the metal bump, a protective glue layer is first formed on the passivation layer. The protective glue layer can protect the contact position between the metal bump and the passivation layer, and prevent the etchant from penetrating into the interior of the passivation layer from the contact position between the metal bump and the passivation layer when etching the metal bump, thereby corroding the internal structure of the passivation layer and protecting the morphology of the original defects on the chip sample; after thinning the metal bump and then performing TEM sampling, a sampling protection layer can be better formed on the side wall of the metal bump, thereby improving the success rate of sampling. At the same time, the height difference between the metal bump and the top surface of the passivation layer is reduced, which can avoid the problem of sample repair misalignment.

[0077] It should be noted that the various embodiments in this specification are described in a progressive manner, with each embodiment focusing on the differences from other embodiments. Reference can be made to the common and similar parts between the various embodiments. The systems disclosed in the embodiments are described briefly because they correspond to the methods disclosed in the embodiments. For relevant details, refer to the method description.

[0078] It should also be noted that although the present application has been disclosed above with preferred embodiments, the above embodiments are not intended to limit the present application. For any person skilled in the art, without departing from the scope of the technical solution of the present application, the technical content disclosed above can be used to make many possible changes and modifications to the technical solution of the present application, or to modify it into an equivalent embodiment with equivalent changes. Therefore, any simple modification, equivalent change and modification made to the above embodiments based on the technical essence of the present application without departing from the content of the technical solution of the present application still falls within the scope of protection of the technical solution of the present application.

[0079] It should also be understood that, unless otherwise specified or indicated, the terms "first", "second", "third", etc. in the specification are only used to distinguish the various components, elements, steps, etc. in the specification, and are not used to indicate the logical relationship or sequential relationship between the various components, elements, steps, etc.

[0080] It should also be recognized that the terms described herein are used only to describe specific embodiments and are not intended to limit the scope of this application. It should be noted that the singular forms "a" and "an" used herein and in the appended claims include plural references unless the context clearly indicates otherwise. For example, a reference to "a step" or "a device" means a reference to one or more steps or devices, and may include secondary steps as well as secondary devices. All conjunctions used should be understood in their broadest sense. Also, the word "or" should be understood to have the definition of a logical "or" rather than a logical "exclusive or" unless the context clearly indicates otherwise. In addition, the implementation of the methods and / or devices in the embodiments of the present application may include performing the selected tasks manually, automatically, or in combination.

Claims

1. A method for thinning a metal bump, characterized in that: include: Providing a substrate, wherein the substrate has a passivation layer and a metal bump, wherein the passivation layer is located on the substrate, and the metal bump is located on the passivation layer and extends into the passivation layer; forming a protective adhesive layer on the passivation layer, wherein the protective adhesive layer at least covers the contact position between the metal bump and the passivation layer, and the top surface of the metal bump is exposed from the protective adhesive layer; as well as, A wet etching process is used to remove part of the thickness of the metal bump.

2. The method for thinning a metal bump according to claim 1, wherein: A liquid protective adhesive is laid on the passivation layer. After the liquid protective adhesive is cured, the protective adhesive layer is formed. The protective adhesive layer also covers the top surface of the passivation layer.

3. The method for thinning a metal bump according to claim 2, wherein: After the liquid protective adhesive is cured, the protective adhesive layer covers the top surface of the passivation layer and the sidewalls and top surface of the metal bump, and the protective adhesive layer is ground until the top surface of the metal bump is exposed.

4. The method for thinning a metal bump according to claim 3, wherein: The protective adhesive layer is ground along the arrangement direction of the metal bumps.

5. The method for thinning a metal bump according to claim 3, wherein: Before grinding the protective adhesive layer, the protective adhesive layer is dipped in a solvent and wiped to planarize the protective adhesive layer.

6. The method for thinning a metal bump according to any one of claims 2 to 5, wherein: The steps of laying liquid protective glue on the passivation layer and curing the liquid protective glue include: Placing the substrate on a heating platform for heating, placing solid hot melt adhesive particles on the passivation layer, and melting the hot melt adhesive particles to form liquid hot melt adhesive; The substrate is removed from the heating platform, and the liquid hot melt adhesive is solidified upon cooling to form the protective adhesive layer; Alternatively, the step of laying a liquid protective adhesive on the passivation layer and curing the liquid protective adhesive comprises: dripping liquid thermosetting glue or liquid photosensitive glue on the passivation layer; The liquid thermosetting adhesive is heated or the liquid photosensitive adhesive is irradiated with special light to solidify the liquid thermosetting adhesive or the liquid photosensitive adhesive to form the protective adhesive layer.

7. The method for thinning a metal bump according to claim 1, wherein: The passivation layer comprises a metal interconnection layer and a metal adhesion layer. The metal adhesion layer is located on the metal interconnection layer, and the metal bump is located on the metal interconnection layer.

8. The method for thinning a metal bump according to claim 1, wherein: After a portion of the thickness of the metal bump is removed by a wet etching process, the remaining thickness of the metal bump is 0.2 μm to 2 μm.

9. A TEM sample preparation method, characterized in that: include: Provide chip samples to be analyzed; Thinning the metal bumps of the chip sample using the metal bump thinning method according to any one of claims 1 to 7; as well as, The protective adhesive layer is removed, and the chip sample is subjected to TEM sample preparation.

10. The TEM sample preparation method according to claim 9, wherein: The step of preparing the chip sample for TEM comprises: forming a sample preparation protection layer in a target area of ​​the chip sample, wherein the sample preparation protection layer covers the top surface and sidewalls of the metal bumps in the target area and covers the top surface of the passivation layer in the target area; Grooving downwards from both sides of the sample preparation protective layer to form grooves extending into the chip sample; Cutting the target area from the chip sample to form a TEM sample; and The TEM specimen is trimmed to form a TEM sample.

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