A gain controllable power amplifier and its power amplifier structure and multi-channel transmitter system

Abstract

The application discloses a gain-controllable power amplifier, a power amplifier structure and a multi-channel transmitter system. The amplifier adopts an amplification circuit of a Doherty architecture, and two DAC voltage control circuits are used to control the working states of two amplification branches of the amplification circuit to control the output power of the amplifier for different loads. The output power of the amplifier is determined by the output power of each amplification branch and the impedance matching of each amplification branch in a power synthesis circuit. Specifically, when the main and auxiliary amplification branches are controlled to be in a saturated output state, the output power is the highest; when the main and auxiliary amplification branches are controlled to be in a power back-off state, the output power is high; when the main and auxiliary amplification branches are controlled to be in a power back-off state and a linear region state respectively, the output power is medium; when the main and auxiliary amplification branches are controlled to be in a linear region state and a closed state respectively, the output power is low; and when the main and auxiliary amplification branches are controlled to be in a closed state, there is no output power. Therefore, the output power of the amplifier can match different loads.

Description

Technical Field

[0001] This invention relates to a gain-controllable power amplifier and its power amplifier structure and multi-transmitter system, and more particularly to an efficiency-enhanced gain-controllable power amplifier, a compact phase-calibrated gain-controllable power amplifier structure including the gain-controllable power amplifier, and a vehicle-mounted millimeter-wave radar multi-transmitter system including the gain-controllable power amplifier. Background Technology

[0002] The vehicle-mounted millimeter-wave radar Multiple-Input Multiple-Output (MIMO) system, hereinafter referred to as the vehicle-mounted millimeter-wave radar MIMO system, is mainly used to enhance the perception capabilities of Advanced Driver Assistance Systems (ADAS) and autonomous driving, achieving more accurate target localization and classification through multi-antenna arrays. For example: 1. Enhancing angular resolution: The vehicle-mounted millimeter-wave radar MIMO system generates virtual channels through multiple transmit and receive antenna arrays, significantly improving angular resolution and accurately determining the azimuth and angle of obstacles around the vehicle, such as distinguishing between left and right vehicles or roadside obstacles; 2. Optimizing 4D imaging radar: The vehicle-mounted millimeter-wave radar MIMO system combines distance, speed, azimuth, and altitude for perception, enabling more complex scene recognition. For example, it can detect the height of overpasses and distinguish between stationary vehicles and broken-down objects to avoid false alarms; 3. It improves all-weather adaptability. The vehicle-mounted millimeter-wave radar MIMO system analyzes the target motion state through the Doppler effect and, in conjunction with frequency modulated continuous wave (FMCW) technology, can work stably in harsh environments such as rain, fog, and darkness to ensure driving safety; 4. It assists driving decision-making. The vehicle-mounted millimeter-wave radar MIMO system provides real-time environmental data for the autonomous driving system, supports functions such as automatic parking and adaptive cruise control (ACC), and reduces the driver's workload.

[0003] Please see Figure 1 , Figure 1This is a block diagram of a vehicle-mounted millimeter-wave radar multiplexer system used in MIMO systems. The system has multiple transmission channels 1 to n. Each channel includes a mixer circuit, a phase calibration circuit (phase shifter), a gain-controlled power amplifier, and an antenna. The baseband signal and the multi-phase carrier signal are combined by the mixer, phase-calibrated by the phase shifter, amplified by the gain-controlled power amplifier, and then transmitted by the antenna. The advantages of this transmitter architecture are as follows: Significant phase differences exist between channels due to actual manufacturing process variations, affecting the accuracy of azimuth measurement in the MIMO system; phase calibration is achieved by introducing a phase shifter into the transmission channel, thereby improving the accuracy of azimuth measurement in the MIMO system; the introduction of a gain-controllable power amplifier meets the transmission power requirements of vehicle-mounted millimeter-wave radar in different ranging modes (long-range, medium-range, and short-range); the gain-controllable power amplifier, as the core circuit of the transmitter, accounts for a large portion of the power consumption; reasonable control of transmission power according to the usage scenario effectively optimizes system power consumption and improves energy utilization.

[0004] However, existing phase shifters and gain-controllable power amplifiers also have some limitations. First, such as... Figure 2 As shown, the transmitted signal after mixing needs to travel a long trace from the mixer (such as a ring mixer oscillator circuit) to be output. This trace causes impedance transformation, which exacerbates the design difficulty of port matching for the phase shifter. In addition, there is also port matching between the phase shifter and the gain-controllable power amplifier. Designing a circuit that simultaneously satisfies phase shift calibration and two port matching requirements is difficult and drastically increases the design area required.

[0005] Furthermore, using traditional phase shifters requires a large number of passive inductors for phase shifting, resulting in a significant consumption of layout area for gain-controllable power amplifier structures, which in turn increases chip costs and is not conducive to the high integration of MIMO systems.

[0006] Furthermore, the gain-controlled power amplifier (BDAC) is a crucial component of the transmitter, and its efficiency directly impacts the transmitter's efficiency. Therefore, when designing a BDAC, maintaining high efficiency even when the output power decreases (power back-off) is a critical issue. Traditional gain-controlled power amplifiers often employ structures such as... Figure 3As shown, (a) uses a gate voltage to control power, (b) uses a variable attenuator to adjust power, (c) adds a variable gain amplifier to the preamplifier stage to change the input power of the power amplifier and thus control the output power, and (d) uses a digital control switch to adjust the transistor width and thus change the output power. Compared to a basic Class A / AB power amplifier, schemes (a) and (d) have limited effect on improving power back-off efficiency, scheme (c) does not improve power back-off efficiency, and scheme (b) worsens power back-off efficiency. Summary of the Invention

[0007] In order to enable the output power of a gain-controllable power amplifier to match different loads, this invention provides a gain-controllable power amplifier, its power amplifier structure, and a multi-channel transmitter system.

[0008] This invention is achieved using the following technical solution: an efficiency-enhanced gain-controllable power amplifier, comprising:

[0009] A phase-shift power distribution circuit is used to split an RF modulated signal into two initial signals with a phase difference of 90°.

[0010] The amplifier circuit adopts the Doherty architecture, in which the main and auxiliary amplification branches amplify the two initial signals to obtain the corresponding two amplified signals.

[0011] The power combining circuit is used to combine two amplified signals to obtain an amplified radio frequency modulated signal that is then applied to the load.

[0012] Two DAC voltage control circuits control the output power of the amplifier by controlling the operating states of the two amplification branches respectively, in order to match the usage requirements of different loads: the output power is highest when both the main and auxiliary amplification branches are in saturation output state; the output power is high when both are in power back-off state; the output power is medium when both are in power back-off state and linear region state respectively; the output power is low when both are in linear region state and off state respectively; and there is no output power when both are off state.

[0013] As a further improvement to the above scheme, both the main and auxiliary amplification branches include an integrated transformer T3 and two stages of differential common-source amplifiers cascaded through the integrated transformer T3; each differential common-source amplifier includes capacitors C3 and C4 and transistors Q1 and Q2; the gates of transistors Q1 and Q2 serve as the differential input terminals of the differential common-source amplifiers, and the drains of transistors Q1 and Q2 serve as the differential output terminals of the differential common-source amplifiers; the sources of transistors Q1 and Q2 are both grounded; capacitor C3 is connected in series between the gate of transistor Q1 and the drain of transistor Q2, and capacitor C4 is connected in series between the gate of transistor Q2 and the drain of transistor Q1;

[0014] The output of the DAC voltage control circuit corresponding to the main amplification branch is connected to the tap of the integrated transformer T3 in the main amplification branch, and the output of the DAC voltage control circuit corresponding to the auxiliary amplification branch is connected to the tap on the secondary side of the integrated transformer T3 in the auxiliary amplification branch; the taps on the primary side of both integrated transformers T3 are connected to a DC voltage source.

[0015] Furthermore, each DAC voltage control circuit uses an R-2R structure to control the gate voltage of transistors Q1 and Q2 in the corresponding amplification branch, thereby controlling the operating state of the main and auxiliary amplification branches.

[0016] As a further improvement to the above scheme, the phase-shift power distribution circuit includes phase-shift capacitors C1 and C2 and integrated transformers T1 and T2; the radio frequency modulation signals Vin+ and Vin- are split into two paths, one of which is connected to the two input terminals of the primary side of integrated transformer T1 via phase-shift capacitors C1 and C2 respectively, and the other path is connected to the two input terminals of the primary side of integrated transformer T2 respectively. The secondary sides of integrated transformers T1 and T2 are output to the main and auxiliary amplification branches respectively. The taps on the secondary side of integrated transformer T1 are connected to the bias voltage, and the tap voltage on the secondary side of integrated transformer T2 is controlled by the DAC voltage control circuit corresponding to the auxiliary amplification branch.

[0017] As a further improvement to the above scheme, the phase-shift power distribution circuit adopts a hybrid orthogonal coupling power divider circuit, including: integrated transformers T6 and T7, resistors R3~R7, phase-shift capacitors C8~C11, and inductors L1~L4; one end of the primary side of integrated transformer T6 and one end of the primary side of integrated transformer T7 are respectively connected to the RF modulation signals Vin+ and Vin-; one end of the secondary side of integrated transformer T6 is connected to one end of the secondary side of integrated transformer T7 via resistor R3; the other end of the secondary side of integrated transformer T6 forms output node one through resistor R4 and inductor L1, while the other end is connected between resistor R5 and inductor L3 through phase-shift capacitor C9; the secondary side of integrated transformer T7... One end of the integrated transformer T6 forms output node 2 via resistor R7 and inductor L2, while the other end is connected between resistor R6 and inductor L4 via phase shift capacitor C10. The other end of the primary side of the integrated transformer T6 forms output node 3 via resistor R5 and inductor L3, while the other end is connected between resistor R7 and inductor L2 via phase shift capacitor C11. The other end of the primary side of the integrated transformer T7 forms output node 4 via resistor R6 and inductor L4, while the other end is connected between resistor R4 and inductor L1 via phase shift capacitor C8. Nodes 1 and 2 output a differential initial signal to the main amplification branch, while nodes 3 and 4 output another differential initial signal with a 90° phase difference to the auxiliary amplification branch.

[0018] As a further improvement to the above scheme, the power combining circuit includes two integrated transformers T4 and T5 and a matching capacitor C5 or a transmission line; the outputs of the main and auxiliary amplification branches are respectively connected to the primary side of the two integrated transformers T4 and T5, and the taps on the primary side of the two integrated transformers T4 and T5 are all connected to a DC voltage source. One end of the secondary side of integrated transformer T4 is connected to one end of the secondary side of integrated transformer T5 through the matching capacitor C5 or the transmission line, and the other end of the secondary side of integrated transformer T5 is grounded and connected to the other end of the secondary side of integrated transformer T4 as the power outputs Vout- and Vout+ of the gain-controllable power amplifier.

[0019] As a further improvement to the above scheme, the power combining circuit includes two integrated transformers T4 and T5 and two transmission lines. The outputs of the main and auxiliary amplification branches are respectively connected to the primary side of the two integrated transformers T4 and T5. The taps on the primary side of the two integrated transformers T4 and T5 are all connected to a DC voltage source. The two ends of the secondary side of the integrated transformer T5 are connected in series with two transmission lines, and then connected in parallel with the secondary side of the integrated transformer T4. The secondary side of the integrated transformer T4 serves as the power outputs Vout+ and Vout- of the gain-controllable power amplifier.

[0020] As a further improvement to the above scheme, the power combining circuit includes two integrated transformers T4 and T5. The outputs of the main amplification branch are respectively connected to the primary side of integrated transformer T4, and the outputs of the auxiliary amplification branch are respectively connected to the two ends of the primary side of integrated transformer T4 through a transmission line. The taps on the primary side of both integrated transformers T4 and T5 are connected to a DC voltage source. One end of the secondary side of integrated transformer T4 is connected to one end of the secondary side of integrated transformer T5. The other end of the secondary side of integrated transformer T4 and the other end of the secondary side of integrated transformer T5 serve as the power outputs Vout+ and Vout- of the gain-controllable power amplifier.

[0021] As a further improvement to the above scheme, in the DAC voltage control circuit corresponding to the auxiliary amplification branch, its output is introduced into an isolation voltage regulator circuit.

[0022] The present invention also provides a phase-calibrated gain-controllable power amplifier structure, which includes:

[0023] A mixer circuit is used to mix a baseband signal with a carrier signal to form a radio frequency modulated signal.

[0024] A phase calibration circuit is used to phase calibrate the radio frequency modulation signal;

[0025] The aforementioned efficiency-enhanced gain-controllable power amplifier is used to amplify the phase-calibrated RF modulated signal.

[0026] As a further improvement to the above scheme, the gain controllable power amplifier structure can be designed with a phase calibration circuit in the layout of the output signal transmission path of the mixer circuit. The phase calibration circuit can be directly integrated into the layout of the mixer circuit, without the need to set up a separate layout for the phase calibration circuit. The phase calibration circuit is designed as a digitally controlled switched capacitor differentially connected to the differential output terminal of the mixer circuit. The digitally controlled switched capacitor includes transistors Q3~Q7, resistors R1 and R2, and capacitors C6 and C7.

[0027] The gates of transistors Q3 and Q4 are connected to digital control signals. The sources of transistors Q3 and Q5 are connected to a voltage source. The sources of transistors Q4 and Q6 are grounded. The drains of transistors Q3 and Q4 are connected to the gates of transistors Q5 and Q6. The drain of transistor Q6 is connected to the gate of transistor Q7. The drain of transistor Q7 is connected to one end of capacitor C6, and the other end of capacitor C6 is defined as port one. The source of transistor Q7 is connected to one end of capacitor C7, and the other end of capacitor C7 is defined as port two. One end of resistor R1 is connected to the drain of transistor Q7. The other end of resistor R1 is connected to the source of transistor Q7 via resistor R2, and the other end is connected to the gate of transistor Q5.

[0028] This invention also provides a vehicle-mounted millimeter-wave radar multi-channel transmitter system, which includes multiple transmission channels. Each transmission channel includes a mixer circuit, a phase calibration circuit, a gain-controlled power amplifier, and an antenna. The baseband signal and the multi-phase carrier signal are mixed by the mixer circuit, then phase-calibrated by the phase calibration circuit, and finally amplified by the gain-controlled power amplifier before being transmitted by the antenna. The gain-controlled power amplifier is an arbitrary efficiency-enhanced gain-controlled power amplifier as described above.

[0029] As a further improvement to the above scheme, when designing the layout of each transmission channel, the phase calibration circuit can be directly integrated into the layout of the output signal transmission path of the mixer circuit by designing a phase calibration circuit, without the need to set up a separate layout for the phase calibration circuit. The phase calibration circuit is designed as a digitally controlled switched capacitor differentially connected to the differential output terminal of the mixer circuit. The digitally controlled switched capacitor includes transistors Q3~Q7, resistors R1 and R2, and capacitors C6 and C7.

[0030] The gates of transistors Q3 and Q4 are connected to digital control signals. The sources of transistors Q3 and Q5 are connected to a voltage source. The sources of transistors Q4 and Q6 are grounded. The drains of transistors Q3 and Q4 are connected to the gates of transistors Q5 and Q6. The drain of transistor Q6 is connected to the gate of transistor Q7. The drain of transistor Q7 is connected to one end of capacitor C6, and the other end of capacitor C6 is defined as port one. The source of transistor Q7 is connected to one end of capacitor C7, and the other end of capacitor C7 is defined as port two. One end of resistor R1 is connected to the drain of transistor Q7. The other end of resistor R1 is connected to the source of transistor Q7 via resistor R2, and the other end is connected to the gate of transistor Q5.

[0031] Compared with the prior art, the present invention has the following beneficial effects:

[0032] Compared with the prior art, the technical solution of the present invention has the following significant advantages and beneficial effects, all of which are directly brought about by its innovative design:

[0033] 1. Significantly reduce chip area, increase integration, and lower chip cost.

[0034] In the existing technology, traditional power amplifiers require independent phase shifters to compensate for phase shifts, and employ complex hybrid coupling power dividers and long transmission line matching circuits, resulting in a large chip area.

[0035] This invention solves this problem through three core designs:

[0036] (1) The phase calibration function is integrated into the long trace layout (differential integration of digital control switched capacitor circuit), eliminating the need for a separate phase shifter and simplifying the circuit structure;

[0037] (2) The input phase-shift power distribution circuit integrates the phase-shift capacitor with the integrated transformer, which reduces the area of ​​the board by about 40% compared with the traditional hybrid coupled power divider;

[0038] (3) The series-type Doherty matching circuit uses an integrated transformer and matching capacitor to replace the traditional long transmission line and the long line inductor of the parallel design, which reduces the area of ​​the matching circuit by more than 50%.

[0039] The three elements work synergistically to significantly reduce the overall chip area, increase integration, and lower costs.

[0040] 2. High efficiency, especially optimized for power back-off scenarios.

[0041] Traditional class A / AB power amplifiers experience a significant drop in efficiency during power back-off, while traditional Doherty technology improves back-off efficiency but lacks flexibility.

[0042] This invention achieves a breakthrough in efficiency through a multi-layered design:

[0043] (1) Based on the Doherty technology, a gain controllable design is introduced, retaining its core advantage of "high efficiency during power back-off";

[0044] (2) Two-stage differential common-source amplifiers are cascaded to ensure stable signal amplification, and the "multi-resonant coupling matching" integrated transformer optimizes transmission loss and bandwidth, reducing efficiency loss;

[0045] (3) The active load traction logic table dynamically adjusts the equivalent impedance of the matching network to ensure that it operates in the optimal load state under different power levels;

[0046] (4) The main and auxiliary amplification branches can be dynamically combined into four operating states (saturated output, power back-off, linear region, and off), and combined with the Doherty load modulation effect, high efficiency is achieved across the entire power range. For example, when the power back-off is 6dB, the power-added efficiency (PAE) is only 21.8% lower than when the output is saturated, which is far superior to traditional class A / AB amplifiers.

[0047] 3. Improve operational stability, especially anti-interference capability in high-frequency scenarios.

[0048] In traditional designs, radio frequency signals are prone to leakage to the gate control terminal, causing mutual interference between the two amplifiers. Furthermore, complex power dividers and matching circuits can easily introduce signal loss and instability.

[0049] The present invention provides targeted optimizations:

[0050] (1) The gain control circuit introduces an isolation voltage regulator unit (high impedance isolation + voltage regulation and filtering) to block the leakage of RF signals to the gate control circuit, avoid cross interference, and improve the stability of high frequency scenarios;

[0051] (2) The digital control switched capacitor circuit adopts differential connection to ensure the signal symmetry and stability of long-distance transmission.

[0052] 4. Balancing performance and flexibility to adapt to diverse scenario requirements.

[0053] Traditional power amplifiers struggle to simultaneously achieve a balance between efficiency, gain adjustment range, and bandwidth.

[0054] This invention achieves a balance between flexibility and performance through modular innovation:

[0055] (1) The digital-to-analog converter (DAC) controls the gate voltage of the transistor to achieve a wide range of adjustable gain (from completely shut off power output to saturated power output), flexibly adapting to different signal strength requirements;

[0056] (2) The compact phase-shift power distribution circuit precisely controls the phase difference between the two signals to meet the strict phase requirements of Doherty synthesis, while balancing accuracy and compactness;

[0057] (3) The system can be adapted to RF communication scenarios with stringent requirements for integration and energy efficiency, such as 5G millimeter wave and 6G, and achieve the dual advantages of "high performance + high flexibility". Attached Figure Description

[0058] Figure 1 This is a block diagram of a traditional vehicle-mounted millimeter-wave radar multiplexer system used in MIMO systems.

[0059] Figure 2 This is a schematic diagram illustrating the design concept of an integrated circuit layout for a traditional gain-controllable power amplifier structure.

[0060] Figure 3 This is a schematic diagram of the circuit structure of a traditional gain-controllable power amplifier.

[0061] Figure 4 This is a schematic diagram illustrating the design concept of the integrated circuit layout of the gain-controllable power amplifier structure of the present invention provided in Example 1.

[0062] Figure 5 for Figure 4 A circuit diagram of a single digitally controlled switched capacitor in a phase calibration circuit.

[0063] Figure 6 for Figure 4 Circuit diagram of a medium-gain controllable power amplifier.

[0064] Figure 7 for Figure 4 A schematic diagram of the DAC voltage control circuit.

[0065] Figure 8 for Figure 4 A schematic diagram of a medium-isolation voltage regulator circuit.

[0066] Figure 9 for Figure 4 A simplified schematic diagram of a medium-gain controllable power amplifier.

[0067] Figure 10 A circuit diagram of the phase-shift power distribution circuit for the gain-controllable power amplifier structure provided in Example 2.

[0068] Figure 11 A circuit diagram of a power combining circuit with a gain-controllable power amplifier structure is provided for Example 3.

[0069] Figure 12 To distinguish from Figure 11 An alternative circuit diagram for a medium-power combining circuit.

[0070] Figure 13 To distinguish from Figure 11Another alternative circuit diagram for a medium-power combining circuit. Detailed Implementation

[0071] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0072] Example 1

[0073] The gain-controllable power amplifier structure of this invention can be applied to automotive millimeter-wave radar multi-transmitter systems. Automotive millimeter-wave radar multi-transmitters are primarily used in MIMO systems, such as the 77G automotive millimeter-wave radar MIMO system. The 77G automotive millimeter-wave radar MIMO system can amplify the modulation signal of the multi-transmitter system and transmit it to the radar antenna. It can also adjust the transmission power through digital control signals, making it suitable for the transmission power requirements of long-range, medium-range, and short-range automotive radars. Furthermore, to improve the side angle accuracy of the MIMO system, a highly integrated phase calibration circuit is introduced to calibrate the phase deviation of the multi-transmitter caused by manufacturing variations, addressing the key requirements of 4D automotive radar for low-cost, small-area, and high-efficiency transmitter components.

[0074] The vehicle-mounted millimeter-wave radar multi-transmitter system may include multiple transmission channels. Each transmission channel may include the aforementioned gain-controllable power amplifier structure. The gain-controllable power amplifier structure may include a mixer circuit, a phase calibration circuit, a gain-controllable power amplifier, and an antenna. The baseband signal and the multi-phase carrier signal are mixed by the mixer circuit, then phase-calibrated by the phase calibration circuit, and finally amplified by the gain-controllable power amplifier before being transmitted by the antenna.

[0075] This invention solves the bottlenecks of traditional power amplifiers in terms of area, efficiency and stability through a number of innovative designs, and is especially suitable for radio frequency communication scenarios with stringent requirements for integration and energy efficiency.

[0076] I. Long trace and phase calibration design.

[0077] Please see Figure 4 This is a schematic diagram illustrating the integrated circuit layout design of the gain-controllable power amplifier structure of the present invention. To improve the accuracy of the side angle of the MIMO system, a highly integrated phase calibration circuit is introduced to calibrate the phase deviation of the multi-channel transmitter caused by process variations, thus solving the key requirements of 4D automotive radar for low-cost, small-area, and high-efficiency transmitter components.

[0078] In the layout design of gain-controllable power amplifiers, signals need to be transmitted through long traces between the pre-amplifier circuit (such as a ring oscillator mixer) and the gain-controllable power amplifier. Due to the physical characteristics of long traces, the signal is prone to phase shift during transmission due to manufacturing process deviations. Traditional designs usually require additional phase shifters for compensation, which significantly increases the chip area. This invention addresses this issue by designing a phase calibration circuit that can be directly integrated into the layout of the mixer circuit's output signal transmission path, eliminating the need for a separate phase calibration circuit layout. In other words, by directly integrating the phase calibration function into the layout design of long traces, the circuit module of a separate phase shifter is eliminated, significantly reducing the overall chip area.

[0079] The phase calibration circuit is designed as a digitally controlled switched capacitor differentially connected to the differential output of the mixer circuit. A circuit diagram of the digitally controlled switched capacitor is shown below. Figure 5 As shown. The digital control switching capacitors adopt a differential connection method (i.e., symmetrically connected on both sides of the long trace) to ensure the symmetry and stability of signal transmission. Each digital control switching capacitor includes transistors Q3~Q7, resistors R1 and R2, and capacitors C6 and C7. The gates of transistors Q3 and Q4 are connected to the digital control signal, the sources of transistors Q3 and Q5 are connected to the voltage source, the sources of transistors Q4 and Q6 are grounded, the drains of transistors Q3 and Q4 are connected to the gates of transistors Q5 and Q6, the drain of transistor Q6 is connected to the gate of transistor Q7, the drain of transistor Q7 is connected to one end of capacitor C6, and the other end of capacitor C6 is defined as port one. The source of transistor Q7 is connected to one end of capacitor C7, and the other end of capacitor C7 is defined as port two. One end of resistor R1 is connected to the drain of transistor Q7, and the other end of resistor R1 is connected to the source of transistor Q7 through resistor R2, and the other end is connected to the gate of transistor Q5.

[0080] Each transistor Q3 and Q4 of the digitally controlled switched capacitor can be independently controlled by a 1-bit digital signal. The phase adjustment accuracy per bit can be achieved by adjusting the capacitance values ​​(i.e., capacitance parameters) of capacitors C6 and C7, thus flexibly meeting the phase / bit adjustment accuracy requirements of different transmission scenarios. Using multiple digitally controlled switched capacitors can generate corresponding preset phase compensation ranges. This integrated design simplifies the circuit structure, reduces chip layout area, and lowers chip cost. Therefore, this invention integrates the phase calibration function into a long trace layout (i.e., differential integration of the digitally controlled switched capacitor circuit), eliminating the need for a separate phase shifter and simplifying the circuit structure.

[0081] II. Design of an efficiency-enhanced gain-controllable power amplifier.

[0082] The gain-controllable power amplifier adopts an efficiency-enhancing architecture based on Doherty technology, and its circuit structure is as follows: Figure 6 As shown. The core advantage of Doherty technology lies in its ability to maintain high efficiency even when signal power falls back. This invention further incorporates a gain-controllable design, achieving a balance between performance and flexibility. The efficiency-enhanced gain-controllable power amplifier includes: a phase-shift power distribution circuit, an amplifier circuit employing the Doherty architecture, a power combining circuit, two DAC voltage control circuits, and may also include: two isolated voltage regulator circuits.

[0083] The phase-shift power distribution circuit is used to split the RF modulated signal into two initial signals with a 90° phase difference. The Doherty architecture amplifier circuit includes two amplification branches, amplifying the two initial signals respectively to obtain the corresponding two amplified signals. The power combining circuit is used to combine the two amplified signals, and the resulting amplified RF modulated signal is applied to the load.

[0084] Two DAC voltage control circuits, designed for different loads, control the output power of the entire amplifier by controlling the operating states of the two amplification branches. In this embodiment, for example, the two DAC voltage control circuits control the gate voltage of different branch transistors, thereby controlling the operating states of the two amplification branches and thus controlling the amplifier's output power. The overall amplifier output power is determined by the output power of each amplification branch and the quality of impedance matching within the power combining circuit. Specifically: the output power is highest when both the main and auxiliary amplification branches are in saturation output mode; high output power when both are in power retraction mode; medium output power when both are in power retraction mode and linear region mode; low output power when both are in linear region mode and off mode; and no output power when both are off.

[0085] In other words, the control method for the two DAC voltage control circuits is as follows:

[0086] 1) The output power is highest when both the main and auxiliary amplification branches are in saturation output mode;

[0087] 2) When both the main and auxiliary amplification branches are in power retraction mode, the output power is high;

[0088] 3) When the main and auxiliary amplification branches are in power back-off state and linear region state respectively, the output power is in the middle;

[0089] 4) When the main and auxiliary amplification branches are in the linear region and the off state respectively, the output power is low;

[0090] 5) When both the main and auxiliary amplification branches are in the off state, there is no output power.

[0091] The key module design details of the gain-controllable power amplifier are described below.

[0092] (a) Phase shift power distribution circuit at the input terminal.

[0093] To meet the stringent phase difference requirement (typically 90°) between the two amplified signals in power combining circuits, this invention designs a compact phase-shift power distribution circuit. The phase-shift power distribution circuit may include phase-shift capacitors C1 and C2 and integrated transformers T1 and T2. The RF modulation signals Vin+ and Vin- are split into two paths. One path is connected to the two input terminals of the primary side of integrated transformer T1 via phase-shift capacitors C1 and C2, respectively. The other path is connected to the two input terminals of the primary side of integrated transformer T2. The secondary sides of integrated transformers T1 and T2 output to the main and auxiliary amplification branches, respectively. The taps on the secondary side of integrated transformer T1 are connected to a bias voltage, and the tap voltage on the secondary side of integrated transformer T2 is controlled by the DAC voltage control circuit corresponding to the auxiliary amplification branch.

[0094] The phase-shifting power distribution circuit is used to divide the signal that the vehicle-mounted millimeter-wave radar multi-transmitter wants to transmit, namely the radio frequency modulation signal, into two modulation signals with different phases. One modulation signal is amplified by the main branch amplifier under the control of one of the gain control circuits, and the other modulation signal is amplified by the auxiliary branch amplifier under the control of another gain control circuit. The two amplified modulation signals are combined by the power combining circuit and output.

[0095] Therefore, the function of the phase-shift power distribution circuit is to split the input signal into two signals with different phases, where the phase difference is related to the capacitance value of the series capacitor. In this embodiment, the phase-shift power distribution circuit integrates phase-shift capacitors C1 and C2 with integrated transformers T1 and T2: phase-shift capacitors C1 and C2 are responsible for precisely controlling the phase difference between the two output signals (i.e., the phase difference between the two initial signals), while integrated transformers T1 and T2 undertake the functions of signal distribution and transmission. Compared with traditional hybrid coupled power dividers, this integrated structure does not require complex branch transmission line design, resulting in a more compact layout. This not only reduces the area occupied by the phase-shift power distribution circuit by approximately 40%, but also reduces design complexity and improves circuit reliability. Furthermore, integrated transformers T1 and T2 also employ "multi-resonant coupling matching" technology, optimizing the winding structure and core parameters to ensure low loss and high isolation during signal distribution.

[0096] (ii) Amplifier circuit using Doherty architecture.

[0097] The application of Doherty technology can effectively improve the operating efficiency of amplifiers at different output power levels. The Doherty architecture amplifier circuit generally employs a two-signal synthesis scheme with two amplification branches: a main branch and an auxiliary branch. Both the main and auxiliary branches include an integrated transformer T3 and two cascaded differential common-source amplifiers connected through the integrated transformer T3. Each differential common-source amplifier includes capacitors C3 and C4 and transistors Q1 and Q2. The gates of transistors Q1 and Q2 serve as the differential input terminals of the differential common-source amplifiers, and their drains serve as the differential output terminals. The sources of transistors Q1 and Q2 are both grounded. Capacitor C3 is connected in series between the gate of transistor Q1 and the drain of transistor Q2, and capacitor C4 is connected in series between the gate of transistor Q2 and the drain of transistor Q1. The output of the DAC voltage control circuit corresponding to the main amplification branch is connected to the tap of the integrated transformer T3 in the main amplification branch, and the output of the DAC voltage control circuit corresponding to the auxiliary amplification branch is connected to the tap on the secondary side of the integrated transformer T3 in the auxiliary amplification branch; the taps on the primary side of both integrated transformers T3 are connected to a DC voltage source (the purpose is to power the transistors, and the DC voltage value of the DC voltage source here is 0.9V).

[0098] In this invention, each amplification branch consists of two cascaded differential common-source amplifiers connected by an integrated transformer T3. Multi-stage amplification ensures a stable gain from weak to strong signals. To achieve flexible gain adjustment, this invention also introduces a DAC voltage control circuit to control the gate voltage of the transistors in each amplification branch. When the gate voltage changes, the amplification capability of the transistors changes accordingly, thus achieving continuous gain adjustment. The inter-stage matching between the two differential common-source amplifiers employs an integrated transformer designed using "multi-resonant coupling matching" technology. This technology can guide the design to obtain an optimal integrated transformer matching circuit that balances transmission loss, bandwidth, and other performance indicators.

[0099] The function of the main amplification branch: The output power / power gain of the main amplification branch can be achieved by changing the digital control code of the corresponding DAC voltage control circuit. The principle is that changing the digital control code of the DAC voltage control circuit changes the output voltage of the DAC voltage control circuit, which in turn changes the gate bias voltage of the connected transistor. The change in gate bias voltage changes the transistor's signal amplification capability (a characteristic of transistors). Ultimately, this achieves the goal of controlling the amplifier's power gain / output power. Note: The output impedance of the main amplification branch will change under different output power conditions (a characteristic of transistors). The Doherty matching circuit design is based on this phenomenon.

[0100] Function of the auxiliary amplifier branch: The control principle of the auxiliary amplifier branch is the same as that of the main amplifier branch, and will be omitted. Note: The output impedance of the auxiliary amplifier branch will also change under different output power conditions. The Doherty matching circuit design is based on this phenomenon.

[0101] Therefore, the main branch amplifier 2 and the auxiliary branch amplifier 3 are each composed of two-stage differential common source amplifiers with integrated transformers designed using "multi-resonant coupling matching" technology. Through multi-stage amplification, the signal gain is ensured to be stable from weak to strong, while also taking into account transmission loss, bandwidth and other indicators. In order to achieve flexible gain adjustment, each branch amplifier introduces a gain control circuit 3 to realize continuous adjustment of the gain.

[0102] (iii) Two DAC voltage control circuits.

[0103] There are many specific structures for DAC voltage control circuits. The key is to control the gate voltages of transistors Q1 and Q2 in the corresponding amplification branches to achieve the goal of controlling the operating states of the main and auxiliary amplification branches. For example... Figure 7 The diagram shows a schematic of one type of DAC voltage control circuit: an R-2R structure DAC. In this embodiment, each DAC voltage control circuit uses an R-2R structure DAC to control the gate voltages of transistors Q1 and Q2 in the corresponding amplification branch, thereby controlling the operating states of the main and auxiliary amplification branches. Figure 7 The DAC voltage control circuit adopts a 3-bit DAC (digital-to-analog converter) circuit structure, in which each individual control switch is controlled by a 1-bit digital signal (on or off), and the circuit structure corresponds to the digital signal control bits from high to low from left to right.

[0104] The digital-to-analog converter (DAC) controls the gate voltage of the transistor. When the gate voltage changes, the amplification capability of the transistor changes accordingly, thus achieving continuous adjustable gain. The interstage matching between the two amplifier stages uses an integrated transformer designed with "multi-resonant coupling matching" technology. This technology can guide the design to obtain an optimal integrated transformer matching circuit that balances transmission loss, bandwidth, and other performance indicators.

[0105] The function of the DAC voltage control circuit is to change the output voltage of the main and auxiliary amplification branches by altering the DAC1 and DAC2 control codes that control the two DAC voltage control circuits respectively. Each set of digital control codes corresponds to a specific analog output voltage, as shown in Table 1.

[0106] Table 1 Control Logic of DAC Voltage Control Circuit

[0107]

[0108] A digital-to-analog converter (DAC) employing an R-2R architecture generates precise analog voltages, and dynamic gain control is achieved by adjusting the gate voltages of transistors Q1 and Q2. Addressing the issue of RF signal leakage to the gate control terminal in traditional designs, leading to mutual interference between the two amplifier signals, this invention incorporates two isolation voltage regulator circuits within the isolation voltage regulator circuit corresponding to the auxiliary amplification branch. Figure 8 As shown. This isolation and voltage regulation circuit, through high-impedance isolation and voltage regulation filtering design, effectively blocks the leakage path of RF signals to the gate control circuit, avoids cross-interference of gate signals, and greatly improves the operating stability of the gain-controllable power amplifier, especially in high-frequency scenarios.

[0109] In this embodiment, the amplifier employs a Doherty architecture amplification circuit. Two DAC circuits control the gate voltage of the transistors, thereby controlling the operating states of the two amplification branches and achieving control over the amplifier's output power. Simultaneously, the Doherty architecture effectively improves the amplifier's efficiency at different output power levels. By using DAC circuits to control the transistor gate voltage, and thus the operating states of the main and auxiliary branches, different output power levels are achieved. Furthermore, the Doherty technique solves the problem of impedance matching when the main and auxiliary branches change under different operating states, achieving good impedance matching for power synthesis in the main and auxiliary branches at different output power levels, reducing signal loss, and improving amplifier efficiency.

[0110] (iv) Power combining circuit.

[0111] The power combining circuit employs a series-type Doherty matching circuit. The power combining circuit may include two integrated transformers T4 and T5, and a matching capacitor C5. The outputs of the main and auxiliary amplification branches are respectively connected to the primary sides of the two integrated transformers T4 and T5. The taps on the primary sides of both integrated transformers T4 and T5 are grounded DC voltage sources (such as powering transistors). One end of the secondary side of integrated transformer T4 is connected to one end of the secondary side of integrated transformer T5 via the matching capacitor C5. The other end of the secondary side of integrated transformer T5 is grounded and, together with the other end of the secondary side of integrated transformer T4, serves as the power outputs Vout- and Vout+ of the gain-controllable power amplifier.

[0112] The core innovation of the power combining circuit lies in replacing the transmission lines extensively used in traditional Doherty designs with integrated transformers T4 and T5 and matching capacitor C5. Traditional transmission lines, due to the need to meet specific impedance matching requirements, often require long physical lengths, resulting in a large layout area. Parallel Doherty matching circuits rely on long-trace inductors for matching, also exhibiting area redundancy. However, the series design of this invention's power combining circuit achieves impedance matching through matching capacitor C5, completely avoiding the use of long-trace inductors. Furthermore, the compact structure of integrated transformers T4 and T5 replaces transmission lines, reducing the layout area of ​​the matching circuit by more than 50%, significantly improving chip integration.

[0113] In addition, the circuit includes an active load traction logic table, which can dynamically adjust the equivalent impedance of the matching network according to the input signal power, ensuring that the amplifier operates in the optimal load state under different power levels, further enhancing the stability of efficiency.

[0114] The process of a gain-controllable power amplifier is described below. The four operating states of a gain-controllable power amplifier refer to the four operating states of the main branch amplifier and the auxiliary branch amplifier. By changing the output voltage of the DAC through the DAC voltage control circuit, both the main and auxiliary amplification branches can achieve four operating states: saturated output (full power amplification, transistors operate in the saturation / nonlinear region), power back-off (higher power amplification, transistors operate in the sub-saturation region), linear amplification (lower power amplification, transistors operate in the linear region), and complete shutdown (zero-power standby). The output impedances of the main and auxiliary branches are also different in these four different operating states (determined by the inherent properties of the transistors).

[0115] Additional explanation: Saturation region / nonlinear region and linear region refer to different operating states of a transistor. The subsaturated region lies between the saturated region and the linear region. The amplifier output power is highest in the saturated region, followed by the subsaturated region, and then the linear region.

[0116] Doherty's load modulation effect refers to the ability to dynamically change the load impedance at the amplifier's output, allowing the amplifier output to maintain matching even as its own output impedance changes. This is a key mechanism for RF power amplifiers to maintain high efficiency over a wide power range. This effect is a core advantage of the Doherty amplifier architecture.

[0117] In this invention, since the DAC control code causes changes in the amplifier output impedance when controlling the output power / gain of each branch, Doherty technology is introduced to ensure good circuit matching at the output of each branch amplifier. Adjusting the DAC control code to combine the operating states of the two branches, combined with Doherty technology, can effectively improve the efficiency of the gain-controllable amplifier under different output power conditions. For example, in a 6dB power back-off scenario, the power-added efficiency (PAE) decreases by only 21.8% compared to the peak PAE at saturation output, demonstrating efficiency performance far exceeding that of traditional Class A / AB power amplifiers under power back-off conditions.

[0118] The gain / power control logic table and description are shown in Table 2.

[0119] Table 2. Operating Logic Table of Gain-Controllable Power Amplifier

[0120]

[0121] Please see Figure 9 , Figure 9 In this context, "main branch" is short for "main amplified branch," and "auxiliary branch" is short for "auxiliary amplified branch." Figure 9 This is a simplified diagram of a gain-controllable power amplifier, belonging to a compact Doherty matching network based on an integrated transformer and matching capacitor. In the Doherty matching circuit, Z... out,1 The impedance of the secondary coil output port after connecting the integrated transformer T4 to the main amplification branch. out,2 After connecting the integrated transformer T5 and the series capacitor to the auxiliary amplification branch, the impedance of the output port of the matching capacitor C5 to ground is measured.

[0122] Control logic description for an efficiency-enhanced gain-controlled power amplifier:

[0123] (1) Maximum output power (maximum gain).

[0124] Amplification branch status: The main amplification branch is in saturation output (DAC1=111), and the auxiliary amplification branch is also in saturation output (DAC2=111).

[0125] Impedance matching: Z at this time out,1 and Z out,2 Both are 0.5RL, indicating good load matching (RL=Z). out,1 + Z out,2 ).

[0126] Logic: Both output at full power simultaneously, with good impedance matching and low transmission loss, resulting in maximum output power.

[0127] (2) The output power is relatively large (the gain is relatively large).

[0128] Amplification branch status: The main amplification branch power is reduced (DAC1=110, not saturated), and the auxiliary amplification branch power is also reduced (DAC2 from 111→101, not saturated).

[0129] Impedance matching: Z at this time out,1 Start to grow bigger and Z out,2 The impedance begins to decrease, but the load matching effect remains good (RL≈Z). out,1 + Z out,2 ).

[0130] Logic: Both output power decreases (backs down), but they are still on and well-matched, so the output power is relatively large.

[0131] (3) Low output power (low gain).

[0132] Amplification branch status: The main amplification branch is still in power down (DAC1=101), and the auxiliary amplification branch enters the linear region (DAC2 goes from 101→000, and the output is weaker).

[0133] Impedance matching: Z out,1 Keep growing bigger, heading towards RL, Z out,2 It continues to decrease in size, moving towards lower resistance, but the matching effect remains good (RL≈Z). out,1 + Z out,2 ).

[0134] Logic: The output capabilities of both continuously decrease (main backoff, auxiliary linear), resulting in low output power.

[0135] (4) Low output power (low gain).

[0136] Amplification branch status: The main amplification branch enters the linear region (DAC1 from 101→000), and the auxiliary amplification branch is turned off (DAC2=000).

[0137] Impedance matching: Z out,1 From RL → high resistance, Z out,2 Maintaining low resistance, the matching effect gradually deteriorates from good (RL≈ RL + low resistance) to bad (RL≠ high resistance + low resistance).

[0138] Logic: The main branch output is weak (linear region), and the impedance matching deteriorates (energy loss increases, so the output power is low).

[0139] (5) No output power.

[0140] Amplification branch status: Both main and auxiliary amplification branches are off (DAC1=000, DAC2=000).

[0141] Impedance matching: Zout,1 High resistance, Z out,2 Low resistance, mismatch.

[0142] Logic: No amplifier circuit is working, therefore there is no power output.

[0143] Note: The required range of output power for a real power amplifier is from saturated output power to low output power (Z). out,1 <2RL (design experience value), Z out,2 =low resistance), and can completely shut down the circuit.

[0144] When Zout1 exceeds 2RL, a severe load mismatch occurs. In actual use, no corresponding DAC control code is set, so it is not a concern.

[0145] In summary, this invention, through the synergistic innovation of phase calibration integration, transformer matching optimization, compact structural design, and intelligent state control, significantly reduces chip area while substantially improving the efficiency and stability of power amplifiers, providing a high-performance RF front-end solution for next-generation communication systems such as 5G millimeter wave and 6G.

[0146] Example 2

[0147] Please see Figure 10 The difference between this embodiment and embodiment 1 is that the phase shift power distribution circuit in this embodiment is different: the phase shift power distribution circuit in this embodiment adopts a hybrid orthogonal coupling power distribution circuit, including integrated transformers T6 and T7, resistors R3 to R7, phase shift capacitors C8 to C11, and inductors L1 to L4.

[0148] One end of the primary side of integrated transformer T6 and one end of the primary side of integrated transformer T7 are connected to the radio frequency modulation signals Vin+ and Vin-, respectively. One end of the secondary side of integrated transformer T6 is connected to one end of the secondary side of integrated transformer T7 via resistor R3. One path of the other end of the secondary side of integrated transformer T6 forms output node one via resistor R4 and inductor L1, while the other path is connected between resistor R5 and inductor L3 via phase-shift capacitor C9. One path of the other end of the secondary side of integrated transformer T7 forms output node two via resistor R7 and inductor L2, while the other path is connected to... Between resistor R6 and inductor L4; one end of the primary side of integrated transformer T6 forms output node three via resistor R5 and inductor L3, while the other end is connected between resistor R7 and inductor L2 via phase shift capacitor C11; one end of the primary side of integrated transformer T7 forms output node four via resistor R6 and inductor L4, while the other end is connected between resistor R4 and inductor L1 via phase shift capacitor C8; nodes one and two differentially output one initial signal to the main amplification branch, and nodes three and four differentially output another initial signal with a 90° phase difference to the auxiliary amplification branch.

[0149] The core disadvantage of traditional hybrid orthogonal coupled power dividers lies in their reliance on the phase control mechanism of branch transmission lines. To achieve phase difference, multiple transmission lines with different characteristic impedances (such as λ / 4 transmission lines) need to be designed. These transmission lines are essentially distributed inductor structures, requiring not only precise physical length matching (which is greatly affected by process variations) but also a large number of discrete or integrated inductor compensation impedances, resulting in a scattered layout and large footprint. In addition, the cross-coupling design of branch transmission lines has extremely high requirements for wiring accuracy. Any deviation in line width, spacing, or length will directly lead to phase difference deviation, affecting Doherty synthesis efficiency and significantly increasing design complexity.

[0150] The integrated phase-shift power distribution circuit of this invention combines phase regulation (capacitor) and power distribution (transformer) functions through an integrated design of "phase-shift capacitor + integrated transformer": the phase-shift capacitor regulates the phase through centralized parameters, avoiding the length dependence of distributed transmission lines; the integrated transformer adopts "multi-resonant coupling matching" technology, simplifying the design of the integrated transformer and enabling signal distribution and low-loss transmission in a compact space. This design not only eliminates the complex branch transmission lines and large number of inductors of traditional hybrid power dividers, but also reduces chip area through the integrated layout of centralized parameter components, while reducing the impact of process deviations on phase accuracy, resulting in higher design reliability.

[0151] Example 3

[0152] The difference between this embodiment and Embodiment 1 is that this embodiment uses a transmission line instead of the matching capacitor C5 in Embodiment 1. Figure 11 As shown, the core bottleneck of Doherty power combining circuits (whether parallel or series) based on transmission lines (TL) is the "rigid physical length requirement" of the transmission line: to meet the impedance matching at the output end (such as the impedance transformation between the carrier amplifier and the peak amplifier in Doherty), the transmission line needs to be designed with a specific electrical length (such as λ / 4). However, in RF chips, the physical length of the transmission line is directly related to the wavelength (for example, λ / 4 is about several hundred micrometers in the millimeter-wave band), and long traces will occupy a large amount of layout area. For parallel structures, long trace inductors are also required for matching, further exacerbating area redundancy.

[0153] Therefore, the power combining circuit of Example 1 is definitely more suitable because its series-type Doherty matching circuit completely replaces the transmission line with an "integrated transformer + matching capacitor": the integrated transformer uses magnetic coupling to achieve impedance transformation without relying on physical length; the matching capacitor adjusts the equivalent impedance through lumped parameters, avoiding the length limitation of the transmission line. This design reduces the matching circuit area by more than 50%.

[0154] In other embodiments, the power combining circuit may also be as follows: Figure 12 , Figure 13 The equivalent circuit is shown. Figure 12 In this circuit, the power combining circuit includes two integrated transformers T4 and T5, and two transmission lines. The outputs of the main and auxiliary amplification branches are connected to the primary sides of the two integrated transformers T4 and T5, respectively. The taps on the primary sides of both integrated transformers T4 and T5 are connected to a DC voltage source. The two ends of the secondary side of integrated transformer T5 are connected in series with two transmission lines, and then connected in parallel with the secondary side of integrated transformer T4. The secondary side of integrated transformer T4 serves as the power outputs Vout+ and Vout- of the gain-controllable power amplifier. Vout+ and Vout- are connected to the load. R L .

[0155] exist Figure 13 In the circuit, the power combining circuit includes two integrated transformers T4 and T5. The outputs of the main and auxiliary amplification branches are respectively connected to the primary sides of the two integrated transformers T4 and T5. Transmission lines are connected in series to the primary side of the integrated transformer T5 connected to the auxiliary amplification branch. Taps on the primary sides of both integrated transformers T4 and T5 are connected to a DC voltage source. One end of the secondary side of integrated transformer T4 is connected to one end of the secondary side of integrated transformer T5. The other ends of the secondary sides of integrated transformers T4 and T5 serve as the power outputs Vout+ and Vout- of the gain-controllable power amplifier. Vout+ and Vout- are connected to the load. R L .

[0156] Based on the above embodiments, the main features of the present invention are as follows.

[0157] Protection Point 1: The digital gain gate voltage control scheme is combined with Doherty technology and applied to efficiency-enhancing gain-controlled power amplifiers.

[0158] Technical Features: The power amplifier adopts a dual-path Doherty architecture. Signals received by both the main and auxiliary amplification branches are amplified by two cascaded differential common-source amplifiers. At the output, Doherty load modulation matching ensures high efficiency during power back-off. Furthermore, a digital gain control scheme is introduced: a digital-to-analog converter (DAC, which can be an R-2R architecture) generates different analog voltages, thus changing the transistor gate voltage and consequently altering the transistor's amplification capability, achieving adjustable gain.

[0159] Gain control and Doherty coordination mechanism: The main and auxiliary amplification branches can be independently adjusted by the DAC voltage control circuit to achieve four operating states: saturation output, power back-off, linear region, and complete shutdown. By combining the states and combining them with Doherty load modulation matching, the system can achieve high efficiency over a wide power output range.

[0160] Innovation and Scope of Protection: The solution protects the combination of "Doherty architecture + digital DAC gate voltage control + multi-stage amplification + branch operating state". It is different from a simple Doherty amplifier (without gain control) or a simple gain-controllable amplifier (efficiency drops sharply with power decline). The core lies in the dual characteristics of "efficiency enhancement + gain controllability" achieved by combining the two.

[0161] Protection point 2: Applied to the highly integrated design of long traces and phase calibration circuits for the output signal of the ring mixer oscillator circuit.

[0162] Application scenario: This addresses the phase shift problem when the output signal of a ring mixer oscillator circuit is transmitted to a gain-controllable power amplifier via a long trace.

[0163] Integrated structure: The phase calibration function is directly integrated into the long trace layout, eliminating the need for a separate phase shifter; the core of the phase calibration is a digitally controlled switched capacitor, which uses a differential connection (symmetrical to both sides of the long trace) to ensure signal transmission symmetry.

[0164] Innovation and Scope of Protection: This protection covers the "integrated design of long traces and digital control switched capacitor phase calibration circuits in the output signal transmission path of a ring mixer oscillator circuit." Unlike the traditional "long traces + independent phase shifters" solution, the core of this technology is to achieve phase calibration through the integrated layout of differential switched capacitors and long traces, significantly reducing the chip area.

[0165] The embodiments described above are merely illustrative of several implementations of the present invention, and while the descriptions are relatively specific and detailed, they should not be construed as limiting the scope of the invention patent. It should be noted that those skilled in the art can make various modifications and improvements without departing from the concept of the present invention, and these all fall within the protection scope of the present invention. Therefore, the protection scope of this invention patent should be determined by the appended claims.

Claims

1. A phase-calibrated gain-controllable power amplifier structure, characterized in that, It includes: A mixer circuit is used to mix a baseband signal with a carrier signal to form a radio frequency modulated signal. A phase calibration circuit is used to phase calibrate the radio frequency modulation signal; A gain-controlled power amplifier is used to amplify the phase-calibrated RF modulated signal. The gain-controlled power amplifier adopts a Doherty architecture amplifier circuit, with its main and auxiliary amplification branches amplifying the two initial signals to obtain two corresponding amplified signals. The gain-controlled power amplifier includes: a phase-shift power distribution circuit, used to split the RF modulated signal into two initial signals with a 90° phase difference; a Doherty architecture amplifier circuit, with its main and auxiliary amplification branches amplifying the two initial signals to obtain two corresponding amplified signals; a power combining circuit, used to combine the two amplified signals to obtain the amplified RF modulated signal applied to the load; and two DAC voltage control circuits, which control the output power of the amplifier by controlling the operating state of the two amplification branches respectively, to match the usage requirements of different loads. In the layout design of the gain controllable power amplifier structure, the phase calibration circuit can be directly integrated into the layout of the output signal transmission path of the mixer circuit by designing the phase calibration circuit, without the need to set up a separate layout for the phase calibration circuit. The phase calibration circuit is designed as multiple digitally controlled switched capacitors connected in parallel and differentially to the differential output terminal of the mixer circuit. Each digitally controlled switched capacitor includes transistors Q3~Q7, resistors R1 and R2, and capacitors C6 and C7. The gates of transistors Q3 and Q4 are connected and connected to a digital control signal. The sources of transistors Q3 and Q5 are connected and connected to a voltage source. The sources of transistors Q4 and Q6 are connected and grounded. The drains of transistors Q3 and Q4 are connected and connected to the gates of transistors Q5 and Q6. The drain of transistor Q6 is connected to the gate of transistor Q7. The drain of transistor Q7 is connected to one end of capacitor C6, and the other end of capacitor C6 is defined as port one. The source of transistor Q7 is connected to one end of capacitor C7, and the other end of capacitor C7 is defined as port two. One end of resistor R1 is connected to the drain of transistor Q7, and the other end of resistor R1 is connected to the source of transistor Q7 and also to the gate of transistor Q5 via resistor R2. The digital control switching capacitors are connected in parallel to the differential output terminal through port one and port two.

2. The phase-calibrated gain-controllable power amplifier structure according to claim 1, characterized in that, The output power is highest when both the main and auxiliary amplification branches are in saturated output state; the output power is high when both are in power retraction state; the output power is medium when both are in power retraction state and linear region state; the output power is low when both are in linear region state and off state; and there is no output power when both are off state.

3. The phase-calibrated gain-controllable power amplifier structure according to claim 2, characterized in that, Both the main and auxiliary amplification branches include an integrated transformer T3 and two cascaded differential common-source amplifiers connected through the integrated transformer T3. Each differential common-source amplifier includes capacitors C3 and C4 and transistors Q1 and Q2. The gates of transistors Q1 and Q2 serve as the differential input terminals of the differential common-source amplifiers, and the drains of transistors Q1 and Q2 serve as the differential output terminals of the differential common-source amplifiers. The sources of transistors Q1 and Q2 are both grounded. Capacitor C3 is connected in series between the gate of transistor Q1 and the drain of transistor Q2, and capacitor C4 is connected in series between the gate of transistor Q2 and the drain of transistor Q1. The output of the DAC voltage control circuit corresponding to the main amplification branch is connected to the tap of the integrated transformer T3 in the main amplification branch, and the output of the DAC voltage control circuit corresponding to the auxiliary amplification branch is connected to the tap on the secondary side of the integrated transformer T3 in the auxiliary amplification branch; the taps on the primary side of both integrated transformers T3 are connected to a DC voltage source.

4. The phase-calibrated gain-controllable power amplifier structure according to claim 3, characterized in that, Each DAC voltage control circuit uses an R-2R structure DAC to control the gate voltage of transistors Q1 and Q2 in the corresponding amplification branch, thereby controlling the working state of the main and auxiliary amplification branches.

5. The phase-calibrated gain-controllable power amplifier structure according to claim 2, characterized in that, The phase-shift power distribution circuit includes phase-shift capacitors C1 and C2 and integrated transformers T1 and T2. The radio frequency modulation signals Vin+ and Vin- are split into two paths. One path is connected to the two input terminals of the primary side of integrated transformer T1 via phase-shift capacitors C1 and C2, respectively. The other path is connected to the two input terminals of the primary side of integrated transformer T2, respectively. The secondary sides of integrated transformers T1 and T2 are output to the main and auxiliary amplification branches, respectively. The taps on the secondary side of integrated transformer T1 are connected to the bias voltage, and the tap voltage on the secondary side of integrated transformer T2 is controlled by the DAC voltage control circuit corresponding to the auxiliary amplification branch.

6. The phase-calibrated gain-controllable power amplifier structure according to claim 2, characterized in that, The phase-shift power distribution circuit adopts a hybrid quadrature coupling power divider circuit, including: integrated transformers T6 and T7, resistors R3~R7, phase-shift capacitors C8~C11, and inductors L1~L4; one end of the primary side of integrated transformer T6 and one end of the primary side of integrated transformer T7 are connected to the RF modulation signals Vin+ and Vin- respectively; one end of the secondary side of integrated transformer T6 is connected to one end of the secondary side of integrated transformer T7 via resistor R3; one path of the other end of the secondary side of integrated transformer T6 forms output node one through resistor R4 and inductor L1, while the other path is connected between resistor R5 and inductor L3 through phase-shift capacitor C9; one path of the other end of the secondary side of integrated transformer T7 is connected through... Resistor R7 and inductor L2 form output node two, while another path is connected between resistor R6 and inductor L4 via phase shift capacitor C10; the other end of the primary side of integrated transformer T6 forms output node three via resistor R5 and inductor L3, while another path is connected between resistor R7 and inductor L2 via phase shift capacitor C11; the other end of the primary side of integrated transformer T7 forms output node four via resistor R6 and inductor L4, while another path is connected between resistor R4 and inductor L1 via phase shift capacitor C8; nodes one and two differentially output one initial signal to the main amplification branch, and nodes three and four differentially output another initial signal with a 90° phase difference to the auxiliary amplification branch.

7. The phase-calibrated gain-controllable power amplifier structure according to claim 2, characterized in that, The power combining circuit includes two integrated transformers T4 and T5, and a matching capacitor C5 or a transmission line. The outputs of the main and auxiliary amplification branches are respectively connected to the primary side of the two integrated transformers T4 and T5. The taps on the primary side of the two integrated transformers T4 and T5 are all connected to a DC voltage source. One end of the secondary side of integrated transformer T4 is connected to one end of the secondary side of integrated transformer T5 through the matching capacitor C5 or the transmission line. The other end of the secondary side of integrated transformer T5 is grounded and, together with the other end of the secondary side of integrated transformer T4, serves as the power outputs Vout- and Vout+ of the gain-controllable power amplifier.

8. The phase-calibrated gain-controllable power amplifier structure according to claim 2, characterized in that, The power combining circuit includes two integrated transformers T4 and T5 and two transmission lines. The outputs of the main and auxiliary amplification branches are respectively connected to the primary side of the two integrated transformers T4 and T5. The taps on the primary side of the two integrated transformers T4 and T5 are all connected to a DC voltage source. The two ends of the secondary side of the integrated transformer T5 are connected in series with two transmission lines, and then connected in parallel with the secondary side of the integrated transformer T4. The secondary side of the integrated transformer T4 serves as the power outputs Vout+ and Vout- of the gain-controllable power amplifier.

9. The phase-calibrated gain-controllable power amplifier structure according to claim 2, characterized in that, The power combining circuit includes two integrated transformers T4 and T5. The outputs of the main amplification branch are connected to the primary side of integrated transformer T4, and the outputs of the auxiliary amplification branch are connected to both ends of the primary side of integrated transformer T4 through a transmission line. The taps on the primary side of both integrated transformers T4 and T5 are connected to a DC voltage source. One end of the secondary side of integrated transformer T4 is connected to one end of the secondary side of integrated transformer T5. The other ends of the secondary side of integrated transformer T4 and the other ends of the secondary side of integrated transformer T5 serve as the power outputs Vout+ and Vout- of the gain-controllable power amplifier.

10. The phase-calibrated gain-controllable power amplifier structure according to claim 2, characterized in that, In the DAC voltage control circuit corresponding to the auxiliary amplification branch, its output is introduced into an isolation voltage regulator circuit.

11. A vehicle-mounted millimeter-wave radar multi-channel transmitter system, comprising multiple transmission channels, each transmission channel comprising a phase-calibrated gain-controllable power amplifier structure and an antenna; The gain-controllable power amplifier structure includes a mixer circuit, a phase calibration circuit, and a gain-controllable power amplifier. The baseband signal and a multi-phase carrier signal are mixed by the mixer circuit, then phase-calibrated by the phase calibration circuit, and finally amplified by the gain-controllable power amplifier before being transmitted through an antenna. Its characteristic is that… The gain-controllable power amplifier adopts the Doherty architecture amplification circuit, with its main and auxiliary amplification branches amplifying two initial signals to obtain two corresponding amplified signals. The gain-controllable power amplifier includes: a phase-shift power distribution circuit, used to split the RF modulation signal into two initial signals with a 90° phase difference; a power combining circuit, used to combine the two amplified signals to obtain the amplified RF modulation signal applied to the load; and two DAC voltage control circuits, which control the output power of the amplifier by controlling the operating state of the two amplification branches to match the usage requirements of different loads. In the layout design of the gain controllable power amplifier structure, by designing a phase calibration circuit, the phase calibration circuit can be directly integrated into the layout where the output signal transmission path of the mixer circuit is located, without the need to set up a separate layout for the phase calibration circuit. The phase calibration circuit is designed as multiple digitally controlled switched capacitors connected in parallel and differentially to the differential output terminal of the mixer circuit. Each digitally controlled switched capacitor includes transistors Q3~Q7, resistors R1 and R2, and capacitors C6 and C7. The gates of transistors Q3 and Q4 are connected and connected to a digital control signal. The sources of transistors Q3 and Q5 are connected and connected to a voltage source. The sources of transistors Q4 and Q6 are connected and grounded. The drains of transistors Q3 and Q4 are connected and connected to the gates of transistors Q5 and Q6. The drain of transistor Q6 is connected to the gate of transistor Q7. The drain of transistor Q7 is connected to one end of capacitor C6, and the other end of capacitor C6 is defined as port one. The source of transistor Q7 is connected to one end of capacitor C7, and the other end of capacitor C7 is defined as port two. One end of resistor R1 is connected to the drain of transistor Q7, and the other end of resistor R1 is connected to the source of transistor Q7 and also to the gate of transistor Q5 via resistor R2. The digital control switching capacitors are connected in parallel to the differential output terminal through port one and port two.

12. The vehicle-mounted millimeter-wave radar multi-channel transmitter system according to claim 11, characterized in that, The output power is highest when both the main and auxiliary amplification branches are in saturated output state; the output power is high when both are in power retraction state; the output power is medium when both are in power retraction state and linear region state; the output power is low when both are in linear region state and off state; and there is no output power when both are off state.

13. The vehicle-mounted millimeter-wave radar multi-channel transmitter system according to claim 12, characterized in that, Both the main and auxiliary amplification branches include an integrated transformer T3 and two cascaded differential common-source amplifiers connected through the integrated transformer T3. Each differential common-source amplifier includes capacitors C3 and C4 and transistors Q1 and Q2. The gates of transistors Q1 and Q2 serve as the differential input terminals of the differential common-source amplifiers, and the drains of transistors Q1 and Q2 serve as the differential output terminals of the differential common-source amplifiers. The sources of transistors Q1 and Q2 are both grounded. Capacitor C3 is connected in series between the gate of transistor Q1 and the drain of transistor Q2, and capacitor C4 is connected in series between the gate of transistor Q2 and the drain of transistor Q1. The output of the DAC voltage control circuit corresponding to the main amplification branch is connected to the tap of the integrated transformer T3 in the main amplification branch, and the output of the DAC voltage control circuit corresponding to the auxiliary amplification branch is connected to the tap on the secondary side of the integrated transformer T3 in the auxiliary amplification branch; the taps on the primary side of both integrated transformers T3 are connected to a DC voltage source.

14. The vehicle-mounted millimeter-wave radar multi-channel transmitter system according to claim 13, characterized in that, Each DAC voltage control circuit uses an R-2R structure DAC to control the gate voltage of transistors Q1 and Q2 in the corresponding amplification branch, thereby controlling the working state of the main and auxiliary amplification branches.

15. The vehicle-mounted millimeter-wave radar multi-channel transmitter system according to claim 12, characterized in that, The phase-shift power distribution circuit includes phase-shift capacitors C1 and C2 and integrated transformers T1 and T2. The radio frequency modulation signals Vin+ and Vin- are split into two paths. One path is connected to the two input terminals of the primary side of integrated transformer T1 via phase-shift capacitors C1 and C2, respectively. The other path is connected to the two input terminals of the primary side of integrated transformer T2, respectively. The secondary sides of integrated transformers T1 and T2 are output to the main and auxiliary amplification branches, respectively. The taps on the secondary side of integrated transformer T1 are connected to the bias voltage, and the tap voltage on the secondary side of integrated transformer T2 is controlled by the DAC voltage control circuit corresponding to the auxiliary amplification branch.

16. The vehicle-mounted millimeter-wave radar multi-channel transmitter system according to claim 12, characterized in that, The phase-shift power distribution circuit adopts a hybrid quadrature coupling power divider circuit, including: integrated transformers T6 and T7, resistors R3~R7, phase-shift capacitors C8~C11, and inductors L1~L4; one end of the primary side of integrated transformer T6 and one end of the primary side of integrated transformer T7 are connected to the RF modulation signals Vin+ and Vin- respectively; one end of the secondary side of integrated transformer T6 is connected to one end of the secondary side of integrated transformer T7 via resistor R3; one path of the other end of the secondary side of integrated transformer T6 forms output node one through resistor R4 and inductor L1, while the other path is connected between resistor R5 and inductor L3 through phase-shift capacitor C9; one path of the other end of the secondary side of integrated transformer T7 is connected through... Resistor R7 and inductor L2 form output node two, while another path is connected between resistor R6 and inductor L4 via phase shift capacitor C10; the other end of the primary side of integrated transformer T6 forms output node three via resistor R5 and inductor L3, while another path is connected between resistor R7 and inductor L2 via phase shift capacitor C11; the other end of the primary side of integrated transformer T7 forms output node four via resistor R6 and inductor L4, while another path is connected between resistor R4 and inductor L1 via phase shift capacitor C8; nodes one and two differentially output one initial signal to the main amplification branch, and nodes three and four differentially output another initial signal with a 90° phase difference to the auxiliary amplification branch.

17. The vehicle-mounted millimeter-wave radar multi-channel transmitter system according to claim 12, characterized in that, The power combining circuit includes two integrated transformers T4 and T5, and a matching capacitor C5 or a transmission line. The outputs of the main and auxiliary amplification branches are respectively connected to the primary side of the two integrated transformers T4 and T5. The taps on the primary side of the two integrated transformers T4 and T5 are all connected to a DC voltage source. One end of the secondary side of integrated transformer T4 is connected to one end of the secondary side of integrated transformer T5 through the matching capacitor C5 or the transmission line. The other end of the secondary side of integrated transformer T5 is grounded and, together with the other end of the secondary side of integrated transformer T4, serves as the power outputs Vout- and Vout+ of the gain-controllable power amplifier.

18. The vehicle-mounted millimeter-wave radar multi-channel transmitter system according to claim 12, characterized in that, The power combining circuit includes two integrated transformers T4 and T5 and two transmission lines. The outputs of the main and auxiliary amplification branches are respectively connected to the primary side of the two integrated transformers T4 and T5. The taps on the primary side of the two integrated transformers T4 and T5 are all connected to a DC voltage source. The two ends of the secondary side of the integrated transformer T5 are connected in series with two transmission lines, and then connected in parallel with the secondary side of the integrated transformer T4. The secondary side of the integrated transformer T4 serves as the power outputs Vout+ and Vout- of the gain-controllable power amplifier.

19. The vehicle-mounted millimeter-wave radar multi-channel transmitter system according to claim 12, characterized in that, The power combining circuit includes two integrated transformers T4 and T5. The outputs of the main amplification branch are connected to the primary side of integrated transformer T4, and the outputs of the auxiliary amplification branch are connected to both ends of the primary side of integrated transformer T4 through a transmission line. The taps on the primary side of both integrated transformers T4 and T5 are connected to a DC voltage source. One end of the secondary side of integrated transformer T4 is connected to one end of the secondary side of integrated transformer T5. The other ends of the secondary side of integrated transformer T4 and the other ends of the secondary side of integrated transformer T5 serve as the power outputs Vout+ and Vout- of the gain-controllable power amplifier.

20. The vehicle-mounted millimeter-wave radar multi-channel transmitter system according to claim 12, characterized in that, In the DAC voltage control circuit corresponding to the auxiliary amplification branch, its output is introduced into an isolation voltage regulator circuit.

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