Atomization hole filling method and corresponding two-fluid atomization hole filling device

By using a two-fluid atomization filling method to form an insulating layer in a through-silicon via (TSV) structure with non-conductive fillers, the mechanical strength and reliability issues of TSVs are solved, packaging costs are reduced, the process flow is simplified, and the matching of the thermal expansion coefficients and interfacial bonding performance of the materials are improved.

CN120834079APending Publication Date: 2025-10-24HUATIAN TECHNOLOGY (KUNSHAN) ELECTRONICS CO LTD
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Patent Information

Application Number
CN202511000269.4
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2025-07-21
Publication Date
2025-10-24

AI Technical Summary

Technical Problem

Existing technologies in through-silicon via structures suffer from mechanical strength and reliability issues due to high aspect ratios, difficulty in uniformly filling with filler materials, high cost of high-temperature curing processes, poor material compatibility, and stress concentration and interface separation problems caused by mismatched coefficients of thermal expansion.

Method used

The two-fluid atomization via filling method uses non-conductive fillers, such as organic dielectric materials, oxide metal materials, oxide ceramic materials, or polymer materials, to form an insulating layer at low temperature through a two-fluid atomization via filling device. Combined with a mask, the filler is precisely printed onto the through-silicon via and the chip surface to form pad openings, and then cured at low temperature.

Benefits of technology

It improves the mechanical strength and reliability of through-silicon vias, reduces packaging costs, solves the problem of mismatched coefficients of thermal expansion, avoids solder bleed and ball drop, simplifies the process flow, and reduces the risk of high-temperature curing.

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Abstract

The invention provides an atomization hole filling method, which not only solves the problems of residual stress and reliability at the bottom of a chip through hole, but also reduces the packaging cost. A non-conductive filler is jet-printed on a cavity and a surface of a silicon through hole interconnection structure on the back of a chip through a two-fluid atomization hole filling device to form a non-conductive filler area, the cavity of a silicon through hole is filled with the non-conductive filler, the non-conductive filler is printed and attached to the exposed surface of the chip, and a non-conductive filler layer printed and attached to the exposed surface of the chip is provided with a bonding pad opening.
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Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of semiconductor integrated circuit manufacturing, in particular to a method for filling holes by atomization, and further provides a corresponding two-fluid atomization hole filling device. BACKGROUND

[0002] Through Silicon Via (TSV) is a kind of vertical interconnection structure penetrating through silicon wafer or chip. TSV technology mainly takes small aperture size and high aspect ratio through hole as development goal and direction, which not only brings opportunities for the development of integrated circuit industry, but also brings new challenges. As an important technology for realizing electrical and physical connection between wafers or chips, TSV technology plays an irreplaceable role in realizing three-dimensional packaging technology and integrating multiple systems.

[0003] For the silicon via structure, the TSV aspect ratio will affect the mechanical strength and reliability problems. If the TSV aspect ratio is too high, the depth of the silicon via will increase and the aperture will relatively become smaller. During the manufacturing process, this will cause the stress concentration phenomenon in the silicon wafer to intensify. For example, in the etching and filling process steps, due to the existence of high aspect ratio structure, the process difficulty increases, and defects such as residual stress at the bottom of the via are more likely to occur, thereby reducing the overall mechanical strength of the chip, making the chip more likely to crack or even break when subjected to external force impact or thermal stress change. In addition, high aspect ratio TSV also brings challenges in the packaging process. Because of the large depth of the via, it is difficult for the filling material to completely and uniformly fill, and there may be voids or non-dense filling. This not only affects the electrical performance, but also weakens the bonding force between the chip and the packaging material, reduces the mechanical reliability of the entire packaging structure, and may cause delamination and other problems during long-term use. In order to improve the mechanical stress and prevent the crack of the functional layer in the hole, the side wall brittle node layer (generally inorganic oxides such as silicon oxide and silicon nitride) and the metal conductive layer (generally metal conductive materials such as titanium, copper, tungsten and nickel), the commonly used method for small opening or high aspect ratio TSV micro hole and micro groove (in order to protect the chip, generally the chip cutting groove also needs to be etched and filled with insulating material to prevent edge structure delamination and improve reliability) is to use a pressure film method to fill a UV type dry film (a thin film made of polymer material, which can be epoxy resin, acrylic resin and polyimide resin. It has certain flexibility and plasticity, and can be firmly combined with the substrate or other materials under the action of heat and pressure) in the pores and edge cutting grooves of the chip, and then expose the pads under the passivation layer by exposing and developing the corresponding area of the passivation layer to expose the pads on the pads. Arrange the circuit layer connected to the pads; make a tin ball on the circuit layer. The advantages of this process are good film thickness uniformity and precise opening; but the main disadvantages are

[0004] 1. High cost: the dry film synthesis process is complex, the production process needs strict control, the price is expensive, the overall process cost is high, and it is not suitable for large-scale production;

[0005] 2. High process condition: dry film materials generally need to be cured at a temperature of more than 200°C, and the curing time needs to be at least more than 2 hours. The high-temperature range that the chip can withstand varies with materials and processes, as follows: commercial-grade chips: the upper limit of high-temperature resistance is between 70 and 85 degrees Celsius; industrial-grade chips: the upper limit of high-temperature resistance is between 100 and 125 degrees Celsius; automotive-grade chips: the upper limit of high-temperature resistance is also between 100 and 125 degrees Celsius, and some can reach higher temperatures; wide-bandgap semiconductor chips: such as silicon carbide (SiC) and gallium nitride (GaN) chips, which have better high-temperature resistance and can work normally in an environment with a temperature of more than 200 degrees Celsius; for some chips that cannot withstand the high-temperature environment of dry film curing, chip aging and reliability failure are easily caused;

[0006] 3. Poor compatibility with some materials: the bonding force of dry film materials with some metals or other organic materials may not be ideal, and in the long-term use process, interface separation, peeling, and other problems may occur, which may affect the stability and reliability of the solder resist layer during subsequent solder ball production;

[0007] 4. Thermal expansion coefficient matching problem: although dry film has good heat resistance, it may have differences in thermal expansion coefficient with the circuit board substrate material, and in an environment with large temperature changes, the solder resist layer may crack, blister, and other defects due to thermal stress, affecting the solder resist performance and service life of the circuit board. SUMMARY

[0008] To solve the above problems, the present application provides a method for filling holes by atomization, which not only solves the residual stress and reliability problem of the chip via hole bottom, but also reduces the packaging cost.

[0009] A method for filling holes by atomization, characterized by: forming a non-conductive filler area by spraying a non-conductive filler on the cavity and surface of the back silicon through-hole interconnection structure of the chip using a two-fluid atomization hole-filling device, the non-conductive filler filling the cavity of the silicon through-hole and adhering to the exposed surface of the chip, and the non-conductive filler layer adhering to the exposed surface of the chip is provided with a pad opening.

[0010] Further characterized by:

[0011] The non-conductive filler is specifically an organic dielectric material, an oxide metal material, an oxide ceramic material, or a polymer material combination or a single polymer formed by combination or alone;

[0012] The two-fluid atomizing hole-filling device, when spraying the non-conductive filler, firstly mixes the mixture of the non-conductive filler and the solvent to form a polymer solution with suitable viscosity and surface tension, pours the polymer solution into the liquid storage tank of the two-fluid atomizing hole-filling device, simultaneously, connects the compressed air or inert gas into the gas channel, then starts the two-fluid atomizing hole-filling device, the gas flows out from the gas channel at high speed, forms negative pressure at the nozzle, sucks the liquid from the liquid storage tank and carries it into the nozzle, after the liquid and the gas are mixed, the high-speed flow of the gas generates shear force on the liquid, the polymer solution is atomized into fine droplets, and is accurately sprayed into the TSV gap, the TSV gap includes the cavity of the through silicon via and the exposed surface of the chip.

[0013] The non-conductive filler is accurately sprayed into the cavity of the through silicon via and the exposed surface of the chip through the hollow part on the mask, after the solvent volatilizes, the polymer forms an insulating layer on the hole wall of the TSV gap and forms a pad opening on the surface of the chip.

[0014] The formed insulating layer is subjected to curing treatment to further improve the performance and quality of the insulating layer, and the curing treatment is performed by heating at a low temperature below 100 DEG C until the insulating layer is reliably cured.

[0015] The two-fluid atomizing hole-filling device, characterized in that it comprises a mixing chamber, the outlet of the mixing chamber is provided with a nozzle, the mixing chamber comprises a gas inlet and a liquid inlet channel, the input end of the liquid inlet channel is sequentially connected with a pump body and a liquid storage tank.

[0016] Further characterized in that the gas inlet is arranged around the outer periphery of the mixing chamber, and the gas inlet is connected with high-speed compressed air or inert gas;

[0017] When working, the nozzle is located directly above the mask plate, and the wafer provided with the chip is arranged directly below the mask plate.

[0018] After the application is adopted, by adjusting the proportion of different components of the non-conductive filler of the two-fluid hole filling material, the thermal expansion coefficient of the material can be matched with other components of the chip, so that the expansion and contraction degrees of the hole filling material and the surrounding structure are similar during the thermal cycle of the chip, thereby reducing the stress generated by thermal mismatch; and the component ratio of the non-conductive filler is adjusted, thereby adjusting the elastic modulus of the hole filling material. The hole filling material with appropriate elastic modulus can effectively buffer and disperse stress when the chip is subjected to external force, avoid stress concentration in certain weak parts of the chip, improve stress distribution, and thereby increase the overall mechanical strength of the chip; and the non-conductive filler can also improve the interfacial bonding performance of the hole filling material and other structures inside the chip. Good interfacial bonding can make the hole filling material work better with the chip components, jointly bear external force and thermal stress, solve the problems of tin penetration and ball dropping when the solder mask connects the solder balls, improve the stability and reliability of the chip; the two-fluid hole filling eliminates the coating, exposure and development steps, replaces the traditional dry film material, reduces the whole process procedure, and greatly reduces the process cost. BRIEF DESCRIPTION OF DRAWINGS

[0019] Figure 1 Schematic diagram of step S1 of the atomized hole filling method of the specific embodiment of the application;

[0020] Figure 2 Schematic diagram of step S2 of the atomized hole filling method of the specific embodiment of the application;

[0021] Figure 3 Schematic diagram of step S3 of the atomized hole filling method of the specific embodiment of the application;

[0022] Figure 4 Schematic diagram of step S4 of the atomized hole filling method of the specific embodiment of the application;

[0023] Figure 5 Schematic diagram of step S5 of the atomized hole filling method of the specific embodiment of the application;

[0024] Figure 6 Schematic diagram of step S6 of the atomized hole filling method of the specific embodiment of the application;

[0025] Figure 7 Schematic diagram of step S7 of the atomized hole filling method of the specific embodiment of the application;

[0026] Figure 8 Schematic diagram of step S8 of the atomized hole filling method of the specific embodiment of the application;

[0027] Figure 9 Schematic diagram of step S9 of the atomized hole filling method of the specific embodiment of the application;

[0028] Figure 10The schematic diagram of the filling hole method of the specific embodiment of the application is shown in step S10.

[0029] Figure 11 The schematic diagram of the two-fluid atomizing filling hole device of the application is shown in step S10.

[0030] The names corresponding to the serial numbers in the figure are as follows:

[0031] Chip 1, wafer 2, glass 3, bonding glue 4, dielectric layer 5, RDL 6, insulating layer 7, tin ball 8.

[0032] Mixing cavity 10, nozzle 20, gas inlet 11, liquid inlet channel 12, pump body 30, liquid storage tank 40, mask 50. DETAILED DESCRIPTION

[0033] An atomizing filling hole method is shown in Figures 1-11 : A non-conductive filler is sprayed and printed to form a non-conductive filler area on the cavity and surface of the through-silicon via interconnection structure at the back of the chip by using a two-fluid atomizing filling hole device. The non-conductive filler is filled in the cavity of the through-silicon via and printed on the exposed surface of the chip. The non-conductive filler layer printed on the exposed surface of the chip is provided with a pad opening.

[0034] In specific implementation, the non-conductive filler is specifically a mixture of organic dielectric material, oxide metal material, oxide ceramic material, and polymer material.

[0035] When the two-fluid atomizing filling hole device 100 sprays the non-conductive filler, the mixture of the non-conductive filler and the solvent is mixed in advance to form a polymer solution with suitable viscosity and surface tension, and is poured into the liquid storage tank 40 of the two-fluid atomizing filling hole device 100. At the same time, compressed air or inert gas is connected to the gas channel. Then, the two-fluid atomizing filling hole device is started. The gas flows out of the gas channel at high speed, forming a negative pressure at the nozzle, sucking the liquid out of the liquid storage tank and into the nozzle. After the liquid and the gas are mixed, the high-speed flow of the gas generates shear force on the liquid, atomizing the polymer solution into fine droplets, which are accurately sprayed into the TSV gap, including the cavity of the through-silicon via and the exposed surface of the chip.

[0036] The non-conductive filler is accurately sprayed into the cavity of the through-silicon via and the exposed surface of the chip through the hollow part of the mask. After the solvent evaporates, the polymer forms an insulating layer on the hole wall of the TSV gap and forms a pad opening on the surface of the chip.

[0037] The formed insulating layer is subjected to curing treatment to further improve the performance and quality of the insulating layer. During the curing treatment, low-temperature heating below 100°C is performed until the insulating layer is reliably cured.

[0038] The operation steps of the specific embodiment are as follows:

[0039] S1, provide a wafer 2 with a chip 1 structure, the chip 1 surface has a solder pad, the solder pad material is generally a conductive metal layer such as copper, aluminum, copper alloy, aluminum alloy, the solder pad surface has a dielectric layer, the dielectric material is generally an oxide material such as silicon oxide, silicon nitride, silicon oxynitride (see Figure 1 );

[0040] S2, if the silicon is relatively thin (more fragile, difficult to process) or optical chip (need to protect the photosensitive area), then the bonding carrier (temporary bonding or permanent bonding) is needed, the invention takes a glass as an example, a layer of bonding glue 4 is coated on the surface of the glass 3, and the glass and the wafer are bonded (see Figure 2 );

[0041] S3, complete wafer 2 thinning by grinding or dry etching (see Figure 3 );

[0042] S4, complete through-hole etching and cutting groove etching around the chip through processes such as photolithography and dry etching (see Figure 4 ), since the focus of the invention is mainly on hole and groove structure filling, the two complete crystal grain structures in the schematic diagram are partial through-hole and cutting groove structures between the two crystal grains;

[0043] S5, prepare an insulating dielectric layer 5 on the surface of the chip by chemical vapor deposition (CVD) or atomic layer deposition (ALD), the dielectric layer 5 can be a material layer such as silicon oxide, silicon nitride, silicon oxynitride (see Figure 5 );

[0044] S6, etch the dielectric layer on the hole bottom solder pad through a dry etching process to make the hole bottom windowed, and the metal solder pad is exposed, which is convenient for subsequent electrical signal lead-out (see Figure 6 );

[0045] S7, use metal redistribution (RDL6) to lead out the signals of the chip, when redistributing, first deposit a seed layer such as titanium, copper, aluminum and other conductive metals, then prepare a circuit through photolithography, and then thicken the seed layer circuit to the required thickness of the product through electroplating; for products with high-density I / O interfaces, multi-layer wiring (RDL) can be used, the invention only shows one layer, and the actual number of RDL layers is not limited, and the last layer of circuit can be protected by electroplating nickel / gold on RDL6 to prevent corrosion of the metal circuit (see Figure 7 );

[0046] S8, using the two-fluid atomization hole filling device to accurately print the non-conductive filler (which can be some organic dielectric material, oxide metal material, oxide ceramic material, polymer material) through the hollow part of the mask into the TSV gap (chip hole groove and chip surface); after the solvent volatilizes, the polymer forms an insulating layer 7 on the hole wall of the TSV gap and forms a pad opening on the product surface; when curing treatment is needed, the formed insulating layer is treated, and the heating temperature is generally below 100 DEG C (see Figure 8 );

[0047] S9, the tin ball 8 is prepared at the pad opening by printing or ball planting (see Figure 9 );

[0048] S10, finally, the whole wafer is cut to form a single package, if the product is a temporary bonding structure, the laser or heating method is used to debond before cutting into a single package, and the schematic diagram of the present application is a permanent bonding product, and debonding is not needed (see Figure 10 )。

[0049] The present application mainly focuses on hole filling of groove structure, and the schematic diagram is not two complete single packages, but only the part of structure close to the cutting groove is shown.

[0050] The two-fluid atomization hole filling device is shown in Figure 11 : it comprises a mixing cavity 10, the outlet of the mixing cavity 10 is provided with a spray head 20, the mixing cavity 10 comprises a gas inlet 11 and a liquid inlet channel 12, the input end of the liquid inlet channel 12 is sequentially connected with a pump body 30 and a liquid storage tank 40.

[0051] In specific implementation, the gas inlet 11 is arranged around the outer periphery of the mixing cavity 10, and the gas inlet 11 is connected with high-speed compressed air or inert gas;

[0052] When working, the spray head 20 is located directly above the mask plate 50, and the wafer 2 provided with the chip is arranged directly below the mask plate 50.

[0053] The beneficial effects of the present application are:

[0054] 1. By adjusting the ratio of different components of the non-conductive filler of the two-fluid hole filling material, the thermal expansion coefficient of the material can be matched with other parts of the chip, so that the expansion and shrinkage degree of the hole filling material and the surrounding structure is similar during the heat cycle process of the chip, thereby reducing the stress generated by thermal mismatch;

[0055] 2. By properly changing the material composition ratio, the elastic modulus of the filling material can be adjusted. The filling material with proper elastic modulus can effectively buffer and disperse stress when the chip is subjected to external force, avoid stress concentration in some weak parts of the chip, improve stress distribution, and thus increase the overall mechanical strength of the chip,

[0056] 3. By changing the material composition ratio of the non-conductive filler according to the material of the chip, the interface bonding performance of the filling material with other structures inside the chip can also be improved. Good interface bonding can make the filling material work better with the chip components to jointly bear external force and thermal stress, solve the problems of tin penetration and ball falling when the solder mask connects the tin balls, and improve the stability and reliability of the chip;

[0057] 4. The original dry film material is generally solid or semi-solid, which needs certain external force to deform and fill into the hole. Its viscosity is relatively high, usually in the range of several thousand to several ten thousand centipoise (cP) or even higher. The dry film is prone to bottom cavity problems when the TSV aspect ratio is greater than 2:1, and the process is difficult. The two-fluid filling uses the interaction between gas and liquid to atomize or form a fine stream for filling. The liquid in the two-fluid generally needs to have good flowability so that it can be smoothly carried out and uniformly filled into the hole under the action of gas. Therefore, its viscosity is relatively low, generally in the range of several dozen to several hundred centipoise (cP), and can be applied to TSV structures of various aspect ratios. The process is simple and has a large window, avoiding the problem of cavity;

[0058] 5. The two-fluid filling eliminates the coating, exposure, and development steps, and replaces the traditional dry film material, reducing the whole process and greatly reducing the process cost;

[0059] 6. The dry film material has a high curing temperature, and the chip sensitive to temperature (such as a chip manufactured by a special process or containing a heat-sensitive material or device) may have performance degradation, material damage, and other problems at high temperatures. The low-temperature curing characteristics of the two-fluid material can avoid thermal damage to such chips and ensure their performance and reliability;

[0060] 7. The two-fluid material selected is a mixed material with good sealing and moisture resistance. In addition to filling the hole, it can also fill the cutting groove around the chip to form an edge. This packaging structure not only provides good protection for the sidewall of the chip, but also has excellent sealing performance to effectively block the intrusion of water vapor and provide product reliability.

[0061] It will be obvious to a person skilled in the art that the application is not limited to the details of the foregoing exemplary embodiments and can be implemented in other concrete forms without departing from the spirit or essential characteristics of the application. The embodiments are therefore to be considered in all respects as illustrative and not restrictive, the scope of the application being indicated by the appended claims rather than by the foregoing description, and all changes which come within the meaning and range of equivalency of the claims are therefore intended to be embraced therein. No reference signs in the claims should be considered as limiting the scope of the claims to the identity of the reference signs therein.

[0062] Furthermore, it should be understood that although the description is made on the basis of the embodiments, not every embodiment contains only one independent technical solution, and the description of the specification is only for the sake of clarity, and those skilled in the art should consider the specification as a whole, and the technical solutions in each embodiment can also be appropriately combined to form other embodiments that those skilled in the art can understand.

Claims

1. A method of filling a hole by atomization, characterized by: In the cavity and surface of the through silicon via interconnection structure at the back of the chip, a non-conductive filler is sprayed to form a non-conductive filler area by a two-fluid atomizing hole filling device, the non-conductive filler is filled in the cavity of the through silicon via and attached to the exposed surface of the chip, and the non-conductive filler layer attached to the exposed surface of the chip is provided with a pad opening.

2. The method of claim 1, wherein: The non-conductive filler is specifically an organic dielectric material, an oxide metal material, an oxide ceramic material, or a polymer material combined or formed alone.

3. The method of claim 2, wherein: When the non-conductive filler is sprayed by the two-fluid atomizing hole filling device, a mixture of the non-conductive filler and a solvent is mixed in advance to form a polymer solution with suitable viscosity and surface tension, poured into a liquid storage tank of the two-fluid atomizing hole filling device, and at the same time, compressed air or inert gas is connected to a gas channel, then the two-fluid atomizing hole filling device is started, gas flows out at high speed from the gas channel, forms negative pressure at the nozzle, sucks liquid from the liquid storage tank and carries it into the nozzle, and after the liquid and gas are mixed, the high-speed flow of the gas produces shear force on the liquid, so that the polymer solution is atomized into fine droplets and accurately sprayed into the TSV gap, which includes the cavity of the through silicon via and the exposed surface of the chip.

4. The method of claim 3, wherein: The non-conductive filler is accurately sprayed into the cavity of the through silicon via and the exposed surface of the chip through the hollow part of the mask, and after the solvent evaporates, the polymer forms an insulating layer on the hole wall of the TSV gap and forms a pad opening on the surface of the chip.

5. The method of claim 4, wherein: The formed insulating layer is subjected to curing treatment to further improve the performance and quality of the insulating layer, and during the curing treatment, low-temperature heating below 100°C is performed until the insulating layer is reliably cured.

6. A two-fluid atomized hole filling apparatus for performing an atomized hole filling method as claimed in any one of claims 1-5, characterized by: It comprises a mixing cavity, the outlet of the mixing cavity is provided with a nozzle, the mixing cavity comprises a gas inlet and a liquid inlet channel, the input end of the liquid inlet channel is sequentially connected with a pump body and a liquid storage tank.

7. The two-fluid atomizing hole filling apparatus of claim 6, wherein: The gas inlet is arranged around the outer periphery of the mixing cavity, and the gas inlet is connected with high-speed compressed air or inert gas.

8. The two-fluid atomizing hole filling apparatus of claim 7, wherein: When working, the nozzle is located directly above the mask plate, and the wafer provided with the chip is arranged directly below the mask plate.