Power semiconductor device structure and growth method thereof

Abstract

The invention relates to the technical field of semiconductor devices, in particular to a power semiconductor device structure and a growth method thereof. The growth method comprises the following steps: sequentially growing a polycrystalline layer, an AlN layer, an AlGaN layer, a GaN layer and a barrier layer on a Si substrate; or sequentially growing the amorphous layer, the AlN layer, the AlGaN layer, the GaN layer and the barrier layer on the Si substrate. According to the growth method, the interface problem of an epitaxial layer and a Si substrate in heteroepitaxy is solved, a polycrystalline layer or an amorphous layer is arranged between a buffer layer and the Si substrate, the existence of interface channels is reduced, and the defect density is optimized; in addition, AlN is used as the buffer layer, doping of impurities is reduced, degradation of dynamic resistance is slowed down, electric leakage is not prone to occurring, the reliability and stability of the power semiconductor device are improved, and conditions are created for more applications.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of semiconductor devices, in particular to a power semiconductor device structure and a growth method thereof. BACKGROUND

[0002] Power diode is an important component in power conversion and inverter in power conversion, and is an important semiconductor device. Based on the excellent physical and chemical properties of GaN (gallium nitride), GaN-based power diode can significantly improve conversion efficiency and reduce energy loss. Since 2000, GaN-based rectifiers have become a hot research field for scholars. Due to the lack of accumulation of few electrons and the low barrier height, GaN Schottky diode works at high frequency in low working time, and has more advantages than PN junction diode. GaN Schottky diode generally has two structures, horizontal structure and vertical structure, among which horizontal structure is the current research hotspot and mainstream technology. The CN120091574A Chinese invention patent of horizontal structure GaN Schottky diode includes substrate, AlN nucleation layer, buffer layer, GaN layer and barrier layer AlGaN which are stacked in sequence. Its working core is two-dimensional electron gas generated by AlGaN / GaN heterojunction polarization, but due to the growth of hetero-substrate, the defect density is high, and the buffer layer is easy to produce leakage, and it is difficult to realize higher breakdown. SUMMARY

[0003] The technical problem to be solved by the present application is to provide a power semiconductor device structure and a growth method thereof, which have better defect control between hetero-Si substrate and epitaxial layer.

[0004] In order to solve the above technical problems, the technical scheme adopted by the present application is: a growth method of a power semiconductor device structure, comprising the following steps: growing a polycrystalline layer, an AlN layer, an AlGaN layer, a GaN layer and a barrier layer on a Si substrate in sequence. Or, growing an amorphous layer, an AlN layer, an AlGaN layer, a GaN layer and a barrier layer on a Si substrate in sequence.

[0005] Another technical scheme adopted by the present application is: a power semiconductor device structure grown by the growth method of the power semiconductor device structure.

[0006] The power semiconductor device structure growth method of the present application has the advantages that: the power semiconductor device structure growth method of the present application processes the interface problem between the epitaxial layer and the Si substrate in hetero-epitaxy, sets a polycrystalline layer or an amorphous layer between the buffer layer and the Si substrate, reduces the existence of interface channel, optimizes the defect density; and uses AlN as the buffer layer, reduces the doping of impurities, slows down the degradation of dynamic resistance, is not easy to leak, improves the reliability and stability of the power semiconductor device, and creates conditions for more applications. BRIEF DESCRIPTION OF DRAWINGS

[0007] Figure 1 A structural schematic diagram of a power semiconductor device structure of the embodiment of the present application; Figure 2 A structural schematic diagram of a wafer of the embodiment of the present application.

[0008] Label explanation: 1, Si substrate; 2, polycrystalline layer or amorphous layer; 3, AlN layer; 4, AlGaN layer; 5, GaN layer; 6, barrier layer; 7, protective layer; 8, gate; 9, source; 10, drain. DETAILED DESCRIPTION

[0009] In order to explain the technical content, the purposes and effects of the present application in detail, the following will be described in combination with the embodiments and the accompanying drawings.

[0010] A growth method of a power semiconductor device structure, comprising the following steps: sequentially growing a polycrystalline layer, an AlN layer, an AlGaN layer, a GaN layer and a barrier layer on a Si substrate; Or, sequentially growing an amorphous layer, an AlN layer, an AlGaN layer, a GaN layer and a barrier layer on a Si substrate.

[0011] From the above description, the beneficial effects of the present application are that in a dynamic working environment, the existence of charge filling in the buffer layer and the individual interface will cause resistance degradation, affecting the stability and reliability of the device working. There may be different dangling bonds on the surface of the Si substrate, and the introduction of nitrogen source is easy to form SiN to reduce the crystal quality of the epitaxial layer, and the introduction of Al source is easy to cause the diffusion of Al / Ga at the SiSi substrate interface at high temperature to cause the generation of P-type channel.

[0012] The growth method of the power semiconductor device structure of the present application processes the interface problem between the epitaxial layer and the Si substrate in heteroepitaxy, sets a polycrystalline layer or an amorphous layer between the buffer layer and the Si substrate, the lattice mismatch between the polycrystalline layer or the amorphous layer and the AlN layer is small, which can reduce the existence of the interface channel, the defect control between the hetero Si substrate and the epitaxial layer is more optimal, and the possible charge filling effect is the weakest; in addition, the interface thermal resistance is smaller in this way, which is beneficial to the stable working of the device in a large current or high temperature environment. And the present application uses AlN as the buffer layer to replace the conventional Fe or C doping, reduces the doping of impurities, improves the crystal quality, slows down the degradation of dynamic resistance, and also reduces the leakage of the buffer layer, so that the reliability and stability are improved, and conditions are created for more applications.

[0013] Further, when the AlN layer is grown, the Al source and NH3 are first introduced in a pulse mode for growth, and then the Al source and NH3 are continuously introduced for growth.

[0014] From the above description, the Al source and NH3 are first pulsed to grow, and a higher crystal quality AlN can be obtained. Then the Al source and NH3 are continuously supplied to grow the AlN layer. The buffer layer AlN layer has a better crystal quality and a small leakage current, which is beneficial to the subsequent growth of the heterojunction functional layer.

[0015] Further, during the growth of the AlN layer, N2 is first supplied, then the Al source and NH3 are pulsed to grow, and then the Al source and NH3 are continuously supplied to grow.

[0016] From the above description, N2 is first supplied to stabilize the reaction chamber environment.

[0017] Further, during the growth of the AlN layer, the Al source and NH3 are pulsed to grow a thickness of 2-20 nm, and then the Al source and NH3 are continuously supplied to grow a thickness of 180-200 nm. The thickness of the entire AlN layer is 182-220 nm.

[0018] Further, during the growth of the polycrystalline layer or amorphous layer, the following steps are repeated 2-5 times: after pumping, ethylene or propane is supplied to grow.

[0019] From the above description, the first time the pump is used to remove residual H2 to obtain a clean chamber environment. In subsequent cycles, the pump is used to remove by-products such as CH4 and SiH4 after the reaction of Si and alkyl gas. Ethylene or propane is an alkyl gas that can provide a carbon source. The Si substrate is treated with an alkyl gas to obtain a very thin amorphous SiC layer.

[0020] Further, the time for each supply of ethylene or propane is 1-20 min.

[0021] Further, it also includes a step of cleaning the Si substrate before growth.

[0022] Further, the cleaning is a cleaning treatment or a dry treatment.

[0023] Further, the specific steps of the dry treatment are: treating at 1000-1100°C in a H2 atmosphere.

[0024] Further, the AlGaN layer is grown in a reaction chamber, the temperature of the reaction chamber is 1150-1300°C, and the thickness of the AlGaN layer is 1000-3000 nm.

[0025] Further, the Al mole fraction of the AlGaN layer decreases along the growth direction.

[0026] Further, the Al mole fraction of the AlGaN layer decreases from 100% to 0% along the growth direction.

[0027] From the above description, the Al molar amount is from 1.0 to 0, which can reduce the gate current effect and realize the change from the crystal to GaN.

[0028] Further, the GaN layer is grown in a reaction chamber with a temperature of 900-1100℃, and the thickness of the GaN layer is 20-200nm.

[0029] Further, the barrier layer is grown in a reaction chamber with a temperature of 900-1100℃, and the thickness of the barrier layer is 20-30nm.

[0030] Further, the barrier layer is an AlGaN barrier layer, and the Al molar doping amount is 20-30%.

[0031] Further, the method further comprises the step of growing a protective layer on the barrier layer.

[0032] From the above description, the protective layer can provide physical and chemical protection to ensure the performance and reliability of the device.

[0033] Further, the protective layer is made of any one of AlN, GaN, SiN and SiO2.

[0034] Please refer to Figure 1 Another technical solution of the present application is: the power semiconductor device structure grown by the growth method of the power semiconductor device structure, comprising a Si substrate 1, a polycrystalline layer or an amorphous layer 2, an AlN layer 3, an AlGaN layer 4, a GaN layer 5, a barrier layer 6 and a protective layer 7 which are stacked in sequence.

[0035] Embodiment 1 of the present application is: a growth method of a power semiconductor device structure, and the specific steps are as follows: S1: Put the Si substrate into the reaction chamber of the metal organic chemical vapor deposition device, set the temperature of the reaction chamber to 1050℃, and clean the Si substrate by passing H2 atmosphere for 8min.

[0036] S2: Pump the reaction chamber, then pass 100sccm ethylene for 10min, and repeat the pumping and passing steps for 3 times to grow an amorphous layer on the Si substrate.

[0037] S3: Pass N2 into the reaction chamber, then pulse pass 20sccm Al source and 500sccm NH3 to grow an AlN layer with a thickness of 10nm, and then continuously pass 200sccm Al source and 1500sccm NH3 to grow an AlN layer with a thickness of 190nm on the amorphous layer.

[0038] S4: set the temperature of the reaction cavity to 1200 DEG C, while inputting 10000 sccm of NH3, 100 sccm of TMGa and 500 sccm of TMAl, growing an AlGaN layer with a thickness of 2000 nm on the AlN layer, the Al molar amount of the AlGaN layer decreasing from 100% to 0% along the growth direction.

[0039] S5: set the temperature of the reaction cavity to 1000 DEG C, inputting 240 sccm of TMGa, growing a GaN layer with a thickness of 100 nm on the AlGaN layer.

[0040] S6: set the temperature of the reaction cavity to 1000 DEG C, while inputting 10000 sccm of NH3, 25 sccm of TMGa and 40 sccm of TMAl, growing an AlGaN barrier layer with a thickness of 25 nm on the GaN layer. The Al molar doping amount is 25%.

[0041] S7: input 40 sccm of Al source and 10000 sccm of NH3 into the reaction cavity, growing an AlN protective layer with a thickness of 2 nm on the barrier layer.

[0042] Embodiment 2 of the present application is a growth method of a power semiconductor device structure, and the specific steps are as follows: S1: place a Si substrate into the reaction cavity of a metal organic chemical vapor deposition device, set the temperature of the reaction cavity to 1010 DEG C, and input H2 atmosphere cleaning treatment for 9 min.

[0043] S2: pump the reaction cavity, then input 100 sccm of propane for 20 min, and repeat the pumping and inputting steps for 3 times, growing a polycrystal layer on the Si substrate.

[0044] S3: input N2 into the reaction cavity, then pulse input 20 sccm of Al source and 500 sccm of NH3 to grow an AlN layer with a thickness of 5 nm, then continuously input 200 sccm of Al source and 1500 sccm of NH3 to grow an AlN layer with a thickness of 190 nm on the amorphous layer.

[0045] S4: set the temperature of the reaction cavity to 1180 DEG C, while inputting 10000 sccm of NH3, 100 sccm of TMGa and 500 sccm of TMAl, growing an AlGaN layer with a thickness of 1500 nm on the AlN layer, the Al molar amount of the AlGaN layer decreasing from 100% to 0% along the growth direction.

[0046] S5: set the temperature of the reaction cavity to 950 DEG C, inputting 240 sccm of TMGa, growing a GaN layer with a thickness of 50 nm on the AlGaN layer.

[0047] S6: The temperature of the reaction cavity is set to 950 ℃, 10000 sccm of NH3, 25 sccm of TMGa and 40 sccm of TMAl are introduced into the reaction cavity, and an AlGaN barrier layer with a thickness of 22 nm is grown on the GaN layer. The Al molar doping amount is 21%.

[0048] S7: 25 sccm of TMGa is introduced into the reaction cavity, and a GaN protective layer with a thickness of 2 nm is grown on the barrier layer.

[0049] Embodiment 3 of the present application is a growth method of a power semiconductor device structure, and the specific steps are as follows: S1: The Si substrate is placed into the reaction cavity of the metal organic chemical vapor deposition device, the temperature of the reaction cavity is set to 1080 ℃, and H2 atmosphere cleaning treatment is performed for 6 min.

[0050] S2: The reaction cavity is pumped, then 100 sccm of ethylene is introduced for 5 min, and the pumping and introducing steps are repeated 4 times, to grow an amorphous layer on the Si substrate.

[0051] S3: N2 is introduced into the reaction cavity, then 20 sccm of Al source and 500 sccm of NH3 are introduced in a pulse mode to grow an AlN layer with a thickness of 2-20 nm, then 200 sccm of Al source and 1500 sccm of NH3 are continuously introduced to grow an AlN layer with a thickness of 180-200 nm on the amorphous layer.

[0052] S4: The temperature of the reaction cavity is set to 1250 ℃, 10000 sccm of NH3, 100 sccm of TMGa and 500 sccm of TMAl are introduced into the reaction cavity, and an AlGaN layer with a thickness of 2500 nm is grown on the AlN layer. The Al molar amount of the AlGaN layer decreases from 100% to 0% along the growth direction.

[0053] S5: The temperature of the reaction cavity is set to 10500 ℃, and 240 sccm of TMGa is introduced to grow a GaN layer with a thickness of 150 nm on the AlGaN layer.

[0054] S6: The temperature of the reaction cavity is set to 10500 ℃, 10000 sccm of NH3, 25 sccm of TMGa and 40 sccm of TMAl are introduced into the reaction cavity, and an AlGaN barrier layer with a thickness of 28 nm is grown on the GaN layer. The Al molar doping amount is 28%.

[0055] S7: 2500 sccm of Si source and 20000 sccm of NH3 are introduced into the reaction cavity to grow a SiN protective layer with a thickness of 5 nm on the barrier layer.

[0056] Embodiment 4 of the present application is a method for growing a power semiconductor device structure, and the specific steps are as follows: S1: Put the Si substrate into the reaction chamber of the metal organic chemical vapor deposition device, set the temperature of the reaction chamber to 1100℃, and clean the reaction chamber by introducing H2 atmosphere for 5min.

[0057] S2: Pump the reaction chamber, then introduce 100sccm of propane for 1min, and cycle the pumping and introducing steps for 2 times to grow an amorphous layer on the Si substrate.

[0058] S3: Introduce N2 into the reaction chamber, then pulse introduce 20sccm of Al source and 500sccm of NH3 to grow AlN with a thickness of 20nm, and then continuously introduce 200sccm of Al source and 1500sccm of NH3 to grow AlN with a thickness of 200nm, thereby growing an AlN layer on the amorphous layer.

[0059] S4: Set the temperature of the reaction chamber to 1300℃, and simultaneously introduce 10000sccm of NH3, 100sccm of TMGa and 500sccm of TMAl to grow an AlGaN layer with a thickness of 3000nm on the AlN layer, and the Al molar amount of the AlGaN layer decreases from 100% to 0% along the growth direction.

[0060] S5: Set the temperature of the reaction chamber to 1100℃, and introduce 240sccm of TMGa to grow a GaN layer with a thickness of 200nm on the AlGaN layer.

[0061] S6: Set the temperature of the reaction chamber to 1100℃, and simultaneously introduce 10000sccm of NH3, 25sccm of TMGa and 40sccm of TMAl to grow an AlGaN barrier layer with a thickness of 30nm on the GaN layer. The Al molar doping amount is 20%.

[0062] S7: Introduce 2500sccm of Si source and 2000sccm of O2 into the reaction chamber to grow a SiO2 protective layer with a thickness of 5nm on the barrier layer.

[0063] Embodiment 5 of the present application is a method for growing a power semiconductor device structure, and the specific steps are as follows: S1: Put the Si substrate into the reaction chamber of the metal organic chemical vapor deposition device, set the temperature of the reaction chamber to 1000℃, and clean the reaction chamber by introducing H2 atmosphere for 10min.

[0064] S2: Pump the reaction chamber, then introduce 100sccm of ethylene for 1~20min, and cycle the pumping and introducing steps for 5 times to grow an amorphous layer on the Si substrate.

[0065] S3: introducing N2 into the reaction cavity, then pulsing 20 sccm of Al source and 500 sccm of NH3 to grow AlN with a thickness of 2 nm, and then continuously introducing 200 sccm of Al source and 1500 sccm of NH3 to grow AlN with a thickness of 180 nm, thereby growing an AlN layer on the amorphous layer.

[0066] S4: setting the temperature of the reaction cavity to 1150℃, while introducing 10000 sccm of NH3, 100 sccm of TMGa and 500 sccm of TMAl, thereby growing an AlGaN layer with a thickness of 1000 nm on the AlN layer, and the Al molar amount of the AlGaN layer decreases from 100% to 0% along the growth direction.

[0067] S5: setting the temperature of the reaction cavity to 900℃, and introducing 240 sccm of TMGa, thereby growing a GaN layer with a thickness of 20-200 nm on the AlGaN layer.

[0068] S6: setting the temperature of the reaction cavity to 900℃, while introducing 10000 sccm of NH3, 25 sccm of TMGa and 40 sccm of TMAl, thereby growing an AlGaN barrier layer with a thickness of 20-30 nm on the GaN layer, and the Al molar doping amount is 20%.

[0069] S7: introducing 40 sccm of Al source and 10000 sccm of NH3 into the reaction cavity, thereby growing an AlN protective layer with a thickness of 2 nm on the barrier layer.

[0070] Comparative Example 1 of the present application is as follows: The difference between Comparative Example 1 and Example 1 is that there is no amorphous layer, and the AlN layer is directly grown on the Si substrate.

[0071] Comparative Example 2 of the present application is as follows: The difference between Comparative Example 2 and Example 1 is that S3: introducing N2 into the reaction cavity, then continuously introducing 200 sccm of Al source and 1500 sccm of NH3 to grow AlN with a thickness of 200 nm, thereby growing an AlN layer on the amorphous layer.

[0072] Reference Figure 2 The power semiconductor devices prepared in Examples 1-5 are processed, and an etching process is used to etch through part of the barrier layer to form a gate 8, a source 9 and a drain 10, the gate is located opposite to the source and the drain, and the source and the drain are arranged on the two sides of the device. The prepared wafer is processed through various process flows to prepare a power device chip, and then corresponding resistance, capacitance, current and voltage tests are performed, and the test results are shown in Table 1.

[0073] Table 1

[0074] As shown in Table 1, the polycrystalline layer or amorphous layer is arranged between the buffer layer and the Si substrate, the lattice mismatch between the polycrystalline layer or amorphous layer and the AlN layer is small, the existence of the interface channel can be reduced, the defect control between the hetero Si substrate and the epitaxial layer is more optimal, and the possible charge filling effect is weakest. The performance of the power semiconductor device structure of the embodiment 1 is more optimal than that of the comparative examples 1 and 2 in terms of “loss, efficiency, speed, power and reliability”.

[0075] Please refer to Figure 1 The power semiconductor device structure of the embodiment 6 of the present application comprises a Si substrate 1, a polycrystalline layer or amorphous layer 2, an AlN layer 3, an AlGaN layer 4, a GaN layer 5, a barrier layer 6 and a protective layer 7 which are sequentially stacked.

[0076] In summary, the power semiconductor device structure and the growth method thereof provided by the present application process the interface problem between the epitaxial layer and the Si substrate in the hetero epitaxy, arrange the polycrystalline layer or amorphous layer between the buffer layer and the Si substrate, reduce the existence of the interface channel, control the defects between the hetero Si substrate and the epitaxial layer more optimally, and weaken the possible charge filling effect. In addition, the interface thermal resistance is small in this way, which is beneficial to the stable operation of the device under large current or high temperature environment. Moreover, the AlN is used as the buffer layer to replace the conventional Fe or C doping, the impurity doping is reduced, the crystal quality is improved, the degradation of the dynamic resistance is slowed down, the buffer layer leakage is reduced, and the reliability and stability are improved.

[0077] The above description is only the embodiment of the present application, and does not limit the patent scope of the present application. Any equivalent transformation or direct or indirect application in the related technical field based on the content of the specification and drawings of the present application is also included in the patent protection scope of the present application.

Claims

1. A method of growing a power semiconductor device structure, characterized by, The method comprises the following steps: sequentially growing a polycrystal layer, an AlN layer, an AlGaN layer, a GaN layer and a barrier layer on a Si substrate. Alternatively, sequentially growing an amorphous layer, an AlN layer, an AlGaN layer, a GaN layer and a barrier layer on a Si substrate.

2. The growth method of a power semiconductor device structure according to claim 1, characterized by, When the AlN layer is grown, firstly, Al source and NH3 are pulsed to grow, and then Al source and NH3 are continuously supplied to grow.

3. The growth method of a power semiconductor device structure according to claim 2, wherein, When the AlN layer is grown, firstly, N2 is supplied, then Al source and NH3 are pulsed to grow, and then Al source and NH3 are continuously supplied to grow.

4. The growth method of a power semiconductor device structure according to claim 2, wherein, When the AlN layer is grown, Al source and NH3 are pulsed to grow with a thickness of 2-20 nm, and then Al source and NH3 are continuously supplied to grow with a thickness of 180-200 nm.

5. The method of growing a power semiconductor device structure of claim 1, wherein, When the polycrystal layer or the amorphous layer is grown, the following steps are repeated 2-5 times: after pumping, ethylene or propane is supplied to grow.

6. The method of growing a power semiconductor device structure of claim 1, wherein, The method further comprises a step of cleaning the Si substrate before growth.

7. The method of growing a power semiconductor device structure of claim 1, wherein, The Al molar content of the AlGaN layer decreases along the growth direction.

8. The method of growing a power semiconductor device structure of claim 1, wherein, The barrier layer is an AlGaN barrier layer, and the Al molar doping amount is 20-30%.

9. The method of growing a power semiconductor device structure of claim 1, wherein, The method further comprises a step of growing a protective layer on the barrier layer.

10. A power semiconductor device structure grown by the method according to any one of claims 1-9.

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