Wafer and semiconductor device

Abstract

The invention provides a wafer capable of obtaining stable characteristics and a semiconductor device. According to an embodiment, a wafer includes a base body and a first layer. The first layer contains Alz1Ga1-z1N (0 < z1 < = 1). The first layer includes a first region and a second region. The first area is located between the base body and the second area. A first region oxygen concentration in the first region is lower than a matrix oxygen concentration in the matrix. The first region oxygen concentration is lower than a second region oxygen concentration in the second region.

Description

[0001] This application is based on Japanese Patent Application No. 2024-067681 (Filing date: April 18, 2024) and claims priority from it. This application incorporates the entire contents of the application by reference. TECHNICAL FIELD

[0002] Embodiments of the present application relate to a wafer and a semiconductor device. BACKGROUND

[0003] For example, for a semiconductor device based on a wafer containing nitride, stable characteristics are desired. SUMMARY

[0004] Embodiments of the present application provide a wafer and a semiconductor device that can achieve stable characteristics.

[0005] According to an embodiment of the present application, a wafer includes a substrate and a first layer. The first layer contains Al z1 Ga 1-z1 N (0 < z1≤ 1). The first layer includes a first region and a second region. The first region is located between the substrate and the second region. A first region oxygen concentration in the first region is lower than a substrate oxygen concentration in the substrate. The first region oxygen concentration is lower than a second region oxygen concentration in the second region.

[0006] According to the wafer having the above-described structure, a wafer and a semiconductor device that can achieve stable characteristics can be provided. BRIEF DESCRIPTION OF DRAWINGS

[0007] Figure 1 is a schematic cross-sectional view illustrating a wafer of a first embodiment.

[0008] Figure 2 is a graph illustrating element concentrations in a wafer.

[0009] Figure 3 is a graph illustrating element concentrations in a wafer.

[0010] Figure 4 (a) and Figure 4 (b) are microscope images of a wafer.

[0011] Figure 5 is a schematic cross-sectional view illustrating a wafer of a first embodiment.

[0012] Figure 6 is a schematic cross-sectional view illustrating a semiconductor device of a second embodiment.

[0013] Figure 7 is a schematic cross-sectional view illustrating a semiconductor device of a second embodiment.

[0014] [Reference Signs Description]

[0015] 10, 20: first semiconductor layer, second semiconductor layer, 10M: nitride member, 10a-10e: first partial region to fifth partial region, 11-14: first layer to fourth layer, 11a, 11b: first region, second region, 13a, 13b: first film, second film, 18s: substrate, 21, 22: first semiconductor portion, second semiconductor portion, 41: first insulating member, 41p: first insulating portion, 51-53: first electrode to third electrode, 110, 111: semiconductor device, 210, 211: wafer, C(Al): count, C(O): oxygen concentration, C11a, C11b: first region oxygen concentration, second region oxygen concentration, C12-C14: second layer oxygen concentration to fourth layer oxygen concentration, C18s: substrate oxygen concentration, D1, D2: first direction, second direction, SPL1, SPL2: first sample, second sample, pZ: position, t1, t2: first region thickness, second region thickness, tr1, tr2: first layer thickness, second layer thickness. DETAILED DESCRIPTION

[0016] Hereinafter, each embodiment of the present application will be described with reference to the drawings.

[0017] The drawings are schematic or conceptual, and the relationship between the thickness and width of each portion, the ratio of sizes among portions, and the like, are not necessarily the same as that in reality. Even in cases where the same portion is represented, the dimensions, ratios, and the like can differ among the drawings.

[0018] In the present application specification and each drawing, the same elements are denoted by the same reference numerals, and detailed description thereof is appropriately omitted.

[0019] (First Embodiment)

[0020] Figure 1 is a schematic cross-sectional view illustrating a wafer of the first embodiment.

[0021] As shown in Figure 1 , the wafer 210 of the embodiment includes a substrate 18s and a first layer 11. As described later, the wafer 210 can also include other layers.

[0022] A first direction D1 from the substrate 18s toward the first layer 11 is set as a Z-axis direction. One direction perpendicular to the Z-axis direction is set as an X-axis direction. A direction perpendicular to the Z-axis direction and the X-axis direction is set as a Y-axis direction. The substrate 18s and the first layer 11 lie along an X-Y plane.

[0023] The first layer 11 includes Al z1 Ga1-z1 N (0 < z1 < 1). The composition ratio z1 may be, for example, 0.8 or greater and 1 or less. The first layer 11 may be, for example, an AlN layer.

[0024] The first layer 11 includes a first region 11a and a second region 11b. The first region 11a is positioned between the substrate 18s and the second region 11b. As is apparent from the relationship of the oxygen concentrations in these regions, the amount of warping of the substrate 18s differs.

[0025] Figure 2 and Figure 3 are graphs that illustrate the concentration of elements in the wafer.

[0026] The horizontal axes are the positions pZ in the Z-axis direction (the thickness direction). The axes on the left side of these graphs are the oxygen concentrations C(O). The axes on the right side of these graphs are the counts of Al C(Al). Figure 2 Corresponds to the first sample SPL1. Figure 3 Corresponds to the second sample SPL2.

[0027] As shown in Figure 2 , in the first sample SPL1, the first region oxygen concentration C11a in the first region 11a is lower than the substrate oxygen concentration C18s in the substrate 18s. The first region oxygen concentration C11a is lower than the second region oxygen concentration C11b in the second region 11b.

[0028] As shown in Figure 3 , in the second sample SPL2, the first region oxygen concentration C11a in the first region 11a is lower than the substrate oxygen concentration C18s in the substrate 18s. The first region oxygen concentration C11a is higher than the second region oxygen concentration C11b in the second region 11b.

[0029] Thus, in the first sample SPL1 and the second sample SPL2, the distribution of oxygen differs. On the other hand, in the first sample SPL1, the amount of warping of the wafer 210 is 32 μm. In the second sample SPL2, the amount of warping of the wafer 210 is 96 μm.

[0030] By the distribution of the concentration of oxygen in the first layer 11, it is possible to suppress warping of the wafer. For example, it is possible to suppress the generation of cracks. It is possible to suppress instability of characteristics caused by cracks and the like. According to the embodiment, it is possible to provide a wafer in which stable characteristics can be obtained.

[0031] Figure 4 (a) and Figure 4 (b) are microscope images of the wafer.

[0032] These graphs are AFM (Atomic Force Microscope) images of the surface of the first layer 11 in the wafer 210. Figure 4(a) corresponds to the first sample SPL1. Figure 4 (b) corresponds to the second sample SPL2. As shown in (b), in the second sample SPL2, the surface is relatively homogeneous. As shown in (a), in the first sample SPL1, island-like regions (protrusions) are observed. It is considered that in the first sample SPL1, by the island-like regions (protrusions), stress is relaxed, and the amount of warping is small. Figure 4 (b) corresponds to the second sample SPL2. As shown in (b), in the second sample SPL2, the surface is relatively homogeneous. As shown in (a), in the first sample SPL1, island-like regions (protrusions) are observed. It is considered that in the first sample SPL1, by the island-like regions (protrusions), stress is relaxed, and the amount of warping is small. Figure 4 (b) corresponds to the second sample SPL2. As shown in (b), in the second sample SPL2, the surface is relatively homogeneous. As shown in (a), in the first sample SPL1, island-like regions (protrusions) are observed. It is considered that in the first sample SPL1, by the island-like regions (protrusions), stress is relaxed, and the amount of warping is small.

[0033] In an embodiment, the substrate oxygen concentration C18s can be high. For example, the interface property between the first layer 11 and the substrate 18s is improved. For example, the dislocation density of the first layer 11 can be reduced.

[0034] In an embodiment, the second region oxygen concentration C11b can be lower than the substrate oxygen concentration C18s. By making the first region oxygen concentration C11a and the second region oxygen concentration C11b lower than the substrate oxygen concentration C18s, the generation of excessive unevenness can be suppressed. By the moderate unevenness, a small amount of warping can be obtained. For example, a high crystalline quality can be maintained.

[0035] The difference between the first sample SPL1 and the second sample SPL2 is obtained, for example, by a change in the condition of the formation (for example, epitaxial growth) of the first layer 11. For example, by making the concentration of oxygen of the atmosphere in the formation of the second region 11b higher than the concentration of oxygen of the atmosphere in the formation of the first region 11a, a high second region oxygen concentration C11b is easily obtained. For example, by making the concentration of water of the atmosphere in the formation of the second region 11b higher than the concentration of water of the atmosphere in the formation of the first region 11a, a high second region oxygen concentration C11b is easily obtained. For example, by making the concentration of water of the Al source gas in the formation of the second region 11b higher than the concentration of water of the Al source gas in the formation of the first region 11a, a high second region oxygen concentration C11b is easily obtained. For example, by making the concentration of water of the nitrogen source gas in the formation of the second region 11b lower than the concentration of water of the nitrogen source gas in the formation of the first region 11a, a high second region oxygen concentration C11b is easily obtained.

[0036] In an embodiment, the first region 11a is in contact with the substrate 18s. The second region 11b can be in contact with the first region 11a. The substrate 18s contains, for example, silicon.

[0037] The first region oxygen concentration C11a can be, for example, 1 x 10 16 cm -3 and 5 x 10 17 cm -3 and 1 x 10 17 cm -3 and 1 x 10 18cm -3 The matrix oxygen concentration C18s can be, for example, 1×10 18 cm -3 Above and 1×10 20 cm -3 the following.

[0038] The first layer 11 has a first layer thickness tr1 (refer to Figure 1 ) can be, for example, 100 nm or more and 200 nm or less. The first region thickness t1 of the first region 11a (see Figure 1 ) can be, for example, 50 nm or more and 100 nm or less. The second region thickness t2 of the second region 11b (see Figure 1 ) can be, for example, greater than 50 nm and less than 100 nm.

[0039] like Figure 1 As shown, the wafer 210 may further include a second layer 12. The second layer 12 includes Al z2 Ga 1-z2 N(0<z2<1, z2<z1). The first layer 11 is provided between the substrate 18s and the second layer 12. Figure 2 As in the first sample SPL1, the second layer 12 does not contain oxygen. Alternatively, the second layer oxygen concentration C12 in the second layer 12 is lower than the second region oxygen concentration C11b. The second layer oxygen concentration C12 may be lower than the first region oxygen concentration C11a. The second layer 12 is, for example, an AlGaN layer. The Al composition ratio in the second layer 12 may also decrease as the distance from the second layer 12 increases. The second layer thickness tr2 of the second layer 12 (refer to Figure 1 ) can be, for example, greater than 10 nm and less than 500 nm.

[0040] like Figure 1 As shown, the wafer 210 may further include a third layer 13. The third layer 13 includes Al z3 Ga 1-z3 N(0≤z3≤1). The second layer 12 is located between the first layer 11 and the third layer 13. Figure 2 As in the first sample SPL1, the third layer 13 does not contain oxygen. Alternatively, the third layer oxygen concentration C13 in the third layer 13 is lower than the second region oxygen concentration C11b. The third layer oxygen concentration C13 may be lower than the first region oxygen concentration C11a.

[0041] like Figure 1 As shown, the wafer 210 may further include a fourth layer 14. The fourth layer 14 includes Al z4 Ga 1-z4N (0≤z4≤1). The fourth layer 14 may be, for example, a GaN layer. The third layer 13 is located between the second layer 12 and the fourth layer 14. The fourth layer 14 does not contain oxygen. Alternatively, the fourth-layer oxygen concentration C14 in the fourth layer 14 is lower than the second-region oxygen concentration C11b. The fourth-layer oxygen concentration C14 may be lower than the first-region oxygen concentration C11a.

[0042] like Figure 1 As shown, the wafer 210 may further include a first semiconductor layer 10 and a second semiconductor layer 20. The first semiconductor layer 10 includes Al x1 Ga 1-x1 N (0≤x1<1). The second semiconductor layer 20 includes Al x2 Ga 1-x2 N(0<x2≤1, x1<x2). The first semiconductor layer 10 is provided between the third layer 13 and the second semiconductor layer 20. The first semiconductor layer 10 is provided between the fourth layer 14 and the second semiconductor layer 20. The composition ratio x1 can be, for example, greater than 0 and less than 0.15. The first semiconductor layer 10 is, for example, a GaN layer. The composition ratio x2 can be, for example, greater than 0.15 and less than 0.3. The second semiconductor layer 20 is, for example, an AlGaN layer.

[0043] The concentration of carbon in the fourth layer 14 may be higher than the concentration of carbon in the first semiconductor layer 10 .

[0044] The first layer 11 , the second layer 12 , the third layer 13 , the fourth layer 14 , the first semiconductor layer 10 , and the second semiconductor layer 20 are included in the nitride member 10M.

[0045] Figure 5 is a schematic cross-sectional view of a wafer illustrating the first embodiment.

[0046] like Figure 5 As shown, in the wafer 211 of the embodiment, the third layer 13 includes a plurality of films. The structure of the wafer 211 other than this may be the same as that of the wafer 210.

[0047] In the wafer 211, the third layer 13 includes a plurality of first films 13a and a plurality of second films 13b. In the first direction D1 from the substrate 18s toward the first layer 11, one of the plurality of first films 13a is located between one of the plurality of second films 13b and another of the plurality of second films 13b. One of the plurality of second films 13b is located between one of the plurality of first films 13a and another of the plurality of first films 13a. The first film 13a includes Al y1 Ga 1-y1 N(0<y1≤1). The second film 13b contains Al y2 Ga 1-y2N (0≤y2 The third layer 13 is, for example, a superlattice layer. A high crystal quality can be obtained. The amount of warping can be suppressed.

[0048] (Second Embodiment)

[0049] The second embodiment relates to a semiconductor device. The semiconductor device includes the wafer 210 described with respect to the first embodiment and a modification thereof.

[0050] Figure 6 is a schematic cross-sectional view illustrating the semiconductor device of the second embodiment.

[0051] As Figure 6 indicated, the semiconductor device 110 of the embodiment includes the wafer 210 of the first embodiment, a nitride member 10M, a first electrode 51, a second electrode 52, and a third electrode 53.

[0052] The nitride member 10M includes, for example, a first semiconductor layer 10 and a second semiconductor layer 20. The first semiconductor layer 10 includes Al x1 Ga 1-x1 N (0≤x1 The second semiconductor layer 20 includes Al x2 Ga 1-x2 N (0 The composition ratio x1 can be, for example, 0 or more and 0.15 or less. The first semiconductor layer 10 is, for example, a GaN layer. The composition ratio x2 can be, for example, more than 0.15 and 0.3 or less. The second semiconductor layer 20 is, for example, an AlGaN layer.

[0053] The first semiconductor layer 10 is provided between the third layer 13 and the second semiconductor layer 20. The first semiconductor layer 10 is provided between the fourth layer 14 (see Figure 1 ) and the second semiconductor layer 20.

[0054] A second direction D2 from the first electrode 51 toward the second electrode 52 intersects the first direction D1. The second direction D2 is, for example, the X-axis direction. A position of the third electrode 53 in the second direction D2 is between a position of the first electrode 51 in the second direction D2 and a position of the second electrode 52 in the second direction D2.

[0055] The second semiconductor layer 20 includes a first semiconductor portion 21 and a second semiconductor portion 22. A direction from the first semiconductor portion 21 toward the second semiconductor portion 22 is along the second direction D2. The first electrode 51 is electrically connected to the first semiconductor portion 21. The second electrode 52 is electrically connected to the second semiconductor portion 22.

[0056] The current flowing between the first electrode 51 and the second electrode 52 is controlled by the potential of the third electrode 53. The potential of the third electrode 53 can be, for example, a potential based on the potential of the first electrode 51. The first electrode 51 functions as a source electrode, for example. The second electrode 52 functions as a drain electrode. The third electrode 53 functions as a gate electrode. The semiconductor device 110 is, for example, a transistor.

[0057] The first semiconductor layer 10 includes a region facing the second semiconductor layer 20. A carrier region is formed in this region. The carrier region is, for example, a two-dimensional electron gas. The semiconductor device 110 is, for example, a HEMT (High Electron Mobility Transistor).

[0058] In the semiconductor device 110 of the embodiment, for example, cracks are suppressed. According to the embodiment, a semiconductor device capable of obtaining stable characteristics can be provided.

[0059] like Figure 6 As shown, in this example, at least a portion of the third electrode 53 is disposed between the first semiconductor portion 21 and the second semiconductor portion 22 in the second direction D2. The third electrode 53 is, for example, a recessed gate electrode. For example, a high threshold voltage can be achieved. For example, a normally-off operation can be achieved. At least a portion of the third electrode 53 can be disposed between a portion of the first semiconductor layer 10 and another portion of the first semiconductor layer 10 in the second direction D2.

[0060] For example, the first semiconductor layer 10 includes a first partial region 10a, a second partial region 10b, a third partial region 10c, a fourth partial region 10d, and a fifth partial region 10e. The direction from the first partial region 10a toward the first electrode 51 is along the first direction D1. The direction from the second partial region 10b toward the second electrode 52 is along the first direction D1. The direction from the third partial region 10c toward the third electrode 53 is along the first direction D1.

[0061] The position of the fourth partial region 10d in the second direction D2 is between the position of the first partial region 10a in the second direction D2 and the position of the third partial region 10c in the second direction D2. The position of the fifth partial region 10e in the second direction D2 is between the position of the third partial region 10c in the second direction D2 and the position of the second partial region 10b in the second direction D2.

[0062] The direction from the fourth partial region 10d toward the first semiconductor portion 21 is along the first direction D1. The direction from the fifth partial region 10e toward the second semiconductor portion 22 is along the first direction D1. In this example, a part of the third electrode 53 is between the fourth partial region 10d and the fifth partial region 10e in the second direction D2. A high threshold voltage can be obtained. For example, stable normally-closed operation can be obtained.

[0063] As Figure 6 indicated, the semiconductor device 110 can further include a first insulating member 41. The first insulating member 41 includes a first insulating portion 41p. The first insulating portion 41p is provided between the third electrode 53 and the nitride member 10M. The first insulating portion 41p functions as, for example, a gate insulating film.

[0064] Figure 7 is a schematic cross-sectional view illustrating a semiconductor device of a second embodiment.

[0065] As Figure 7 indicated, the semiconductor device 111 of the embodiment includes the wafer 210 of the first embodiment, the nitride member 10M, the first electrode 51, the second electrode 52, and the third electrode 53. In the semiconductor device 111, the third electrode 53 does not overlap with the second semiconductor layer 20 in the second direction D2. The structure of the semiconductor device 111 other than this can be the same as that of the semiconductor device 110.

[0066] In the semiconductor device 111, for example, normally-open operation can be obtained. In the semiconductor device 111, the first insulating member 41 can be omitted. The semiconductor device 111 can be used as, for example, a high-frequency switching element.

[0067] In the embodiment, information on the shape and the like of the nitride region is obtained by, for example, electron microscope observation or the like. Information on the composition and the element concentration in the nitride region is obtained by, for example, EDX (Energy Dispersive X-ray Spectroscopy) or SIMS (Secondary Ion Mass Spectrometry) or the like. Information on the composition in the nitride region can be obtained by, for example, reciprocal lattice space mapping or the like.

[0068] The embodiment can include the following technical solutions.

[0069] (Technical Solution 1)

[0070] A wafer including a base and a first layer including Al z1 Ga 1-z1 N (0 < z1≤ 1),

[0071] The first layer includes a first region and a second region,

[0072] The first region is between the substrate and the second region,

[0073] A first region oxygen concentration in the first region is lower than a substrate oxygen concentration in the substrate,

[0074] The first region oxygen concentration is lower than a second region oxygen concentration in the second region.

[0075] (Embodiment 2)

[0076] The wafer according to Embodiment 1, wherein the second region oxygen concentration is lower than the substrate oxygen concentration.

[0077] (Embodiment 3)

[0078] The wafer according to Embodiment 1 or 2, wherein the first region is contiguous with the substrate,

[0079] The second region is contiguous with the first region.

[0080] (Embodiment 4)

[0081] The wafer according to Embodiment 3, wherein the substrate includes silicon.

[0082] (Embodiment 5)

[0083] The wafer according to any one of Embodiments 1 to 4, wherein the first region oxygen concentration is 1 x 10 16 cm -3 or more and 5 x 10 17 cm -3 or less.

[0084] (Embodiment 6)

[0085] The wafer according to Embodiment 5, wherein the second region oxygen concentration is 1 x 10 17 cm -3 or more and 1 x 10 18 cm -3 or less.

[0086] (Embodiment 7)

[0087] The wafer according to any one of Embodiments 1 to 6, wherein the substrate oxygen concentration is 1 x 10 18 cm -3 or more and 1 x 10 20 cm -3 or less.

[0088] (Embodiment 8)

[0089] The wafer according to any one of the technical solutions 1-7, wherein the first layer has a first layer thickness of 100 nm or more and 200 nm or less.

[0090] (Technical solution 9)

[0091] The wafer according to the technical solution 8, wherein the first region has a first region thickness of 50 nm or more and 100 nm or less.

[0092] (Technical solution 10)

[0093] The wafer according to the technical solution 9, wherein the second region has a second region thickness of 50 nm or more and 100 nm or less.

[0094] (Technical solution 11)

[0095] The wafer according to any one of the technical solutions 1-10, further comprising a second layer containing Al z2 Ga 1-z2 N (0 < z2 < 1, z2 < z1),

[0096] the first layer is provided between the substrate and the second layer,

[0097] the second layer does not contain oxygen, or a second layer oxygen concentration in the second layer is lower than the second region oxygen concentration.

[0098] (Technical solution 12)

[0099] The wafer according to the technical solution 11, wherein the second layer oxygen concentration is lower than the first region oxygen concentration.

[0100] (Technical solution 13)

[0101] The wafer according to the technical solution 11 or 12, further comprising a third layer containing Al z3 Ga 1-z3 N (0 ≤ z3 ≤ 1),

[0102] the second layer is located between the first layer and the third layer,

[0103] the third layer does not contain oxygen, or a third layer oxygen concentration in the third layer is lower than the second region oxygen concentration.

[0104] (Technical solution 14)

[0105] The wafer according to the technical solution 13, wherein the third layer oxygen concentration is lower than the first region oxygen concentration.

[0106] (Technical solution 15)

[0107] The wafer according to any one of technical solutions 13 to 14, wherein the third layer includes a plurality of first films and a plurality of second films,

[0108] In a first direction from the substrate toward the first layer, one of the plurality of first films is positioned between one of the plurality of second films and another of the plurality of second films, and the one of the plurality of second films is positioned between the one of the plurality of first films and the other of the plurality of first films,

[0109] The plurality of first films include Al y1 Ga 1-y1 N (0 < y1 < 1),

[0110] The plurality of second films include Al y2 Ga 1-y2 N (0 < y2 < y1).

[0111] (Technical Solution 16)

[0112] The wafer according to any one of technical solutions 13 to 15, further comprising a fourth layer including Al z4 Ga 1-z4 N (0 < z4 < 1),

[0113] The third layer is positioned between the second layer and the fourth layer,

[0114] The fourth layer does not contain oxygen, or a fourth layer oxygen concentration in the fourth layer is lower than the second region oxygen concentration.

[0115] (Technical Solution 17)

[0116] The wafer according to any one of technical solutions 13 to 16, further comprising:

[0117] a first semiconductor layer including Al x1 Ga 1-x1 N (0 < x1 < 1), and

[0118] a second semiconductor layer including Al x2 Ga 1-x2 N (0 < x2 < 1, x1 < x2),

[0119] The first semiconductor layer is provided between the third layer and the second semiconductor layer.

[0120] (Technical Solution 18)

[0121] A semiconductor device comprising:

[0122] The wafer according to any one of technical solutions 1 to 12,

[0123] The first electrode,

[0124] The second electrode,

[0125] The third electrode,

[0126] The first semiconductor layer containing Al x1 Ga 1-x1 N (0≤x1<1), and

[0127] The second semiconductor layer containing Al x2 Ga 1-x2 N (0<x2≤1, x1<x2) ;

[0128] The first semiconductor layer is provided between the first layer and the second semiconductor layer,

[0129] A second direction from the first electrode toward the second electrode intersects a first direction from the base toward the first layer,

[0130] A position of the third electrode in the second direction is between a position of the first electrode in the second direction and a position of the second electrode in the second direction,

[0131] The second semiconductor layer includes a first semiconductor portion and a second semiconductor portion,

[0132] A direction from the first semiconductor portion toward the second semiconductor portion is along the second direction,

[0133] The first electrode is electrically connected to the first semiconductor portion,

[0134] The second electrode is electrically connected to the second semiconductor portion.

[0135] (Technical solution 19)

[0136] The semiconductor device according to technical solution 18, wherein at least a part of the third electrode is provided between the first semiconductor portion and the second semiconductor portion in the second direction.

[0137] (Technical solution 20)

[0138] The semiconductor device according to technical solution 18, wherein at least a part of the third electrode is provided between a part of the first semiconductor layer and another part of the first semiconductor layer in the second direction.

[0139] According to the embodiments, it is possible to provide a wafer and a semiconductor device that can obtain stable characteristics.

[0140] In the present application specification, the "state of electrical connection" includes a state in which a plurality of conductive bodies are in physical contact and an electric current flows between the plurality of conductive bodies. The "state of electrical connection" includes a state in which another conductive body is interposed between a plurality of conductive bodies and an electric current flows between the plurality of conductive bodies.

[0141] The above describes embodiments of the present application with reference to specific examples. However, the present application is not limited to these specific examples. For example, as to the specific structure of each element such as a substrate, a layer, and an electrode included in the wafer and the semiconductor device, as long as a person skilled in the art can implement the present application and obtain the same effects by appropriately selecting from the known range, it is included in the scope of the present application.

[0142] Further, a scheme obtained by combining any two or more elements of the specific examples within a range of technology is included in the scope of the present application as long as it contains the gist of the present application.

[0143] Furthermore, as an embodiment of the present application, all wafer and semiconductor devices that a person skilled in the art can implement by appropriately designing and changing the above-described wafer and semiconductor device based on the gist of the present application are within the scope of the present application.

[0144] Further, within the scope of the idea of the present application, various modifications and corrections can be conceived by a person skilled in the art, and it should be understood that these modifications and corrections are also within the scope of the present application.

[0145] Several embodiments of the present application have been described, but these embodiments are presented as examples and are not intended to limit the scope of the application. These new embodiments can be implemented in various other ways, and various omissions, substitutions, and changes can be made within the scope of the gist of the present application. These embodiments and modifications are included in the scope, gist of the present application, and are included in the scope of the application and its equivalents recited in the claims.

Claims

1. A wafer comprising a substrate and a first layer comprising Al z1 Ga 1-z1 N (0 < z1 < 1), The first layer includes a first region and a second region, The first region is located between the base and the second region, A first region oxygen concentration in the first region is lower than a base oxygen concentration in the base, The first region oxygen concentration is lower than a second region oxygen concentration in the second region.

2. The wafer of claim 1, wherein, The second region oxygen concentration is lower than the base oxygen concentration.

3. The wafer of claim 1 or 2, wherein, The first region is in contact with the base, The second region is in contact with the first region.

4. The wafer of claim 3, wherein, The base includes silicon.

5. The wafer according to any one of claims 1 to 4, wherein, The first region oxygen concentration is 1 x 10 16 cm -3 Above and 5 x 10 17 cm -3 Below.

6. The wafer of claim 5, wherein, The second region oxygen concentration is 1 x 10 17 cm -3 Above and 1 x 10 18 cm -3 Below.

7. The wafer according to any one of claims 1 to 6, wherein The base oxygen concentration is 1 x 10 18 cm -3 Above and 1 x 10 20 cm -3 Below.

8. The wafer according to any one of claims 1 to 7, wherein, A first layer thickness of the first layer is 100 nm or more and 200 nm or less.

9. The wafer of claim 8, wherein, A first region thickness of the first region is 50 nm or more and 100 nm or less.

10. The wafer of claim 9, wherein, A second region thickness of the second region is 50 nm or more and 100 nm or less.

11. The wafer according to any one of claims 1 to 10, further comprising a second layer comprising Al z2 Ga 1-z2 N (0 < z2 < 1, z2 < z1). The first layer is provided between the base and the second layer, The second layer does not contain oxygen, or a second layer oxygen concentration in the second layer is lower than the second region oxygen concentration.

12. The wafer of claim 11, wherein, The second layer oxygen concentration is lower than the first region oxygen concentration.

13. Wafer according to claim 11 or 12, further provided with a third layer comprising Al z3 Ga 1-z3 N (0 < z3 < 1), The second layer is located between the first layer and the third layer, The third layer does not contain oxygen, or a third layer oxygen concentration in the third layer is lower than the second region oxygen concentration.

14. The wafer of claim 13, wherein, The third layer oxygen concentration is lower than the first region oxygen concentration.

15. The wafer of claim 13 or 14, wherein, The third layer includes a plurality of first films and a plurality of second films, In a first direction from the base toward the first layer, one of the plurality of first films is located between one of the plurality of second films and another of the plurality of second films, and the one of the plurality of second films is located between the one of the plurality of first films and another of the plurality of first films, The plurality of first films comprise Al y1 Ga 1-y1 N(0 < y1≤ 1), The plurality of second films comprise Al y2 Ga 1-y2 N(0≤y2<y1).

16. The wafer according to any one of claims 13 to 15, further provided with a fourth layer comprising Al z4 Ga 1-z4 N (0 < z4 < 1), The third layer is located between the second layer and the fourth layer, The fourth layer does not contain oxygen, or a fourth layer oxygen concentration in the fourth layer is lower than the second region oxygen concentration.

17. The wafer according to any one of claims 13 to 16, further comprising: containing Al x1 Ga 1-x1 a first semiconductor layer of InGaN (0≤x1<1), and containing Al x2 Ga 1-x2 a second semiconductor layer of GaN(0 < x2≤ 1, x1< x2), The first semiconductor layer is provided between the first layer and the second semiconductor layer.

18. A semiconductor device comprising: The wafer according to any one of claims 1 to 12, A first electrode, A second electrode, A third electrode, containing Al x1 Ga 1-x1 a first semiconductor layer of InGaN (0≤x1<1), and comprising Al x2 Ga 1-x2 a second semiconductor layer of GaN(0 < x2≤ 1, x1< x2). The first semiconductor layer is provided between the first layer and the second semiconductor layer, A second direction from the first electrode toward the second electrode intersects a first direction from the base toward the first layer, A position of the third electrode in the second direction is located between a position of the first electrode in the second direction and a position of the second electrode in the second direction, The second semiconductor layer includes a first semiconductor portion and a second semiconductor portion, A direction from the first semiconductor portion toward the second semiconductor portion is along the second direction, The first electrode is electrically connected to the first semiconductor portion, The second electrode is electrically connected to the second semiconductor portion.

19. The semiconductor device according to claim 18, wherein At least a part of the third electrode is provided between the first semiconductor portion and the second semiconductor portion in the second direction.

20. The semiconductor device of Claim 18, wherein, At least a portion of the third electrode is disposed between a portion of the first semiconductor layer and another portion of the first semiconductor layer in the second direction.

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