Test circuit, test system and test method

Abstract

The invention discloses a test circuit, a test system and a test method. The test circuit comprises a plurality of test units which are connected in parallel; wherein each test unit comprises a test structure and a control structure connected in series with the test structure, and the control structure is used for enabling the corresponding test unit to form an open circuit when the test structure is short-circuited. The test time is shortened, and the test efficiency is improved.

Description

Technical Field

[0001] The present invention relates to the field of semiconductor manufacturing, and in particular to a test circuit, a test system, and a test method. Background Art

[0002] In the semiconductor device manufacturing process, reliability testing is frequently required. Especially with the advancement of semiconductor process technology, semiconductor devices are becoming increasingly integrated, and their dimensions are shrinking proportionally. Their critical dimensions (CD) are also becoming smaller. For semiconductor devices with increasingly smaller CDs, the interlayer dielectric (ILD) in the back-end of line (BEOL) process is also becoming thinner, making performance testing of the circuit structure manufactured using BEOL crucial.

[0003] In this field, time-dependent dielectric breakdown (TDDB) testing is commonly used for reliability testing. It can be used to predict the lifespan of semiconductor devices. Typically, a constant voltage is applied to a metal line, causing the device to accumulate voltage; this is what is commonly referred to as TDDB. After a period of time, the dielectric material will break down. The time elapsed from the application of a constant voltage to the point where the dielectric material breaks down is the dielectric lifespan under that condition. Summary of the Invention

[0004] The problem solved by this invention is to provide a test circuit, test system, and test method that can help shorten test time and improve test efficiency.

[0005] To address the aforementioned problems, embodiments of the present invention provide a test circuit, comprising: multiple test units connected in parallel; wherein, each test unit includes: a test structure and a control structure connected in series with the test structure, the control structure being used to cause the corresponding test unit to form an open circuit when the test structure is short-circuited.

[0006] Optionally, the test structure is a dielectric breakdown test structure. When the dielectric breakdown test structure is in a breakdown state, the test structure is short-circuited.

[0007] Optionally, the dielectric breakdown test structure includes: a first test terminal and a second test terminal, and a dielectric test sample located between the first test terminal and the second test terminal, wherein there is a potential difference between the first test terminal and the second test terminal, and when the dielectric test sample breaks down, the first test terminal and the second test terminal are short-circuited.

[0008] Optionally, the test circuit further includes: a first signal loading terminal for loading a first electrical signal onto one end of a plurality of parallel test units, the first signal loading terminal being connected to a first test terminal; and a second signal loading terminal for loading a second electrical signal onto the other end of the plurality of parallel test units, the second signal loading terminal being connected to a second test terminal, wherein there is a potential difference between the first electrical signal and the second electrical signal.

[0009] Optionally, either the first signal loading terminal or the second signal loading terminal can be grounded, and the other can be connected to the power supply terminal.

[0010] Optionally, the test structure includes the TDDB test structure.

[0011] Optionally, the test structure corresponds one-to-one with the control structure.

[0012] Optionally, a control structure is used to turn off when the current passing through the control structure is greater than a threshold current.

[0013] Optionally, the control structure includes a fuse.

[0014] Accordingly, embodiments of the present invention also provide a testing method, comprising: providing a test circuit provided in the embodiments of the present invention; applying an electrical signal to the test circuit; and obtaining the current change of the test circuit.

[0015] Optionally, in the step of applying an electrical signal to the test circuit, a constant voltage is applied to the test circuit.

[0016] Optionally, in the step of obtaining the current change of the test circuit, the current-time curve of the test circuit is obtained.

[0017] Optionally, in the step of providing the test circuit, the test structure is a dielectric breakdown test structure. When the dielectric breakdown test structure is in a breakdown state, the test structure is short-circuited. After obtaining the current-time curve of the test circuit, the test method further includes: obtaining the corresponding time based on the moment of current surge in the current-time curve as the breakdown time of the dielectric breakdown test structure.

[0018] Optionally, the test method may also include: obtaining the lifetime of the dielectric breakdown test structure based on multiple breakdown times.

[0019] Accordingly, this embodiment of the invention also provides a testing system, including: a testing circuit module, including the testing circuit provided in this embodiment of the invention; a signal loading module, used to load an electrical signal onto the testing circuit; and a detection module, connected in series with the testing circuit, used to obtain the current change of the testing circuit.

[0020] Optionally, the signal loading module is used to apply a constant voltage to the test circuit.

[0021] Optionally, the detection module is used to obtain the current-time curve of the test circuit.

[0022] Compared with the prior art, the technical solution of the embodiments of the present invention has the following advantages:

[0023] In the test circuit provided by this embodiment of the invention, the test circuit includes multiple test units connected in parallel. Each test unit includes a test structure and a control structure connected in series with the test structure. The control structure is used to cause the corresponding test unit to form an open circuit when the test structure is short-circuited. In this embodiment of the invention, since multiple test units are connected in parallel, when the test structure is short-circuited, the control structure causes the corresponding test unit to form an open circuit, so that the test structure with the short-circuit problem will not affect the test structure of other test units, and the testing of other parallel test units can still continue. Thus, this embodiment of the invention can realize parallel testing of multiple test units simultaneously without testing multiple test units one by one, which is beneficial to shorten the testing time and improve the testing efficiency.

[0024] In the testing method provided by this embodiment of the invention, a test circuit is provided to apply an electrical signal to the test circuit and obtain the current change of the test circuit. In this embodiment of the invention, multiple test units are connected in parallel. When the test structure is short-circuited, the control structure causes the corresponding test unit to form an open circuit, so that the test structure with the short-circuit problem will not affect the test structure of other test units, and the testing of other parallel test units can still continue. Thus, this embodiment of the invention can realize parallel testing of multiple test units at the same time without testing multiple test units one by one, which is beneficial to shorten the testing time and improve the testing efficiency.

[0025] In the testing system provided by this embodiment of the invention, the testing circuit module includes the testing circuit provided by this embodiment of the invention. The signal loading module is used to load an electrical signal onto the testing circuit. The detection module is connected in series with the testing circuit, and the detection unit is used to obtain the current change of the testing circuit. In this embodiment of the invention, multiple testing units are connected in parallel. When the testing structure is short-circuited, the control structure causes the corresponding testing unit to form an open circuit, so that the testing structure with the short-circuit problem will not affect the testing structure of other testing units. The testing of other parallel testing units can still continue. Thus, this embodiment of the invention can realize parallel testing of multiple testing units at the same time without testing multiple testing units one by one, which is beneficial to shorten the testing time and improve the testing efficiency. Attached Figure Description

[0026] Figure 1 This is a schematic diagram of the circuit structure corresponding to a testing method;

[0027] Figure 2This is a schematic diagram of the circuit structure of one embodiment of the test circuit of the present invention;

[0028] Figure 3 This is a flowchart of an embodiment of the testing method of the present invention;

[0029] Figure 4 This is a schematic diagram of the circuit structure corresponding to the implementation of the first test method of the present invention;

[0030] Figure 5 This is a current-time curve corresponding to one embodiment of the test method of the present invention;

[0031] Figure 6 This is a functional block diagram of an embodiment of the testing system of the present invention;

[0032] Figure 7 This is a schematic diagram of the circuit structure corresponding to one embodiment of the test system of the present invention. Detailed Implementation

[0033] Currently, it is difficult to improve the test time and efficiency of test circuits. This paper analyzes the reasons why test time and efficiency need to be improved by combining one test method.

[0034] Figure 1 This is a schematic diagram of the circuit structure corresponding to a testing method.

[0035] The testing method includes: providing multiple independent test circuits, each test circuit including a test structure 10, the test structure 10 including a first electrical signal loading terminal 10a and a second electrical signal loading terminal 10b; sequentially loading electrical signals onto the first electrical signal loading terminal 10a and the second electrical signal loading terminal 10b of each test circuit to test the multiple test circuits one by one.

[0036] The number of test structures is usually large, especially for reliability testing. The number of test structures on the wafer is huge, and each test structure needs to be assigned to an independent test circuit for testing. This requires testing multiple test circuits one by one, which results in long testing time and low testing efficiency.

[0037] To address the technical problem, embodiments of the present invention provide a test circuit, comprising: multiple test units connected in parallel; wherein, each test unit includes: a test structure and a control structure connected in series with the test structure, the control structure being used to cause the corresponding test unit to form an open circuit when the test structure is short-circuited.

[0038] In the test circuit provided by this embodiment of the invention, the test circuit includes multiple test units connected in parallel. Each test unit includes a test structure and a control structure connected in series with the test structure. The control structure is used to cause the corresponding test unit to form an open circuit when the test structure is short-circuited. In this embodiment of the invention, since multiple test units are connected in parallel, when the test structure is short-circuited, the control structure causes the corresponding test unit to form an open circuit, so that the test structure with the short-circuit problem will not affect the test structure of other test units, and the testing of other parallel test units can still continue. Thus, this embodiment of the invention can realize parallel testing of multiple test units simultaneously without testing multiple test units one by one, which is beneficial to shorten the testing time and improve the testing efficiency.

[0039] To make the above-mentioned objects, features and advantages of the present invention more apparent and understandable, specific embodiments of the present invention will be described in detail below with reference to the accompanying drawings.

[0040] Figure 2 A schematic diagram of the circuit structure of an embodiment of the test circuit of the present invention.

[0041] The test circuit includes multiple test units 100 connected in parallel; wherein, each test unit 100 includes a test structure 101 and a control structure 102 connected in series with the test structure 101, and the control structure 102 is used to make the corresponding test unit 100 open circuit when the test structure 101 is short-circuited.

[0042] Test unit 100 is the basic unit for testing the test circuit.

[0043] In this embodiment, multiple test units 100 are connected in parallel, so that multiple test units 100 can be tested simultaneously under the same electrical signal conditions.

[0044] Specifically, in this embodiment, the test circuit is used to perform reliability testing. Reliability refers to the lifespan of a semiconductor device under normal operating conditions. Reliability testing of semiconductor devices (e.g., MOS devices) is an important part of the semiconductor integrated circuit manufacturing process.

[0045] Accordingly, in this embodiment, multiple test units 100 are connected in parallel, enabling multiple test units 100 to perform reliability tests simultaneously under the same voltage conditions.

[0046] Test structure 101 is the structure that needs to be tested.

[0047] In this embodiment, test structure 101 is a dielectric breakdown test structure.

[0048] Test structure 101 is a dielectric breakdown test structure. Specifically, the structure fails when the dielectric is broken down, and the lifetime of the test structure is detected by dielectric breakdown.

[0049] Specifically, in this embodiment, the dielectric breakdown test structure includes: a first test terminal and a second test terminal, and a dielectric test sample located between the first test terminal and the second test terminal, wherein there is a potential difference between the first test terminal and the second test terminal.

[0050] The breakdown life of a dielectric test sample is determined by detecting its breakdown time. A first test terminal and a second test terminal are applied to both ends of the dielectric test sample, and there is a potential difference between the first test terminal and the second test terminal, causing the test structure 101 to be in an accumulation state. After a period of time, the dielectric test sample will be broken down. The time elapsed from the start of applying a potential difference to the first test terminal and the second test terminal to the end of the breakdown of the dielectric test sample is the lifetime of the dielectric test sample under this condition.

[0051] Specifically, in this embodiment, the potential difference between the first test terminal and the second test terminal is a constant applied voltage.

[0052] As an example, in this embodiment, the test structure includes the TDDB test structure.

[0053] The TDDB test structure is a time-dependent dielectric breakdown test structure used to predict the lifespan of semiconductor devices.

[0054] The control structure 102 is used to make the corresponding test unit 100 open circuit when the test structure 101 is short-circuited.

[0055] Specifically, when test structure 101 is short-circuited, the corresponding test unit 100 will cause the other test units 100 to be unable to perform the test. At this time, control structure 102 will make the corresponding test unit 100 open-circuit, that is, remove the test unit corresponding to the short-circuited test structure 101 from the test circuit, so that the other test units 100 can continue to perform the test.

[0056] In this embodiment, multiple test units 100 are connected in parallel. When the test structure 101 is short-circuited, the control structure 102 causes the corresponding test unit 100 to form an open circuit, so that the test structure 101 with the short-circuit problem will not affect the test structures 101 of other test units 100. The testing of other parallel test units 100 can still continue. Thus, this embodiment can realize parallel testing of multiple test units 100 at the same time without having to test multiple test units 100 one by one, which helps to shorten the testing time and improve the testing efficiency.

[0057] In this embodiment, the test structure 101 is a dielectric breakdown test structure. Correspondingly, when the dielectric breakdown test structure is in a breakdown state, the test structure 101 is short-circuited. When the dielectric breakdown test structure is in a breakdown state, the control structure 102 is turned off, so that the corresponding test unit 100 forms an open circuit, thereby allowing the dielectric breakdown test structures of the other test units 100 to continue to perform the test.

[0058] Specifically, in this embodiment, when the dielectric test sample breaks down, a short circuit occurs between the first test terminal and the second test terminal, causing a short circuit in the test structure 101. At this time, the control structure 102 is turned off, causing the corresponding test unit to be disconnected.

[0059] In this embodiment, the test structure 101 and the control structure 102 correspond one-to-one.

[0060] The test structure 101 and the control structure 102 are in one-to-one correspondence, so that in each test unit 100, each control structure 102 can control the circuit of the corresponding test structure 101, thereby enabling each test structure 101 to be tested under the same conditions.

[0061] In this embodiment, the control structure 102 is used to turn off when the current passing through the control structure 102 is greater than the threshold current.

[0062] When test structure 101 is short-circuited, the current flowing through the corresponding test unit 100 will suddenly increase. At this time, the current through control structure 102 is greater than the threshold current. Control structure 102 is used to turn off when the current through control structure 102 is greater than the threshold current. At this time, control structure 102 is automatically turned off, so that the corresponding test unit 100 is open-circuited.

[0063] As an example, in this embodiment, the control structure 102 includes a fuse.

[0064] The fuse can automatically melt and break when the current passing through the fuse exceeds the threshold current, thereby causing the corresponding test unit 100 to be disconnected.

[0065] In this embodiment, the test circuit further includes: a first signal loading terminal 100a, used to load a first electrical signal onto one end of a plurality of parallel test units 100, the first signal loading terminal 100a being connected to a first test terminal; and a second signal loading terminal 100b, used to load a second electrical signal onto the other end of the plurality of parallel test units 100, the second signal loading terminal 100b being connected to a second test terminal, and there is a potential difference between the first electrical signal and the second electrical signal.

[0066] There is a potential difference between the first electrical signal and the second electrical signal, which in turn causes a potential difference to be applied across each test unit 100, so that there is a potential difference between the first test terminal and the second test terminal of the test structure 101, thereby enabling the test structure 101 to be tested.

[0067] Specifically, in this embodiment, the potential difference between the first electrical signal at the first signal loading terminal 100a and the second electrical signal at the second signal loading terminal 100b is a constant voltage.

[0068] As an example, in this embodiment, either the first signal loading terminal 100a or the second signal loading terminal 100b is used for grounding, and the other is used for connecting to the power supply terminal.

[0069] Figure 3 This is a flowchart of an embodiment of the testing method of the present invention; Figure 4 This is a schematic diagram of the circuit structure corresponding to the implementation of the first test method of the present invention; Figure 5 This is a current-time curve corresponding to one embodiment of the test method of the present invention.

[0070] Reference Figures 3 to 5 Step S1: Provide the test circuit provided in the foregoing embodiments of the present invention.

[0071] In this embodiment, the test method is used to perform reliability testing. Reliability refers to the lifespan of a semiconductor device under normal operating conditions. Reliability testing of semiconductor devices (e.g., MOS devices) is an important part of the semiconductor integrated circuit manufacturing process.

[0072] In this embodiment, multiple test units 100 are connected in parallel. When the test structure 101 is short-circuited, the control structure 102 causes the corresponding test unit 100 to form an open circuit, so that the test structure 101 with the short-circuit problem will not affect the test structures 101 of other test units 100. The testing of other parallel test units 100 can still continue. Thus, this embodiment can realize parallel testing of multiple test units 100 at the same time without having to test multiple test units 100 one by one, which helps to shorten the testing time and improve the testing efficiency.

[0073] In this embodiment, the test structure 101 is a dielectric breakdown test structure. When the dielectric breakdown test structure is in a breakdown state, the test structure 101 is short-circuited.

[0074] Test structure 101 is a dielectric breakdown test structure. Specifically, the structure fails when the dielectric is broken down. The lifetime of test structure 101 is detected by dielectric breakdown. When the dielectric breakdown test structure 101 is in a breakdown state, the test structure 101 is short-circuited. When the dielectric breakdown test structure is in a breakdown state, the control structure 102 is turned off, so that the corresponding test unit 100 forms an open circuit, thereby allowing the dielectric breakdown test structures of the other test units 100 to continue to be tested.

[0075] Step S2: Apply an electrical signal to the test circuit.

[0076] An electrical signal is applied to the test circuit to perform tests on multiple test units 100.

[0077] In this embodiment, in the step of applying an electrical signal to the test circuit, a constant voltage is applied to the test circuit.

[0078] A constant voltage is applied to the test circuit so that a constant voltage is applied across each test unit 100, so that each test structure 101 is tested under the same test conditions.

[0079] Specifically, in this embodiment, in the step of loading an electrical signal onto the test circuit, a first electrical signal is loaded at the first signal loading terminal 100a, and a second electrical signal is loaded at the second signal loading terminal 100b, with a constant potential difference between the first and second electrical signals.

[0080] There is a constant potential difference between the first electrical signal and the second electrical signal, which in turn causes a constant potential difference to be applied across each test unit 100, so that there is a potential difference between the first test terminal and the second test terminal of the test structure 101, thereby enabling the test structure 101 to be tested.

[0081] As an example, in this embodiment, either the first signal loading terminal 100a or the second signal loading terminal 100b is used for grounding, and the other is used for connecting to the power supply terminal.

[0082] Perform step S3: Obtain the current change of the test circuit.

[0083] The current change of the test circuit is obtained, and the test results of the test circuit are obtained based on the current change.

[0084] like Figure 4 As shown, in this embodiment, the current change of the test circuit is obtained through a detection module connected in series with the test circuit.

[0085] In this embodiment, the step of obtaining the current change of the test circuit involves obtaining the current-time curve of the test circuit.

[0086] Based on the current-time curve of the test circuit, the failure time of each test structure 101 is obtained, and the failure time of all test structures 101 is obtained accordingly.

[0087] As an example, Figure 5 The current-time curve of this embodiment is shown, where the horizontal axis represents time (t) and the vertical axis represents current (I).

[0088] In this embodiment, after obtaining the current-time curve of the test circuit, the test method further includes: obtaining the corresponding time as the breakdown time of the dielectric breakdown test structure based on the current surge moment in the current-time curve.

[0089] Specifically, Figure 5 As can be seen from the It curve, there will be a point where the current suddenly increases. This point is the moment when the dielectric of the test structure 101 breaks down. Correspondingly, TSK1 is the moment when the dielectric of the first test structure 101 breaks down, TSK2 is the moment when the dielectric of the second test structure 101 breaks down, TSK3 is the moment when the dielectric of the third test structure 101 breaks down, ..., TSKn is the moment when the dielectric of the last test structure 101 breaks down. The time elapsed from the start of the test to the moment when the dielectric breaks down is the breakdown time of each test structure 101.

[0090] It should be noted that the test can be stopped once the dielectric of the last test structure 101 breaks down.

[0091] In this embodiment, the testing method further includes: obtaining the lifetime of the dielectric breakdown test structure based on multiple breakdown times.

[0092] Specifically, in this embodiment, multiple breakdown times are obtained, and the lifetime of the dielectric breakdown test structure is obtained through statistical methods, thereby determining whether the reliability of the tested test structure 101 can meet the standard.

[0093] Figure 6 This is a functional block diagram of an embodiment of the testing system of the present invention; Figure 7 This is a schematic diagram of the circuit structure corresponding to one embodiment of the test system of the present invention.

[0094] Reference Figure 6 and Figure 7 The test system 50 includes: a test circuit module 501, including the test circuit provided in the embodiment of the present invention; a signal loading module 502, used to load an electrical signal onto the test circuit; and a detection module 503, connected in series with the test circuit, used to obtain the current change of the test circuit.

[0095] The test circuit module 501 includes the test circuit provided in the foregoing embodiments of the present invention.

[0096] In this embodiment, the testing system is used to perform reliability testing. Reliability refers to the lifespan of a semiconductor device under normal operating conditions. Reliability testing of semiconductor devices (e.g., MOS devices) is an important part of the semiconductor integrated circuit manufacturing process.

[0097] In this embodiment, multiple test units 100 are connected in parallel. When the test structure 101 is short-circuited, the control structure 102 causes the corresponding test unit 100 to form an open circuit, so that the test structure 101 with the short-circuit problem will not affect the test structures 101 of other test units 100. The testing of other parallel test units 100 can still continue. Thus, this embodiment can realize parallel testing of multiple test units 100 at the same time without having to test multiple test units 100 one by one, which helps to shorten the testing time and improve the testing efficiency.

[0098] In this embodiment, the test structure 101 is a dielectric breakdown test structure. When the dielectric breakdown test structure is in a breakdown state, the test structure 101 is short-circuited.

[0099] Test structure 101 is a dielectric breakdown test structure. Specifically, the structure fails when the dielectric is broken down. The lifetime of test structure 101 is detected by dielectric breakdown. When the dielectric breakdown test structure 101 is in a breakdown state, the test structure 101 is short-circuited. When the dielectric breakdown test structure is in a breakdown state, the control structure 102 is turned off, so that the corresponding test unit 100 forms an open circuit, thereby allowing the dielectric breakdown test structures of the other test units 100 to continue to be tested.

[0100] The signal loading module 502 is used to load electrical signals onto the test circuit.

[0101] An electrical signal is applied to the test circuit to perform tests on multiple test units 100.

[0102] In this embodiment, the signal loading module 502 is used to apply a constant voltage to the test circuit.

[0103] A constant voltage is applied to the test circuit so that a constant voltage is applied across each test unit 100, so that each test structure 101 is tested under the same test conditions.

[0104] Specifically, in this embodiment, the signal loading module 502 is used to load a first electrical signal at the first signal loading terminal 100a and a second electrical signal at the second signal loading terminal 100b, wherein there is a constant potential difference between the first electrical signal and the second electrical signal.

[0105] There is a constant potential difference between the first electrical signal and the second electrical signal, which in turn causes a constant potential difference to be applied across each test unit 100, so that there is a potential difference between the first test terminal and the second test terminal of the test structure 101, thereby enabling the test structure 101 to be tested.

[0106] As an example, in this embodiment, either the first signal loading terminal 100a or the second signal loading terminal 100b is used for grounding, and the other is used for connecting to the power supply terminal.

[0107] The detection module 503 obtains the current change of the test circuit.

[0108] The current change of the test circuit is obtained, and the test results of the test circuit are obtained based on the current change.

[0109] like Figure 7 As shown, in this embodiment, the current change of the test circuit is obtained through a detection module connected in series with the test circuit.

[0110] In this embodiment, the detection module 503 is used to obtain the current-time curve of the test circuit.

[0111] Based on the current-time curve of the test circuit, the failure time of each test structure 101 is obtained, and the failure time of all test structures 101 is obtained accordingly.

[0112] As an example, Figure 5 The current-time curve of this embodiment is shown, where the horizontal axis represents time (t) and the vertical axis represents current (I).

[0113] In this embodiment, after obtaining the current-time curve of the test circuit, the test method further includes: obtaining the corresponding time as the breakdown time of the dielectric breakdown test structure based on the current surge moment in the current-time curve.

[0114] Specifically, Figure 5 As can be seen from the It curve, there will be a point where the current suddenly increases. This point is the moment when the dielectric of the test structure 101 breaks down. Correspondingly, TSK1 is the moment when the dielectric of the first test structure 101 breaks down, TSK2 is the moment when the dielectric of the second test structure 101 breaks down, TSK3 is the moment when the dielectric of the third test structure 101 breaks down, ..., TSKn is the moment when the dielectric of the last test structure 101 breaks down. The time elapsed from the start of the test to the moment when the dielectric breaks down is the breakdown time of each test structure 101.

[0115] It should be noted that the test can be stopped once the dielectric of the last test structure 101 breaks down.

[0116] In this embodiment, the test system 50 further includes a calculation module for obtaining the lifetime of the dielectric breakdown test structure based on multiple breakdown times.

[0117] Specifically, in this embodiment, multiple breakdown times are obtained, and the calculation module obtains the lifetime of the dielectric breakdown test structure through statistical methods, thereby determining whether the reliability of the tested test structure 101 can meet the standard.

[0118] While the present invention has been disclosed above, it is not limited thereto. Any person skilled in the art can make various modifications and alterations without departing from the spirit and scope of the invention; therefore, the scope of protection of the present invention should be determined by the scope defined in the claims.

Claims

1. A test circuit, characterized in that, include: Multiple test units connected in parallel; The test unit includes a test structure and a control structure connected in series with the test structure. The control structure is used to make the corresponding test unit open circuit when the test structure is short-circuited.

2. The test circuit as described in claim 1, characterized in that, The test structure is a dielectric breakdown test structure. When the dielectric breakdown test structure is in a breakdown state, the test structure is short-circuited.

3. The test circuit as described in claim 2, characterized in that, The dielectric breakdown test structure includes: a first test terminal and a second test terminal, and a dielectric test sample located between the first test terminal and the second test terminal. There is a potential difference between the first test terminal and the second test terminal. When the dielectric test sample breaks down, the first test terminal and the second test terminal are short-circuited.

4. The test circuit as described in claim 3, characterized in that, The test circuit further includes: a first signal loading terminal, used to load a first electrical signal onto one end of the plurality of test units connected in parallel, the first signal loading terminal being connected to the first test terminal; The second signal loading terminal is used to load a second electrical signal onto the other end of the multiple parallel test units. The second signal loading terminal is connected to the second test terminal, and there is a potential difference between the first electrical signal and the second electrical signal.

5. The test circuit as described in claim 4, characterized in that, Either the first signal loading terminal or the second signal loading terminal is used for grounding, and the other is used for connecting to the power supply terminal.

6. The test circuit as described in any one of claims 1 to 5, characterized in that, The test structure includes the TDDB test structure.

7. The test circuit as described in claim 1, characterized in that, The test structure corresponds one-to-one with the control structure.

8. The test circuit as described in claim 1, characterized in that, The control structure is used to turn off when the current passing through the control structure is greater than a threshold current.

9. The test circuit as described in claim 1 or 8, characterized in that, The control structure includes a fuse.

10. A testing method, characterized in that, include: Provide a test circuit as described in any one of claims 1 to 9; The electrical signal applied to the test circuit; The current change of the test circuit is obtained.

11. The test method as described in claim 10, characterized in that, In the step of applying an electrical signal to the test circuit, a constant voltage is applied to the test circuit.

12. The test method as described in claim 10, characterized in that, In the step of obtaining the current change of the test circuit, the current-time curve of the test circuit is obtained.

13. The test method as described in claim 12, characterized in that, In the step of providing the test circuit, the test structure is a dielectric breakdown test structure, and when the dielectric breakdown test structure is in a breakdown state, the test structure is short-circuited. After obtaining the current-time curve of the test circuit, the test method further includes: obtaining the corresponding time as the breakdown time of the dielectric breakdown test structure based on the current surge moment in the current-time curve.

14. The test method as described in claim 13, characterized in that, The test method further includes: obtaining the lifetime of the dielectric breakdown test structure based on multiple breakdown times.

15. A testing system, characterized in that, include: The test circuit module includes the test circuit as described in any one of claims 1 to 9; A signal loading module is used to load electrical signals onto the test circuit; A detection module is connected in series with the test circuit, and the detection module is used to obtain the current change of the test circuit.

16. The testing system as described in claim 15, characterized in that, The signal loading module is used to apply a constant voltage to the test circuit.

17. The testing system as described in claim 15, characterized in that, The detection module is used to obtain the current-time curve of the test circuit.

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