Gallium nitride device dynamic on-resistance test circuit and method

Abstract

The invention belongs to the technical field of power device testing, and particularly relates to a dynamic on-resistance testing circuit and method for a gallium nitride device. The circuit comprises a multi-mode power loop module which is used for forming a main power path of the whole test platform, can be flexibly switched to different working modes by changing external load configuration, and simulates conduction behaviors of devices in different topologies; the high-precision conduction voltage drop test module is used for carrying out high-speed and accurate sampling on voltage at the drain end and the source end of the device during the conduction period of the device, and then calculating dynamic conduction resistance in real time by combining current information; and the control signal generation module is used for generating a driving signal to control the working state of the power device. Compared with the prior art, the method has the advantages that the measurement precision and the response speed are improved, the test function range is expanded, and the method is suitable for dynamic performance evaluation of various GaN devices and construction of an industrial test platform.

Description

Technical Field

[0001] This invention belongs to the field of power device testing technology, specifically relating to a dynamic on-resistance testing circuit and method for gallium nitride devices. Background Technology

[0002] With the rapid adoption of gallium nitride (GaN) power devices in high-frequency, high-efficiency applications such as consumer electronics, server power supplies, electric transportation, and battery management systems (BMS), especially low-voltage GaN devices, have become an important device type replacing traditional low-voltage silicon MOSFETs due to their low on-resistance, fast switching speed, and compact size. In high-frequency switching environments, the dynamic on-resistance (dR) of GaN devices... ON The dynamic on-resistance of GaN devices can fluctuate due to effects such as carrier injection, interface traps, and electric field modulation, which can severely lead to reduced system efficiency, difficulties in thermal design, and even circuit failure. Therefore, accurate measurement of the dynamic on-resistance of GaN devices has significant engineering and research value. However, since the on-resistance of low-voltage GaN devices is only tens of milliohms, and the voltage drop in the on-state is typically less than 50 mV, traditional testing methods have significant limitations in terms of voltage clamping, measurement resolution, and signal acquisition bandwidth, making it difficult to accurately extract the dynamic dR on a nanosecond timescale. ON Furthermore, existing testing solutions mostly focus on the forward conduction state, which is insufficient to meet the performance evaluation requirements of devices under actual operating conditions such as reverse conduction and synchronous rectification. Therefore, there is an urgent need for a GaN dynamic on-resistance testing solution with high precision, high response speed, and applicability to both forward and reverse conduction measurements. Summary of the Invention

[0003] To address the problems of low accuracy, slow response, and inability to support reverse measurement in existing GaN device dynamic on-resistance testing, this invention proposes a dynamic on-resistance testing circuit and method for gallium nitride devices.

[0004] The technical solution of this invention is as follows:

[0005] A dynamic on-resistance testing circuit for gallium nitride (GaN) devices includes a multi-mode power loop module, a high-precision on-state voltage drop testing module, and a control signal generation module. The multi-mode power loop module includes a configurable half-bridge circuit and corresponding configuration power supplies and configuration resistors. By flexibly connecting the configuration power supply and configuration circuit within the configurable half-bridge circuit, multiple circuit operating modes can be obtained. The high-precision on-state voltage drop testing module samples the drain-source voltage of the lower power device in the configurable half-bridge circuit and, combined with the on-state current of the lower power device, obtains the dynamic on-resistance. The control signal generation module generates drive signals to drive the power devices in the configurable half-bridge circuit and the high-precision on-state voltage drop testing module, respectively.

[0006] Furthermore, the configurable half-bridge circuit includes a first power device, a second power device, an inductor, a first capacitor, and a second capacitor; the first power device is a lower power device, its gate is connected to a first drive signal provided by the control signal generation module, its drain is connected to one end of the second capacitor, and its source is connected to one end of the inductor and the drain of the second power device; the second power device is an upper power device, its gate is connected to a second drive signal provided by the control signal generation module, and its source is grounded; the other end of the inductor is connected to one end of the first capacitor; the other ends of the first capacitor and the other ends of the second capacitor are grounded; the circuit operating modes obtained by connecting the configurable half-bridge circuit with a configuration power supply and a configuration resistor include dual-pulse test, BUCK mode, and BOOST mode;

[0007] The connection method for the dual-pulse test is to connect the positive terminal of the power supply to the drain of the second power device, one end of the second capacitor, and one end of the first capacitor, while the configuration resistor is unconnected.

[0008] The connection method of the BUCK mode is as follows: the positive terminal of the power supply is connected to the drain of the second power device and one end of the second capacitor, and the resistor is connected in parallel with the first capacitor.

[0009] The connection method for the BOOST mode is as follows: the positive terminal of the power supply is connected to one end of the first capacitor, and the resistor is connected in parallel with the second capacitor.

[0010] Furthermore, the high-precision on-state voltage drop test module includes an ultra-low voltage clamping circuit and an amplification circuit;

[0011] The ultra-low voltage clamping circuit includes an active clamping switch, a fast recovery diode, and a Zener diode; the drain of the active clamping switch is connected to the drain of the first power device, the source is connected to the anode of the fast recovery diode and the anode of the Zener diode, and the gate of the active clamping switch is connected to a third drive signal provided by the control signal generation module; the cathodes of the fast recovery diode and the Zener diode are connected to the source of the first power device.

[0012] The amplifier circuit includes an input protection resistor, a differential amplifier, a bias resistor, and a feedback resistor. The positive input terminal of the differential amplifier is connected to the source of an active clamp switch through the protection resistor, the negative input terminal of the differential amplifier is connected to the source of a first power device through the bias resistor, the output terminal of the differential amplifier is connected to its own negative input terminal through the feedback resistor, and the positive and negative power supply terminals of the differential amplifier are connected to positive and negative DC sources, respectively. The output terminal of the differential amplifier outputs a sampling voltage.

[0013] Furthermore, the control signal generation module generates a first drive signal, a second drive signal, and a third drive signal through a field-programmable gate array circuit. The first drive signal and the second drive signal are mutually inverted signals, and the third drive signal is set to a high level only during the period when the first drive signal is at a high level, as required.

[0014] A method for testing the dynamic on-resistance of gallium nitride devices includes:

[0015] Connect the configuration power supply and configuration resistor to the configurable half-bridge circuit as needed to obtain the circuit in the desired operating mode.

[0016] The control signal generation module generates drive signals to control the switching of power devices in the configurable half-bridge circuit and the high-precision on-state voltage drop test module, respectively. Specifically, the power devices in the configurable half-bridge circuit are periodically switched, and the voltage of the lower power transistor in the configurable half-bridge circuit is sampled by controlling the switching of the power devices in the high-precision on-state voltage drop test module.

[0017] After obtaining the sampling voltage through the high-precision on-state voltage drop test module, the dynamic on-state resistance is obtained by combining it with the on-state current of the lower power transistor.

[0018] Using the method described above to obtain dynamic on-resistance, the dynamic on-resistance of low-power devices under different conditions can be obtained, thereby achieving dynamic evaluation.

[0019] The beneficial effects of this invention are as follows: By constructing a flexibly configurable multi-mode power loop module, it supports typical topology switching such as BUCK, BOOST, and dual-pulse testing, enabling realistic simulation of the dynamic operating states of devices in different practical applications. Simultaneously, the innovatively designed high-precision on-state voltage drop test module introduces an ultra-low voltage active clamping circuit, combining fast recovery diodes and Zener diodes to achieve bidirectional voltage spike suppression. Coupled with a high-bandwidth, low-noise amplifier circuit, this effectively improves the accuracy of on-state voltage drop sampling, allowing for clear extraction of millivolt-level on-state voltage signals. Furthermore, this test circuit also has the ability to measure forward and reverse on-state voltage drops, further expanding its applicability in bidirectional and synchronous rectifier devices. The overall test system has significant advantages in terms of flexible structure, high measurement accuracy, fast response speed, and small error, meeting the stringent testing requirements of next-generation GaN power devices in R&D and quality evaluation. Attached Figure Description

[0020] Figure 1 This is a schematic diagram of the circuit structure of the present invention;

[0021] Figure 2 This is a schematic diagram of a dual-pulse dynamic on-resistance test circuit according to Embodiment 1 of the present invention;

[0022] Figure 3 This is a key waveform of a dual-pulse dynamic on-resistance test circuit according to Embodiment 1 of the present invention;

[0023] Figure 4 This is a schematic diagram of a reverse dynamic on-resistance test circuit in synchronous BUCK mode according to Embodiment 2 of the present invention;

[0024] Figure 5 This is a key waveform of a reverse dynamic on-resistance test circuit in synchronous BUCK mode according to Embodiment 2 of the present invention;

[0025] Figure 6 This is a schematic diagram of a forward dynamic on-resistance test circuit in synchronous BOOST mode according to Embodiment 3 of the present invention;

[0026] Figure 7 This is a key waveform of a positive dynamic on-resistance test circuit in synchronous BOOST mode according to Embodiment 3 of the present invention. Detailed Implementation

[0027] The present invention will now be described in detail with reference to the accompanying drawings.

[0028] like Figure 1 As shown, the circuit of the present invention includes a multi-mode power loop module 1, a high-precision on-state voltage drop test module 2, and a control signal generation module 3. The multi-mode power loop module 1 constitutes the main power path of the entire test platform. By changing the external load configuration, it can flexibly switch to different operating modes to simulate the conduction behavior of the device in different topologies. The high-precision on-state voltage drop test module 2 is used to perform high-speed and accurate sampling of the voltage across the drain and source terminals of the device during device conduction, and then calculate the dynamic on-resistance in real time by combining the current information. The control signal generation module 3 is used to generate drive signals to control the operating state of the power device.

[0029] The multi-mode power loop module 1 includes a configurable half-bridge circuit 11 and a switchable power supply and load group 12. The configurable half-bridge circuit 11 includes power devices Q1 and Q2, an inductor L1, a capacitor C1, and a capacitor C2. Power device Q1 is the device under test (DUT), and power device Q2 is a companion device of the same type as the DUT, used to form a standard test topology to ensure operational consistency. The drain of power device Q1 is connected to the source of power device Q2. The right end of inductor L1 is connected to the drain of power device Q1, and the left end is connected to the upper end of capacitor C1, forming part of the main power loop. The lower end of capacitor C1 is connected to the source of power device Q1. The upper end of capacitor C2 is connected to the drain of power device Q2, and the lower end is connected to the source of power device Q1. The switchable power supply and load group includes a bus power supply V. DC With resistive load R1, by changing the bus power supply V DCThe resistive load R1 is connected to a configurable half-bridge circuit, which allows for flexible configuration of the circuit's operating mode, forming BUCK (buck conversion) mode, BOOST (boost conversion) mode, and Double Pulse Test (DPT) mode.

[0030] The high-precision forward voltage drop test module 2 includes an ultra-low voltage clamping circuit 21 and an amplifier circuit 22. The ultra-low voltage clamping circuit 21 includes an active clamping switch S1, a fast recovery diode D1, and a Zener diode D2. The drain of the active clamping switch S1 is connected to the drain of the power device Q1, and the source is connected to the anode of the fast recovery diode D1, which is used to isolate the high voltage signal of the power device Q1 during the off state from the low voltage signal during the on state. The cathode of the fast recovery diode D1 is connected to the source of the power device Q1, and its turn-on voltage needs to be greater than the maximum forward voltage drop of the power device Q1, which is used to limit the clamping voltage and improve the resolution and accuracy of the test. The anode of the Zener diode D2 is connected to the source of the active clamping switch S1, and the cathode is connected to the source of the power device Q1, which is used to limit the clamping voltage window and cooperate with the fast recovery diode D1 to achieve bidirectional limiting protection.

[0031] The amplifier circuit 22 includes an input protection resistor R2, a differential amplifier A1, a bias resistor R3, and a feedback resistor R4. It is used to enhance the amplitude of the measurement signal, thereby improving test accuracy and signal-to-noise ratio. The negative terminal of the differential amplifier A1 is connected to the upper end of the bias resistor R3, and the positive and negative power supply terminals are connected to positive and negative DC sources respectively, used to set the range of the positive and negative output levels. The left end of the input protection resistor R2 is connected to the source of the active clamp switch S1, and the right end is connected to the positive terminal of the differential amplifier A1, used to prevent input overshoot. The lower end of the bias resistor R3 is connected to the source of the active clamp switch S1. The left end of the feedback resistor R4 is connected to the negative terminal of the differential amplifier A1, and the right end is connected to the output terminal of the differential amplifier A1. The bias resistor R3 and the feedback resistor R4 form a feedback bias network used to control the amplifier gain.

[0032] The control signal generation module 3 includes a field-programmable gate array circuit.

[0033] The following three specific embodiments illustrate the testing principle of the power semiconductor device testing platform based on a half-bridge structure, demonstrating the platform's versatility and high compatibility:

[0034] Example 1: Dual-pulse test circuit for dynamic on-resistance testing

[0035] like Figure 2 As shown, in this example, the upper end of capacitor C1 in the half-bridge circuit 11 can be connected to the drain of power device Q2, and the connected power supply can be switched with the bus power supply V in load group 12. DCThe upper end of the circuit is connected to the drain of the power device Q2, and the lower end is connected to the source of the power device Q1. The A and B terminals of the ultra-low voltage clamping circuit 21 are connected to the drain and source of the power device Q1 (the device under test), respectively. Furthermore, the left X node of the protection resistor R2 in the amplifier circuit 22 is connected to the anode of the Zener diode D2 in the ultra-low voltage clamping circuit 21, and the lower Y node of the bias resistor R3 is connected to the cathode of the Zener diode D2 in the ultra-low voltage clamping circuit 21.

[0036] like Figure 3 As shown, the dual-pulse dynamic on-resistance test circuit operates based on the following three main control signals: the gate signal V of power device Q1. GS,Q1 The gate signal V of power device Q2 GS,Q2 The gate signal V of the active clamp switch S1 GS,S1 Other key signals include the current signal I on inductor L1. L1 and the clamping voltage signal V output by the amplifier circuit M .

[0037] Specifically, at time T0, V GS,Q2 When the voltage level is high, power device Q2 is turned on, and V GS,Q1 When the voltage is low, power device Q1 is turned off, V GS,S1 When the signal is low, the active clamping switch S1 is turned off.

[0038] At time T1, V GS,Q2 When the voltage is low, power device Q2 is turned off, V GS,Q1 When the voltage level is high, power device Q1 is turned on. Since the current in inductor L1 cannot change abruptly, I... L1 Starting from zero with a slope V DC / L1 (L1 is the inductance value of the first inductor) increases linearly, V GS,S1 When the signal is low, the active clamping switch S1 is turned off.

[0039] At time T2, V GS,Q2 When the voltage level is high, power device Q2 is turned on, and V GS,Q1 When the voltage level is low, power device Q1 is turned off, and inductor I... L Power device Q2 forms a reverse freewheeling circuit. During the period T2~T3, the current in the inductor remains basically unchanged, V GS,S1 When the signal is low, the active clamping switch S1 is turned off.

[0040] At time T3, V GS,Q2 When the voltage is low, power device Q2 is turned off, V GS,Q1 When the voltage level is high, power device Q1 is turned on, and the inductor current I is high. L1 Based on the original current, continue with a slope V DC / L1 increases linearly, as V... GS,Q1After a certain time delay (tens of ns) after being converted to a high level, V GS,S1 When the voltage level is high, the active clamping switch S1 is turned on and connected to the ultra-low voltage clamping circuit for dynamic on-resistance testing.

[0041] At time T4, V GS,Q2 When the voltage level is high, power device Q2 is turned on, and V GS,Q1 When the voltage is low, power device Q1 is turned off. GS,S1 When the signal is low, the active clamping switch S1 is turned off, and the test process ends.

[0042] Based on the inductor current I obtained during the conduction process of the active clamping switch S1 during the time period T3-T4. L1 The output signal V of amplifier circuit 22 M According to the formula: dR ON =V M / I L1 / n, obtain the dynamic on-resistance dR of power device Q1. ON , where n is the amplification factor of differential amplifier A1, which can be adjusted by changing the ratio of bias resistor R3 and feedback resistor R4.

[0043] Example 2: Reverse Dynamic On-Resistance Test Circuit in Synchronous BUCK Mode

[0044] like Figure 4 As shown, in this example, the upper end of capacitor C1 in the configurable half-bridge circuit 11 is connected to the upper end of load resistor R1 in the switchable power supply and load group 12, the lower end of capacitor C1 is connected to the lower end of load resistor R1 in the switchable power supply and load group 12, and the upper end of capacitor C2 is connected to the bus power supply V in the switchable power supply and load group 12. DC The upper end of capacitor C2 is connected to the lower end of the switchable power supply and load group 12 bus power supply V. DC The lower end is connected; the A and B terminals of the ultra-low voltage clamping circuit 21 are respectively connected to the drain and source of the power device Q1 (the device under test). Furthermore, the left end X node of the protection resistor R2 in the amplifier circuit 22 is connected to the anode of the Zener diode D2 in the ultra-low voltage clamping circuit 21, and the lower end Y node of the bias resistor R3 is connected to the cathode of the Zener diode D2 in the ultra-low voltage clamping circuit 21.

[0045] Its key waveform is as follows Figure 5 As shown, it will not be elaborated further here.

[0046] Example 3: Forward Dynamic On-Resistance Test Circuit in Synchronous BOOST Mode

[0047] like Figure 6As shown, in this example, the upper end of capacitor C1 in the half-bridge circuit 11 can be configured to connect to the bus power supply V in the switchable power supply and load group 12. DC The upper end of capacitor C1 is connected to the lower end of the switchable power supply and load group 12, which is connected to the bus power supply V. DC The lower end of capacitor C2 is connected to the upper end of the load resistor R1 in the switchable power supply and load group 12, and the lower end of capacitor C2 is connected to the lower end of the load resistor R1 in the switchable power supply and load group 12. The A and B terminals of the ultra-low voltage clamping circuit 21 are connected to the drain and source terminals of the power device Q1 (the device under test), respectively. Furthermore, the left X node of the protection resistor R2 in the amplifier circuit 22 is connected to the anode of the Zener diode D2 in the ultra-low voltage clamping circuit 21, and the lower Y node of the bias resistor R3 is connected to the cathode of the Zener diode D2 in the ultra-low voltage clamping circuit 21.

[0048] Its key waveform is as follows Figure 7 As shown, it will not be elaborated further here.

Claims

1. A dynamic on-resistance testing circuit for gallium nitride devices, characterized in that, The system includes a multi-mode power loop module, a high-precision on-state voltage drop testing module, and a control signal generation module. The multi-mode power loop module includes a configurable half-bridge circuit and corresponding configuration power supplies and resistors. By flexibly connecting the configuration power supply and configuration circuit within the configurable half-bridge circuit, multiple circuit operating modes can be obtained. The high-precision on-state voltage drop testing module samples the drain-source voltage of the lower power device in the configurable half-bridge circuit and, combined with the on-state current of the lower power device, obtains the dynamic on-state resistance. The control signal generation module generates drive signals to drive the power devices in the configurable half-bridge circuit and the high-precision on-state voltage drop testing module, respectively.

2. The dynamic on-resistance testing circuit for gallium nitride devices according to claim 1, characterized in that, The configurable half-bridge circuit includes a first power device, a second power device, an inductor, a first capacitor, and a second capacitor. The first power device is a lower power device, with its gate connected to a first drive signal provided by a control signal generation module, its drain connected to one end of the second capacitor, and its source connected to one end of the inductor and the drain of the second power device. The second power device is an upper power device, with its gate connected to a second drive signal provided by the control signal generation module and its source grounded. The other end of the inductor is connected to one end of the first capacitor. The other ends of the first capacitor and the other ends of the second capacitor are grounded. The circuit operating modes obtained by connecting the configurable half-bridge circuit with a configuration power supply and a configuration resistor include dual-pulse test, BUCK mode, and BOOST mode. The connection method for the dual-pulse test is to connect the positive terminal of the power supply to the drain of the second power device, one end of the second capacitor, and one end of the first capacitor, while the configuration resistor is unconnected. The connection method of the BUCK mode is as follows: the positive terminal of the power supply is connected to the drain of the second power device and one end of the second capacitor, and the resistor is connected in parallel with the first capacitor. The connection method for the BOOST mode is as follows: the positive terminal of the power supply is connected to one end of the first capacitor, and the resistor is connected in parallel with the second capacitor.

3. The dynamic on-resistance testing circuit for gallium nitride devices according to claim 2, characterized in that, The high-precision on-state voltage drop test module includes an ultra-low voltage clamping circuit and an amplification circuit. The ultra-low voltage clamping circuit includes an active clamping switch, a fast recovery diode, and a Zener diode; the drain of the active clamping switch is connected to the drain of the first power device, the source is connected to the anode of the fast recovery diode and the anode of the Zener diode, and the gate of the active clamping switch is connected to a third drive signal provided by the control signal generation module; the cathodes of the fast recovery diode and the Zener diode are connected to the source of the first power device. The amplifier circuit includes an input protection resistor, a differential amplifier, a bias resistor, and a feedback resistor; The positive input terminal of the differential amplifier is connected to the source of the active clamp switch through a protection resistor. The negative input terminal of the differential amplifier is connected to the source of the first power device through a bias resistor. The output terminal of the differential amplifier is connected to its own negative input terminal through a feedback resistor. The positive and negative power supply terminals of the differential amplifier are connected to positive and negative DC sources, respectively. The output terminal of the differential amplifier outputs the sampling voltage.

4. The dynamic on-resistance testing circuit for gallium nitride devices according to claim 3, characterized in that, The control signal generation module generates a first drive signal, a second drive signal, and a third drive signal through a field-programmable gate array circuit. The first drive signal and the second drive signal are mutually inverted signals, and the third drive signal is set to a high level only during the period when the first drive signal is high, as required.

5. A method for testing the dynamic on-resistance of a gallium nitride device, used in the circuit described in any one of claims 1-4, characterized in that, include: Connect the configuration power supply and configuration resistor to the configurable half-bridge circuit as needed to obtain the circuit in the desired operating mode. The control signal generation module generates drive signals to control the switching of power devices in the configurable half-bridge circuit and the high-precision on-state voltage drop test module, respectively. Specifically, the power devices in the configurable half-bridge circuit are periodically switched, and the voltage of the lower power transistor in the configurable half-bridge circuit is sampled by controlling the switching of the power devices in the high-precision on-state voltage drop test module. After obtaining the sampling voltage through the high-precision on-state voltage drop test module, the dynamic on-state resistance is obtained by combining it with the on-state current of the lower power transistor. Using the method described above to obtain dynamic on-resistance, the dynamic on-resistance of low-power devices under different conditions can be obtained, thereby achieving dynamic evaluation.

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