Sensor numerical value display circuit constructed by adopting nixie tubes

Abstract

The invention relates to the technical field of electronics, in particular to a sensor numerical value display circuit constructed by adopting nixie tubes. Comprising a signal input unit, a power supply unit, a reference voltage generation unit, an input signal conversion unit, an input alarm unit, a voltage acquisition and conversion unit and a nixie tube display circuit unit, and each unit is of a pure hardware circuit structure without a single chip microcomputer. According to the scheme, a pure hardware circuit without a single chip microcomputer is adopted to drive the nixie tube, on one hand, the function of adjusting the zero point and the measuring range is achieved, on the other hand, out-of-range alarm monitoring can be conducted on input signals, and through the optimal design of the hardware architecture, the reliability, practicability and operability of the system are effectively improved.

Description

Technical Field

[0001] This invention relates to the field of electronic technology, and more specifically to a sensor numerical display circuit constructed using a digital tube. Background Technology

[0002] 4-20mA analog signals are standard transmission signals in industrial control. However, in practical applications, current values ​​cannot be directly read and identified. Therefore, digital displays are needed to convert them into intuitive physical quantities (such as temperature, pressure, and liquid level) so that on-site personnel can quickly obtain key information.

[0003] Currently, digital tube driver circuits typically employ microcontrollers (MCUs) or single-chip microcomputers in conjunction with peripheral driver circuits. When debugging in industrial settings, this approach requires external devices such as computers to perform operations like program burning and parameter configuration, which presents the following limitations: 1) The debugging process relies on auxiliary equipment, resulting in insufficient operability: In industrial settings where debugging tools are lacking or computers are malfunctioning, especially in field operations or complex installation environments, the inability to adjust parameters will lead to a significant reduction in debugging efficiency.

[0004] In addition, the specific operation process of using MCU with peripheral drive circuits requires parameter setting through software interface, which involves programming and configuration steps, requires high technical skills from operators, and takes a long time to debug, making it difficult to meet the needs of rapid maintenance and on-site calibration.

[0005] 2) The program is susceptible to external interference and exhibits poor stability. Electromagnetic interference in industrial environments (such as motor starting, frequency converter operation, etc.) can easily cause MCU program malfunctions, leading to data reading errors, logic disorder, and other problems, which in turn can cause digital tube displays to jump, distort values, or flicker.

[0006] Therefore, in order to enhance the anti-interference capability, additional designs are required in the hardware circuit (such as adding filtering and isolation devices) and software program (such as introducing watchdog timers and data verification algorithms). This not only increases the cost of the circuit, but may also lead to poor anti-interference performance due to design flaws.

[0007] 3) Low flexibility in function adjustment and poor hardware compatibility. When adjusting the display range or performing zero-point calibration, the MCU program must be rewritten and burned, which cannot be quickly achieved through simple hardware adjustments. Therefore, this approach is not conducive to on-site maintenance and functional iteration. In addition, due to the lack of hardware versatility, different application scenarios with different range or accuracy requirements require customized program development, making it difficult to reuse circuit modules and significantly increasing the cost and cycle of research and development and production.

[0008] 4) System reliability is affected by the synergy between software and hardware. The reliability of an MCU driver solution depends on the coordinated operation of software and hardware. If the software program has logical flaws or timing errors, it may cause display abnormalities during long-term operation, and fault location requires specialized debugging tools, thus increasing maintenance difficulty. In addition, when hardware circuit parameters (such as ADC sampling accuracy and driver chip response speed) do not match the software algorithm, it may cause hardware and software compatibility issues, leading to increased signal conversion errors and further affecting display accuracy and real-time performance.

[0009] Therefore, how to solve the defects of the above-mentioned MCU-based digital tube driving scheme in industrial applications, such as "debugging depends on external equipment, weak anti-interference ability, inflexible function adjustment, and reliability limited by software and hardware coordination", has always been a problem that needs to be solved by those skilled in the art. Summary of the Invention

[0010] The purpose of this invention is to address the shortcomings of existing technologies by providing a sensor numerical display circuit constructed using a digital tube. This solution uses a pure hardware circuit that does not contain a single-chip microcomputer or a microcontroller (MCU) to drive the digital tube. On the one hand, it realizes the functions of adjustable zero point and range, and on the other hand, it can perform out-of-range alarm monitoring of input signals. Through this optimized hardware architecture design, the reliability, practicality, and operability of the digital tube driver are effectively improved.

[0011] The objective of this invention is achieved through the following approach: A sensor numerical display circuit constructed using digital tubes includes a signal input unit, a power supply unit, a reference voltage generation unit, an input signal conversion unit, an input alarm unit, a voltage acquisition and conversion unit, and a digital tube display circuit unit, and each unit is a pure hardware circuit structure without a microcontroller. The power supply unit is connected to the first input port of the input signal conversion unit through the reference voltage generation unit. The output port of the signal input unit is connected to the second input port of the input signal conversion unit. The first output port of the input signal conversion unit is connected to the first input port of the voltage acquisition and conversion unit through the input alarm unit. The second output port of the input signal conversion unit is connected to the digital tube display circuit unit through the voltage acquisition and conversion unit to drive the digital tube.

[0012] Preferably, the input signal conversion unit includes a differential amplifier circuit, a transient suppression diode D3, a pre-stage filter and signal processing circuit, a series voltage divider circuit, and a post-stage voltage divider circuit; The differential amplifier circuit includes a differential amplifier chip. The transient suppression diode D3 is connected to the positive terminal VIN+ of the received input voltage of the differential amplifier chip through a pre-stage filtering and signal processing circuit. The series voltage divider circuit is connected to the negative terminal VIN- of the received input voltage of the differential amplifier chip. The output voltage port VO of the differential amplifier chip is connected to the voltage acquisition and conversion unit through a subsequent voltage divider circuit. The series voltage divider circuit includes resistor R6, potentiometer R7, and resistor R8. One end of resistor R6 is connected in series with resistor R8 through the fixed end of potentiometer R7. The sliding end of potentiometer R7 is connected to the negative input voltage terminal VIN- of the differential amplifier chip. The other end of resistor R6 is connected to the output voltage port REF+ of the reference voltage generation unit, and the output voltage port REF+ of the reference voltage generation unit is connected to DGND through a capacitor C18.

[0013] Preferably, the subsequent voltage divider circuit includes a dual-group parallel selectable range resistor network, resistor R12, capacitor C29, cascade switch S1, and capacitor C23. The VO port of the differential amplifier chip is connected to port 2 of the cascade switch S1. The cascade switch S1 is a multi-pole single-throw structure. The first selection branch of the cascade switch S1 is connected to one end of the first group of range resistors R11. The second selection branch of the cascade switch S1 is connected to one end of the second group of range resistors R41. The first and second selection branches are parallel candidate relationships. The third selection branch of the cascade switch S1 is connected to one end of the first group of range resistors R14. The fourth selection branch of the cascade switch S1 is connected to one end of the second group of range resistors R44. The third and fourth selection branches are parallel candidate relationships, thereby forming a dual-group parallel selectable range configuration network for configuring different ranges. The cascade switch S1 has its 5th port connected to the other end of the first set of range resistors R11 and the second set of range resistors R41 via the fixed end of resistor R12. The sliding end of resistor R12 is connected to DGND via capacitor C29. The other end of the first set of range resistors R11 and the second set of range resistors R41 is connected to DGND. The sliding end of resistor R12 is also connected to the voltage acquisition and conversion unit. The VO port of the differential amplifier chip is connected to the RG port of the differential amplifier chip through capacitor C23, and the reference voltage input port RG of the differential amplifier chip is connected to DGND.

[0014] Preferably, the input alarm unit includes a resistor divider circuit and a voltage comparison circuit. The resistor divider circuit includes resistors R19, R26, R28, an adjustable resistor R30, and R33. One end of resistor R19 is connected in series with one end of resistor R28 through resistor R26. The other end of resistor R28 is connected to one end of resistor R33 through the fixed end of the adjustable resistor R30. The other end of resistor R19 is connected to the output voltage port REF+ of the reference voltage generation unit for inputting a reference voltage. The voltage comparison circuit includes a first voltage comparator U5A and a second voltage comparator U5B. The non-inverting input of the first voltage comparator U5A is connected to the negative input voltage terminal VIN- of the differential amplifier chip, and the negative input voltage terminal VIN- is connected to DGND through a capacitor C34. The inverting input of the first voltage comparator U5A is connected between the resistor R19 and the resistor R26, and the inverting input of the first voltage comparator U5A is connected to DGND through a capacitor C35. The non-inverting input of the second voltage comparator U5B is connected to the sliding input of the adjustable resistor R30, and the sliding input of the adjustable resistor R30 is connected to DGND through a capacitor C36. The inverting input of the second voltage comparator U5B is connected to the non-inverting input of the first voltage comparator U5A. The output terminals of the first voltage comparator U5A and the second voltage comparator U5B are both connected to the base of the transistor through a current-limiting resistor. The collector or emitter of the transistor is connected to the digital tube display circuit unit.

[0015] Preferably, the power supply unit is composed of a power chip WRE2405S-3WR2 or a power chip WRF2405S-3WR2.

[0016] Preferably, the reference voltage generation unit is composed of a voltage reference chip REF5020AQDRQ1 or a voltage reference chip REF5025AIDR.

[0017] The present invention has the following beneficial effects: A sensor numerical display circuit constructed using digital tubes includes a signal input unit, a power supply unit, a reference voltage generation unit, an input signal conversion unit, an input alarm unit, a voltage acquisition and conversion unit, and a digital tube display circuit unit, and each unit is a pure hardware circuit structure without a microcontroller. The power supply unit is connected to the first input port of the input signal conversion unit through the reference voltage generation unit. The output port of the signal input unit is connected to the second input port of the input signal conversion unit. The first output port of the input signal conversion unit is connected to the first input port of the voltage acquisition and conversion unit through the input alarm unit. The second output port of the input signal conversion unit is connected to the digital tube display circuit unit through the voltage acquisition and conversion unit to drive the digital tube.

[0018] This invention uses a pure hardware circuit structure without a microcontroller to drive the digital tube, enabling the visual display of key physical information. This solution effectively avoids the inherent defects of traditional MCU driving solutions, providing both zero-point adjustment and out-of-range alarm monitoring for input signals.

[0019] In other words, this pure hardware circuit structure can resist electromagnetic interference in industrial environments and can complete zeroing and range adjustment without relying on external debugging equipment, significantly improving the reliability, practicality, and operability of sensor numerical display.

[0020] The input signal conversion unit includes a differential amplifier circuit, a transient suppression diode D3, a pre-stage filter and signal processing circuit, a series voltage divider circuit, and a post-stage voltage divider circuit. The differential amplifier circuit includes a differential amplifier chip. The transient suppression diode D3 is connected to the positive terminal VIN+ of the received input voltage of the differential amplifier chip through a pre-stage filtering and signal processing circuit. The series voltage divider circuit is connected to the negative terminal VIN- of the received input voltage of the differential amplifier chip. The output voltage port VO of the differential amplifier chip is connected to the voltage acquisition and conversion unit through a subsequent voltage divider circuit. The series voltage divider circuit includes resistor R6, potentiometer R7, and resistor R8. One end of resistor R6 is connected in series with resistor R8 through the fixed end of potentiometer R7. The sliding end of potentiometer R7 is connected to the negative input voltage terminal VIN- of the differential amplifier chip. The other end of resistor R6 is connected to the output voltage port REF+ of the reference voltage generation unit, and the output voltage port REF+ of the reference voltage generation unit is connected to DGND through a capacitor C18.

[0021] The input signal conversion unit of this invention can convert, process, and protect 4-20mA current signals in industrial environments. A series voltage divider circuit consisting of resistor R6, potentiometer R7, and resistor R8 provides a stable reference voltage to the differential amplifier circuit. This, in conjunction with the differential amplifier circuit, further adjusts and processes the input signal, ensuring that the output signal meets the requirements of subsequent circuits.

[0022] Preferably, the subsequent voltage divider circuit includes a dual-group parallel selectable range resistor network, resistor R12, capacitor C29, cascade switch S1, and capacitor C23. The VO port of the differential amplifier chip is connected to port 2 of the cascade switch S1. The cascade switch S1 is a multi-pole single-throw structure. The first selection branch of the cascade switch S1 is connected to one end of the first group of range resistors R11. The second selection branch of the cascade switch S1 is connected to one end of the second group of range resistors R41. The first and second selection branches are parallel candidate relationships. The third selection branch of the cascade switch S1 is connected to one end of the first group of range resistors R14. The fourth selection branch of the cascade switch S1 is connected to one end of the second group of range resistors R44. The third and fourth selection branches are parallel candidate relationships, thereby forming a dual-group parallel selectable range configuration network for configuring different ranges. The cascade switch S1 has its 5th port connected to the other end of the first set of range resistors R11 and the second set of range resistors R41 via the fixed end of resistor R12. The sliding end of resistor R12 is connected to DGND via capacitor C29. The other end of the first set of range resistors R11 and the second set of range resistors R41 is connected to DGND. The sliding end of resistor R12 is also connected to the voltage acquisition and conversion unit. The VO port of the differential amplifier chip is connected to the RG port of the differential amplifier chip through capacitor C23, and the reference voltage input port RG of the differential amplifier chip is connected to DGND.

[0023] By setting up a dual-group parallel selectable range resistor network in the subsequent voltage divider circuit, the range can be adjusted by using the principle of resistance voltage division and selecting the resistors through the cascaded switch S1 (such as R11, R14, or R41, R44), thus meeting diverse measurement needs.

[0024] Furthermore, by setting resistor R12, the circuit can be manually zeroed directly for the first time. By adjusting its sliding contact, the output voltage can be finely adjusted to eliminate initial errors and improve the accuracy and precision of the measurement.

[0025] Preferably, the input alarm unit includes a resistor divider circuit and a voltage comparison circuit. The resistor divider circuit includes resistors R19, R26, R28, an adjustable resistor R30, and R33. One end of resistor R19 is connected in series with one end of resistor R28 through resistor R26. The other end of resistor R28 is connected to one end of resistor R33 through the fixed end of the adjustable resistor R30. The other end of resistor R19 is connected to the output voltage port REF+ of the reference voltage generation unit for inputting a reference voltage. The voltage comparison circuit includes a first voltage comparator U5A and a second voltage comparator U5B. The non-inverting input of the first voltage comparator U5A is connected to the negative input voltage terminal VIN- of the differential amplifier chip, and the negative input voltage terminal VIN- is connected to DGND through a capacitor C34. The inverting input of the first voltage comparator U5A is connected between the resistor R19 and the resistor R26, and the inverting input of the first voltage comparator U5A is connected to DGND through a capacitor C35. The non-inverting input of the second voltage comparator U5B is connected to the sliding input of the adjustable resistor R30, and the sliding input of the adjustable resistor R30 is connected to DGND through a capacitor C36. The inverting input of the second voltage comparator U5B is connected to the non-inverting input of the first voltage comparator U5A. The output terminals of the first voltage comparator U5A and the second voltage comparator U5B are both connected to the base of the transistor through a current-limiting resistor. The collector or emitter of the transistor is connected to the digital tube display circuit unit.

[0026] By incorporating a resistor divider circuit and a voltage comparator circuit into the alarm unit, the voltage range of the input signal can be detected in real time. The resistor divider circuit divides the reference voltage to obtain two reference points, which are then compared with the real-time voltage in the input voltage comparator circuit. This comparison outputs an alarm control signal indicating either exceeding the upper limit (Vhigh) or exceeding the lower limit (Vlow). This signal is then converted by a transistor into an alarm display signal to drive a digital display, thus achieving an out-of-range alarm function and improving system safety and reliability. Attached Figure Description

[0027] Figure 1 This is a circuit block diagram of the present invention; Figure 2 This is a circuit diagram of the power supply unit of the present invention; Figure 3 This is a circuit diagram of the reference voltage generating unit of the present invention; Figure 4 This is a circuit diagram of the decimal point control section of the present invention; Figure 5 This is a schematic diagram of the input terminals of the signal input unit of the present invention; Figure 6 This is a circuit diagram of the input signal conversion unit of the present invention; Figure 7 This is a circuit diagram of the voltage acquisition and conversion unit of the present invention; Figure 8 This is a circuit diagram of the input alarm unit of the present invention; Figure 9 This is a circuit diagram of the digital tube display circuit unit of the present invention. Detailed Implementation

[0028] like Figures 1 to 9 As shown, a sensor numerical display circuit constructed using a digital tube includes a signal input unit, the specific input terminals of which are as follows: Figure 5 As shown; Power supply unit: Composed of power supply chip WRE2405S-3WR2 or power supply chip WRF2405S-3WR2, it provides 5V voltage to the subsequent circuits. In this embodiment, when using power supply chip WRE2405S-3WR2 to construct the power supply unit, the peripheral circuits given in the WRE2405S-3WR2 chip manual can be directly used for design, which is sufficient for the power supply module to complete the power supply function. Reference voltage generation unit: Composed of voltage reference chip REF5020AQDRQ1 or voltage reference chip REF5025AIDR, it is used to generate a reference voltage to serve as a voltage reference when the signal in the subsequent input signal conversion unit is zeroed. In this embodiment, when using voltage reference chip REF5020AQDRQ1 to construct the reference voltage generation unit, the peripheral circuit given in the chip's manual can also be designed directly to generate the reference voltage. In this embodiment, the reference voltage is 2.048V. Input signal conversion unit: mainly converts the current signal (i.e., 4-20mA current signal) of the signal input unit into a voltage signal; Input alarm unit: compares the converted voltage signal with the lower limit and upper limit values, and outputs an alarm signal to control the voltage acquisition and conversion unit to display the alarm. Voltage acquisition and conversion unit: This unit primarily acquires the converted voltage signal and converts it into a display value within the corresponding range. In this embodiment, the voltage acquisition and conversion unit uses the MAX1498ECJ+, and the peripheral circuitry provided in the chip's datasheet can be directly used for design.

[0029] Digital tube display circuit unit: used to display the required physical quantity values.

[0030] Each unit is a pure hardware circuit structure without a microcontroller. The power supply unit is connected to the first input port of the input signal conversion unit through the reference voltage generation unit. The output port of the signal input unit is connected to the second input port of the input signal conversion unit. The first output port of the input signal conversion unit is connected to the first input port of the voltage acquisition and conversion unit through the input alarm unit. The second output port of the input signal conversion unit is connected to the digital tube display circuit unit through the voltage acquisition and conversion unit to drive the digital tube, thereby representing industrial current data (such as 4-20mA analog signals) as intuitive physical quantity values.

[0031] The input signal conversion unit includes a differential amplifier circuit, a transient suppression diode D3, a pre-stage filter and signal processing circuit, a series voltage divider circuit, and a post-stage voltage divider circuit. The differential amplifier circuit includes a differential amplifier chip. The transient suppression diode D3 is connected in series between the Ii+ and Ii- ports of the signal input unit (i.e., the input terminal), utilizing its transient voltage suppression characteristics to effectively protect the subsequent circuitry. The two ends of the transient suppression diode D3 are connected to ports 1 and 2 of the common-mode choke / filter L5. A capacitor C26 is connected between ports 3 and 4 of L5, and a capacitor C27 and a resistor R13 are connected in parallel across C26. The common-mode choke / filter L5, capacitors C26 and C27 constitute the pre-stage filter circuit, achieving initial signal filtering; resistor R13 serves as a sampling resistor, used to acquire the current signal and convert it into a voltage signal. In other words, the transient suppression diode D3 is connected to the positive terminal VIN+ of the differential amplifier chip through the pre-stage filtering and signal processing circuit, which can convert the input 4-20mA current signal into a voltage signal and amplify the voltage signal. In this embodiment, the converted voltage signal is 0.272V to 1.36V, and the circuit amplification factor is set to 1.

[0032] It also includes common-mode filtering circuits, such as Figure 6 As shown, the common-mode filter circuit consists of a common-mode inductor L4 and a capacitor. Ports 1 and 3 of the common-mode filter circuit are connected to the two ends of resistor R13, respectively. Port 2 of the common-mode filter circuit is connected to the positive terminal VIN+ of the differential amplifier chip through a resistor R10, which can further suppress common-mode interference and improve signal quality.

[0033] A series voltage divider circuit is connected to the negative input voltage terminal VIN- of the differential amplifier chip. The series voltage divider circuit includes resistor R6, potentiometer R7, and resistor R8. One end of resistor R6 is connected in series with resistor R8 through the fixed end of potentiometer R7. The sliding end of potentiometer R7 is connected to the negative input voltage terminal VIN- of the differential amplifier chip. The other end of resistor R6 is connected to the output voltage port REF+ of the reference voltage generation unit, and the output voltage port REF+ of the reference voltage generation unit is connected to DGND through capacitor C18. In this embodiment, by fine-tuning the sliding end of potentiometer R7, the voltage at the Vin- endpoint can be precisely set to 0.272V, providing a stable reference for differential amplification.

[0034] Specifically, the differential amplifier chip performs calculations based on the principle VO = (Vin+) - (Vin-) to obtain the output voltage VO. In this embodiment, Vin+ is 0V and Vin- is 1.088V, so the output voltage VO = 0V - 1.088V.

[0035] The output voltage port VO of the differential amplifier chip is connected to the voltage acquisition and conversion unit through a subsequent voltage divider circuit. The subsequent voltage divider circuit includes two sets of parallel selectable range resistor networks, resistor R12, capacitor C29, cascade switch S1, and capacitor C23. In this embodiment, the output voltage port VO of the differential amplifier chip is connected to port 2 of the cascade switch S1. The cascade switch S1 is a multi-pole single-throw structure. Its first selection branch is connected to one end of the first set of range resistors R11, and its second selection branch is connected to one end of the second set of range resistors R41. The first and second selection branches are parallel candidate relationships. The third selection branch of the cascade switch S1 is connected to one end of the first set of range resistors R14, and its fourth selection branch is connected to one end of the second set of range resistors R44. The third and fourth selection branches are parallel candidate relationships, thus forming a dual-set parallel selectable range configuration network for configuring different ranges. In this embodiment, two sets of parallel selectable range resistors are used to change the range. However, in actual applications, multiple sets of parallel selectable range resistor networks can be set according to actual needs.

[0036] Port 5 of the cascade switch S1 is connected to the other end of the first set of range resistors R11 and the second set of range resistors R41 through the fixed end of resistor R12. The sliding end of resistor R12 is connected to DGND through capacitor C29. The other end of the first set of range resistors R11 and the second set of range resistors R41 is connected to DGND. The sliding end of resistor R12 is connected to the voltage acquisition and conversion unit to realize zero adjustment and signal transmission. The output voltage port VO of the differential amplifier chip is connected to the RG port of the differential amplifier chip through capacitor C23, and the RG port of the differential amplifier chip is connected to DGND.

[0037] The input alarm unit includes a resistor voltage divider circuit and a voltage comparison circuit. The resistor voltage divider circuit includes resistors R19, R26, R28, adjustable resistor R30, and R33. One end of resistor R19 is connected in series with one end of resistor R28 through resistor R26. The other end of resistor R28 is connected to one end of resistor R33 through the fixed end of adjustable resistor R30. The other end of resistor R19 is connected to REF+ for input reference voltage. The voltage comparison circuit includes a first voltage comparator U5A and a second voltage comparator U5B. The non-inverting input (port 2) of the first voltage comparator U5A is connected to the negative input voltage VIN- port of the differential amplifier chip to obtain the voltage signal VOUT0 after the current signal of the sensor is converted by the sampling resistor. The negative input voltage VIN- port is connected to DGND through a capacitor C34. The inverting input (port 3) of the first voltage comparator U5A is connected between resistor R19 and resistor R26. The inverting input of the first voltage comparator U5A is connected to DGND through a capacitor C35. The non-inverting input of the second voltage comparator U5B is connected to the sliding input of the adjustable resistor R30. The sliding input of the adjustable resistor R30 is connected to DGND through a capacitor C36. The inverting input of the second voltage comparator U5B is connected to the non-inverting input of the first voltage comparator U5A. In other words, the input alarm unit utilizes the principle of resistor voltage division to divide the reference voltage of 2.048V, obtaining two reference points (including an upper limit reference voltage and a lower limit reference voltage). The upper limit reference voltage is compared with the real-time voltage through the first voltage comparator U5A to output an alarm control signal for exceeding the upper limit Vhigh, and the lower limit reference voltage is compared with the real-time voltage through the second voltage comparator U5B to output an alarm control signal for exceeding the lower limit Vlow. The output terminals of both the first voltage comparator U5A and the second voltage comparator U5B are connected to the base of a transistor through a current-limiting resistor (such as R17, R16, R24, R23, R31, R32). The collector or emitter of the transistor is connected to the corresponding pin of the MAX1498ECJ+ chip in the digital tube display circuit unit, which is used to transmit the signal to the digital tube display circuit unit for alarm display through the control voltage acquisition and conversion unit.

[0038] It also includes a decimal point control section, whose input terminals are connected to the corresponding pins of the MAX1498ECJ+ chip, enabling it to change the position of the decimal point displayed on the digital tube according to the actual situation.

[0039] An example is provided based on the above method: A) Power supply unit constructed using WRE2405S-3WR2: In this power supply unit, fuse FU1 is MF-MSMF020; varistor M1 is MOV-07D330K; aluminum electrolytic capacitor C15 has a capacitance of 330uF and a withstand voltage of 50V, meaning capacitor C15 is rated at 330μF / 50V; capacitors C16 and C10 are rated at 100nF / 50V; inductor L2 has an inductance of 12uH; capacitor C11 is rated at 10nF / 50V; and transient voltage suppression diode D... The model number of component 2 is SMAJ26CA; the specification of capacitor C17 is 1nF / 2KV; the specifications of capacitors C1 and C6 are 100UF / 6.3V; the specifications of capacitors C2 and C7 are 100nF / 50V; the impedance characteristics of inductors L1 and L3 are 300R@100MHZ; the specifications of capacitors C4 and C9 are 10nF / 10V; the specifications of capacitors C3 and C8 are 4.7UF / 10V; the model number of rectifier diode D1 is M7.

[0040] B) Construct a reference voltage generation unit using REF5020AQDRQ1: In this reference voltage generation unit, capacitor C5 is rated at 10uF / 10V; resistor R2 has a resistance of 1.2R; capacitor C12 is rated at 1uF / 10V; capacitor C13 is rated at 47uF / 10V; and capacitor C14 is rated at 10uF / 10V.

[0041] C) Using INA149AIDR to construct the input signal conversion unit: In this input signal conversion unit, the transient suppression diode D3 is model SMAJ5.0CA; the common-mode choke / filter L5 is model CC2824B475R-10; capacitor C26 is 4.7uF / 10V; capacitor C27 is 100nF / 10V; resistor R13 has a nominal resistance of 68Ω and an accuracy class of 0.1% (i.e., R13's specification is 68R / 0.1%); the common-mode filter circuit is model MEM2012S25R0T001; capacitor C18 is 470pF / 50V; resistor R6 is 9.76K / 0.1%; resistor R10 is model BLM18PG121SN1D; and capacitor C28 is 220nF. / 10V; Potentiometer R7 is rated 50R±10%; R8 is rated 1.47K / 0.1%; Capacitor C24 is rated 10UF / 10V; Capacitor C25 is rated 100nF / 10V; Capacitor C19 is rated 100nF / 10V; Capacitor C20 is rated 10UF / 10V; Capacitor C23 is rated 10nF / 10V; Resistor R11 is rated 1.21K / 0.1%; Resistor R41 is rated 1.02K / 0.1%; Resistor R14 is rated 1.02K / 0.1%; Resistor R44 is rated 40.2R / 0.1%; Resistor R12 is rated 20R±10%; Capacitor C29 is rated 10nF / 10V.

[0042] D) A voltage acquisition and conversion unit is constructed using the MAX1498ECJ+: In this voltage acquisition and conversion unit, capacitor C21 is 10uF / 10V; capacitor C22 is 100nF / 10V; L647uH; capacitor C31 is 10uF / 10V; capacitor C32 is 100nF / 10V; resistor R15 has a resistance of 470KΩ; capacitor C33 is 100nF / 10V; capacitor C30 is 4.7uF / 10V; resistor R5 is 0R; resistor R9 has a resistance of 4.7KΩ; WR1 is a thick film resistor array, model YC164-JR-074K7L.

[0043] E) Construct an input alarm unit. In this unit, capacitor C34 is 100nF / 10V; capacitor C3500nF / 10V; resistor R19 is 332R / 0.1%; resistor R26 is 330R / 0.1%; resistor R28 is 200R / 0.1%; adjustable resistor R30 is 20R±10%; resistor R33 is 120R / 0.1%; and capacitor C36 is 100nF / 10V. F / 10V; the first voltage comparator U5A and the second voltage comparator U5B are model LM2903QDGKRQ1; the resistance of resistors R20 and R27 is 1KΩ; the resistance of resistors R18, R25, R29, R17, R24, R31, R16, R23, and R32 is 4.7KΩ; the model of transistors Q1 to Q9 is 2N5551; the resistance of resistors R21 and R22 is 10KΩ.

[0044] Example 1: Zeroing the displayed value and calibrating the maximum range Before the equipment is put into use, the display value needs to be zeroed and calibrated. The specific operation procedure is as follows: Taking the working condition with an input signal of 4-20mA and a range of 0-5000 as an example, the display value can be zeroed by adjusting the resistor R7 so ​​that the digital tube displays a value of 0. By adjusting the resistance of resistor R12, the voltage input to the INA149AIDR chip from the voltage divider circuit composed of resistors R7, R6, and R8 is stabilized at 0.272V (i.e., the voltage at pin 2 of the chip is 0.272V). Then, a standard signal source is connected and a 20mA current is input, and the resistance of R12 is continuously fine-tuned until the digital tube displays a value of 5000, thus completing the maximum range calibration.

[0045] Example 2: Range Adjustment During production, the measurement range can be customized according to customer needs. In this embodiment, the combination of resistors R11 and R14 corresponds to a range of 0-5000, and the combination of resistors R41 and R44 corresponds to a range of 0-500. When it is necessary to switch the range from 0-5000 to 0-500, the cascade switch S1 is manually toggled to connect it to the resistor network of R41 and R44. The range can then be adjusted automatically without programming by utilizing the voltage divider principle.

[0046] Example 3: Input Out-of-Range Alarm In the circuit structure of this embodiment, if the input current exceeds the range, it may indicate an unknown error in the entire system. Continuous operation could lead to system crash or damage to a component. Therefore, this technical solution sets up a dual threshold alarm mechanism, triggering the alarm function when the following conditions occur: Lower limit alarm: When the input current is less than 3.8mA, an upper limit alarm is triggered. At this time, the decimal point of the individual digits of the digital tube lights up. The lower limit threshold can be finely adjusted using the adjustable resistor R30. Over-limit alarm: When the input current is greater than 20.2mA, an over-limit alarm is triggered, and all decimal points of the digital tube are lit to indicate the alarm.

[0047] This alarm mechanism uses a resistor divider network and a voltage comparison circuit to sample the reference voltage, and combines a transistor switching circuit to convert the alarm signal into a digital tube display control signal, ensuring real-time monitoring of abnormal operating conditions in industrial sites.

[0048] A comparative experiment was conducted using the constructed circuit and a digital tube display circuit containing a microcontroller, as shown in Table 1 below:

[0049] According to the test data in Table 1, under full-scale (display value 5000) conditions, three typical interference sources were selected to test the circuit's anti-interference performance. The data in the table represent the maximum limit deviation in the test results, and the required display accuracy is 0.02%FS±1 digit. The test results show that the digital tube display circuit containing a microcontroller is significantly affected by electromagnetic interference, and its display accuracy does not meet the design requirements. In contrast, the circuit of this technical solution has higher reliability and display accuracy than the digital tube display circuit containing a microcontroller, and meets the design requirements.

[0050] The above description is only a preferred embodiment of the present invention and is not intended to limit the present invention. Any modifications made to the present invention by those skilled in the art without departing from the spirit of the present invention shall fall within the protection scope of the present invention.

Claims

1. A sensor numerical display circuit constructed using a digital tube, characterized in that, It includes a signal input unit, a power supply unit, a reference voltage generation unit, an input signal conversion unit, an input alarm unit, a voltage acquisition and conversion unit, and a digital tube display circuit unit, and each unit is a pure hardware circuit structure without a microcontroller; The power supply unit is connected to the first input port of the input signal conversion unit through the reference voltage generation unit. The output port of the signal input unit is connected to the second input port of the input signal conversion unit. The first output port of the input signal conversion unit is connected to the first input port of the voltage acquisition and conversion unit through the input alarm unit. The second output port of the input signal conversion unit is connected to the digital tube display circuit unit through the voltage acquisition and conversion unit to drive the digital tube.

2. The sensor numerical display circuit constructed using a digital tube according to claim 1, characterized in that, The input signal conversion unit includes a differential amplifier circuit, a transient suppression diode (D3), a pre-stage filter and signal processing circuit, a series voltage divider circuit, and a post-stage voltage divider circuit; The differential amplifier circuit includes a differential amplifier chip. The transient suppression diode (D3) is connected to the positive terminal VIN+ of the received input voltage of the differential amplifier chip through a pre-stage filtering and signal processing circuit. The series voltage divider circuit is connected to the negative terminal VIN- of the received input voltage of the differential amplifier chip. The output voltage port VO of the differential amplifier chip is connected to the voltage acquisition and conversion unit through a subsequent voltage divider circuit. The series voltage divider circuit includes a resistor (R6), a potentiometer (R7), and a resistor (R8). One end of the resistor (R6) is connected in series with the resistor (R8) through the fixed end of the potentiometer (R7). The sliding end of the potentiometer (R7) is connected to the negative input voltage terminal VIN- of the differential amplifier chip. The other end of the resistor (R6) is connected to the output voltage port REF+ of the reference voltage generation unit, and the output voltage port REF+ of the reference voltage generation unit is connected to DGND through a capacitor (C18).

3. The sensor numerical display circuit constructed using a digital tube according to claim 2, characterized in that, The subsequent voltage divider circuit includes a dual-group parallel selectable range resistor network, a zero-adjustment resistor (R12), a capacitor (C29), a cascade switch S1, and a capacitor (C23). The VO port of the differential amplifier chip is connected to the 2 port of the cascade switch S1. The cascade switch S1 is a multi-pole single-throw structure. The first selection branch of the cascade switch S1 is connected to one end of the first group of range resistors (R11). The second selection branch of the cascade switch S1 is connected to one end of the second group of range resistors (R41). The first and second selection branches are parallel candidate relationships. The third selection branch of the cascade switch S1 is connected to one end of the first group of range resistors (R14). The fourth selection branch of the cascade switch S1 is connected to one end of the second group of range resistors (R44). The third and fourth selection branches are parallel candidate relationships, thus forming a dual-group parallel selectable range configuration network for configuring different ranges. The cascade switch S1 has its 5-port terminal connected to the other end of the first set of range resistors (R11) and the second set of range resistors (R41) via the fixed end of resistor (R12). The sliding end of resistor (R12) is connected to DGND via capacitor (C29). The other end of the first set of range resistors (R11) and the second set of range resistors (R41) is connected to DGND. The sliding end of the zero-adjustment resistor (R12) is connected to the voltage acquisition and conversion unit. The VO port of the differential amplifier chip is connected to the RG port of the differential amplifier chip through a capacitor (C23), and the reference voltage input port RG of the differential amplifier chip is connected to DGND.

4. The sensor numerical display circuit constructed using a digital tube according to claim 1, characterized in that, The input alarm unit includes a resistor voltage divider circuit and a voltage comparison circuit. The resistor voltage divider circuit includes resistors (R19), (R26), (R28), an adjustable resistor (R30), and (R33). One end of resistor (R19) is connected in series with one end of resistor (R28) through resistor (R26). The other end of resistor (R28) is connected to one end of resistor (R33) through the fixed end of the adjustable resistor (R30). The other end of resistor (R19) is connected to the output voltage port REF+ of the reference voltage generation unit for inputting a reference voltage. The voltage comparison circuit includes a first voltage comparator U5A and a second voltage comparator U5B. The non-inverting input of the first voltage comparator U5A is connected to the negative input voltage terminal VIN- of the differential amplifier chip, and the negative input voltage terminal VIN- is connected to DGND through a capacitor (C34). The inverting input of the first voltage comparator U5A is connected between the resistor (R19) and the resistor (R26), and the inverting input of the first voltage comparator U5A is connected to DGND through a capacitor (C35). The non-inverting input of the second voltage comparator U5B is connected to the sliding end of the adjustable resistor (R30), and the sliding end of the adjustable resistor (R30) is connected to DGND through a capacitor (C36). The inverting input of the second voltage comparator U5B is connected to the non-inverting input of the first voltage comparator U5A. The output terminals of the first voltage comparator U5A and the second voltage comparator U5B are both connected to the base of the transistor through a current-limiting resistor. The collector or emitter of the transistor is connected to the digital tube display circuit unit.

5. The sensor numerical display circuit constructed using a digital tube according to claim 1, characterized in that, The power supply unit is composed of either the WRE2405S-3WR2 power chip or the WRF2405S-3WR2 power chip.

6. The sensor numerical display circuit constructed using a digital tube according to claim 1, characterized in that, The reference voltage generation unit is composed of either a voltage reference chip REF5020AQDRQ1 or a voltage reference chip REF5025AIDR.

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