Low-resistivity 12-inch heavily arsenic-doped silicon single crystal drawing method and product

Abstract

The invention belongs to the technical field of semiconductor material processing, and particularly relates to a low-resistivity 12-inch heavily-arsenic-doped silicon single crystal drawing method and a product thereof, the method comprises the following steps: in an equal-diameter process, furnace pressure is increased and the drawing speed is changed, the furnace pressure increasing comprises the step of gradually increasing the furnace pressure from 12 Kpa to 30 Kpa when shoulder rotation is completed by controlling the valve opening degree of inert gas, and the drawing speed is changed by controlling the valve opening degree of inert gas; the stability is kept; the method for increasing the pulling speed comprises the steps that when the length of the equal-diameter initial silicon single crystal is 0-300 m, the pulling speed is gradually reduced to 0.6 mm / min from the high pulling speed of 1 mm / min-4 mm / min, a certain length is stabilized at the pulling speed, the length ranges from 300 mm to 1200 mm, after the length of the silicon single crystal is 1200 m, the pulling speed is gradually reduced to 0.5 mm / min from 0.6 mm / min, and the ultra-low resistivity lower than 0.003 omega.cm is achieved. Compared with the silicon single crystal prepared by the traditional process, the silicon single crystal with the resistivity of less than 0.0025 omega.cm and the length of about 1300mm has the advantages that the resistivity of less than 0.0025 omega.cm and the length of about 1300mm are improved by about 400mm, the improvement rate is about 44.4%, and the strict requirement of an advanced device on a substrate wafer can be met.

Description

Technical Field

[0001] This invention belongs to the field of semiconductor material processing technology, specifically relating to a method and product for pulling 12-inch heavily arsenic-doped silicon single crystals with low resistivity. Background Technology

[0002] N-type silicon single crystals, as a core material in the semiconductor industry, occupy a pivotal position in the field of electronic device manufacturing. To meet the diverse electrical performance requirements of different types of electronic devices, specific impurities are usually doped into silicon single crystals, among which arsenic, phosphorus, and antimony are commonly used doping elements.

[0003] Among various dopants, arsenic (As) doping exhibits unique advantages. Due to its high solid solubility in the silicon lattice, arsenic achieves the highest electron concentration and thus the lowest resistivity at the same doping concentration. Simultaneously, arsenic doping maintains high carrier mobility while reducing resistivity. These properties make arsenic-doped N-type silicon single crystals ideal substrate materials for high-voltage / high-current devices (such as IGBTs and FRDs). Furthermore, arsenic has a moderate segregation coefficient (K = 0.3), which facilitates obtaining crystals with more uniform axial resistivity during crystal growth, improving material utilization and effectively reducing production costs.

[0004] With the rapid development of electronic technology, a new generation of high-performance devices is constantly emerging, such as microwave power devices, Schottky devices, high-frequency power electronic devices, and power integrated circuits. These devices place more stringent requirements on the performance of silicon substrates, especially on ultra-low resistivity. 12-inch heavily arsenic-doped silicon single crystals have become a material urgently needed in the market because they can meet the demands of large-area, high-performance devices.

[0005] However, the large-scale production of 12-inch heavily doped arsenic silicon single crystals meeting ultra-low resistivity requirements using the MCZ (magnetic Czochralski) method faces several key challenges: During the doping process, the added arsenic dopant mainly enters the melt through diffusion, then reaches the melt surface through convection and volatilization, and is finally carried out of the furnace by the argon gas flow. However, this doping method results in only about 30% of the arsenic dopant actually entering the crystal, leading to low doping efficiency. If the amount of arsenic added is increased to improve the doping level, the excessively high impurity concentration will destroy the crystal lattice structure, affect the thermodynamic stability of the crystal, and even lead to single crystal degradation. On the other hand, if the doping level is not properly controlled, the continuous volatilization of the dopant during growth will reduce the arsenic concentration in the melt, causing the crystal resistivity to increase along the length direction, resulting in the so-called "floating" phenomenon. Normally, the crystal resistivity should decrease along the length direction.

[0006] Therefore, under current technological conditions, it is difficult to stably produce 12-inch heavily doped arsenic silicon single crystals with a head resistivity of less than or equal to 0.003 Ω·cm. Furthermore, even when 12-inch heavily doped arsenic silicon single crystals with a head resistivity of less than or equal to 0.003 Ω·cm are produced, the length of the 12-inch heavily doped arsenic silicon single crystal with a resistivity below 0.0025 Ω·cm is too short, failing to meet the stringent requirements of advanced devices for substrate wafers. Summary of the Invention

[0007] In view of this, the present invention provides a method and product for pulling a 12-inch heavily arsenic-doped silicon single crystal with low resistivity, in order to solve the technical problems in the prior art that it is difficult to stably produce 12-inch heavily arsenic-doped silicon single crystals with a head resistivity of less than or equal to 0.003 Ω·cm, and that the length of the produced 12-inch heavily arsenic-doped silicon single crystals with a head resistivity of less than or equal to 0.003 Ω·cm and a resistivity below 0.0025 Ω·cm is too short, which cannot meet the stringent requirements of advanced devices for substrate wafers.

[0008] To achieve the above objectives, this application adopts the following approach: A method for pulling a 12-inch heavily doped arsenic silicon single crystal with low resistivity involves increasing furnace pressure and changing the pulling speed during the constant diameter process to reduce dopant volatilization, thereby obtaining a silicon single crystal with a head resistivity of less than 0.003 Ω·cm. The length of the silicon single crystal with a resistivity below 0.0025 Ω·cm is 1200 mm to 1350 mm. Increasing the furnace pressure involves gradually increasing the furnace pressure from 12 kPa at the shoulder completion to 30 kPa by controlling the opening of the inert gas valve and maintaining it stable. Increasing the pulling speed involves gradually reducing the pulling speed from a high pulling speed of 1 mm / min-4 mm / min to 0.6 mm / min during the initial constant diameter phase when the silicon single crystal length is 0-300 m, stabilizing at this pulling speed for a length of 300-1200 mm, and then gradually reducing the pulling speed from 0.6 mm / min to 0.5 mm / min after the silicon single crystal length reaches 1200 m.

[0009] Preferably, the magnetic force intensity during the equal diameter process is 2800 Gs to 3200 Gs.

[0010] Preferably, the crystal rotation during the isodiameter process is 8 rpm to 10 rpm.

[0011] Preferably, the pot rotates at 2 to 3 rpm during the equal-diameter process.

[0012] Preferably, the flow rate of the inert gas introduced during the equal diameter process is 130 slm to 140 slm.

[0013] Preferably, the inert gas is argon.

[0014] The silicon single crystal product prepared according to the above-mentioned method for pulling 12-inch heavily arsenic-doped silicon single crystals with low resistivity.

[0015] In the aforementioned method for pulling 12-inch heavily arsenic-doped silicon single crystals with low resistivity, during the constant diameter stage, the furnace pressure is gradually increased from 12 kPa to 30 kPa. Compared to the original method of gradually increasing the furnace pressure from 12 kPa to 20 kPa, this suppresses the volatilization of arsenic atoms from the melt surface (reducing the volatilization rate), thereby increasing the arsenic concentration retention rate, increasing the crystal doping concentration, and reducing the resistivity. In the initial constant diameter stage when the silicon single crystal length is 0-300 m, the pulling speed is gradually reduced from a high pulling speed of 1 mm / min-4 mm / min to 0.6 mm / min, and stabilized at this pulling speed for a length of 300-1200 mm. After the silicon single crystal length reaches 1200 m, the pulling speed is then gradually reduced from 0.6 mm / min to 0.5 mm / min. This method differs from the original method of gradually increasing the furnace pressure from 12 kPa to 20 kPa. Compared to gradually reducing the pulling speed from 0.5 mm / min to 0.4 mm / min after reaching a length of 1200 m, this method increases the pulling speed, shortens the melt exposure time, and reduces the total amount of arsenic volatilization. It also accelerates the segregation and capture of arsenic at the crystal interface, thereby reducing the cumulative amount of arsenic volatilization, improving the effective segregation efficiency, and increasing the actual doping amount of the crystal. Under the dual synergistic effect of increasing furnace pressure and increasing pulling speed, the utilization rate of arsenic in the melt is maximized, and ultra-low resistivity of less than 0.003 Ω·cm and resistivity of less than 0.0025 Ω·cm in length of single-crystal silicon is stably achieved. This is about 200 mm to 450 mm longer than the length of single-crystal silicon with resistivity below 0.0025 Ω·cm prepared by traditional processes, which can meet the stringent requirements of advanced devices for substrate wafers. Attached Figure Description

[0016] Figure 1 The resistivity graphs of silicon single crystals in the examples and comparative examples are shown.

[0017] Figure 2 This is a schematic diagram illustrating the detection of Res distribution within the surface of a silicon single crystal wafer using the four-needle probe method in the examples and comparative examples.

[0018] Figure 3 This is a schematic diagram of the in-plane resistivity distribution of a silicon single crystal with a length distribution of 200 mm in the embodiment.

[0019] Figure 4 This is a schematic diagram of the in-plane resistivity distribution of a silicon single crystal with a length distribution of 600 mm in the embodiment.

[0020] Figure 5 This is a schematic diagram of the in-plane resistivity distribution of a silicon single crystal with a length distribution of 1000 mm in the embodiment.

[0021] Figure 6This is a schematic diagram of the in-plane resistivity distribution of a silicon single crystal with a length distribution of 1500 mm in the embodiment. Detailed Implementation

[0022] To facilitate understanding of this application, a more comprehensive description will be provided below with reference to the accompanying drawings. Preferred embodiments of this application are also given. However, this application can be implemented in many different forms and is not limited to the embodiments described herein. Rather, these embodiments are provided to enable a more thorough and complete understanding of the disclosure of this application.

[0023] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this application belongs. The terminology used herein in the specification of this application is for the purpose of describing particular embodiments only and is not intended to be limiting of the application. The term "and / or" as used herein includes any and all combinations of one or more of the associated listed items.

[0024] In one specific embodiment, a method for pulling a 12-inch heavily doped arsenic silicon single crystal with low resistivity involves increasing the furnace pressure and changing the pulling speed during the constant diameter process to reduce the volatilization of the dopant, thereby obtaining a silicon single crystal with a head resistivity of less than 0.003 Ω·cm. The length of the silicon single crystal with a resistivity below 0.0025 Ω·cm is 1200 mm to 1350 mm. Increasing the furnace pressure includes gradually increasing the furnace pressure from 12 kPa at the completion of the shoulder rotation to 30 kPa by controlling the opening of the inert gas valve and maintaining it stable. Increasing the pulling speed includes gradually reducing the pulling speed from a high pulling speed of 1 mm / min-4 mm / min to 0.6 mm / min when the silicon single crystal length is 0-300 m in the initial stage of constant diameter, and stabilizing at this pulling speed for a length of 300-1200 mm. After the silicon single crystal length reaches 1200 m, the pulling speed is further gradually reduced from 0.6 mm / min to 0.5 mm / min.

[0025] The method provided by this invention differs from traditional methods for preparing single-crystal silicon only in the equal-diameter stage; therefore, the steps of other stages will not be described in detail here. In this embodiment, the crystal is drawn from the molten silicon, shoulders are formed, and the shoulders are rotated until the target diameter (12 inches) is reached and a crystal of a certain length is formed (after the solidification rate, it means that the diameter of the main crystal body has stabilized). Then, the furnace pressure is increased from the original 12 kPa to 20 kPa, and then from 12 kPa to 30 kPa, which significantly increases the density of gas molecules in the furnace, increases the resistance to arsenic vapor escaping from the surface of the melt, and forces more arsenic to remain in the melt. The crystal pulling speed is reduced from the original 0.4 mm / min to 0.5 mm / min and then from 0.6 mm / min to 0.5 mm / min, which shortens the residence time of the melt in the high-temperature zone, reduces the cumulative volatilization of arsenic, and allows the crystal to continue growing under sub-high pressure and higher pulling speed conditions until the target length is reached. This allows the arsenic on the surface of the melt to be "fixed" into the growing crystal more quickly, reducing the volatilization window period.

[0026] In the method provided in this application, the furnace pressure is gradually increased from 12 kPa to 30 kPa. kPa can suppress the volatilization of arsenic atoms from the melt surface (reducing the volatilization rate), thereby increasing the arsenic concentration retention rate, increasing the crystal doping concentration, and reducing resistivity. In the initial stage of constant diameter silicon single crystal length of 0-300m, the pulling speed is gradually reduced from a high pulling speed of 1mm / min-4mm / min to 0.6mm / min, and stabilized at this pulling speed for a length of 300-1200mm. After the silicon single crystal length reaches 1200m, the pulling speed is gradually reduced from 0.6mm / min to 0.5mm / min, which can shorten the melt exposure time and reduce the total amount of arsenic volatilization. It accelerates the arsenic segregation and capture at the crystal interface, thereby reducing the cumulative arsenic volatilization, improving the effective segregation efficiency, and increasing the actual doping amount of the crystal. Under the dual synergistic effect of increasing furnace pressure and increasing pulling speed, the utilization rate of arsenic in the melt is maximized, achieving ultra-low resistivity (less than 0.003Ω·cm) and ultra-long uniform lines (below 0.0025Ω·cm) silicon single crystals.

[0027] In a preferred embodiment, the magnetic field strength during the constant diameter process is 2800 Gs to 3200 Gs.

[0028] Based on the above-mentioned increase in furnace pressure and increase in pulling speed, an axial magnetic field of 2800 Gs to 3200 Gs (usually generated by the electromagnetic system of the Czochralski single crystal furnace) is applied throughout the process. The magnetic field strength is preferably 3000 Gs. The magnetic field strength is activated in the crystal pulling stage and continues until the crystal growth is completed.

[0029] If the magnetic field strength is less than 2800 Gs, it is insufficient to completely suppress the strong thermal convection of a 12-inch large-diameter melt. Melt disturbance leads to uneven arsenic distribution, failing to achieve the target resistivity uniformity. If the magnetic field strength is greater than 3200 Gs, the excessively strong magnetic field will cause a sharp increase in melt viscosity, hindering dopant diffusion. The diffusion rate of arsenic in the melt decreases, which will reduce the crystal doping efficiency. Therefore, when the magnetic field strength is between 2800 Gs and 3200 Gs, the Lorentz force and thermal buoyancy are balanced, forming a laminar melt. This satisfies the critical field strength for suppressing convection in large-size melts, while avoiding excessive suppression of the melt due to excessively high magnetic fields (distorted solidification interface). This results in smaller axial resistivity fluctuations in single-crystal silicon within an ultra-low resistivity range of 1200 mm to 1350 mm, thereby further improving resistivity uniformity.

[0030] In one specific embodiment, the crystal rotation during the equal diameter process is 8 to 10 rpm, the pot rotation during the equal diameter process is 2 to 3 rpm, and the flow rate of the inert gas introduced during the equal diameter process is 130 slm to 140 slm, wherein the inert gas is argon.

[0031] The flow rate of the inert gas introduced during the constant diameter stage is 100 slm to 140 slm, preferably 135 slm, and the inert gas is argon. By controlling the crystal rotation / pot rotation speed ratio, melt turbulence can be suppressed, and the uniformity of solute distribution at the solid-liquid interface can be improved; the high flow rate of argon gas effectively carries volatiles (such as SiO and CO), reduces the adsorption of interfacial impurities, and lowers the dislocation density.

[0032] The silicon single crystal product prepared according to the above-mentioned low resistivity 12-inch heavily arsenic-doped silicon single crystal pulling method is an ultra-low resistivity single crystal silicon with a head resistivity of less than 0.003 Ω·cm and a length of about 1300 mm with a resistivity of less than 0.0025 Ω·cm. It has high quality and can meet the stringent requirements of advanced devices for substrate wafers.

[0033] The following specific experimental examples further illustrate the technical solution and effects of the present invention. It should be noted that the following experimental examples are only for further explanation of the present invention and do not limit the technical solution of the present invention. Example

[0034] During the constant diameter stage, the furnace pressure was gradually increased from 12 kPa at the completion of the shoulder rotation to 30 kPa by controlling the valve opening of the inert gas. In the initial constant diameter stage when the silicon single crystal length was 0-300 m, the pulling speed was gradually reduced from a high pulling speed of 1 mm / min-4 mm / min to 0.6 mm / min, and stabilized at this speed for a length of 300-1200 mm. After the silicon single crystal length reached 1200 m, the pulling speed was further gradually reduced from 0.6 mm / min to 0.5 mm / min. The magnetic force was 3000 Gs, the crystal rotation speed was 10 rpm, the furnace rotation speed was 2 rpm, and the argon gas flow rate was 135 slm, as shown in Table 1. Silicon single crystals were pulled under these conditions (repeated four times), and the resistivity of the single crystal silicon was measured. Figure 1 As shown.

[0035] Comparative Example During the constant diameter stage, the furnace pressure was gradually increased from 12 kPa at the completion of the shoulder rotation to 20 kPa by controlling the valve opening of the inert gas. In the initial constant diameter stage when the silicon single crystal length was 0-300 m, the pulling speed was gradually reduced from a high pulling speed of 1 mm / min-4 mm / min to 0.5 mm / min, and stabilized at this speed for a length of 300-1200 mm. After the silicon single crystal length reached 1200 m, the pulling speed was further gradually reduced from 0.4 mm / min to 0.5 mm / min. The magnetic force was 3000 Gs, the crystal rotation speed was 10 rpm, the furnace rotation speed was 2 rpm, and the argon gas flow rate was 135 slm, as shown in Table 1. Silicon single crystals were pulled under these conditions (repeated four times), and the resistivity of the single crystal silicon was measured. Figure 1 As shown.

[0036] Table 1 Comparison of parameters between the examples and comparative examples

[0037] Depend on Figure 1 The data shows that the resistivity was successfully controlled below 0.003 Ω·cm using the process method provided in the examples. Compared with the comparative example, the resistivity is significantly reduced. In the comparative example, the length of the silicon single crystal with resistivity below 0.0025 Ω·cm is about 900 mm, while in the examples, the length of the silicon single crystal with resistivity below 0.0025 Ω·cm is about 1300 mm, an increase of about 400 mm. The resistivity at the tail end is also significantly reduced.

[0038] Simultaneously, the in-plane resistivity distribution of the silicon single crystals in the above embodiments and comparative examples was tested using the four-needle probe method, and the test schematic diagram is shown below. Figure 2Resin was measured at 121 points along four diameters at different angles (0°, 45°, 90°, 135°, with 0° on the X-axis) within the wafer surface of a silicon single crystal. Specifically, resistivity was measured at 30 points along each diameter, plus the resistivity data at the center point. The purpose of this method was to determine the distribution of Res within the wafer surface (200 mm, 600 mm, 1000 mm, 1500 mm). The test results are as follows: Figures 3 to 6 As shown.

[0039] Figure 3 The in-plane resistivity distribution over a length of 200 mm. Figure 4 The in-plane resistivity distribution over a length of 600 mm. Figure 5 The in-plane resistivity distribution over a length of 1000 mm. Figure 6 The in-plane resistivity distribution over a length of 1500 mm. Figures 3 to 6 It can be seen that the distribution characteristics of Res in the wafer are high at the center point and low at the edge. Except for the center point, the resistance is relatively high and needs further improvement. In addition, the resistivity decreases and is more uniform near the edge of the wafer. This resistivity distribution can meet the requirements of the wafer fab process.

[0040] The above description is merely a specific embodiment of the present invention, but the scope of protection of the present invention is not limited thereto. Any person skilled in the art can easily conceive of various equivalent modifications or substitutions within the technical scope disclosed in the present invention, and such modifications or substitutions should all be covered within the scope of protection of the present invention.

Claims

1. A method for pulling 12-inch heavily arsenic-doped silicon single crystals with low resistivity, characterized in that, During the constant diameter process, by increasing the furnace pressure and changing the pulling speed, the volatilization of dopants is reduced, thereby obtaining silicon single crystals with a head resistivity of less than 0.003 Ω·cm. The length of the silicon single crystal with a resistivity below 0.0025 Ω·cm is 1200 mm to 1350 mm. Increasing the furnace pressure involves gradually increasing the furnace pressure from 12 kPa at the completion of the shoulder rotation to 30 kPa by controlling the opening of the inert gas valve and maintaining it stable. Increasing the pulling speed involves gradually reducing the pulling speed from a high pulling speed of 1 mm / min-4 mm / min to 0.6 mm / min when the length of the silicon single crystal is 0-300 m in the initial stage of constant diameter, and stabilizing it at this pulling speed for a length of 300-1200 mm. After the length of the silicon single crystal reaches 1200 m, the pulling speed is further gradually reduced from 0.6 mm / min to 0.5 mm / min.

2. The method for pulling a low-resistivity 12-inch heavily doped arsenic-silicon single crystal according to claim 1, characterized in that, The magnetic field strength during the constant diameter process is 2800 Gs to 3200 Gs.

3. The method for pulling a low-resistivity 12-inch heavily doped arsenic-silicon single crystal according to claim 1, characterized in that, During the constant diameter process, the crystal rotation is 8 rpm to 10 rpm.

4. The method for pulling a low-resistivity 12-inch heavily doped arsenic-silicon single crystal according to claim 1, characterized in that, During the constant diameter process, the pot rotates at 2 rpm to 3 rpm.

5. The method for pulling a low-resistivity 12-inch heavily doped arsenic-silicon single crystal according to claim 1, characterized in that, The flow rate of the inert gas introduced during the constant diameter process is 130 slm to 140 slm.

6. The method for pulling a low-resistivity 12-inch heavily doped arsenic-silicon single crystal according to claim 5, characterized in that, The inert gas is argon.

7. The silicon single crystal product prepared by the low resistivity 12-inch heavily arsenic-doped silicon single crystal pulling method according to any one of claims 1 to 6.

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