Bit-error tester device suitable for three-temperature test of 1.6 T-OSFP module

By nesting the bit error rate tester subboard and the mainboard on the same substrate in the optical module temperature testing device, and incorporating a DSP chip and high-speed signal link, and ensuring stability through airflow injection and cooling fans, the problem of complex structure and incompatibility of existing devices is solved, and efficient three-temperature testing of 1.6T-OSFP modules is realized.

CN120896641APending Publication Date: 2025-11-04XGIGA COMM TECH
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Patent Information

Application Number
CN202511213547.4
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2025-08-28
Publication Date
2025-11-04

AI Technical Summary

Technical Problem

Existing optical module temperature testing devices have complex structures and are prone to incompatibility issues. In particular, coaxial cable connections at high speeds introduce losses and inconsistency problems, resulting in poor test stability and reliability.

Method used

Design a bit error rate tester device that nests the bit error rate tester daughterboard and motherboard on the same test substrate. It is equipped with a DSP chip and a high-speed signal link, adopts MSAP and Tenting processes, provides high and low temperature gas through airflow injection holes, and is equipped with an optical module test interface and power supply. A cooling fan is used to ensure stability.

Benefits of technology

The test structure was simplified, the test stability and reliability were improved, the production cost was reduced, and efficient testing of the 1.6T-OSFP module under three temperatures was achieved.

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Abstract

The invention relates to a bit-error tester device suitable for a three-temperature test of a 1.6 T-OSFP module, the bit-error tester device comprises a bit-error tester daughter board, a bit-error tester mainboard, a test substrate, a test mask and an airflow injection hole, the middle part of the bit-error tester mainboard is provided with a placing hole, the bit-error tester daughter board is nested in the placing hole, the bit-error tester mainboard is arranged on the test substrate, and the test mask is arranged on the test substrate. The test mask is connected above the test substrate, a test space of a tested optical module is formed between the test mask and the test substrate, the airflow injection hole is formed in the test mask, and high-temperature and low-temperature gas enters the test space from the airflow injection hole. According to the testing device, the stability and the long service life of the bit-error tester are guaranteed, the testing cost is further reduced, a high-speed link between the optical module and the bit-error tester is designed on the same PCB, a traditional coaxial line mode is simplified, the testing stability, reliability and convenience are guaranteed, and the production cost is further reduced.
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Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of communication device detection, and particularly relates to a bit error rate instrument device suitable for 1.6T-OSFP module three-temperature testing. BACKGROUND

[0002] Common three-temperature testing of optical communication modules refers to that a product needs to work normally under the environments of 0 degrees, 25 degrees and 70 degrees, and meet all receiving and transmitting indicators. In the industry, the testing of previous single-wave 112G and lower rates mainly adopts a coaxial line connection mode of a bit error rate instrument. Another common mode is to place a bit error rate instrument test board and an optical module in a temperature cycle box to perform three-temperature testing.

[0003] The coaxial line connection is complex and easy to be lost. When the rate is increased to single-wave 224G, the coaxial line connection has introduced more loss and high-speed connection consistency problems. The 1.6T bit error rate instrument DSP and the bit error rate instrument board based on single-wave 224G are designed on one PCB, process incompatibility occurs, and an MSAP process PCB is needed to realize precise patching. There are many connectors and a thickness of 2 millimeters is needed to ensure the structural strength, which easily leads to the mounting failure of the core chip of the bit error rate instrument. SUMMARY

[0004] The present application provides a bit error rate instrument device suitable for 1.6T-OSFP module three-temperature testing, and aims to solve the problems of complex structure and easy incompatibility of the existing optical module temperature testing device.

[0005] The present application provides a bit error rate instrument device suitable for 1.6T-OSFP module three-temperature testing, which comprises a bit error rate instrument sub-board, a bit error rate instrument main board, a test substrate, a test mask and an air injection hole. The middle part of the bit error rate instrument main board is provided with a placing hole, the bit error rate instrument sub-board is nested and installed in the placing hole, the bit error rate instrument main board is arranged on the test substrate, the test mask is connected above the test substrate, a test space of a measured optical module is formed between the test mask and the test substrate, and the air injection hole is arranged on the test mask, and high-temperature and low-temperature gas enters the test space from the air injection hole.

[0006] As a further improvement of the present application, the edge of the bit error rate instrument sub-board is provided with a plurality of first solder pads, and the edge of the placing hole is provided with second solder pads matched and connected with the first solder pads.

[0007] As a further improvement of the present application, the bit error rate instrument sub-board is provided with an optical module test interface, and the measured optical module is connected with the optical module test interface.

[0008] As a further improvement of the present application, the test substrate is provided with an avoidance groove, and the bit error rate instrument main board is connected in the avoidance groove.

[0009] As a further improvement of the application, the error code instrument sub-board is provided with a DSP chip and a high-speed signal link.

[0010] As a further improvement of the application, the error code instrument main board is provided with a 3.3V power supply for the optical module to be tested, a DSP chip power supply for providing power for the DSP chip and a fan driving power supply.

[0011] As a further improvement of the application, the end of the test mask is provided with a flip cover, one end of the flip cover is hinged to the outer surface of the test mask, the flip cover is provided with a first magnet, and the first magnet is attracted to a second magnet arranged in the test substrate when the flip cover is closed.

[0012] As a further improvement of the application, the test mask is provided with a first cooling fan, the first cooling fan is connected with the fan driving power supply, and the air outlet of the first cooling fan is arranged opposite to the DSP chip.

[0013] As a further improvement of the application, the test mask is provided with a normal temperature test port, the normal temperature test port is provided with a second cooling fan, the second cooling fan is connected with the fan driving power supply, and the second cooling fan provides cooling air flow for the test space.

[0014] The test device of the application ensures the stability and long service life of the error code instrument, thereby reducing the test cost, the high-speed link between the optical module and the error code instrument is designed on the same PCB, which simplifies the traditional coaxial line mode, ensures the test stability, reliability and convenience, and thereby reduces the production cost. BRIEF DESCRIPTION OF DRAWINGS

[0015] Figure 1 is a whole view of the test device of the application; Figure 2 is a schematic view of the error code instrument main board and sub-board arranged on the test substrate; Figure 3 is a schematic view of the error code instrument sub-board; Figure 4 is a schematic view of the error code instrument main board; Figure 5 is a schematic view of the error code instrument sub-board and main board after combination.

[0016] Fig. 1 is a main board of the error code instrument, Fig. 2 is a sub-board of the error code instrument, Fig. 3 is a light module to be measured, Fig. 4 is a test substrate, Fig. 5 is an avoidance groove, Fig. 6 is a first pad, Fig. 7 is a light module test interface, Fig. 8 is a placing hole, Fig. 9 is a test mask, Fig. 10 is an air flow injection hole, Fig. 11 is a flip cover, Fig. 12 is a first cooling fan, Fig. 13 is a normal temperature test port, and Fig. 14 is a second cooling fan. DETAILED DESCRIPTION

[0017] In order to make the objectives, technical solutions and advantages of the present application clearer, the present application is further described in detail below with reference to the accompanying drawings and examples. It should be noted that the terms "front", "back", "left", "right", "top" and "bottom" used in the following description refer to the directions in the drawings, and the terms "bottom surface" and "top surface", "inner" and "outer" refer to the directions towards or away from the geometric center of a specific component.

[0018] The present application provides an error code instrument device suitable for 1.6T-OSFP module three-temperature testing, which comprises an error code instrument sub-board 2, an error code instrument main board 1, a test substrate 4, a test mask 9 and an air flow injection hole 10. The middle part of the error code instrument main board 1 is provided with a placing hole 8, the error code instrument sub-board 2 is nested and installed in the placing hole 8, the error code instrument main board 1 is arranged on the test substrate 4, the test mask 9 is connected above the test substrate 4, a test space for the light module to be measured 3 is formed between the test mask 9 and the test substrate 4, and the air flow injection hole 10 is arranged on the test mask 9, through which high-temperature and low-temperature gases enter the test space.

[0019] As an embodiment of the present application, the edge of the error code instrument sub-board 2 is provided with a plurality of first pads 6, and the edge of the placing hole 8 is provided with second pads matched with the first pads 6.

[0020] As another embodiment of the present application, the error code instrument sub-board 2 is provided with a light module test interface 7, and the light module to be measured 3 is connected with the light module test interface 7. In this embodiment, the light module test interface 7 adopts a USB interface.

[0021] As another embodiment of the present application, the test substrate 4 is provided with an avoidance groove 5, and the error code instrument main board 1 is connected in the avoidance groove 5. The test substrate 4 is processed by electrical wood turning and milling, used for receiving the error code instrument main board 1, and placed in the avoidance groove 5, which can stabilize the error code instrument main board 1 and also provide space for testing. The test mask 9 is locked on the test substrate 4 by screws.

[0022] As another embodiment of the present application, the error code instrument sub-board 2 is loaded with a DSP chip and a high-speed signal link.

[0023] As another embodiment of the present application, the error code instrument main board 1 is provided with a 3.3V power supply for providing power for the measured optical module 3, a DSP chip power supply for providing power for the DSP chip, and a fan driving power supply.

[0024] As another embodiment of the present application, the end of the test mask 9 is provided with a flip cover 11, one end of the flip cover 11 is hinged to the outer surface of the test mask 9, the flip cover 11 is provided with a first magnet, and when the flip cover 11 is closed, the first magnet is attracted to a second magnet arranged in the test substrate 4. It is convenient to replace the measured 1.6T optical module, and the high and low temperature air flow forms a semi-airtight space to provide the 1.6T optical module with full-enclosed cold and hot air flow.

[0025] As another embodiment of the present application, the test mask 9 is provided with a first cooling fan 12, the first cooling fan 12 is connected with the fan driving power supply, and the air outlet of the first cooling fan 12 is arranged opposite to the DSP chip. Normal temperature air is used to cool the DSP chip on the error code instrument sub-board 2.

[0026] As another embodiment of the present application, the test mask 9 is provided with a normal temperature test port 13, the normal temperature test port 13 is provided with a second cooling fan 14, the second cooling fan 14 is connected with the fan driving power supply, and the second cooling fan 14 provides cooling air flow for the test space. During three-temperature testing, the normal temperature automatic testing is first performed at the normal temperature test port 13 to ensure that the module is normal before high and low temperature testing is performed, so as to improve production efficiency, and the second cooling fan 14 provides stable cooling air flow for the 1.6T optical module.

[0027] The error code instrument sub-board 2 is made of MSAP process, the DSP chip, the high-speed signal link and the optical module test interface 7 are designed on the board to realize reliable 8*224G signal link, and the thickness of the error code instrument sub-board 2 is 1mm. The error code instrument main board 1 is made of Tenting process, and is also a PCB board, which is provided with the optical module 3.3V power supply, the DSP chip power supply and the fan driving power supply, the monitoring circuit and the structure stress are designed on the error code instrument main board 1, the thickness of the PCB board is 2mm, the error code instrument sub-board 2 is nested and installed in the placing hole 8 of the error code instrument main board 1, the electrical connection is realized by using the edge pad soldering lap welding mode, the first pad 6 of the error code instrument sub-board 2 and the second pad of the error code instrument main board 1 are welded, the power supply and communication control of the measured optical module 3 are realized by the connection of the pads, 3.3V, 10A DC power supply is provided for the measured optical module 3, and the power supply and communication control of the error code instrument sub-board 2 are realized, 12V, 10A DC power supply is provided for the error code instrument sub-board 2.

[0028] In the embodiment of the present application, the measured optical module 3 can be a 1.6T optical module, which mainly communicates through the optical module test interface 7 arranged on the error code instrument sub-board 2. Through the connection with the optical module test interface 7, the computer can analyze and detect the performance of the measured optical module 3 by reading the information of the error code instrument sub-board 2.

[0029] The three-temperature test is to test the running data of the optical module under normal temperature, high temperature and low temperature. The process is as follows: open the flip cover 11, insert the measured optical module 3 into the opening of the flip cover 11 and connect it with the optical module test interface 7, then cover the flip cover 11, the first magnet and the second magnet are magnetically attracted, so that a closed test space is formed between the test substrate 4 and the test mask 9. Connect the USB data line of the test computer and the error code instrument, start the 1.6T error code instrument software in the test computer, and set the related test parameters.

[0030] First, test the data under normal temperature. The second cooling fan 14 arranged at the normal temperature test port 13 provides stable cooling airflow for the test space. The 1.6T optical module data observed on the computer is tested. If it is necessary to test the optical module data under high temperature and low temperature, stop the second cooling fan 14, inject high-temperature gas from the airflow injection hole 10 and test the data, inject low-temperature gas from the airflow injection hole 10 and test the data, open the flip cover 11 after the test is completed, and take out the optical module, then the test is completed.

[0031] In the present scheme, the error code instrument main board 1 and the error code instrument sub-board 2 are installed on the same test substrate 4 in a nested installation and lap soldering manner, so that the PCBs of the two processes are integrated into one whole, the main board and the sub-board are electrically connected in a lap soldering manner, which can absorb the material expansion stress and vibration when the high and low temperature airflow is connected, so as to ensure the stability and long service life of the error code instrument, thereby reducing the test cost. Moreover, the error code instrument sub-board 2 has data link at both ends, and two corresponding optical module test interfaces 7 are also arranged, so that two different 1.6T optical modules can be tested at the same time. The high-speed link between the 1.6T optical module and the error code instrument sub-board 2 is designed on the same PCB, which simplifies the traditional coaxial line mode, ensures the test stability, reliability and convenience, and further reduces the production cost. The left side of the test mask 9 is used to connect the high and low temperature airflow output by the heat flow instrument to the 1.6T optical module for high and low temperature test, and the right side has a normal temperature cooling fan for normal temperature test. The three-temperature test is realized on one device, the test device is more simple, and the test efficiency is higher.

[0032] The above is further detailed description of the present application in combination with specific preferred embodiments, and cannot be deemed as limitation of the specific implementation of the present application to these descriptions. For those skilled in the art to which the present application belongs, without departing from the concept of the present application, a number of simple deductions or substitutions can be made, and all of them shall be deemed as falling within the protection scope of the present application.

Claims

1. A bit error rate tester device suitable for three-temperature testing of a 1.6T-OSFP module, characterized in that, The device includes a bit error rate tester (BER) daughterboard, a BER tester motherboard, a test substrate, a test mask, and an airflow injection port. The BER tester motherboard has a placement hole in the middle, and the BER tester daughterboard is nested in the placement hole. The BER tester motherboard is disposed on the test substrate, and the test mask is connected above the test substrate. The test mask and the test substrate form a test space for the optical module under test. The airflow injection port is disposed on the test mask, and high-temperature and low-temperature gases enter the test space through the airflow injection port.

2. The bit error rate tester device for three-temperature testing of a 1.6T-OSFP module according to claim 1, characterized in that, The edge of the bit error rate tester subboard is provided with a plurality of first pads, and the edge of the placement hole is provided with second pads that cooperate and connect with the first pads.

3. The bit error rate tester device for three-temperature testing of a 1.6T-OSFP module according to claim 1, characterized in that, The bit error rate tester subboard is equipped with an optical module test interface, and the optical module under test is connected to the optical module test interface.

4. The bit error rate tester device for three-temperature testing of a 1.6T-OSFP module according to claim 3, characterized in that, The test substrate is provided with an avoidance slot, and the bit error rate tester motherboard is connected in the avoidance slot.

5. The bit error rate tester device for three-temperature testing of a 1.6T-OSFP module according to claim 1, characterized in that, The bit error rate tester board is equipped with a DSP chip and a high-speed signal link.

6. The bit error rate tester device for three-temperature testing of a 1.6T-OSFP module according to claim 5, characterized in that, The motherboard of the bit error rate tester is equipped with a 3.3V power supply for the optical module that provides power to the optical module under test, a DSP chip power supply for providing power to the DSP chip, and a fan drive power supply.

7. The bit error rate tester device for three-temperature testing of a 1.6T-OSFP module according to claim 1, characterized in that, The test mask has a flip cover at one end, one end of which is hinged to the outer surface of the test mask. The flip cover is provided with a first magnet. When the flip cover is closed, the first magnet attracts a second magnet disposed in the test substrate.

8. The bit error rate tester device for three-temperature testing of a 1.6T-OSFP module according to claim 6, characterized in that, The test mask is equipped with a first cooling fan, which is connected to the fan drive power supply. The air outlet of the first cooling fan is positioned opposite to the DSP chip.

9. A bit error rate tester device for three-temperature testing of a 1.6T-OSFP module according to claim 6, characterized in that, The test mask is equipped with a room temperature test port, and a second cooling fan is provided at the room temperature test port. The second cooling fan is connected to the fan drive power supply and provides cooling airflow to the test space.

Citation Information

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