Power supply circuit with multiple modes

Abstract

Certain aspects of the present disclosure generally relate to electronic circuits, and more particularly to power supply circuits. The power supply circuit may include at least one voltage supply selectively coupled to an output node of the power supply circuit; and a boost converter having: an inductive element coupled to the power source and the switching node; a first transistor coupled between the switching node and a reference potential node; a second transistor having a drain coupled to the switching node; and a third transistor having a source coupled to the source of the second transistor, a drain of the third transistor coupled to the output node.

Description

[0001] Cross-references to related applications

[0002] This application claims the benefit and priority of U.S. Patent Application No. 18 / 189,120, filed March 23, 2023, which is incorporated herein by reference in its entirety. Technical Field

[0003] Certain aspects of this disclosure relate generally to electronic circuits, and more specifically to power supply circuits. Background Technology

[0004] A loudspeaker is a transducer that generates pressure waves in response to an input electrical signal, thus producing sound. The loudspeaker input signal can be generated by an audio amplifier (also called a "power amplifier"), which receives a relatively low voltage analog audio signal and generates an amplified signal (with a relatively high voltage) to drive the loudspeaker. A dynamic loudspeaker typically consists of a lightweight diaphragm (cone) connected to a rigid basket (frame) via a flexible suspension (often called a spider) that constrains a voice coil to move axially through a cylindrical magnetic gap. When an input electrical signal is applied to the voice coil, the current in the coil generates a magnetic field, thus forming a linear motor. By changing the electrical signal from the audio amplifier, the mechanical force generated by the interaction between the magnet and the voice coil is modulated, causing the cone to move back and forth, thereby producing pressure waves that are interpreted as sound. Summary of the Invention

[0005] The systems, methods, and apparatus of this disclosure each have several aspects, none of which is solely responsible for their desired properties. Without limiting the scope of this disclosure as set forth in the appended claims, some features will now be briefly discussed. Upon consideration of this discussion, and particularly after reading the section entitled “Detailed Description,” one will understand how the features of this disclosure provide the advantages described herein.

[0006] Certain aspects of this disclosure generally relate to a power supply circuit. The power supply circuit typically includes at least one voltage supply selectively coupled to an output node of the power supply circuit; and a boost converter having: an inductor coupled to a power supply and a switching node; a first transistor coupled between the switching node and a reference potential node; a second transistor having a drain coupled to the switching node; and a third transistor having a source coupled to the source of the second transistor and a drain coupled to the output node.

[0007] Certain aspects of the present disclosure relate to a power supply circuit. The power supply circuit generally includes at least one voltage supply and a boost converter having an input coupled to a power source and an output selectively coupled to the at least one voltage supply, wherein the at least one voltage supply is configured to provide at least one voltage lower than a battery voltage of a cell in the power source.

[0008] Certain aspects of the present disclosure generally relate to a method for supply voltage generation. The method generally includes generating a first supply voltage via a first voltage supply, providing the first supply voltage to an output node of a power supply circuit based on an active load having a first output power, the output node coupled to the active load, and providing a second supply voltage to the output node via a boost converter based on the active load having a second output power greater than the first output power. The boost converter can include an inductive element coupled to a power source and a switch node, a first transistor coupled between the switch node and a reference potential node, a second transistor having a drain coupled to the switch node, and a third transistor having a source coupled to a source of the second transistor, a drain of the third transistor coupled to the output node.

[0009] Certain aspects of the present disclosure generally relate to an apparatus for supply voltage generation. The apparatus generally includes means for generating a first supply voltage and means for providing the first supply voltage to an output node of a power supply circuit based on an active load having a first output power, the output node coupled to the active load. The apparatus can also include a boost converter configured to provide a second supply voltage to the output node based on the active load having a second output power greater than the first output power, the boost converter having an inductive element coupled to a power source and a switch node, a first transistor coupled between the switch node and a reference potential node, a second transistor having a drain coupled to the switch node, and a third transistor having a source coupled to a source of the second transistor, a drain of the third transistor coupled to the output node.

[0010] To the accomplishment of the foregoing and related aspects, one or more aspects comprise the features recited in the following claims, and the following description discloses aspects of the one or more aspects. The aspects are indicative of but a few of the various ways of implementing the principles of the one or more aspects. Other aspects can include portions of the aspects discussed herein while still excluding other portions of the aspects. BRIEF DESCRIPTION OF DRAWINGS

[0011] So that the manner in which the above recited features of the present disclosure can be understood in detail, a more particular description can be had by reference to each of the aspects, some of which are illustrated in the appended drawings. It is to be noted, however, that the appended drawings illustrate only certain typical aspects of this disclosure and are therefore not to be considered limiting of its scope, for the description can admit to other equally effective aspects.

[0012] FIG. 1 An example audio system in which aspects of the present disclosure can be practiced is illustrated.

[0013] FIG. 2 An example power supply circuit according to certain aspects of the present disclosure is illustrated.

[0014] FIG. 3 is a graph illustrating output voltage at a power supply output node having different power supply modes based on amplifier output power according to certain aspects of the present disclosure.

[0015] FIG. 4 is a flowchart of example operations for supply voltage generation according to certain aspects of the present disclosure.

[0016] To facilitate the understanding of this description, like reference numerals have been used, where possible, to designate like elements in the figures. It is contemplated that elements disclosed in one aspect can be beneficially utilized on other aspects without specific recitation. DETAILED DESCRIPTION

[0017] Certain aspects of the present disclosure are directed to a power supply circuit. The power supply circuit can include a plurality of voltage supplies, including a boost converter that facilitates selective coupling of the boost converter or one or more additional voltage supplies to an output node of the power supply circuit. For example, the boost converter or one of the additional voltage supplies can be selectively coupled to the output node based on an amount of power draw from a load (e.g., an amplifier). The boost converter can generate a boosted voltage based on a power source (e.g., a battery). At least one of the additional voltage supplies can output a voltage that is lower than a voltage of the power source in an attempt to increase low power efficiency of the power supply circuit. In some cases, the boost converter can be configured in a bypass mode, thereby electrically coupling the power source to the output node of the power supply circuit, as described in greater detail herein.

[0018] Various aspects of the disclosure are described more fully below with reference to the drawings. This disclosure may, however, be embodied in many different forms and should not be construed as limited to any specific structure or function presented throughout this disclosure. Rather, these aspects are provided so that this disclosure will be thorough and complete, and will fully convey the scope of the disclosure to those skilled in the art. Based on the teachings herein one skilled in the art should appreciate that the scope of the disclosure is intended to cover any aspect of the disclosure disclosed herein, whether implemented independently of, or combined with, any other aspect of the disclosure. For example, an apparatus can be implemented or a method can be practiced using any number of the aspects set forth herein. In addition, the scope of the disclosure is intended to cover devices or methods practiced using other structure, functionality, or structure and functionality in addition to or other than the various aspects of the disclosure set forth herein. It should be understood that any aspect of the disclosure disclosed herein can be embodied by one or more elements of a claim.

[0019] As used herein, the term "connected," used in the context of the verb "connect," can mean that element A is directly connected to element B or that other elements can be connected between element A and element B (i.e., element A is indirectly connected to element B). In the context of electronic components, the term "connected" can also be used herein to mean that a wire, trace, or other conductive material is used to electrically connect element A and element B (as well as any components electrically connected therebetween).

[0020] Example audio system with power amplifier

[0021] FIG. 1 An example audio system 100 is illustrated in which aspects of the disclosure can be practiced. It should be appreciated, however, that aspects of the disclosure can also be practiced in any of a variety of other suitable amplification scenarios.

[0022] As FIG. 1As shown, a digital signal processor (DSP) 102 can receive and process an audio signal 114 (e.g., a digital audio signal) by, for example, applying digital filters intended to increase audio quality. A digital-to-analog converter (DAC) 108 can be used to convert a filtered or otherwise processed digital signal 118 (or a further processed version thereof) produced by the DSP 102 into an analog signal 120. In certain aspects, the DAC can be implemented as part of the DSP 102 or the amplifier 110. In certain aspects, the amplifier 110 can be used to amplify the analog signal 120 to generate an amplified signal 122. The amplified signal 122 can drive the speaker 112 to produce an acoustic output 124 (e.g., sound waves). In other words, the amplifier 110 can function as a speaker driver. In some aspects, the audio system 100 can include a power supply system 150. The power supply system 150 can generate a supply voltage for the amplifier 110.

[0023] Some speaker amplifiers can have reduced efficiency when operating at low power. For example, at low power, the efficiency of the amplifier can be limited by the quiescent current of the amplifier and the switching losses in the power supply stage (e.g., the power supply system 150) used to power the amplifier. For a single stack (1S) battery, the quiescent current, as well as the switching current of the switching power supply loop, can be supplied from a single cell battery (e.g., a battery providing a 4.2V supply). For a double stack (2S) or triple stack (3S) battery, the quiescent current and switching current can be supplied from a 2S battery (e.g., providing an 8.4V supply) or a 3S battery (e.g., providing a 12.6V supply). In other words, the amplifier can have low efficiency when outputting low voltages (e.g., lower than the voltage of the battery, especially when powered from a 2S or 3S battery).

[0024] In some aspects of the disclosure, different voltage supplies can be used depending on the power draw associated with the amplifier. When using a 1S battery, the amplifier power can be supplied at a lower voltage (e.g., 1.8V) as long as the lower voltage can support the power draw of the amplifier. As the power draw of the amplifier increases, a 1S battery supply (e.g., in a bypass mode of a boost converter) can be used to power the amplifier.

[0025] When a 2S or 3S battery is used, the amplifier power can be supplied from the first power supply at a lower voltage (e.g., 1.8V and / or 3.3V) as long as the lower voltage can support the amplifier power draw. As the power draw of the amplifier increases, the second power supply (e.g., providing 3.3V) or a 1S battery (e.g., providing a 4.2V supply) can be used, followed by power from a 2S or 3S battery (e.g., providing an 8.4V supply or a 12.6V supply, respectively). As the power draw of the amplifier further increases, a switching power supply can be used to generate and provide a boosted voltage to the amplifier.

[0026] FIG. 2 An example power supply circuit 200 (e.g., corresponding to FIG. 1 the power supply system 150 of FIG. 1) is illustrated in accordance with certain aspects of the present disclosure. As shown, the power supply circuit 200 can include a voltage supply 202 providing a first voltage (VI) and a voltage supply 204 providing a second voltage (V2). In some aspects, the voltage supplies 202, 204 can generate a supply voltage based on a voltage from a power source (e.g., a battery such as battery 222, which in some cases can be a stacked multi-cell battery).

[0027] As shown, the output of the voltage supply 202 can be selectively coupled to an output node 250 of the power supply circuit 200 via an enable circuit 206. As shown, the output node 250 can be coupled to an output capacitance element 234. The enable circuit 206 can include a p-channel metal-oxide-semiconductor (PMOS) transistor 214 having a source coupled to the output of the voltage supply 202 and an n-channel metal-oxide-semiconductor (NMOS) transistor 216 having a source coupled to a reference potential node (e.g., electrical ground). As shown, the gates of the transistors 214, 216 can be driven by a complementary enable signal (Enable_b 1). The drains of the transistors 214, 216 can be coupled together and can be selectively coupled to the output node 250 by a transistor 261 (e.g., a PMOS transistor). When the complementary enable signal provided to the gates of the transistors 214, 216 is logic low, the transistor 214 turns on and the transistor 216 turns off. In addition, the gate of the transistor 261 can be driven by a logic low signal. Accordingly, the transistor 261 can turn on, providing the voltage VI to the output node 250.

[0028] Similarly, the output of the voltage supply 204 can be selectively coupled to the output node 250 via an enable circuit 208. The enable circuit 208 can include a PMOS transistor 218 having a source coupled to the output of the voltage supply 204 and an NMOS transistor 220 having a source coupled to a reference potential node (e.g., electrical ground). As shown, the gates of the transistors 218, 220 can be driven by a complementary enable signal (e.g., Enable_b 2). The drains of the transistors 218, 220 can be coupled together and can be selectively coupled to the output node 250 by a transistor 263 (e.g., a PMOS transistor). When the complementary enable signal provided to the gates of the transistors 218, 220 is logic low, the transistor 218 turns on and the transistor 220 turns off. In addition, the gate of the transistor 263 can be driven by a logic low signal. Accordingly, the transistor 263 can turn on, providing the voltage V2 to the output node 250.

[0029] The power supply circuit 200 can also include a boost converter 212 configured to generate a boosted voltage at the output node 250 based on a battery voltage (Vbatt) from a battery 222. The boost converter 212 can be capable of operating in a bypass mode or a boost mode. In the bypass mode, the boost converter 212 can provide the battery voltage Vbatt at the output node 250. In the boost mode, the boost converter 212 can provide a boosted voltage at the output node 250 that is greater than the battery voltage Vbatt. FIG. 2 In an example, the boost converter 212 can include an inductive element 224 coupled between a voltage source (e.g., the battery 222) and a switching node 260. A low-side (LS) transistor 226 (e.g., a switch) can be coupled between the switching node 260 and a reference potential node (e.g., electrical ground). A first high-side (HS) transistor 228 (e.g., a switch) can be coupled between the switching node 260 and a node 262. A second HS transistor 232 (e.g., a switch) can be coupled between the node 262 and the output node 250. As shown, a shunt transistor 230 (e.g., a switch) can be coupled between the node 262 and the reference potential node.

[0030] The transistor 228 allows the voltage at the output node 250 to be set to a voltage lower than Vbatt (e.g., allows the voltage at the output node 250 to be VI). In other words, without the transistor 228 (e.g., if the source of the transistor 232 were directly coupled to the inductive element 224), the voltage at the output node 250 could not be set to lower than Vbatt minus Vdiode (where Vdiode is the forward voltage of the body diode 290 of the transistor 232) without drawing power from the battery 222.

[0031] In bypass mode, transistors 228, 232 can be on (and transistors 226, 230 can be off), electrically coupling battery 222 to output node 250 (e.g., effectively bypassing the boost operation). In boost mode, transistor 228 can be on, transistor 230 can be off, and transistors 226, 232 can be controlled (e.g., pulse width modulated) to perform the boost operation, generating a boosted voltage at output node 250.

[0032] As described herein, battery 222 can be implemented as a 1S battery or a multi-cell battery (e.g., a 2S battery or a 3S battery). For a 1S battery, a lower voltage (e.g., VI = 1.8V generated via voltage supply 202) can be supplied to the active load (e.g., for a 1.8V active load). For example, an output of voltage supply 202 can be electrically coupled to output node 250 via enable circuit 206. Boost converter 212 can be off when the output of voltage supply 202 is electrically coupled to output node 250 (e.g., by turning off transistors 228, 232). FIG. 1 The described amplifier 110) can be supplied with a lower voltage (e.g., VI = 1.8V generated via voltage supply 202). For example, an output of voltage supply 202 can be electrically coupled to output node 250 via enable circuit 206. Boost converter 212 can be off when the output of voltage supply 202 is electrically coupled to output node 250 (e.g., by turning off transistors 228, 232).

[0033] As power draw from the active load increases, the voltage from the 1S battery can be used to power the active load. For example, boost converter 212 can be configured in bypass mode, electrically coupling battery 222 to output node 250 (e.g., through inductive element 224 and on transistors 228, 232). As the active load power draw increases (e.g., above the 1S battery voltage, minus some headroom voltage), boost converter 212 can be configured to generate a boosted voltage at output node 250 to provide to the active load.

[0034] For a 2S or 3S battery, a lower voltage (e.g., VI = 1.8V generated via voltage supply 202) can be supplied to the active load. As the active load power draw increases, the active load can be supplied with a higher voltage (e.g., V2 = 3.3V or 4.2V generated via voltage supply 204 or 4.2V from a single cell of the 2S or 3S battery). As the active load power draw further increases, boost converter 212 can be configured in bypass mode, providing the voltage from the 2S or 3S battery to output node 250, followed by boost converter 212 generating a boosted voltage at output node 250.

[0035] While the transition between voltage supplies is described as an increase in power draw from the active load (e.g., amplifier 110), a similar transition can also occur when there is a decrease in power draw from the active load. For example, as the power draw from the active load decreases, boost converter 212 can transition from the boost mode to the bypass mode. As the power draw from the active load further decreases, voltage supply 204 can be used to provide V2 to the active load, followed by voltage supply 202 providing VI to the active load.

[0036] A current path (e.g., a discharge path) can be provided for inductor element 224 when transitioning from high load power to low load power (e.g., from the bypass mode to providing V2 from voltage supply 204 or providing VI from voltage supply 202). In other words, inductor element 224 charges when providing current to output node 250. Without a discharge path, when the current path from inductor element 224 to output node 250 is broken (e.g., by turning off transistor 228), a voltage spike can occur at switching node 260, degrading supply performance and reliability. In some aspects, a discharge path can be provided for inductor element 224. For example, a discharge circuit 210 (e.g., providing a diode current freewheeling path) can be coupled in parallel with inductor element 224. Discharge circuit 210 can include an NMOS transistor 236 having a drain coupled to a first terminal of inductor element 224 and an NMOS transistor 238 having a drain coupled to a second terminal of inductor element 224. An NMOS transistor 240 can be coupled between the sources of transistors 236, 238 and a reference potential node (e.g., electrical ground). As shown, the gates of transistors 236, 238 can be controlled via an HS1b signal, which is the inverse of the HS1 signal used to drive the gate of transistor 228. Further, the gate of transistor 240 can be controlled via the HS1 signal. For example, when transistor 228 is off (e.g., electrically decouples inductor element 224 from output node 250), inductor current can be discharged via discharge circuit 210 by turning on transistors 236, 238 and turning off transistor 240. When transistor 228 is on, transistor 240 can be on and transistors 236, 238 can be off, coupling node 241 to the reference potential node (e.g., electrical ground).

[0037] In some aspects, instead of (or in addition to) using the discharge circuit 210, the transition to using the voltage supply 202, 204 can occur when the current in the inductive element 224 is (or is close to) zero. For example, a comparator 280 can be used to sense and compare the drain voltage and source voltage of the transistor 228. When the drain voltage and source voltage are equal (or approximately equal), which indicates that the current across the inductive element 224 is zero, the voltage supply transition can occur by turning off the transistor 228. In some aspects, when the boost converter is effectively turned off (e.g., both transistors 228, 232 are turned off), the transistor 230 can be turned on to couple the node 262 to a reference potential node (e.g., to couple the node 262 to electrical ground, so that the node 262 is not floating). The transistors 228, 232 can be referred to as back-to-back transistors because the source of the transistor 228 is coupled to the source of the transistor 232, resulting in the body diodes of the transistors 228, 232 being back-to-back (e.g., anode coupled to anode).

[0038] While FIG. 2 While two additional voltage supplies 202, 204 are depicted in FIG. 2, it should be understood that the power supply circuit can include one additional voltage supply or more than two additional voltage supplies that can be selectively coupled to the output node 250. At least one of the additional voltage supplies can provide a voltage that is lower than the 1S battery voltage. The additional voltage supplies can be coupled to the output node 250 via enable circuits that can be similar to the enable circuits 206, 208 described above.

[0039] FIG. 3 FIG. 2B is an illustration of output voltage at the output node 250 versus amplifier output voltage (and power) according to certain aspects of the present disclosure. As shown, as the amplifier output voltage (e.g., corresponding to amplifier power draw from the power supply circuit 200) increases from zero volts, the output voltage transitions from VI to V2, then from V2 to Vbatt (e.g., 1S, 2S, 3S stacked battery voltage), then to a boost voltage corresponding to the amplifier output power (e.g., as the amplifier output power increases), thereby maintaining some minimum headroom voltage above the amplifier output voltage, as shown. As described herein, similar transitions can occur when the amplifier output power decreases.

[0040] Certain aspects of the present disclosure provide a power supply circuit that is capable of low operating power and significant increased efficiency for various stacked battery modes as compared to at least some conventional implementations. For example, the power supply circuit can achieve greater than 20% efficiency improvement in 2S mode and greater than 30% efficiency improvement in 3S mode at low power as compared to some conventional implementations.

[0041] FIG. 4 FIG. 4 is a flow diagram of example operations 400 for supply voltage generation in accordance with certain aspects of the present disclosure. The operations 400 can be performed by a power supply circuit, such as the power supply circuit 200.

[0042] The operations 400 can begin, at block 402, where the power supply circuit generates a first supply voltage via a first voltage supply (e.g., the voltage supply 202). At block 404, the power supply circuit provides the first supply voltage to an output node (e.g., the output node 250) of the power supply circuit based on an active load (e.g., an amplifier, such as the amplifier 110) having a first output power. The output node can be coupled to a power supply input of the active load.

[0043] At block 406, the power supply circuit provides a second supply voltage to the output node via a boost converter (e.g., the boost converter 212) based on the active load having a second output power that is greater than the first output power. The boost converter can include an inductive element (e.g., the inductive element 224) coupled to a power source (e.g., the battery 222) and a switching node (e.g., the switching node 260). The boost converter can also include a first transistor (e.g., the transistor 226) coupled between the switching node and a reference potential node (e.g., electrical ground), a second transistor (e.g., the transistor 228) having a drain coupled to the switching node, and a third transistor (e.g., the transistor 232) having a source coupled to a source of the second transistor, a drain of the third transistor coupled to the output node.

[0044] In some aspects, providing the first supply voltage to the output node can include coupling the first voltage supply to the output node via a first enable circuit (e.g., the enable circuit 206). The enable circuit can include a fourth transistor (e.g., the transistor 214) having a source coupled to the first voltage supply, a fifth transistor (e.g., the transistor 216) having a source coupled to the reference potential node (e.g., electrical ground), and a sixth transistor (e.g., the transistor 261) having a drain coupled to a drain of the fourth transistor and a drain of the fifth transistor and a source coupled to the output node. In some aspects, the power supply circuit selectively couples a second voltage supply to the output node based on the active load having a third output power. The third output power can be greater than the first output power and less than the second output power.

[0045] In some aspects, the power supply circuit provides a discharge path for the inductive element via a discharge circuit (e.g., the discharge circuit 210) coupled in parallel with the inductive element. The discharge path for the inductive element can be provided based on the second transistor being turned off. In some aspects, the power supply circuit configures the boost converter into a bypass mode by turning on the second transistor and the third transistor.

[0046] In some aspects, the power supply circuit senses a current across the inductive element via the sensing circuit (e.g., comparator 280) and turns off the second transistor based on the current. Sensing the current across the inductive element can include comparing a source voltage and a drain voltage of the second transistor via the comparator. In some aspects, the power supply circuit can turn on a fourth transistor (e.g., transistor 230) coupled between the reference potential node and the source of the second transistor and the source of the third transistor based on the second transistor and the third transistor turning off.

[0047] Example aspects

[0048] In addition to the various aspects described above, specific combinations of aspects are within the scope of the present disclosure, details of some of which are as follows:

[0049] Aspect 1. A power supply circuit, the power supply circuit comprising: at least one voltage supply selectively coupled to an output node of the power supply circuit; and a boost converter having: an inductive element coupled to a power source and a switching node; a first transistor coupled between the switching node and a reference potential node; a second transistor having a drain coupled to the switching node; and a third transistor having a source coupled to a source of the second transistor, a drain of the third transistor coupled to the output node.

[0050] Aspect 2. The power supply circuit of aspect 1, wherein the power source comprises a single-cell battery, and wherein the at least one voltage supply is configured to have at least one voltage lower than a battery voltage of the single-cell battery.

[0051] Aspect 3. The power supply circuit of aspect 1 or 2, wherein the power source comprises a stacked multi-cell battery, and wherein the at least one voltage supply is configured to have at least one voltage lower than a battery voltage of a cell in the stacked multi-cell battery.

[0052] Aspect 4. The power supply circuit of any one of aspects 1-3, wherein the at least one voltage supply comprises a first voltage supply selectively coupled to the output node via a first enable circuit.

[0053] Aspect 5. The power supply circuit of Aspect 4, wherein the first enable circuit comprises: a fourth transistor having a source coupled to the first voltage supply; a fifth transistor having a source coupled to the reference potential node; and a sixth transistor having a drain coupled to a drain of the fourth transistor and a drain of the fifth transistor and a source coupled to the output node.

[0054] Aspect 6. The power supply circuit of Aspect 4 or 5, wherein the at least one voltage supply further comprises a second voltage supply selectively coupled to the output node via a second enable circuit.

[0055] Aspect 7. The power supply circuit of any one of Aspects 1-6, further comprising a discharge circuit coupled in parallel with the inductive element.

[0056] Aspect 8. The power supply circuit of Aspect 7, wherein the discharge circuit comprises: a fourth transistor having a drain coupled to the power supply; a fifth transistor having a drain coupled to the switch node; and a sixth transistor having a drain coupled to a source of the fourth transistor and a source of the fifth transistor, wherein a source of the sixth transistor is coupled to the reference potential node.

[0057] Aspect 9. The power supply circuit of Aspect 7 or 8, wherein the discharge circuit is configured to provide a discharge path for the inductive element based on the second transistor being off.

[0058] Aspect 10. The power supply circuit of any one of Aspects 7-9, wherein the boost converter is configured in a bypass mode by turning on the second transistor and the third transistor and by turning off the first transistor.

[0059] Aspect 11. The power supply circuit of any one of Aspects 1-10, further comprising a sensing circuit configured to sense a current across the inductive element, wherein the second transistor is configured to turn off based on the current.

[0060] Aspect 12. The power supply circuit of Aspect 11, wherein the sensing circuit comprises a comparator configured to sense the current across the inductive element by comparing a source voltage and a drain voltage of the second transistor.

[0061] Aspect 13. The power supply circuit of any one of aspects 1-12, wherein: the output node is to be coupled to an active load; based on the active load being configured to have a first output power, the at least one voltage supply is coupled to the output node and the boost converter is decoupled from the output node; based on the active load being configured to have a second output power greater than the first output power, the boost converter is configured to a bypass mode and the at least one voltage supply is decoupled from the output node; and based on the active load being configured to have a third output power greater than the second output power, the boost converter is configured to a boost mode and the at least one voltage supply is decoupled from the output node.

[0062] Aspect 14. The power supply circuit of aspect 13, wherein the boost converter is configured to the bypass mode by turning on the second transistor and the third transistor.

[0063] Aspect 15. The power supply circuit of any one of aspects 1-14, further comprising a fourth transistor coupled between the reference potential node and a source of the second transistor and a source of the third transistor.

[0064] Aspect 16. A power supply circuit, comprising: at least one voltage supply; and a boost converter having an input coupled to a power source and an output selectively coupled to the at least one voltage supply, wherein the at least one voltage supply is configured to provide at least one voltage lower than a battery voltage of a cell in the power source.

[0065] Aspect 17. The power supply circuit of aspect 16, wherein the boost converter comprises: an inductive element coupled between the power source and a switching node; a first switch coupled between the switching node and a reference potential node of the power supply circuit; and a second switch coupled to the output of the boost converter and selectively coupled to the switching node.

[0066] Aspect 18. The power supply circuit of aspect 17, wherein the boost converter further comprises a third switch coupled between the second switch and the switching node.

[0067] Aspect 19. The power supply circuit of aspect 18, wherein the second switch and the third switch comprise back-to-back transistors.

[0068] Aspect 20. A method for supply voltage generation, the method comprising: generating a first supply voltage via a first voltage supply; providing the first supply voltage to an output node of a power supply circuit based on an active load having a first output power, the output node coupled to the active load; and providing a second supply voltage to the output node via a boost converter based on the active load having a second output power greater than the first output power, the boost converter having: an inductive element coupled to a power source and a switching node; a first transistor coupled between the switching node and a reference potential node; a second transistor having a drain coupled to the switching node; and a third transistor having a source coupled to a source of the second transistor, a drain of the third transistor coupled to the output node.

[0069] Aspect 21. The method of Aspect 20, wherein providing the first supply voltage to the output node comprises coupling the first voltage supply to the output node via an enable circuit.

[0070] Aspect 22. The method of Aspect 21, wherein the enable circuit comprises: a fourth transistor having a source coupled to the first voltage supply; a fifth transistor having a source coupled to the reference potential node; and a sixth transistor having a drain coupled to a drain of the fourth transistor and a drain of the fifth transistor and a source coupled to the output node.

[0071] Aspect 23. The method of Aspect 21 or 22, further comprising selectively coupling a second voltage supply to the output node based on the active load having a third output power, the third output power greater than the first output power and less than the second output power.

[0072] Aspect 24. The method of any of Aspects 20-23, further comprising providing a discharge path for the inductive element via a discharge circuit coupled in parallel with the inductive element.

[0073] Aspect 25. The method of Aspect 24, wherein the discharge path for the inductive element is provided based on the second transistor being turned off.

[0074] Aspect 26. The method of Aspect 24 or 25, further comprising configuring the boost converter into a bypass mode by turning on the second transistor and the third transistor.

[0075] Aspect 27. The method of any one of aspects 20-26, further comprising: sensing, via sensing circuitry, a current across the inductive element; and turning off the second transistor based on the current.

[0076] Aspect 28. The method of aspect 27, wherein sensing the current across the inductive element comprises comparing, via a comparator, a source voltage and a drain voltage of the second transistor.

[0077] Aspect 29. The method of any one of aspects 20-28, further comprising turning on a fourth transistor coupled between the reference potential node and a source of the second transistor and a source of the third transistor based on the second transistor and the third transistor turning off.

[0078] Aspect 30. An apparatus for supply voltage generation, the apparatus comprising: means for generating a first supply voltage; means for providing the first supply voltage to an output node of a power supply circuit based on an active load having a first output power, the output node coupled to the active load; and a boost converter configured to provide a second supply voltage to the output node based on the active load having a second output power greater than the first output power, the boost converter having: an inductive element coupled to a power source and a switching node; a first transistor coupled between the switching node and a reference potential node; a second transistor having a drain coupled to the switching node; and a third transistor having a source coupled to a source of the second transistor, a drain of the third transistor coupled to the output node.

[0079] Additional notes

[0080] The various operations of methods described above can be performed by any suitable means capable of performing the corresponding functions. The means can include various hardware and / or software component(s) and / or module(s), including, but not limited to a circuit, an application specific integrated circuit (ASIC), or processor. Generally, where there are operations illustrated in figures, those operations can have corresponding counterpart means-plus-function components with similar numbering. For example, means for generating can include a voltage supply such as voltage supply 202 or voltage supply 204. Means for providing can include an enable circuit such as enable circuit 206 or enable circuit 208.

[0081] As used herein, the term “determining” encompasses a wide variety of actions. For example, “determining” can include calculating, computing, processing, deriving, investigating, looking up (e.g., looking up in a table, a database or another data structure), ascertaining and the like. Also, “determining” can include receiving (e.g., receiving information), accessing (e.g., accessing data in a memory) and the like. Also, “determining” can include resolving, selecting, choosing, establishing and the like.

[0082] As used herein, the phrase “at least one of” a list of items refers to any combination of those items, including single members. For example, “at least one of a, b, or c” is intended to cover: a, b, c, a-b, a-c, b-c, and a-b-c, as well as any combination of multiples of the same element (e.g., a-a, a-a-a, a-a-b, a-a-c, a-b-b, a-c-c, b-b, b-b-b, b-b-c, c-c, and c-c-c or any other ordering of a, b, and c).

[0083] The methods disclosed herein comprise one or more steps or actions for achieving the described method. The method steps and / or actions can be interchanged with one another without departing from the scope of the claims. In other words, unless a specific order of steps or actions is specified, the order and / or use of specific steps and / or actions can be modified without departing from the scope of the claims.

[0084] It is to be understood that the claims are not limited to the precise configuration and components illustrated above. Various modifications, changes, and variations can be made in the arrangement, operation, and details of the methods and apparatus described above without departing from the scope of the claims.

Claims

1. A power supply circuit, the power supply circuit comprising: At least one voltage supply, the at least one voltage supply being selectively coupled to the output node of the power supply circuit; and Boost converter, the boost converter having: An inductor element coupled to a power supply and a switching node; A first transistor, the first transistor being coupled between the switching node and the reference potential node; A second transistor having a drain coupled to the switching node; and A third transistor having a source coupled to the source of the second transistor and a drain coupled to the output node.

2. The power supply circuit of claim 1, wherein the power supply comprises a single-cell battery, and wherein the at least one voltage supply is configured to have at least one voltage lower than the battery voltage of the single-cell battery.

3. The power supply circuit of claim 1, wherein the power supply comprises a stacked multi-cell battery, and wherein the at least one voltage supply is configured to have at least one voltage lower than the battery voltage of a cell in the stacked multi-cell battery.

4. The power supply circuit of claim 1, wherein the at least one voltage supply comprises a first voltage supply selectively coupled to the output node via a first enable circuit.

5. The power supply circuit according to claim 4, wherein the first enabling circuit comprises: A fourth transistor having a source coupled to the first voltage supply; A fifth transistor, the fifth transistor having a source coupled to the reference potential node; and A sixth transistor having a drain coupled to the drain of the fourth transistor and the drain of the fifth transistor, and a source coupled to the output node.

6. The power supply circuit of claim 4, wherein the at least one voltage supply further comprises a second voltage supply selectively coupled to the output node via a second enable circuit.

7. The power supply circuit according to claim 1, wherein the power supply circuit further comprises a discharge circuit coupled in parallel with the inductor element.

8. The power supply circuit according to claim 7, wherein the discharge circuit comprises: A fourth transistor having a drain coupled to the power supply; A fifth transistor, the fifth transistor having a drain coupled to the switching node; and A sixth transistor having a drain coupled to the source of the fourth transistor and the source of the fifth transistor, wherein the source of the sixth transistor is coupled to the reference potential node.

9. The power supply circuit of claim 7, wherein the discharge circuit is configured to provide a discharge path for the inductor based on the second transistor being turned off.

10. The power supply circuit of claim 7, wherein the boost converter is configured in bypass mode by turning on the second transistor and the third transistor and by turning off the first transistor.

11. The power supply circuit of claim 1, further comprising a sensing circuit configured to sense a current across the inductor, wherein the second transistor is configured to turn off based on the current.

12. The power supply circuit of claim 11, wherein the sensing circuit includes a comparator configured to sense the current across the inductor by comparing the source voltage and drain voltage of the second transistor.

13. The power supply circuit according to claim 1, wherein: The output node is used to couple to an active load; Based on the active load being configured to have a first output power, the at least one voltage supply is coupled to the output node, and the boost converter is decoupled from the output node; Based on the active load being configured to have a second output power greater than the first output power, the boost converter is configured in bypass mode, and the at least one voltage supply is decoupled from the output node; and Based on the active load being configured to have a third output power greater than the second output power, the boost converter is configured in boost mode, and the at least one voltage supply is decoupled from the output node.

14. The power supply circuit of claim 13, wherein the boost converter is configured in the bypass mode by turning on the second transistor and the third transistor.

15. The power supply circuit according to claim 1, further comprising a fourth transistor coupled between the reference potential node and the source of the second transistor and the source of the third transistor.

16. A power supply circuit, the power supply circuit comprising: At least one voltage supply; and A boost converter having an input coupled to a power source and an output selectively coupled to the at least one voltage supply, wherein the at least one voltage supply is configured to provide at least one voltage lower than the battery voltage of a cell in the power source.

17. The power supply circuit of claim 16, wherein the boost converter comprises: An inductor element coupled between the power supply and the switching node; A first switch is coupled between the switching node and the reference potential node of the power supply circuit. and A second switch is coupled to the output of the boost converter and selectively coupled to the switching node.

18. The power supply circuit of claim 17, wherein the boost converter further comprises a third switch coupled between the second switch and the switching node.

19. The power supply circuit of claim 18, wherein the second switch and the third switch comprise back-to-back transistors.

20. A method for generating a supply voltage, the method comprising: A first supply voltage is generated via a first voltage supply; The first supply voltage is provided to the output node of the power supply circuit based on an active load having a first output power, wherein the output node is coupled to the active load; and A second supply voltage is provided to the output node via a boost converter based on the active load having a second output power greater than the first output power. The boost converter has: An inductor element coupled to a power supply and a switching node; A first transistor, the first transistor being coupled between the switching node and the reference potential node; A second transistor having a drain coupled to the switching node; and A third transistor having a source coupled to the source of the second transistor and a drain coupled to the output node.

21. The method of claim 20, wherein providing the first supply voltage to the output node comprises coupling the first voltage supply to the output node via an enable circuit.

22. The method of claim 21, wherein the enabling circuit comprises: A fourth transistor having a source coupled to the first voltage supply; A fifth transistor, the fifth transistor having a source coupled to the reference potential node; and A sixth transistor having a drain coupled to the drain of the fourth transistor and the drain of the fifth transistor, and a source coupled to the output node.

23. The method of claim 21, further comprising selectively coupling a second voltage supply to the output node based on the active load having a third output power, the third output power being greater than the first output power and less than the second output power.

24. The method of claim 20, further comprising providing a discharge path for the inductor element via a discharge circuit coupled in parallel with the inductor element.

25. The method of claim 24, wherein the discharge path is provided for the inductor based on the second transistor being turned off.

26. The method of claim 24, further comprising configuring the boost converter into a bypass mode by turning on the second transistor and the third transistor.

27. The method of claim 20, further comprising: The current across the inductor is sensed via a sensing circuit; as well as The second transistor is turned off based on the current.

28. The method of claim 27, wherein sensing the current across the inductor element comprises comparing the source voltage and drain voltage of the second transistor via a comparator.

29. The method of claim 20, further comprising turning on a fourth transistor coupled between the reference potential node and the source of the second transistor and the source of the third transistor based on the shutdown of the second transistor and the third transistor.

30. An apparatus for generating a supply voltage, the apparatus comprising: Components used to generate the first supply voltage; A component for providing the first supply voltage to an output node of a power supply circuit based on an active load having a first output power, the output node being coupled to the active load; and A boost converter configured to provide a second supply voltage to the output node based on the active load having a second output power greater than the first output power, the boost converter having: An inductor element coupled to a power supply and a switching node; A first transistor, the first transistor being coupled between the switching node and the reference potential node; A second transistor having a drain coupled to the switching node; and A third transistor having a source coupled to the source of the second transistor and a drain coupled to the output node.

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