S-mode navigation management response system based on MicroBlaze soft core architecture

Abstract

The invention provides an S-mode navigation management response system based on a MicroBlaze soft core architecture. The S-mode navigation management response system comprises a signal processing module, a transceiver module, an antenna and a display control device, the display control device is connected with the signal processing module, and the antenna is connected with the signal processing module through the transceiver module. The signal processing module comprises an FPGA (Field Programmable Gate Array) chip and a peripheral circuit thereof; the FPGA chip comprises an FPGA logic and three MicroBlaze soft cores, and the three MicroBlaze soft cores are connected with the FPGA logic; and the three MicroBlaze soft cores are respectively used for realizing an S mode response function, an ADS-B IN function and an ADS-B OUT function. A single-chip FPGA chip scheme is adopted to replace a traditional multi-chip architecture, the number of external devices is reduced, hardware redundancy is reduced, the system is suitable for application scenes of miniaturization and low power consumption, and the load limitation of platforms such as unmanned aerial vehicles and eVTOL is met.

Description

TECHNICAL FIELD

[0001] The present application relates to the field of S-mode air traffic control response systems, in particular to an S-mode air traffic control response system based on a MicroBlaze soft core architecture. BACKGROUND

[0002] An S-mode air traffic control response system is an electronic device installed on an aircraft for realizing bidirectional communication with a ground air traffic control system and autonomous information broadcasting, and is a core component of modern air traffic management (ATM). Its core function is to realize efficient coordination between aircraft and air traffic control systems through selective communication and autonomous broadcasting technology, while providing support for safe, efficient and intelligent airspace operation, especially in the fields of unmanned aerial vehicles and low-altitude navigation. It is a "air bridge" connecting aircraft and air traffic control networks, and can provide real-time data such as a 24-bit address code, flight call sign, airspeed, heading, and ascent / descent rate, significantly improving the accuracy of air traffic situation awareness. Since the S-mode air traffic control response system needs to be installed on an aircraft, with the surge in low-altitude aircraft such as unmanned aerial vehicles and eVTOLs, low-altitude devices (such as unmanned aerial vehicle transponders) are sensitive to power consumption. In order to adapt to the design of miniaturization and low power consumption, a processing architecture needs to be designed that does not affect the performance of the device in the case of miniaturization of the device and surge in the number of low-altitude aircraft, and can improve the processing capacity of the system.

[0003] The existing S-mode air traffic control response system adopts an architecture of FPGA + independent processor (for example: DSP or ARM), which completes the demodulation and decoding of air traffic query signals and ADS-B IN signals, the encoding and modulation of air traffic response signals and ADS-B OUT signals, external interface communication, etc. in the FPGA, and the independent processor completes the control of the working mode, the analysis of air traffic query data, the generation of air traffic response data and ADS-B OUT data, the analysis and condensation of ADS-B IN data, and the reporting processing, etc. The two chips communicate with each other through an external bus. Since this architecture requires two chips such as FPGA and independent processor to cooperate to realize the functions of the system, there is a bottleneck in further reducing the volume and power consumption. The external bus communication between the chips and the serial task processing limit the improvement of the processing capacity and reliability of the system. SUMMARY

[0004] The present application aims to provide an S-mode air traffic control response system based on a MicroBlaze soft core architecture to solve the problems of the above-mentioned S-mode air traffic control response system adopting an FPGA + independent processor architecture.

[0005] The application provides an S-mode air traffic control response system based on a MicroBlaze soft core architecture, which comprises a signal processing module, a transceiving module, an antenna and a display control device; the display control device is connected with the signal processing module, and the antenna is connected with the signal processing module through the transceiving module; The signal processing module comprises an FPGA chip and a peripheral circuit thereof; the FPGA chip comprises FPGA logic and three MicroBlaze soft cores connected with the FPGA logic; the three MicroBlaze soft cores comprise: a MicroBlaze soft core 1 used for realizing an S-mode response function; a MicroBlaze soft core 2 used for realizing an ADS-B IN function; a MicroBlaze soft core 3 used for realizing an ADS-B OUT function.

[0006] In a preferred embodiment, the MicroBlaze soft core and the FPGA logic communicate through an on-chip AXI bus.

[0007] In a preferred embodiment, the peripheral circuit comprises: a crystal oscillator clock used for providing a clock signal for devices in the signal processing module; an AD module used for AD conversion of corresponding signals; a DA module used for DA conversion of corresponding signals.

[0008] In a preferred embodiment, the S-mode air traffic control response system further comprises a power module; The power module is used for completing conversion of an external power supply and supplying power for the S-mode air traffic control response system.

[0009] In a preferred embodiment, a working method of the S-mode air traffic control response system based on the MicroBlaze soft core architecture comprises: Step 1: a display control device issues a control command to FPGA logic, and the FPGA logic transmits the control command to the MicroBlaze soft core 1, the MicroBlaze soft core 2 and the MicroBlaze soft core 3 respectively, so as to control the MicroBlaze soft cores to realize corresponding functions; Step 2: an antenna transmits a received signal to a signal processing module through a transceiving module; Step 3: the signal processing module transmits the received signal after AD sampling to FPGA logic, and the FPGA logic demodulates the sampled signal to a baseband by using frequency point 1 and frequency point 2 respectively; Step 4: the MicroBlaze soft core 1 realizes an S-mode response function by using the baseband signal demodulated by frequency point 1. Step 5, MicroBlaze soft core 2 uses the baseband signal demodulated by frequency point 2 to realize ADS-B IN function; Step 6, MicroBlaze soft core 3 uses the baseband signal demodulated by frequency point 2 to realize ADS-B OUT function.

[0010] In a preferred embodiment, in step 4, MicroBlaze soft core 1 uses the baseband signal demodulated by frequency point 1 to realize S-mode response function, including: Using the baseband signal demodulated by frequency point 1 to decode air traffic control inquiry signal, complete encoding, modulation and transmission of air traffic control response signal: (1) If it is judged that the received A / C mode inquiry signal is valid, directly encode A / C response signal by FPGA logic and control DA module to complete modulation based on frequency point 1, and finally radiate A / C mode response signal to the air through the transceiver module and the antenna to complete the A / C mode response process; (2) If it is judged that the received S-mode inquiry signal is valid, transmit S-mode inquiry data to MicroBlaze soft core 1 for data analysis and S-mode response signal generation, MicroBlaze soft core 1 transmits S-mode response data to FPGA logic, FPGA logic encodes S-mode response signal and controls DA module to complete modulation based on frequency point 1, and finally radiates S-mode response signal to the air through the transceiver module and the antenna to complete the S-mode response process.

[0011] In a preferred embodiment, in step 5, MicroBlaze soft core 2 uses the baseband signal demodulated by frequency point 2 to realize ADS-B IN function, including: Using the baseband signal demodulated by frequency point 2 to decode ADS-B IN signal, if it is judged that the ADS-B IN signal is valid, transmitting the ADS-B IN signal to MicroBlaze soft core 2 for data analysis and condensation, forming ADS-B IN point track message through algorithm, MicroBlaze soft core 2 transmits the ADS-B IN point track message to FPGA logic, and reports to the display control device for display through the transmission channel constructed by FPGA logic.

[0012] In a preferred embodiment, in step 6, MicroBlaze soft core 3 uses the baseband signal demodulated by frequency point 2 to realize ADS-B OUT function, including: MicroBlaze soft core 3 carries out period control and data generation of the ADS-B OUT signal, transmits the ADS-B OUT signal to the FPGA logic, the FPGA logic encodes the ADS-B OUT signal and controls the DA module to complete modulation based on the frequency point 2, and finally radiates the ADS-B OUT signal to the air through the transceiver module and the antenna to complete the ADS-B OUT process.

[0013] In a preferred embodiment, the transmission channel in the transceiver module is shared by the ATC response signal when the S-mode response function is implemented and the ADS-B OUT signal when the ADS-B OUT function is implemented, and only one kind of signal transmission can be carried out in the same time period, and the transmission of the ATC response signal and the ADS-B OUT signal is sequenced by the FPGA logic; wherein the transmission priority of the ATC response signal is higher than that of the ADS-B OUT signal, and the response delay of the A / C mode and the S mode is required to meet the corresponding requirements.

[0014] In a preferred embodiment, if the ATC response of this time cannot meet the delay requirement due to the reception of the ATC inquiry signal while the ADS-B OUT signal transmission is being carried out, the transmission of the ATC response signal of this time is cancelled.

[0015] In summary, due to the adoption of the above technical solutions, the beneficial effects of the present application are: 1. The present application adopts a single FPGA chip solution to replace the traditional multi-chip architecture, integrates the signal processing functions required by the S-mode ATC response system such as signal demodulation and decoding, signal encoding and modulation, work mode control, data analysis and reporting processing, and external interface communication in a single FPGA chip, reduces the number of external devices (such as independent processors and memories), reduces hardware redundancy, adapts to small-sized and low-power application scenarios, and meets the load restrictions of unmanned aerial vehicles, eVTOL and other platforms.

[0016] 2. The present application adopts three MicroBlaze soft cores to independently implement the S-mode response function, the ADS-B IN function and the ADS-B OUT function, can carry out the processing of the ATC inquiry signal (Mode S Selective) and the broadcast ADS-B IN signal in parallel, improves the processing capacity of the system, and meets the demand for improving the signal processing capacity due to the surge of low-altitude aircraft.

[0017] 3. The present application adopts deep integration of MicroBlaze soft core and FPGA logic, realizes high-speed and real-time interaction through the on-chip AXI bus, reduces signal processing delay, improves radiation resistance, and improves system reliability. BRIEF DESCRIPTION OF DRAWINGS

[0018] Figure 1 A schematic diagram of an S-mode air traffic control response system based on a MicroBlaze soft core architecture is provided for the embodiments of the present application. DETAILED DESCRIPTION

[0019] To make the objects, technical solutions and advantages of the embodiments of the present application clearer, the technical solutions in the embodiments of the present application will be described clearly and completely below with reference to the drawings in the embodiments of the present application. Obviously, the described embodiments are only some of the embodiments of the present application, rather than all the embodiments. The components of the embodiments of the present application described and shown in the drawings herein can be arranged and designed in various different configurations.

[0020] Therefore, the following detailed description of the embodiments of the present application provided in the drawings is not intended to limit the scope of the claimed present application, but only represents selected embodiments of the present application. Based on the embodiments in the present application, all other embodiments obtained by those of ordinary skill in the art without making creative efforts fall within the scope of protection of the present application.

[0021] EMBODIMENT In view of the problems existing in the S-mode air traffic control response system using the FPGA+independent processor architecture, in order to adapt to the miniaturization of equipment and the explosive growth of low-altitude aircraft, the embodiments of the present application provide an S-mode air traffic control response system based on a MicroBlaze soft core architecture, which uses three MicroBlaze soft cores to independently realize S-mode response function, ADS-B IN function and ADS-B OUT function. Since the MicroBlaze soft core is constructed by using general resources inside the FPGA chip, the signal processing capability required by the S-mode air traffic control response system can be realized by using only a single FPGA chip.

[0022] In view of this, as shown in the drawings, Figure 1 The S-mode air traffic control response system based on a MicroBlaze soft core architecture provided by the embodiments of the present application includes a signal processing module, a transceiver module, an antenna (including a radio frequency cable) and a display control device. The display control device is connected with the signal processing module, and the antenna is connected with the signal processing module through the transceiver module.

[0023] The signal processing module comprises an FPGA chip and a peripheral circuit thereof; the FPGA chip comprises FPGA logic and three MicroBlaze soft cores connected with the FPGA logic; the three MicroBlaze soft cores comprise: a MicroBlaze soft core 1 for realizing an S-mode response function (such as analysis of air traffic query data and generation of air traffic response data, etc.); a MicroBlaze soft core 2 for realizing an ADS-B IN function (such as analysis and condensation report processing of ADS-B IN data, etc.); and a MicroBlaze soft core 3 for realizing an ADS-B OUT function (such as periodical control and data generation of ADS-B OUT signals, etc.); the peripheral circuit comprises: a crystal oscillator clock for providing a clock signal for each device in the signal processing module; an AD module for AD conversion of corresponding signals; and a DA module for DA conversion of corresponding signals.

[0024] The transceiving module comprises a receiving channel, a transmitting channel and an antenna interface, for receiving air traffic response signals and ADS-B OUT signals encoded and modulated by the signal processing module and converting them into radio frequency signals to be transmitted to an antenna, and for receiving air traffic query signals and ADS-B IN signals collected by the antenna in the air and converting them into intermediate frequency signals to be transmitted to the signal processing module.

[0025] The antenna (including a radio frequency cable) is used for receiving air traffic query signals and ADS-B IN signals in the air to be transmitted to the transceiving module, and for transmitting air traffic response signals and ADS-B OUT signals forwarded by the transceiving module.

[0026] The display control device is used for converting the working mode of the system through human-computer interface interaction, issuing control commands, system parameters, etc., receiving and displaying system states and condensed ADS-B IN point track messages, etc.

[0027] The S-mode air traffic response system further comprises a power module; the power module is used for completing conversion of an external power supply and supplying power to the S-mode air traffic response system.

[0028] Further, the MicroBlaze soft core and the FPGA logic communicate with each other through an on-chip AXI bus, which is conducive to further reducing the size and power consumption of the device and improving the processing capacity and reliability of the system.

[0029] The working method of the above-mentioned S-mode air traffic response system based on the MicroBlaze soft core architecture is as follows: Step 1, the display control device issues a control command to the FPGA logic, which transmits the control command to the MicroBlaze soft core 1, the MicroBlaze soft core 2 and the MicroBlaze soft core 3 through the AXI bus, respectively, to control the MicroBlaze soft cores to realize corresponding functions: the MicroBlaze soft core 1 realizes the S-mode response function, the MicroBlaze soft core 2 realizes the ADS-B IN function, and the MicroBlaze soft core 3 realizes the ADS-B OUT function; Step 2, the antenna transmits the received signal to the signal processing module after filtering and amplification by the transceiver module, and the received signal is an L-band wideband signal (center frequency: 1060Mhz, bandwidth: 100Mhz) in the air; Step 3, the signal processing module transmits the received signal to the FPGA logic after AD sampling by the AD module, and the FPGA logic uses frequency point 1 (frequency: 1030Mhz) and frequency point 2 (frequency: 1090Mhz) to demodulate the sampled signal to baseband by digital down-conversion; Step 4, the MicroBlaze soft core 1 realizes the S-mode response function using the baseband signal demodulated by frequency point 1, specifically including: Using the baseband signal demodulated by frequency point 1 to decode the ATC interrogation signal, completing the encoding, modulation and transmission of the ATC response signal: (1) If it is judged that the received A / C mode interrogation signal is valid, the FPGA logic directly encodes the A / C response signal and controls the DA module to complete the modulation (frequency: 1030Mhz), and finally radiates the A / C mode response signal to the air through the transceiver module and the antenna to complete the A / C mode response process; (2) If it is judged that the received S-mode interrogation signal is valid, the S-mode interrogation data is transmitted to the MicroBlaze soft core 1 through the AXI bus for data analysis and S-mode response signal generation, and the MicroBlaze soft core 1 transmits the S-mode response data to the FPGA logic through the AXI bus, and the FPGA logic encodes the S-mode response signal and controls the DA module to complete the modulation (frequency: 1030Mhz), and finally radiates the S-mode response signal to the air through the transceiver module and the antenna to complete the S-mode response process; Step 5: MicroBlaze soft core 2 uses the frequency point 2 demodulated baseband signal to realize ADS-B IN function: the frequency point 2 demodulated baseband signal is used for ADS-B IN signal decoding, if it is judged that the ADS-B IN signal is valid, the ADS-B IN signal is transmitted to the MicroBlaze soft core 2 through the AXI bus for data analysis and condensation, the ADS-B IN point track message is formed through the algorithm, the MicroBlaze soft core 2 transmits the ADS-B IN point track message to the FPGA logic, and the FPGA logic constructs a transmission channel to report to the display control device for display; Step 6: MicroBlaze soft core 3 uses the frequency point 2 demodulated baseband signal to realize ADS-B OUT function: the MicroBlaze soft core 3 performs periodic control and data generation of the ADS-B OUT signal, the MicroBlaze soft core 3 transmits the ADS-B OUT signal to the FPGA logic through the AXI bus, the FPGA logic encodes the ADS-B OUT signal and controls the DA module to complete modulation (frequency: 1090Mhz), and finally radiates the ADS-B OUT signal to the air through the transceiver module and the antenna to complete the ADS-B OUT process.

[0030] In some embodiments, for the above steps 4 and 6, the transmission channel in the transceiver module is shared by the air traffic response signal when the S-mode response function is realized and the ADS-B OUT signal when the ADS-B OUT function is realized, and only one kind of signal transmission can be performed in the same time period, and the transmission of the air traffic response signal and the ADS-B OUT signal is completed by the FPGA logic; wherein the transmission priority of the air traffic response signal is higher than that of the ADS-B OUT signal, and the response delay of the A / C mode and the S mode is required to meet the corresponding requirements. Preferably, the response delay of the A / C mode meets 3±0.5us, and the response delay of the S mode meets 128±0.25us. In addition, if the air traffic inquiry signal is received while the ADS-B OUT signal is being transmitted, resulting in that the air traffic response of this time cannot meet the delay requirement, the transmission of the air traffic response signal of this time is cancelled.

[0031] Term explanation: ATM: Air Traffic Management; FPGA: Field Programmble Gate Array; MicroBlaze: Microprocessor soft core or embedded soft core processor used by XILINX FPGA; ADS-B: Automatic Dependent Surveillance-Broadcast; eVTOL: electric Vertical Take-off and Landing; AXI: Advanced eXtensible Interface.

[0032] The preferred embodiments of the present application have been described above with the preferred embodiments, the present application is not limited to the above, for those skilled in the art, the present application can have various modifications and changes. Any modification, equivalent replacement, improvement, etc. within the spirit and principle of the present application shall be included in the protection scope of the present application.

Claims

1. A MicroBlaze soft core architecture based S-mode air traffic control response system, characterized in that, It comprises a signal processing module, a transceiving module, an antenna and a display control device; the display control device is connected with the signal processing module, and the antenna is connected with the signal processing module through the transceiving module; The signal processing module comprises an FPGA chip and a peripheral circuit thereof; the FPGA chip comprises FPGA logic and three MicroBlaze soft cores connected with the FPGA logic; the three MicroBlaze soft cores comprise: The MicroBlaze soft core 1 is used for realizing an S-mode response function; The MicroBlaze soft core 2 is used for realizing an ADS-B IN function; The MicroBlaze soft core 3 is used for realizing an ADS-B OUT function.

2. The MicroBlaze soft core architecture based S-mode ATC reply system according to claim 1, wherein, The MicroBlaze soft core and the FPGA logic communicate through an on-chip AXI bus.

3. The MicroBlaze soft core architecture based S-mode ATC reply system according to claim 1, characterized in that, The peripheral circuit comprises: A crystal clock for providing a clock signal for each device in the signal processing module; An AD module for AD conversion of a corresponding signal; A DA module for DA conversion of a corresponding signal.

4. The MicroBlaze soft core architecture based S-mode ATC reply system according to claim 1, characterized in that, The S-mode air traffic control response system further comprises a power module; The power module is used for completing conversion of an external power supply and supplying power for the S-mode air traffic control response system.

5. The working method of the S-mode air traffic control response system based on the MicroBlaze soft core architecture according to any one of claims 1-4, characterized in that, It comprises: Step 1: the display control device issues a control command to the FPGA logic, and the FPGA logic transmits the control command to the MicroBlaze soft core 1, the MicroBlaze soft core 2 and the MicroBlaze soft core 3 respectively, so as to control each MicroBlaze soft core to realize a corresponding function; Step 2: the antenna transmits a received signal to the signal processing module through the transceiving module; Step 3: the signal processing module transmits the received signal to the FPGA logic after AD sampling, and the FPGA logic demodulates the sampled signal to a baseband by using frequency point 1 and frequency point 2 respectively; Step 4: the MicroBlaze soft core 1 realizes an S-mode response function by using the baseband signal demodulated by frequency point 1; Step 5: the MicroBlaze soft core 2 realizes an ADS-B IN function by using the baseband signal demodulated by frequency point 2; Step 6: the MicroBlaze soft core 3 realizes an ADS-B OUT function by using the baseband signal demodulated by frequency point 2.

6. The working method of the S-mode air traffic control response system based on the MicroBlaze soft core architecture according to claim 5, characterized in that, In step 4, the MicroBlaze soft core 1 realizes an S-mode response function by using the baseband signal demodulated by frequency point 1, which comprises: The baseband signal demodulated by frequency point 1 is used for air traffic control inquiry signal decoding, encoding, modulation and transmission of an air traffic control response signal: (1) if it is judged that a received A / C mode inquiry signal is valid, the FPGA logic directly encodes an A / C response signal and controls a DA module to complete modulation based on frequency point 1, and finally radiates the A / C mode response signal to the air through the transceiving module and the antenna to complete an A / C mode response process; (2) If the received S-mode inquiry signal is determined to be valid, the S-mode inquiry data is transmitted to the MicroBlaze soft core 1 for data analysis and generation of an S-mode response signal, the MicroBlaze soft core 1 transmits the S-mode response data to the FPGA logic, the FPGA logic encodes the S-mode response signal and controls the DA module to complete modulation based on frequency point 1, and finally the S-mode response signal is radiated into the air via the transceiver module and the antenna to complete the S-mode response process.

7. The working method of the S-mode air traffic control reply system based on the MicroBlaze soft core architecture according to claim 5, characterized in that, In step 5, the MicroBlaze soft core 2 uses the frequency point 2 demodulated baseband signal to implement the ADS-B IN function, including: The frequency point 2 demodulated baseband signal is used for ADS-B IN signal decoding, if the ADS-B IN signal is determined to be valid, the ADS-B IN signal is transmitted to the MicroBlaze soft core 2 for data analysis and condensation, an ADS-B IN point track message is formed through an algorithm, the MicroBlaze soft core 2 transmits the ADS-B IN point track message to the FPGA logic, and the FPGA logic constructs a transmission channel to report to a display control device for display.

8. The working method of the S-mode air traffic control reply system based on the MicroBlaze soft core architecture according to claim 5, characterized in that, In step 6, the MicroBlaze soft core 3 uses the frequency point 2 demodulated baseband signal to implement the ADS-B OUT function, including: The MicroBlaze soft core 3 performs periodic control and data generation of the ADS-B OUT signal, the MicroBlaze soft core 3 transmits the ADS-B OUT signal to the FPGA logic, the FPGA logic encodes the ADS-B OUT signal and controls the DA module to complete modulation based on frequency point 2, and finally the ADS-B OUT signal is radiated into the air via the transceiver module and the antenna to complete the ADS-B OUT process.

9. The working method of the S-mode air traffic control reply system based on the MicroBlaze soft core architecture according to claim 5, characterized in that, The transmission channel in the transceiver module is shared by the air traffic control response signal when the S-mode response function is implemented and the ADS-B OUT signal when the ADS-B OUT function is implemented, and only one kind of signal can be transmitted in the same time period. The transmission of the air traffic control response signal and the ADS-B OUT signal is sequenced by the FPGA logic; wherein the transmission priority of the air traffic control response signal is higher than that of the ADS-B OUT signal, and the response delay of the A / C mode and the S mode is required to meet the corresponding requirements.

10. The working method of the S-mode air traffic control reply system based on the MicroBlaze soft core architecture according to claim 9, characterized in that, If the air traffic control inquiry signal is received while the ADS-B OUT signal is being transmitted, resulting in that the air traffic control response of this time cannot meet the delay requirement, the transmission of the air traffic control response signal of this time is cancelled.

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