Manufacturing method of side-emitting digital isolator and digital isolator

Abstract

The invention provides a manufacturing method of a side-emitting digital isolator and the digital isolator. The method comprises the following steps: S1, manufacturing a first Pad and a second Pad through RDL; s2, performing plastic package on the first Pad and the second Pad to obtain a plastic package body A; s3, a first coupling circuit and a second coupling circuit which correspond to each other in the horizontal direction are manufactured on the upper surface of the plastic package body A through RDL; s4, chip bonding of the first isolation side and the second isolation side is carried out on the upper surface of the plastic package body A, and then line connection of the first isolation side and the second isolation side is established through lead bonding; and S5, performing plastic package on the upper surface of the plastic package body A by using a plastic package material which is the same as or similar to the plastic package body A to obtain a plastic package body B. According to the invention, the packaging process is simpler and the cost is lower; and the isolation performance can be obviously improved.

Description

Technical Field

[0001] This invention relates to the field of isolated transmission technology, and specifically to a method for manufacturing a side-emitting digital isolator and the digital isolator itself. Background Technology

[0002] A digital isolator is an electronic device that uses isolation technologies such as radio frequency, electromagnetic, optical, or capacitive isolation to enable the transmission of digital signals in an electrically isolated state. Its core function is to block high voltage surges and ground loop interference while maintaining the integrity and transmission rate of digital signals.

[0003] Integrating isolation bands simply and effectively into digital isolation chips has always been a key technology for digital isolation devices. With the continuous development of packaging technology and its increasing flexibility, integrating isolation bands into the package has become a major research direction. Currently, there are three main solutions:

[0004] like Figure 1A The image shows the first type of integrated packaging isolation strip method. It involves mounting a substrate (Substrate) onto the leadframe. Figure 1A The green block in the image uses the middle plate of the substrate as an isolation strip, with metal layers on both sides ( Figure 1A The yellow blocks in the diagram are designed into corresponding coupling patterns according to the coupling method using layout technology (e.g., magnetic coupling is designed as a planar coil, capacitive coupling is designed as a capacitor board, and RF coupling is designed as an antenna layout, etc.); then they are connected to the die by wire bonding; finally, they are encapsulated with high dielectric strength EMC material to form an integrated isolation band SOP package solution.

[0005] The first type of encapsulation and isolation band method described above has the following significant drawbacks:

[0006] 1. The substrate overlapped with the leadframes on both sides of the isolation layer, resulting in a heterogeneous interface inside the chip package. Figure 1A The red line in the image introduces the risk of creepage inside the package, making it difficult to achieve high voltage withstand performance.

[0007] 2. The substrate mounting process is not a conventional process and requires investment in development, which will increase packaging costs;

[0008] 3. The complex packaging structure introduces higher reliability risks;

[0009] like Figure 1B As shown, this is the second type of packaging integration isolation strip method. It integrates the substrate substrate (… Figure 1BThe green block (in the image) is placed entirely on one side of the leadframe and then connected to the other side of the leadframe, which is isolated from it, via wire bonding. While this avoids the risk of internal creepage within the package, it still makes it difficult to achieve high voltage withstand performance due to the limited substrate thickness, typically around 200µm.

[0010] like Figure 1C As shown, this is the third type of integrated isolation strip packaging. It uses a leadframe to fabricate a simple coil shape, and then wire-bonding connects the coil to the die, forming a complete coil coupling structure to achieve magnetic coupling isolation. This method has the advantages of simple manufacturing and low cost, but its disadvantages are also obvious. Limited by the leadframe process, this method can only manufacture very simple coil structures; this results in very weak coupling signals, requiring highly reliable signal detection technology to achieve good coupling transmission; it is also easily affected by noise; furthermore, this technology is currently monopolized by foreign patents.

[0011] In conclusion, it is necessary to develop a novel in-package isolation band integration solution to simultaneously solve all the aforementioned technical problems and achieve a breakthrough in the development of domestically produced digital isolation devices. Summary of the Invention

[0012] The technical problem to be solved by the present invention is to provide a novel manufacturing method and digital isolator for a side-emitting digital isolator, which not only has a simpler packaging process and lower cost, but also significantly improves isolation performance.

[0013] To solve the above-mentioned technical problems, the first technical solution adopted by the present invention is as follows:

[0014] A method for manufacturing a side-launched digital isolator includes:

[0015] S1: Fabricate the first Pad corresponding to the first isolation side and the second Pad corresponding to the second isolation side on the carrier board using RDL;

[0016] S2: Mold the first Pad and the second Pad to obtain the molded body A;

[0017] S3: On the upper surface of the molding compound A, a first coupling circuit and a second coupling circuit corresponding in the horizontal direction are made by means of RDL;

[0018] S4: On the upper surface of the molding compound A, firstly, chip bonding is performed on the first isolation side and the second isolation side. Then, wire bonding is used to establish the circuit connections of the first isolation side with respect to its first chip, first pad and first coupling circuit, and the circuit connections of the second isolation side with respect to its second chip, second pad and second coupling circuit.

[0019] S5: Use the same or similar molding material as the molding body A to mold the upper surface of the molding body A to obtain the molding body B.

[0020] Optionally, the first coupling circuit and the second coupling circuit are a two-layer structure;

[0021] A molding compound Aa is then added between molding compound A and molding compound B to encapsulate the first layer structure of the first coupling circuit and the second coupling circuit; molding compound Aa is formed by encapsulating with the same or similar molding material as molding compound A; and

[0022] All of S3 to S5 are operated on the encapsulation body Aa, and the structure fabricated in S3 is the second layer structure of the first coupling circuit and the second coupling circuit.

[0023] Optionally, the step of adding a molding compound Aa between the molding compound A and the molding compound B specifically involves, before step S3, performing the following steps:

[0024] SS3-1: On the upper surface of the encapsulation body A, the first layer structure in the first coupling circuit, the first layer structure in the second coupling circuit, the first extension Pad connected to the first Pad, and the second extension Pad connected to the second Pad are respectively fabricated by RDL; wherein, the first layer structure in the first coupling circuit and the first layer structure in the second coupling circuit correspond to each other in the horizontal direction.

[0025] SS3-2: Use the same or similar molding material as the molding body A to mold the upper surface of the molding body A to obtain a molding body Aa superimposed on the molding body A.

[0026] Optionally, S4 includes:

[0027] SS4: On the upper surface of the molding compound Aa, first chip bonding is performed on the first chip corresponding to the first isolation side and second chip corresponding to the second isolation side. Then, the sequential connection relationship of the second layer structure, the first chip and the first extension Pad in the first coupling circuit and the sequential connection relationship of the second layer structure, the second chip and the second extension Pad in the second coupling circuit are established by wire bonding respectively.

[0028] The S5 includes:

[0029] SS5: Use the same or similar molding material as molded body A to mold the upper surface of molded body Aa to obtain molded body B superimposed on molded body Aa.

[0030] Optionally, if the first coupling circuit and the second coupling circuit are N-layer structures, where N is an integer greater than or equal to 3;

[0031] Then, at least N-1 layers of encapsulation bodies Ab are added between encapsulation body A and encapsulation body B, stacked sequentially from bottom to top, to encapsulate each layer of the first coupling circuit and the second coupling circuit except for the top layer structure; the N-1 layers of encapsulation bodies Ab are respectively encapsulated by encapsulation material that is the same as or similar to that of encapsulation body A; and

[0032] All of S3 to S5 are operated on the topmost encapsulation Ab, and S3 is the topmost structure of the first coupling circuit and the second coupling circuit.

[0033] Optionally, the step of adding at least N-1 layers of encapsulating body Ab between encapsulating body A and encapsulating body B in a sequential manner from bottom to top specifically involves, before step S3, performing the following:

[0034] SSS3-1: On the upper surface of the encapsulation body A, the first layer structure in the first coupling circuit, the first layer structure in the second coupling circuit, the first extension Pad connected to the first Pad, and the second extension Pad connected to the second Pad are respectively fabricated by RDL; wherein, the first layer structure in the first coupling circuit and the first layer structure in the second coupling circuit correspond to each other in the horizontal direction.

[0035] SSS3-2: Use a molding material that is the same as or similar to that of the molding body A to mold the upper surface of the molding body A, and obtain a first layer of molding body Ab superimposed on the molding body A;

[0036] SSS3-3: On the upper surface of the first layer encapsulation Ab, the second layer structure in the first coupling circuit, the second layer structure in the second coupling circuit, the first extension Pad connected to the first extension Pad, and the second extension Pad connected to the second extension Pad are respectively fabricated by RDL.

[0037] SSS3-4: Use the same or similar molding material as molding body A to mold the upper surface of the first molding body Ab to obtain a second molding body Ab superimposed on the first molding body Ab;

[0038] SSS3-5: If N is greater than 3, continue to add a molding compound Ab on the second molding compound Ab until the molding of the N-1th molding compound Ab is completed, so that each layer of the first coupling circuit and the second coupling circuit except the top layer structure is respectively molded in the first molding compound Ab to the N-1th molding compound Ab, and obtain N-1 layers of molding compounds Ab sequentially stacked on top of the molding compound A.

[0039] Optionally, S4 includes:

[0040] SSS4: On the upper surface of the N-1th layer of the molding compound Ab, firstly perform chip bonding of the first chip corresponding to the first isolation side and the second chip corresponding to the second isolation side, and then establish the sequential connection relationship of the top layer structure, the first chip and the Pad in the first coupling circuit and the sequential connection relationship of the top layer structure, the second chip and the Pad in the second coupling circuit through wire bonding respectively.

[0041] The S5 includes:

[0042] SSS5: Use the same or similar molding material as molding body A to mold the upper surface of molding body Ab in layer N-1, and obtain molding body B superimposed on molding body Ab in layer N-1.

[0043] Optionally, the first coupling circuit and the second coupling circuit are both capacitive coupling circuits, radio frequency coupling circuits, or coil magnetic coupling circuits including at least three turns of coil.

[0044] Another technical solution provided by this invention is:

[0045] A digital isolator,

[0046] If the coupling circuit in the digital isolator is a single-layer structure, then the digital isolator manufactured by the above-described side-emitting digital isolator manufacturing method includes: a molding compound A and a molding compound B stacked sequentially from bottom to top; the molding compound A has a first Pad corresponding to the first isolation side and a second Pad corresponding to the second isolation side; the upper surface of the molding compound A has a first coupling circuit and a first chip corresponding to the first isolation side, and the first coupling circuit, the first chip, and the first Pad are sequentially connected by bonding wires; the upper surface of the molding compound A also has a second coupling circuit and a second chip corresponding to the second isolation side, and the second coupling circuit, the second chip, and the second Pad are sequentially connected by bonding wires; the first coupling circuit, the first chip, the second coupling circuit, the second chip, and the bonding wires are encapsulated in the molding compound B;

[0047] If the coupling circuit in the digital isolator is a two-layer structure, then the digital isolator manufactured by the above-described side-emitting digital isolator manufacturing method includes: a molding compound A, a molding compound Aa, and a molding compound B stacked sequentially from bottom to top; the molding compound A has a first Pad corresponding to the first isolation side and a second Pad corresponding to the second isolation side; the upper surface of the molding compound A has a first layer structure of the first coupling circuit and the second coupling circuit, as well as a first extension Pad connected to the first Pad and a second extension Pad connected to the second Pad; the first layer structure, the first extension Pad, and the second extension Pad are respectively connected to the first Pad and the second Pad. The first extension pad and the second extension pad are encapsulated within the encapsulation body Aa; the upper surface of the encapsulation body Aa is provided with a second layer structure of the first coupling circuit and a first chip, and the second layer structure of the first coupling circuit, the first chip, and the first extension pad are sequentially connected by bonding wires; the upper surface of the encapsulation body Aa is also provided with a second layer structure of the second coupling circuit and a second chip, and the second layer structure of the second coupling circuit, the second chip, and the second extension pad are sequentially connected by bonding wires; the second layer structure, the first chip, the second chip, and the bonding wires are encapsulated within the encapsulation body B;

[0048] If the coupling circuit in the digital isolator has an N-layer structure, where N is an integer greater than or equal to 3, then the digital isolator manufactured by the above-described side-emitting digital isolator manufacturing method includes: a molding compound A, an N-1 layer molding compound Ab, and a molding compound B stacked sequentially from bottom to top; the molding compound A has a first Pad corresponding to the first isolation side and a second Pad corresponding to the second isolation side; the N-1 layer molding compound Ab encapsulates each layer of the first coupling circuit and the second coupling circuit except for the top layer structure, and also encapsulates each layer structure that connects to the first Pad and the second Pad. The Pad of the Pad; the upper surface of the top layer of the molding compound Ab is provided with the top layer structure of the first coupling circuit and the first chip, and the top layer structure of the first coupling circuit, the first chip and the Pad connected to the first Pad are sequentially connected by bonding wires; the upper surface of the top layer of the molding compound Ab is also provided with the top layer structure of the second coupling circuit and the second chip, and the top layer structure of the second coupling circuit, the second chip and the Pad connected to the second Pad are sequentially connected by bonding wires; the top layer structure, the first chip, the second chip and the bonding wires are encapsulated in the molding compound B;

[0049] The molding materials of molding bodies A, B, Aa, and Ab are the same or similar.

[0050] Optionally, the coupling circuit is a capacitive coupling circuit, a radio frequency coupling circuit, or a coil magnetic coupling circuit including at least three turns of coil.

[0051] The beneficial effects of this invention are as follows: The manufacturing method of the side-emitting digital isolator provided by this invention breaks away from the traditional "substrate + lead frame" packaging approach. By directly laying out the required isolation circuit structure on the upper surface of the molding compound using RDL technology, and then using the same or similar molding compound material to encapsulate it on the upper surface, a side-emitting digital isolator composed of multiple layers of molding compounds of the same or similar material is obtained, and the isolation band is directly formed by the molding compound material itself. This invention can simultaneously eliminate the processing design of the "traditional substrate" and "lead frame," not only achieving processing precision that the lead frame process cannot reach, but also realizing more complex circuit pattern designs, thereby improving signal coupling strength and enhancing signal transmission stability; moreover, it fundamentally solves the heterogeneous interface problem, eliminates creepage risk, and reduces the overall thickness, easily achieving higher isolation withstand voltage performance; more importantly, this invention is entirely based on traditional packaging technology, with advantages of simpler structure and process, and lower manufacturing cost. Attached Figure Description

[0052] Figure 1A This is a schematic diagram of a digital isolator manufactured using the first encapsulation and integration isolation strip method in the prior art;

[0053] Figure 1B This is a schematic diagram of a digital isolator manufactured using the second packaging integration isolation strip method in the prior art;

[0054] Figure 1C This is a schematic diagram of a digital isolator manufactured using the third packaging and integration isolation strip method in the prior art;

[0055] Figure 2 This is a schematic flowchart illustrating a manufacturing method for a side-launched digital isolator according to Embodiment 1 of the present invention.

[0056] Figure 3 A schematic diagram of the manufacturing process of a side-launched digital isolator provided for a specific embodiment of the present invention;

[0057] Figure 4 This is a schematic diagram of the structure of a digital isolator manufactured according to the manufacturing method of a side-launched digital isolator provided in Embodiment 1 of the present invention;

[0058] Figure 5 This is a schematic diagram of the radio frequency coupling circuit implemented based on Embodiment 1 of the present invention;

[0059] Figure 6 This is a schematic diagram of the coil coupling circuit implemented based on Embodiment 1 of the present invention;

[0060] Figure 7This is a schematic diagram of a digital isolator with a dual-layer coupling structure, manufactured according to a manufacturing method of a side-launched digital isolator with a dual-layer coupling structure provided in Embodiment 2 of the present invention.

[0061] Figure 8 This is a flowchart illustrating a method for manufacturing a side-launched digital isolator with a dual-layer coupling structure, based on a specific embodiment of Embodiment 2 of the present invention.

[0062] Figure 9 This is a schematic diagram of the structure of the dual-layer radio frequency coupling circuit implemented based on Embodiment 2 of the present invention;

[0063] Figure 10 This is a schematic diagram of the structure of the double-layer coil coupling circuit implemented based on Embodiment 2 of the present invention;

[0064] Figure 11 This is a schematic diagram of a digital isolator with a three-layer coupling structure, manufactured according to a manufacturing method of a side-launched digital isolator with a three-layer or higher coupling structure provided in Embodiment 3 of the present invention.

[0065] Figure 12 A flowchart illustrating a method for manufacturing a side-launched digital isolator with a three- or more-layer coupling structure, provided as a specific embodiment of the present invention (Embodiment 3).

[0066] Figure 13 This is a schematic diagram of the structure of the three-layer radio frequency coupling circuit implemented based on Embodiment 3 of the present invention;

[0067] Figure 14 This is a schematic diagram of the structure of a three-layer coil coupling circuit implemented based on Embodiment 2 of the present invention. Detailed Implementation

[0068] To explain in detail the technical content, objectives, and effects of the present invention, the following description is provided in conjunction with the embodiments and accompanying drawings.

[0069] Explanation of technical terms:

[0070] A side-launched digital isolator refers to a digital isolator with an isolation coupling structure designed to be corresponding in the horizontal direction; with the middle as the isolation band, the two coupled circuits are located on the left and right sides of the isolation band, respectively.

[0071] The carrier board, in this article, refers to the flat plate structure used to provide support for the processing of the substrate circuit during the packaging process. It will be separated from the substrate after the substrate processing is completed.

[0072] RDL, or Redistribution Layer, refers to the metal wiring formed on the surface of a packaging substrate (specifically, a plastic encapsulation in this invention) using electroplating processes to redesign signal transmission paths and power distribution. Through RDL, signal pins can be distributed to different locations on the substrate, providing connectivity to target components, thereby achieving efficient integration and reducing device size. Specifically, the appendix in this invention... Figures 2 to 14 All parts involving yellow blocks are implemented using the RDL. The coupling circuit part of this invention uses RDL technology to complete the circuit pattern processing, but it is not limited to wiring processing.

[0073] In this invention, "layout" refers to the arrangement and connection of components on a packaging substrate. Specifically, different patterns are formed by microstrip lines according to different design requirements. For example, a planar metal plate can be used to implement a capacitive coupling scheme, a planar coil can be used to implement a magnetic coupling scheme, and an RF antenna can be used to implement a wireless isolation scheme.

[0074] Pad, or solder pad, is a metallized structural component used for electrical connections.

[0075] Chip bonding refers to the manufacturing process of precisely mounting a chip onto a packaging substrate using mechanical fixing or chemical bonding methods to achieve electrical connection, physical support, and heat dissipation functions.

[0076] Wire bonding uses metal wires to achieve electrical interconnection between the wafer, frame, and substrate.

[0077] Molding materials refer to high dielectric strength EMC materials; the interface formed by molding the same or similar molding materials (with similar composition and particle size) can be completely fused.

[0078] Example 1

[0079] Please see Figures 2 to 6 This embodiment provides a method for manufacturing a side-launched digital isolator.

[0080] Please also refer to Figure 2 and Figure 3 This embodiment includes at least the following: Figure 2 The following steps S1 to S5 are shown.

[0081] S1 includes fabricating a first Pad corresponding to the first isolation side and a second Pad corresponding to the second isolation side on the carrier board using RDL.

[0082] S2 includes performing a first molding process on the first Pad and the second Pad in S1 to obtain a molded body A.

[0083] Here, only the first and second pads fabricated on the carrier board are encapsulated; the carrier board itself is not included.

[0084] The molding compound A serves as the bottom layer of the packaged product and acts as a substrate. The first Pad and the second Pad encapsulated within it will serve as the bottom pads of the packaged product. They are signal connection pads led out from inside the packaged product by the first isolation side and the second isolation side, respectively, and are used to make signal connections with other external components.

[0085] Preferably, the first Pad and the second Pad are through-hole pad structures that penetrate the molding compound A.

[0086] In some specific implementations, combined with Figure 3 To understand this, S1 specifically includes:

[0087] S11: The original first Pad corresponding to the first isolation side and the original second Pad corresponding to the second isolation side are respectively fabricated on the carrier board by RDL electroplating process;

[0088] S12: Conductive pillars, preferably copper pillars, are formed on the original first Pad and the original second Pad respectively by electroplating process to extend the conductive lines of the Pad and form the first Pad and the second Pad.

[0089] S2 specifically includes:

[0090] S21: Use the molding process to mold all the components on the carrier, namely the first Pad and the second Pad, to obtain the original molded body A;

[0091] S22: Polish the upper surface of the original molded body A to expose the tops of the first Pad and the second Pad so that the circuit can be connected and the molded body A can be obtained.

[0092] S3 includes the fabrication of a first coupling circuit and a second coupling circuit in the horizontal direction on the upper surface of the encapsulation body A via RDL.

[0093] That is, the first coupling circuit on the first isolation side and the second coupling circuit on the second isolation side are directly fabricated on the upper surface of the encapsulated body A using a traditional electroplating process.

[0094] Here, the first coupling circuit and the second coupling circuit located on the upper surface of the molding compound A correspond to each other in the horizontal direction. The correspondence refers to the fact that, based on the positional relationship between the first coupling circuit and the second coupling circuit, they can be interconnected in a specific way (such as capacitive coupling, radio frequency coupling, or coil magnetic coupling).

[0095] Preferably, the first coupling circuit and the second coupling circuit are located on opposite sides of the upper surface of the molding compound A. Specifically, the first pad and the first coupling circuit on the first isolation side are located on the same side; the second pad and the second coupling circuit on the second isolation side are located on the other side.

[0096] In some specific implementations, combined with Figure 3 To understand this further, S3 also includes:

[0097] The first and second wire bonding pads are fabricated on the upper surface of the molding compound A at positions corresponding to the first and second pads using the RDL. The first and second wire bonding pads are connected to the corresponding first and second pads to enable wire bonding connectivity of the circuit in the subsequent wire bonding step.

[0098] It is understandable that, unlike existing technologies that require mounting traditional substrates on the leadframe island to achieve substrate functionality, this embodiment directly uses the molding compound A as the substrate of the package, resulting in a simpler structure and a significantly reduced overall thickness of the finished package.

[0099] S4 includes performing chip bonding on the upper surface of the molding compound A, firstly bonding the first isolation side and the second isolation side, that is, accurately mounting the first chip on the first isolation side and the second chip on the second isolation side onto the upper surface of the molding compound A; then establishing wire bonding to establish the circuit connection between the first isolation side and the first chip, the first pad and the first coupling circuit on the first isolation side, and the circuit connection between the second isolation side and the second chip, the second pad and the second coupling circuit on the second isolation side.

[0100] Here, the first chip corresponding to the first isolation side is specifically disposed on the first isolation side, and the second chip corresponding to the second isolation side is specifically disposed on the second isolation side. The first chip on the first isolation side will establish a connection relationship with the first coupling circuit and the first Pad respectively through wire bonding; the second chip on the second isolation side will establish a connection relationship with the second coupling circuit and the second Pad respectively through wire bonding.

[0101] Preferably, the first chip, the first pad, and the first coupling circuit on the first isolation side are located on the same side, and the second chip, the second pad, and the second coupling circuit on the second isolation side are located on the other side.

[0102] As a specific example, such as Figure 4 As shown, all components of the first isolation side are uniformly arranged on the left side of the entire package, also known as the left-side isolation circuit; all components of the second isolation side are uniformly arranged on the right side of the entire package, also known as the right-side isolation circuit. The reverse is also possible.

[0103] S5 includes performing a second molding process on the upper surface of the substrate using a molding material that is the same as or similar to that of the molding compound A, to obtain the molding compound B.

[0104] Here, the encapsulation body B is used to encapsulate all the components arranged on the upper surface of the encapsulation body A and firmly fix them to the upper surface of the encapsulation body A.

[0105] Here, the molding material used to form the molded body B is the same as or similar to the molding material used to form the molded body A; that is, the molding materials of molded body A and molded body B are the same or similar. This not only makes the connection between the upper and lower molded bodies tighter and more secure, but more importantly, the interface between the two molding processes can be completely fused, fundamentally avoiding the formation of heterogeneous interfaces. The digital isolator encapsulated in this way will have significantly improved isolation withstand voltage and encapsulation reliability.

[0106] The manufacturing method of the side-emitting digital isolator provided in this embodiment involves first molding to obtain a molding compound A, which serves as a substrate support. Then, using an RDL (Restricted Layer Distributor), all isolation circuits are arranged on the upper surface of molding compound A. Specifically, the horizontally corresponding first and second coupling circuits will naturally form an isolation band between the first and second coupling circuits after the second molding is completed, through molding compound B stacked on top of molding compound A. Furthermore, the thickness of the isolation band can be flexibly adjusted by designing the molding compound thickness according to different isolation strength requirements, thus achieving on-demand design of isolation withstand voltage performance. For example, the dielectric strength of general molding compound is around 50V / um, while the double-layer molding compound structure provided in this embodiment can achieve a withstand voltage of 25KV with an isolation band thickness of 500um (500um * 50V / um = 25000V); and a withstand voltage of 50KV can be achieved with an isolation band thickness of 1mm (1mm * 50V / um = 50KV).

[0107] As described above, this embodiment provides a novel technology for integrating isolation strips within a package, breaking away from the traditional "substrate + lead frame" packaging approach. By using the same or similar molding materials for multiple molding processes, and employing RDL technology to achieve complex isolation circuit patterns on the surface of the molded body, a product is obtained... Figure 4 The side-launched digital isolator shown is composed of multiple encapsulated bodies of the same or similar material stacked together, and the isolation band is formed directly by the encapsulation material. It can eliminate the need for the processing design of "traditional substrate" and "lead frame".

[0108] On the one hand, unlike traditional isolation packaging solutions which are limited by lead frame processing technology and thus difficult to achieve complex circuit pattern design, this embodiment directly utilizes the molding compound to realize the substrate function, and then uses traditional RDL process to perform layout processing on its surface. This allows for processing precision that lead frame process cannot achieve, enabling more complex coupling circuit pattern design, thereby improving signal coupling strength and enhancing signal transmission stability.

[0109] On the other hand, unlike the traditional "substrate + lead frame" isolation packaging solution, the package in this embodiment is composed of multiple molded bodies of the same or similar materials stacked together, and the interfaces between the molded bodies can be completely fused. This not only fundamentally solves the heterogeneous interface problem and eliminates the risk of creepage, but also maintains the integrity of the isolation band and reduces the overall package thickness. Therefore, the digital isolator fabricated through this embodiment can easily achieve excellent isolation withstand voltage and package reliability.

[0110] On the other hand, unlike traditional isolation packaging solutions that require advanced, complex, and costly packaging processes (such as processing a separate polyimide insulating layer inside the package as an isolation strip, or requiring embedded packaging processes) to achieve good isolation performance, this embodiment is entirely based on traditional packaging processes, and has comprehensive advantages such as simpler structure and process, lower manufacturing cost, and better isolation performance.

[0111] It should also be noted that in step S3 of this embodiment, the RDL is fabricated on the upper surface of the molding compound A, and a corresponding coupling circuit is placed on the horizontal direction of this surface, which can meet the design requirements of various coupling methods.

[0112] In some specific embodiments of this example, the first coupling circuit and the second coupling circuit are both capacitive coupling circuits; or both are radio frequency coupling circuits (e.g., Figure 5 (as shown); or simultaneously a coil magnetic coupling circuit including at least three turns of coil (such as...). Figure 6 (As shown).

[0113] When both the first coupling circuit and the second coupling circuit are coil magnetic coupling circuits, such as Figure 6 As shown, a single coil magnetic coupling circuit can include at least three turns of coil; compared to traditional coil magnetic coupling isolation packaging schemes, which are limited by lead frame technology and can only manufacture a very simple two-turn coil structure at most (such as...). Figure 1CAs shown in the figure, this leads to defects such as weak coupling signals. The side-launched digital isolator based on coil magnetic coupling obtained in this embodiment can have a much larger number of coil turns than the isolator obtained by the traditional coil magnetic coupling isolation packaging scheme. Therefore, according to the theoretical relationship between mutual inductance coefficient and number of turns, the isolation coil coupling capability and mutual inductance strength of the side-launched digital isolator based on coil magnetic coupling obtained in this embodiment can be significantly improved.

[0114] Example 2

[0115] Please see Figures 7 to 10 This embodiment is a further extension of Embodiment 1, providing a method for manufacturing a side-launched digital isolator with a dual-layer coupling structure. The essential difference between this embodiment and Embodiment 1 is that the coupling circuit structure in the resulting side-launched digital isolator is a dual-layer structure.

[0116] Please combine Figure 4 and Figure 7 To understand this, the manufacturing method provided in this embodiment, compared to the manufacturing method provided in Embodiment 1, further includes the following steps:

[0117] A molding compound Aa is added between molding compound A and molding compound B to encapsulate the first layer structure of the first coupling circuit and the second coupling circuit; molding compound Aa is formed by encapsulating with the same or similar molding material as molding compound A; and

[0118] The objects of operation in steps S3 to S5 are actually the molding compound Aa, that is, the operation is performed on the molding compound Aa, and the specific structure made in step S3 is the second layer structure of the first coupling circuit and the second coupling circuit.

[0119] It is understood that the manufacturing method for a side-launched digital isolator with a dual-layer coupling structure provided in this embodiment is an extension of Embodiment 1. Specifically, after step S2 and before step S3, a new step is added to manufacture a molding compound Aa containing the first layer of the coupling circuit structure. Furthermore, based on the same technical concept, it is known that the operations described in subsequent steps S3, S4, and S5 should actually be performed on the newly added molding compound Aa. Therefore, the final product is as follows... Figure 8 The illustrated side-launched digital isolator is composed of three encapsulated bodies of the same or similar materials stacked together, directly utilizing the natural isolation band formed by the encapsulation material. It not only possesses all the technical effects described in Embodiment 1 (which will not be repeated here), but also effectively meets the design requirements of a double-layer coupling structure, bringing advantages such as enhanced electrical isolation strength and safety, optimized anti-interference performance (reducing parasitic capacitance between isolation layers and lowering common-mode noise through layered layout), support for bidirectional signal transmission and functional integration, and a balance between performance and size (layered design facilitates volume reduction and enables higher insulation levels).

[0120] The following embodiment will detail the manufacturing method of a side-launched digital isolator with a dual-layer coupling structure through a specific implementation. Please refer to the following: Figure 7 To understand.

[0121] like Figure 8 As shown, the manufacturing method includes at least the following steps:

[0122] S1: Fabricate the first Pad corresponding to the first isolation side and the second Pad corresponding to the second isolation side on the carrier board using RDL;

[0123] S2: Mold the first Pad and the second Pad to obtain the molded body A;

[0124] SS3-1: On the upper surface of the molding compound A, the following are fabricated using RDL: the first layer structure in the first coupling circuit, the first layer structure in the second coupling circuit, the first extension Pad connected to the first Pad, and the second extension Pad connected to the second Pad; wherein the first layer structure in the first coupling circuit and the first layer structure in the second coupling circuit correspond to each other in the horizontal direction to ensure coupling performance.

[0125] SS3-2: Use the same or similar molding material as the molding body A to mold the upper surface of the molding body A to mold and fix all the components arranged on the upper surface of the molding body A, and obtain the molding body Aa superimposed on the molding body A;

[0126] Preferably, the process further includes polishing the upper surface of the molding compound Aa to expose the tops of the first extension Pad and the second extension Pad, facilitating wiring connections in subsequent steps.

[0127] SS3-3: On the upper surface of the encapsulation body Aa, a second layer structure of the first coupling circuit and a second layer structure of the second coupling circuit corresponding to each other in the horizontal direction are formed by RDL.

[0128] Optionally, if, based on the design requirements of the coupling circuit, the first layer structure in the first coupling circuit and the second coupling circuit needs to be connected to the second layer structure, then during the fabrication of the first layer structure, i.e., in SS3-1 above, vias in both the first layer structure of the first coupling circuit and the first layer structure of the second coupling circuit will be fabricated simultaneously. Furthermore, in this step, SS3, the first layer structure of the first coupling circuit is connected to its second layer structure via vias, and the first layer structure of the second coupling circuit is connected to its second layer structure via vias. It is understood that in this specific embodiment, the double-layer structure of the coupling circuit is only used as a stacking illustration and does not limit the connection situation.

[0129] Optionally, the circuit patterns of each layer in the first coupling circuit and the second coupling circuit can be different or the same, depending on the design requirements of the coupling circuit.

[0130] Preferably, the first coupling circuit and the second coupling circuit are located on opposite sides of the double-layer plastic encapsulation structure. Specifically, the first layer and the second layer of the first coupling circuit are located on the same side; the first layer and the second layer of the second coupling circuit are located on the other side.

[0131] SS4: On the upper surface of the molding compound Aa, firstly, chip bonding is performed on the first isolation side and the second isolation side, that is, the first chip on the first isolation side and the second chip on the second isolation side are precisely mounted on the upper surface of the molding compound Aa; then, through wire bonding, the sequential connection relationship of the second layer structure, the first chip and the first extension Pad in the first coupling circuit of the first isolation side and the sequential connection relationship of the second layer structure, the second chip and the second extension Pad in the second coupling circuit of the second isolation side are established respectively.

[0132] As a specific example, such as Figure 7 As shown, all components of the first isolation side are uniformly arranged on the left side of the entire package, also known as the left-side isolation circuit; all components of the second isolation side are uniformly arranged on the right side of the entire package, also known as the right-side isolation circuit. The reverse is also possible.

[0133] SS5: Use the same or similar molding material as the molding body A to mold the upper surface of the molding body Aa to mold and fix all the components arranged above the molding body Aa, and obtain the molding body B superimposed on the molding body Aa.

[0134] like Figure 7 As shown, the digital isolator manufactured by the above method has a three-layer molding compound structure, including molding compound A, molding compound Aa and molding compound B stacked sequentially from bottom to top; between the first coupling circuit and the second coupling circuit, which are molded therein and have a double-layer coupling structure, an isolation band is naturally formed by molding compound Aa and molding compound B; the thickness of the isolation band can also be controlled by designing the thickness of the molding compound to adapt to different isolation strength requirements.

[0135] In this embodiment, the first coupling circuit and the second coupling circuit can both be capacitive coupling circuits designed for a two-layer structure; or both be radio frequency coupling circuits designed for a two-layer structure (such as...). Figure 9 (as shown); or simultaneously, a coil magnetic coupling circuit designed for a double-layer structure including at least three turns of coil (such as...). Figure 10 (As shown).

[0136] In particular, the digital isolator fabricated in this embodiment can not only achieve the following: Figure 10The illustrated design features a double-layer coil magnetic coupling structure; moreover, a single-layer coil coupling structure can include at least three turns of coil. Clearly, this embodiment can produce more turns of coil and more layers of coupling structure compared to traditional coil coupling isolation packaging schemes (such as...). Figure 1C (As shown). Therefore, not only can the magnetic coupling capability and mutual inductance of the isolation coil be significantly improved, but also, due to the magnetic coupling between the main coil and the secondary coil, it has higher induction efficiency, lower crosstalk noise, and better heat dissipation performance.

[0137] Example 3

[0138] Please refer to Figures 11 to 14 This embodiment further extends Embodiment 1, providing a method for manufacturing a side-emitting digital isolator with a three- or higher coupling circuit structure. The essential difference between this embodiment and Embodiment 1 is that the coupling circuit structure in the resulting side-emitting digital isolator has three or more layers.

[0139] Please combine Figure 4 and Figure 11 To understand this, the manufacturing method provided in this embodiment can produce, for example, [the following is a description of the method]. Figure 11 As shown, a side-launched digital isolator with an N-layer coupling structure, where N is an integer greater than or equal to 3, further includes the following steps compared to the manufacturing method provided in Embodiment 1:

[0140] At least N-1 layers of encapsulation bodies Ab are added between encapsulation body A and encapsulation body B, stacked sequentially from bottom to top, for encapsulating each layer of the first coupling circuit and the second coupling circuit except for the top layer structure; the N-1 layers of encapsulation bodies Ab are respectively encapsulated by encapsulation material that is the same as or similar to that of encapsulation body A; and

[0141] The objects of operation in steps S3 to S5 are actually the top layer of the encapsulation Ab, that is, the operation is performed on the top layer of the encapsulation Ab, and the specific structure made in step S3 is the top layer structure of the first coupling circuit and the second coupling circuit.

[0142] It is understood that the manufacturing method for a side-launched digital isolator with an N-layer coupling structure provided in this embodiment is an extension of Embodiment 1. Specifically, after step S2 and before step S3, an additional step of manufacturing an N-1 layer of molding compound Ab is added. Furthermore, based on the same technical concept, it is known that the operations described in subsequent steps S3, S4, and S5 should actually be performed on the topmost molding compound Ab of the newly added N-1 layers of molding compound Ab. Therefore, the final product is as follows... Figure 11The illustrated side-emitting digital isolator is constructed from multiple encapsulated layers of the same or similar material (from bottom to top: encapsulated layer A, N-1 layers of encapsulated layer Ab, and encapsulated layer B), and can directly utilize the encapsulation material to naturally form isolation bands. It not only possesses all the technical effects described in Embodiment 1 (which will not be repeated here), but also effectively meets the design requirements of multi-layer coupling structures, bringing significant improvements in isolation performance (greatly increasing isolation withstand voltage and strong isolation transmission reliability), optimized anti-interference performance (multi-layer filtering to suppress composite noise and block crosstalk paths), improved signal transmission quality (hierarchical signal conditioning and adaptive modulation and demodulation), and expanded functional integration.

[0143] The following embodiment will detail the manufacturing method of a side-launched digital isolator with a three- or higher coupling structure through a specific implementation. Please refer to [the specific implementation details are missing here]. Figure 11 To understand.

[0144] like Figure 12 As shown, it includes at least the following steps:

[0145] S1: Fabricate the first Pad corresponding to the first isolation side and the second Pad corresponding to the second isolation side on the carrier board using RDL;

[0146] S2: Mold the first Pad and the second Pad to obtain the molded body A;

[0147] SSS3-1: On the upper surface of the encapsulation body A, the following are fabricated using RDL: a first layer structure in the first coupling circuit, a first layer structure in the second coupling circuit, a first extension Pad connected to the first Pad, and a second extension Pad connected to the second Pad; wherein the first layer structure in the first coupling circuit and the first layer structure in the second coupling circuit correspond to each other in the horizontal direction to ensure coupling performance.

[0148] SSS3-2: Use a molding material that is the same as or similar to that of the molding body A to mold the upper surface of the molding body A, and obtain a first layer of molding body Ab superimposed on the molding body A;

[0149] Preferably, the method further includes polishing the upper surface of the first encapsulation layer Ab to expose the tops of the first extension Pad and the second extension Pad, facilitating the wiring connection in subsequent steps.

[0150] SSS3-3: On the upper surface of the first layer encapsulation Ab, the following are fabricated using RDL: the second layer structure in the first coupling circuit, the second layer structure in the second coupling circuit, the first extension Pad connected to the first extension Pad, and the second extension Pad connected to the second extension Pad.

[0151] SSS3-4: Use the same or similar molding material as molding body A to mold the upper surface of the first molding body Ab to obtain a second molding body Ab superimposed on the first molding body Ab;

[0152] Preferably, the method further includes polishing the upper surface of the second encapsulation layer Ab to expose the tops of the first extension Pad and the second extension Pad, facilitating the wiring connection in subsequent steps.

[0153] SSS3-5: If N equals 3, then execute SSS4;

[0154] If N is greater than 3, then according to the above stacking method, continue to add a third layer of encapsulant Ab on the second layer of encapsulant Ab, and so on until the encapsulation of the N-1th layer of encapsulant Ab is completed, so that each layer of the first coupling circuit and the second coupling circuit except the top layer structure is encapsulated in the first layer of encapsulant Ab to the N-1th layer of encapsulant Ab, and obtain N-1 layers of encapsulant Ab stacked on top of encapsulant A in sequence.

[0155] Optionally, if the N-layer structures in the first and second coupling circuits need to be connected based on the design requirements of the coupling circuit, then during the fabrication of each layer, corresponding vias will also be fabricated simultaneously to connect the upper and lower layers through the vias. It is understood that in this specific embodiment, the N-layer structure of the coupling circuit is only used as a stacking illustration and does not limit the connection situation.

[0156] Optionally, the circuit patterns of each layer in the first coupling circuit and the second coupling circuit can be different or the same, depending on the design requirements of the coupling circuit.

[0157] Preferably, the first coupling circuit and the second coupling circuit are located on opposite sides of the multilayer plastic encapsulation structure. Specifically, the first to Nth layers of the first coupling circuit are located on the same side; the first to Nth layers of the second coupling circuit are located on the other side.

[0158] SSS4: On the upper surface of the N-1th layer molding compound Ab (i.e., the topmost molding compound Ab), firstly perform chip bonding of the first chip corresponding to the first isolation side and the second chip corresponding to the second isolation side, that is, accurately mount the first chip on the first isolation side and the second chip on the second isolation side onto the upper surface of the topmost molding compound Ab; then establish the sequential connection relationship of the first isolation side with respect to the topmost structure (i.e., the Nth layer structure), the first chip and the Pad (the Pad exposed on the upper surface of the N-1th layer molding compound Ab) in its first coupling circuit through wire bonding, and the sequential connection relationship of the second isolation side with respect to the topmost structure (i.e., the Nth layer structure), the second chip and the Pad (the Pad exposed on the upper surface of the N-1th layer molding compound Ab) in its second coupling circuit;

[0159] As a specific example, such as Figure 11 As shown, all components of the first isolation side are uniformly arranged on the left side of the entire package, also known as the left-side isolation circuit; all components of the second isolation side are uniformly arranged on the right side of the entire package, also known as the right-side isolation circuit. The reverse is also possible.

[0160] SSS5: Use the same or similar molding material as molding body A to mold the upper surface of the N-1th layer molding body Ab (i.e. the topmost molding body Ab) to obtain molding body B superimposed on the N-1th layer molding body Ab.

[0161] It is understood that the digital isolator manufactured using the above method has a 2+N (greater than or equal to 3) layer plastic encapsulation structure, such as... Figure 11 As shown, it includes a molding compound A, N-1 layers of molding compound Ab, and molding compound B stacked sequentially from bottom to top; between the first coupling circuit and the second coupling circuit, which are encapsulated and have N-layer coupling structures, an isolation band will be naturally formed by the N-1 layers of molding compound Ab and molding compound B; the thickness of the isolation band can also be controlled by designing the thickness of the molding compound to adapt to different isolation strength requirements.

[0162] In this embodiment, the first coupling circuit and the second coupling circuit can both be capacitive coupling circuits designed for an N (greater than or equal to 3) layer structure; or both be radio frequency coupling circuits designed for an N (greater than or equal to 3) layer structure (such as...). Figure 13 (as shown); or simultaneously, a coil magnetic coupling circuit designed for an N (greater than or equal to 3) layer structure including at least three turns of coil (such as...). Figure 14 (As shown).

[0163] In particular, the digital isolator fabricated in this embodiment can not only achieve an N (greater than or equal to 3) layer coil magnetic coupling structure design, but also a single-layer coil coupling structure can include at least three turns of coil. Clearly, compared to traditional coil magnetic coupling isolation packaging schemes, this embodiment can fabricate more turns of coil and more layers of coupling structure (such as...). Figure 1C (As shown). Therefore, not only can the coupling capability and mutual inductance of the isolation coil be significantly improved, but the multi-layer coil design can also significantly enhance isolation performance and reliability, while optimizing the integrity of signal isolation transmission. In addition, it also has the advantages of lower crosstalk noise and better heat dissipation performance.

[0164] In particular, the manufacturing method provided in this embodiment is applicable to the design of N (greater than or equal to 3) layer radio frequency coupling structures, which can realize the integration of multi-layer radio frequency antennas within the package, thereby avoiding the unconventional operation of mounting substrate antennas inside the package, thus greatly simplifying the process flow and improving the package reliability.

[0165] Example 4

[0166] This embodiment is a further extension of the above embodiment one, providing a side-launched digital isolator with a single-layer coupling structure.

[0167] The side-launched digital isolator with a single-layer coupling structure in this embodiment is manufactured using the manufacturing method of the side-launched digital isolator provided in Embodiment 1 above.

[0168] like Figure 4 As shown, the side-launched digital isolator with a single-layer coupling structure in this embodiment includes a molding compound A and a molding compound B stacked sequentially from bottom to top; the molding compound A and the molding compound B are made of the same or similar molding materials.

[0169] The molding compound A includes a first pad corresponding to a first isolation side and a second pad corresponding to a second isolation side. Optionally, the first pad and the second pad are integral through-hole pad structures penetrating the molding compound A. Optionally, the molding compound A also includes conductive posts connected to the first pad and the second pad respectively. One end of each conductive post is connected to the corresponding pad, and the other end is exposed on the upper surface of the molding compound A to extend the conductive lines of the pads within the molding compound A, facilitating subsequent wiring connections.

[0170] The upper surface of the encapsulation body A has a first coupling circuit and a first chip corresponding to the first isolation side on one side, and the first coupling circuit, the first chip and the first pad are connected in sequence by bonding wires; the upper surface of the encapsulation body A has a second coupling circuit and a second chip corresponding to the second isolation side on the other side, and the second coupling circuit, the second chip and the second pad are connected in sequence by bonding wires; the first coupling circuit, the first chip, the second coupling circuit, the second chip and the bonding wires are encapsulated in the encapsulation body B.

[0171] In some specific embodiments, the first coupling circuit and the second coupling circuit are both capacitive coupling circuits, radio frequency coupling circuits, or coil magnetic coupling circuits including at least three turns of coil.

[0172] Where both the first coupling circuit and the second coupling circuit are coil magnetic coupling circuits, such as Figure 5 As shown, a single coil coupling circuit can include at least three turns of coil. Compared to traditional coil magnetic coupling digital isolators, which are limited by lead frame technology and can only be manufactured with a very simple two-turn coil structure, the side-launched digital isolator based on coil magnetic coupling in this embodiment can include at least three turns of coil. Therefore, the side-launched digital isolator based on coil magnetic coupling provided in this embodiment can significantly improve its isolation coil coupling capability and mutual inductance strength.

[0173] The single-layer coupled side-launched digital isolator provided in this embodiment, such as... Figure 4 As shown, the substrate function is directly implemented by the molding compound A; the side-mounted isolation related circuits arranged on the upper surface of the molding compound A are all encapsulated by the molding compound B stacked on the upper surface of the molding compound A; the whole is composed of two molding compounds of the same or similar material, which can naturally form an isolation zone between the first coupling circuit and the second coupling circuit.

[0174] It is understood that the single-layer coupled side-emitting digital isolator provided in this embodiment eliminates the need for both the "traditional substrate" and "lead frame" structures. This not only allows for more complex coupling circuit pattern designs on the molded surface, thereby improving signal coupling strength and enhancing signal transmission stability; but also enables complete fusion of the interfaces between the molded components, fundamentally solving the heterogeneous interface problem and eliminating creepage risks; simultaneously, it maintains the integrity of the isolation band; furthermore, it reduces the overall package thickness. Therefore, the side-emitting digital isolator provided in this embodiment can easily achieve excellent isolation withstand voltage and package reliability. In addition, since it can be implemented entirely based on traditional packaging processes, it also has advantages such as a simpler structure and manufacturing process, and lower manufacturing costs.

[0175] Example 5

[0176] This embodiment is a further extension of the above embodiment two or four, providing a side-launched digital isolator with a dual-layer coupling structure.

[0177] The side-launched digital isolator with a dual-layer coupling structure in this embodiment is manufactured using the manufacturing method of the side-launched digital isolator provided in Embodiment 2 above.

[0178] like Figure 7 As shown, the side-launched digital isolator with a dual-layer coupling structure in this embodiment includes a molding compound A, a molding compound Aa, and a molding compound B stacked sequentially from bottom to top; the molding compounds A, Aa, and B are made of the same or similar molding materials.

[0179] The molding compound A includes a first pad corresponding to a first isolation side and a second pad corresponding to a second isolation side. Optionally, the first pad and the second pad are integral through-hole pad structures penetrating the molding compound A. Optionally, the molding compound A also includes conductive posts connected to the first pad and the second pad respectively. One end of each conductive post is connected to the corresponding pad, and the other end is exposed on the upper surface of the molding compound A to extend the conductive lines of the pads in the molding compound A, facilitating subsequent wiring connections.

[0180] The upper surface of the encapsulated body A is provided with: a first layer structure of a first coupling circuit and a second coupling circuit (located on both sides respectively), a first extension Pad connected to the first Pad, and a second extension Pad connected to the second Pad.

[0181] Optionally, if, based on the design requirements of the coupling circuit, the first layer structure in the first coupling circuit and the second coupling circuit needs to be connected to the second layer structure, then the upper surface of the encapsulation body A is further provided with through holes corresponding to the first layer structure of the first coupling circuit and the second coupling circuit. One end of each through hole is connected to the first layer structure of the corresponding coupling circuit, and the other end is exposed on the upper surface of the encapsulation body Aa, serving as a conductive line for the corresponding coupling circuit, facilitating subsequent connection to the second layer structure. All components arranged on the upper surface of the encapsulation body A are encapsulated within the encapsulation body Aa.

[0182] Optionally, the circuit patterns of each layer in the first coupling circuit and the second coupling circuit can be different or the same, depending on the design requirements of the coupling circuit.

[0183] The upper surface of the molding compound Aa has a second layer structure of a first coupling circuit and a first chip on one side, and the second layer structure of the first coupling circuit, the first chip and the first extension Pad are sequentially connected by bonding wires; the upper surface of the molding compound Aa has a second layer structure of a second coupling circuit and a second chip on the other side, and the second layer structure of the second coupling circuit, the second chip and the second extension Pad are sequentially connected by bonding wires; the second layer structure of the first coupling circuit, the second layer structure of the second coupling circuit, the first chip, the second chip and the bonding wires are all encapsulated in the molding compound B, that is, all components arranged on the upper surface of the molding compound Aa are encapsulated in the molding compound B.

[0184] In some specific embodiments, the first coupling circuit and the second coupling circuit can both be capacitive coupling circuits designed for a two-layer structure; or both be radio frequency coupling circuits designed for a two-layer structure (such as...). Figure 9 (as shown); or simultaneously, a coil magnetic coupling circuit designed for a double-layer structure including at least three turns of coil (such as...). Figure 10 (As shown).

[0185] In particular, the digital isolator provided in this embodiment not only has the following features: Figure 10 The double-layer coil coupling structure is shown; moreover, a single-layer coil coupling structure can include at least three turns of coil. Compared with traditional coil magnetic coupling isolators, this embodiment has more turns of coil and more layers of coupling structure. Therefore, not only can the coupling capability and mutual inductance of the isolation coil be significantly improved, but also, due to the magnetic coupling between the main coil and the secondary coil, it has higher induction efficiency, lower crosstalk noise, and better heat dissipation performance.

[0186] The side-launched digital isolator with a dual-layer coupling structure provided in this embodiment, such as... Figure 9 As shown, the substrate function is directly realized by the molding compound; the double-layer structure of the coupling circuit is respectively arranged on the upper surface of the molding compound at different levels; all isolation-related circuits arranged on the upper surface of the molding compound are encapsulated by the molding compound stacked on it; the whole is composed of three molding compounds of the same or similar material, which can naturally form an isolation zone between the first coupling circuit and the second coupling circuit of the double-layer structure.

[0187] It is understood that the side-launched digital isolator with a dual-layer coupling structure provided in this embodiment eliminates the need for a "traditional substrate" and a "lead frame" structure. It not only possesses all the beneficial effects of the side-launched digital isolator with a single-layer coupling structure provided in Embodiment 4 (which will not be elaborated here; please refer to Embodiment 4 for details), but also, based on its dual-layer coupling structure, offers advantages such as enhanced electrical isolation strength and safety, optimized anti-interference performance (reducing parasitic capacitance between isolation layers and lowering common-mode noise through layered layout), support for bidirectional signal transmission and functional integration, and a balance between performance and size (layered design facilitates volume reduction and enables higher insulation levels).

[0188] Example 6

[0189] This embodiment is a further extension of the above embodiment three, providing a side-launched digital isolator with a three- or higher coupling structure.

[0190] The side-launched digital isolator with a three- or higher coupling structure in this embodiment is manufactured using the manufacturing method of the side-launched digital isolator provided in Embodiment 3 above.

[0191] like Figure 11 As shown, the side-launched digital isolator with an N (greater than or equal to 3) layer coupling structure in this embodiment includes a molding compound A, an N-1 layer molding compound Ab, and a molding compound B stacked sequentially from bottom to top; the molding compound A, the N-1 layer molding compound Ab, and the molding compound B are made of the same or similar molding materials.

[0192] The molding compound A includes a first pad corresponding to a first isolation side and a second pad corresponding to a second isolation side. Optionally, the first pad and the second pad are integral through-hole pad structures penetrating the molding compound A. Optionally, the molding compound A also includes conductive posts connected to the first pad and the second pad respectively. One end of each conductive post is connected to the corresponding pad, and the other end is exposed on the upper surface of the molding compound A to extend the conductive lines of the pads in the molding compound A, facilitating subsequent wiring connections.

[0193] The N-1 layer encapsulated Ab contains each of the first coupling circuit and the second coupling circuit except for the top layer structure, and also contains Pads that connect the first Pad and the second Pad respectively.

[0194] Optionally, if the N-structures in the first and second coupling circuits need to be connected based on the design requirements of the coupling circuit, the N-1 layer of the encapsulation body Ab also encapsulates through-holes corresponding to each layer structure of the first and second coupling circuits except for the top layer structure, so as to connect the upper and lower layer structures of the corresponding coupling circuit.

[0195] Optionally, the circuit patterns of each layer in the first coupling circuit and the second coupling circuit can be different or the same, depending on the design requirements of the coupling circuit.

[0196] As a specific implementation, the first molding compound Ab encapsulates a first layer structure corresponding to the first coupling circuit and the second coupling circuit, and a Pad; the second molding compound Ab encapsulates a second layer structure corresponding to the first coupling circuit and the second coupling circuit, and a Pad; the third molding compound Ab encapsulates a third layer structure corresponding to the first coupling circuit and the second coupling circuit, and a Pad... and so on, the (N-1)th molding compound Ab encapsulates an (N-1)th layer structure corresponding to the first coupling circuit and the second coupling circuit, and a Pad. The upper surface of the N-1th layer molding compound Ab (i.e., the topmost molding compound Ab) has the following components on one side: the topmost structure of the first coupling circuit (i.e., the Nth layer structure), the first chip, and the Pad connected to the first Pad, which are sequentially connected by bonding wires. The upper surface of the topmost molding compound Ab has the following components on the other side: the topmost structure of the second coupling circuit, the second chip, and the Pad connected to the second Pad, which are sequentially connected by bonding wires. The topmost structure, the first chip, the second chip, and the bonding wires are encapsulated within the molding compound B, meaning that all components located on the upper surface of the N-1th layer molding compound Ab are encapsulated within the molding compound B.

[0197] In some specific embodiments, the first coupling circuit and the second coupling circuit can both be capacitive coupling circuits designed for N (greater than or equal to 3) layer structures; or radio frequency coupling circuits designed for N (greater than or equal to 3) layer structures (such as...). Figure 13 (as shown); or simultaneously, a coil magnetic coupling circuit designed for an N (greater than or equal to 3) layer structure including at least three turns of coil (such as...). Figure 14 (As shown).

[0198] Specifically, the digital isolator provided in this embodiment can not only achieve an N (greater than or equal to 3) layer coil magnetic coupling structure design, but also a single layer coil coupling structure can include at least three turns of coil. Compared with traditional coil magnetic coupling isolators, this embodiment has more turns of coil and more layers of coupling structure. Therefore, not only can the coupling capability and mutual inductance of the isolation coil be significantly improved, but the multi-layer coil structure can also significantly enhance isolation performance and reliability, while optimizing the integrity of signal isolation transmission. In addition, it also has the advantages of lower crosstalk noise and better heat dissipation performance.

[0199] Specifically, the digital isolator provided in this embodiment, such as Figure 13As shown, it features an N (greater than or equal to 3)-layer RF coupling structure, enabling the integration of multi-layer RF antennas within the package. This not only eliminates the unconventional operation of mounting substrate antennas inside the package, greatly simplifying the manufacturing process of digital isolators, but also improves package reliability.

[0200] The side-launched digital isolator with an N (greater than or equal to 3) layer coupling structure provided in this embodiment, such as... Figure 11 As shown, the substrate function is directly realized by the molding compound; the N-1 layer structure of the coupling circuit is respectively arranged on the upper surface of the molding compound at different levels; all isolation-related circuits arranged on the upper surface of the molding compound are encapsulated by the molding compound stacked on it; the whole is composed of 2+N molding compounds of the same or similar material, which can naturally form an isolation zone between the first coupling circuit and the second coupling circuit of the N-1 layer structure.

[0201] It is understood that the side-emitting digital isolator with an N (greater than or equal to 3) layer coupling structure provided in this embodiment eliminates the need for the "traditional substrate" and "lead frame" structures. It not only possesses all the beneficial effects of the side-emitting digital isolator with a single-layer coupling structure provided in Embodiment 4 (which will not be elaborated here; please refer to Embodiment 4 for details), but also, based on its three or more layer coupling structure, it can significantly improve isolation performance (greatly increasing isolation withstand voltage and strong isolation transmission reliability), optimize anti-interference performance (multi-layer filtering to suppress composite noise and block crosstalk paths), improve signal transmission quality (hierarchical signal conditioning and adaptive modulation and demodulation), and expand functional integration.

[0202] The above description is merely an embodiment of the present invention and does not limit the patent scope of the present invention. Any equivalent modifications made based on the content of the present invention specification and drawings, or direct or indirect applications in related technical fields, are similarly included within the patent protection scope of the present invention.

Claims

1. A method for manufacturing a side-launched digital isolator, characterized in that, include: S1: Fabricate the first Pad corresponding to the first isolation side and the second Pad corresponding to the second isolation side on the carrier board using RDL; S2: Mold the first Pad and the second Pad to obtain the molded body A; S3: On the upper surface of the molding compound A, a first coupling circuit and a second coupling circuit corresponding in the horizontal direction are made by means of RDL; S4: On the upper surface of the molding compound A, firstly, chip bonding is performed on the first isolation side and the second isolation side. Then, wire bonding is used to establish the circuit connections of the first isolation side with respect to its first chip, first pad and first coupling circuit, and the circuit connections of the second isolation side with respect to its second chip, second pad and second coupling circuit. S5: Use the same or similar molding material as the molding body A to mold the upper surface of the molding body A to obtain the molding body B.

2. The manufacturing method of the side-launched digital isolator as described in claim 1, characterized in that, If the first coupling circuit and the second coupling circuit are a two-layer structure; A molding compound Aa is then added between molding compound A and molding compound B to encapsulate the first layer structure of the first coupling circuit and the second coupling circuit; molding compound Aa is formed by encapsulating with the same or similar molding material as molding compound A; and All of S3 to S5 are operated on the encapsulation body Aa, and the structure fabricated in S3 is the second layer structure of the first coupling circuit and the second coupling circuit.

3. The manufacturing method of the side-launched digital isolator as described in claim 2, characterized in that, The step of adding a molding compound Aa between the molding compound A and the molding compound B specifically involves, before step S3, the following steps: SS3-1: On the upper surface of the encapsulation body A, the first layer structure in the first coupling circuit, the first layer structure in the second coupling circuit, the first extension Pad connected to the first Pad, and the second extension Pad connected to the second Pad are respectively fabricated by RDL; wherein, the first layer structure in the first coupling circuit and the first layer structure in the second coupling circuit correspond to each other in the horizontal direction. SS3-2: Use the same or similar molding material as the molding body A to mold the upper surface of the molding body A to obtain a molding body Aa superimposed on the molding body A.

4. The method for manufacturing a side-launched digital isolator as described in claim 2 or 3, characterized in that, The S4 includes: SS4: On the upper surface of the molding compound Aa, first chip bonding is performed on the first chip corresponding to the first isolation side and second chip corresponding to the second isolation side. Then, the sequential connection relationship of the second layer structure, the first chip and the first extension Pad in the first coupling circuit and the sequential connection relationship of the second layer structure, the second chip and the second extension Pad in the second coupling circuit are established by wire bonding respectively. The S5 includes: SS5: Use the same or similar molding material as molded body A to mold the upper surface of molded body Aa to obtain molded body B superimposed on molded body Aa.

5. The manufacturing method of the side-launched digital isolator as described in claim 1, characterized in that, If the first coupling circuit and the second coupling circuit are N-layer structures, where N is an integer greater than or equal to 3; Then, at least N-1 layers of encapsulation bodies Ab are added between encapsulation body A and encapsulation body B, stacked sequentially from bottom to top, to encapsulate each layer of the first coupling circuit and the second coupling circuit except for the top layer structure; the N-1 layers of encapsulation bodies Ab are respectively encapsulated by encapsulation material that is the same as or similar to that of encapsulation body A; and All of S3 to S5 are operated on the topmost encapsulation Ab, and S3 is the topmost structure of the first coupling circuit and the second coupling circuit.

6. The method for manufacturing a side-launched digital isolator as described in claim 5, characterized in that, The step of adding at least N-1 layers of encapsulating body Ab between encapsulating body A and encapsulating body B in a sequentially stacked manner from bottom to top specifically involves, before step S3, the following steps: SSS3-1: On the upper surface of the encapsulation body A, the first layer structure in the first coupling circuit, the first layer structure in the second coupling circuit, the first extension Pad connected to the first Pad, and the second extension Pad connected to the second Pad are respectively fabricated by RDL; wherein, the first layer structure in the first coupling circuit and the first layer structure in the second coupling circuit correspond to each other in the horizontal direction. SSS3-2: Use a molding material that is the same as or similar to that of the molding body A to mold the upper surface of the molding body A, and obtain a first layer of molding body Ab superimposed on the molding body A; SSS3-3: On the upper surface of the first layer encapsulation Ab, the second layer structure in the first coupling circuit, the second layer structure in the second coupling circuit, the first extension Pad connected to the first extension Pad, and the second extension Pad connected to the second extension Pad are respectively fabricated by RDL. SSS3-4: Use the same or similar molding material as molding body A to mold the upper surface of the first molding body Ab to obtain a second molding body Ab superimposed on the first molding body Ab; SSS3-5: If N is greater than 3, continue to add a molding compound Ab on the second molding compound Ab until the molding of the N-1th molding compound Ab is completed, so that each layer of the first coupling circuit and the second coupling circuit except the top layer structure is respectively molded in the first molding compound Ab to the N-1th molding compound Ab, and obtain N-1 layers of molding compounds Ab sequentially stacked on top of the molding compound A.

7. The method for manufacturing a side-launched digital isolator as described in claim 5 or 6, characterized in that, The S4 includes: SSS4: On the upper surface of the N-1th layer of the molding compound Ab, firstly perform chip bonding of the first chip corresponding to the first isolation side and the second chip corresponding to the second isolation side, and then establish the sequential connection relationship of the top layer structure, the first chip and the Pad in the first coupling circuit and the sequential connection relationship of the top layer structure, the second chip and the Pad in the second coupling circuit through wire bonding respectively. The S5 includes: SSS5: Use the same or similar molding material as molding body A to mold the upper surface of molding body Ab in layer N-1, and obtain molding body B superimposed on molding body Ab in layer N-1.

8. The method for manufacturing a side-launched digital isolator as described in claim 1, characterized in that, The first coupling circuit and the second coupling circuit are both capacitive coupling circuits, radio frequency coupling circuits, or coil magnetic coupling circuits including at least three turns of coil.

9. A digital isolator, characterized in that, If the coupling circuit in the digital isolator is a single-layer structure, then the digital isolator manufactured by the manufacturing method of the side-emitting digital isolator according to claim 1 includes: a molding compound A and a molding compound B stacked sequentially from bottom to top; the molding compound A has a first Pad corresponding to the first isolation side and a second Pad corresponding to the second isolation side; the upper surface of the molding compound A has a first coupling circuit and a first chip corresponding to the first isolation side, and the first coupling circuit, the first chip, and the first Pad are sequentially connected by bonding wires; the upper surface of the molding compound A also has a second coupling circuit and a second chip corresponding to the second isolation side, and the second coupling circuit, the second chip, and the second Pad are sequentially connected by bonding wires; the first coupling circuit, the first chip, the second coupling circuit, the second chip, and the bonding wires are encapsulated in the molding compound B; If the coupling circuit in the digital isolator is a two-layer structure, then the digital isolator manufactured by the manufacturing method of the side-emitting digital isolator according to any one of claims 2 to 4 includes: a molding compound A, a molding compound Aa, and a molding compound B stacked sequentially from bottom to top; the molding compound A has a first Pad corresponding to the first isolation side and a second Pad corresponding to the second isolation side; the upper surface of the molding compound A has a first layer structure of the first coupling circuit and the second coupling circuit, and a first extension Pad connected to the first Pad and a second extension Pad connected to the second Pad respectively; the first layer structure A first extension pad and a second extension pad are encapsulated within a molding compound Aa. The upper surface of molding compound Aa is provided with a second layer structure of a first coupling circuit and a first chip, and the second layer structure of the first coupling circuit, the first chip, and the first extension pad are sequentially connected via bonding wires. The upper surface of molding compound Aa is also provided with a second layer structure of a second coupling circuit and a second chip, and the second layer structure of the second coupling circuit, the second chip, and the second extension pad are sequentially connected via bonding wires. The second layer structure, the first chip, the second chip, and the bonding wires are encapsulated within molding compound B. If the coupling circuit in the digital isolator has an N-layer structure, where N is an integer greater than or equal to 3, then the digital isolator manufactured by the manufacturing method of the side-emitting digital isolator according to any one of claims 5 to 6 includes: a molding compound A, an N-1 layer molding compound Ab, and a molding compound B stacked sequentially from bottom to top; the molding compound A has a first Pad corresponding to the first isolation side and a second Pad corresponding to the second isolation side; the N-1 layer molding compound Ab encapsulates each layer of the first coupling circuit and the second coupling circuit except for the top layer structure, and also encapsulates each layer structure connected to the first isolation side. The package includes a first Pad and a second Pad. The top surface of the top layer of the encapsulation body Ab is provided with a top layer structure of a first coupling circuit and a first chip, and the top layer structure of the first coupling circuit, the first chip, and the Pad connected to the first Pad are sequentially connected by bonding wires. The top surface of the top layer of the encapsulation body Ab is also provided with a top layer structure of a second coupling circuit and a second chip, and the top layer structure of the second coupling circuit, the second chip, and the Pad connected to the second Pad are sequentially connected by bonding wires. The top layer structure, the first chip, the second chip, and the bonding wires are encapsulated within the encapsulation body B. The molding materials of molding bodies A, B, Aa, and Ab are the same or similar.

10. A digital isolator as described in claim 9, characterized in that, The coupling circuit is a capacitive coupling circuit, a radio frequency coupling circuit, or a coil magnetic coupling circuit including at least three turns of coil.

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