Method and device for determining process section of wafer defect

Abstract

The invention provides a wafer defect process section determination method and device, and belongs to the technical field of semiconductor manufacturing. The method comprises the steps that in the process of sequentially carrying out preset testing on each wafer in a first batch of wafer set, the preset testing result of each wafer is obtained in real time, a first detection result of the first batch of wafer set is obtained, the first detection result comprises the preset testing results of at least L wafers, and the first batch of wafer set comprises N wafers; when the first detection result shows that the m1 wafers all detect defects in the first position interval, determining a second position interval according to the first position interval; when the second detection result shows that the m2 wafers are detected to have defects in the second position interval, a target process section corresponding to the first batch wafer set is determined based on the second position interval, and the second detection result comprises preset test results of the wafers except at least L wafers in the N wafers. And the accuracy of determining the target process section causing the defect of the wafer is improved.

Description

Technical Field

[0001] This invention relates to the field of semiconductor manufacturing technology, and in particular to a method and apparatus for determining process segments with wafer defects. Background Technology

[0002] As the core carrier in semiconductor chip manufacturing, the defects on the surface and edges of wafers directly affect chip yield, electrical performance, and reliability. Therefore, defect detection of wafers is a crucial step in ensuring semiconductor manufacturing yield and product quality.

[0003] Currently, the presence of anomalies in the front-end process is typically determined based on the inspection results of individual wafers. However, a "OK" inspection result for a single wafer only indicates that its individual defects have not exceeded the threshold, and cannot cover the systemic risks caused by front-end equipment anomalies in the entire wafer lot. If such batch-wide anomalies are not identified in a timely manner, potential problems in the front-end process will continue to affect subsequent wafers, causing defects to accumulate and amplify in the production process, ultimately affecting product quality.

[0004] It is evident that the existing methods for determining wafer defects suffer from poor accuracy in certain process stages. Summary of the Invention

[0005] To address the aforementioned technical problems, this invention provides a method and apparatus for determining process segments with wafer defects, which can improve the accuracy of determining process segments with wafer defects.

[0006] To achieve the above objectives, the technical solution adopted in the embodiments of the present invention is as follows:

[0007] This invention provides a method for determining the process segment of a wafer defect, comprising:

[0008] During the process of performing preset tests on each wafer in the first batch of wafer sets, the preset test results of each wafer are acquired in real time to obtain the first detection result of the first batch of wafer sets. The first detection result includes the preset test results of at least L wafers. The first batch of wafer sets includes N wafers, where L is less than or equal to N.

[0009] When the first detection result indicates that defects are detected in all m1 wafers in the first position interval, a second position interval is determined based on the first position interval. The second position interval includes the first position interval, m1 is a first preset threshold, and m1 is less than or equal to L.

[0010] When the second detection result indicates that m2 wafers have defects detected in the second position interval, the target process segment corresponding to the first batch of wafers is determined based on the second position interval. The second detection result includes the preset test results of the wafers other than the at least L wafers among the N wafers, m2 is the second preset threshold, and m2 is less than NL.

[0011] In some embodiments, before determining the target process segment corresponding to the first batch of wafers based on the second location interval, the method further includes:

[0012] Establish a set of associations between preset process segments and preset position intervals. The preset process segment includes the target process segment, the preset position interval includes the second position interval, and the set of associations includes the association between the target process segment and the second position interval. The preset process segment is the process segment corresponding to the first batch of wafer assembly production process, and the preset position interval is the position interval defined on the wafer based on the contact position of the preset process segment on the wafer.

[0013] In some embodiments, the preset test includes surface defect detection and edge defect detection, and the preset test result includes the surface defect detection result corresponding to the surface defect detection and the edge defect detection result corresponding to the edge defect detection. The first detection result includes at least one of the surface defect detection result and the edge defect detection result.

[0014] In some embodiments, when the preset test is the surface defect detection, the first position interval is a coordinate position interval determined based on the coordinate information of the defect detected on the wafer surface.

[0015] When the preset test is edge defect detection, the first position interval is an angle position interval determined based on the angle information of the defect detected at the wafer edge.

[0016] This invention also provides a device for determining the process segment of wafer defects, comprising:

[0017] The acquisition module is used to acquire the preset test results of each wafer in real time during the process of performing preset tests on each wafer in the first batch of wafer sets, and obtain the first detection result of the first batch of wafer sets. The first detection result includes the preset test results of at least L wafers. The first batch of wafer sets includes N wafers, where L is less than or equal to N.

[0018] The first determining module is used to determine a second position interval based on the first position interval when the first detection result indicates that defects are detected in all m1 wafers in the first position interval. The second position interval includes the first position interval, m1 is a first preset threshold, and m1 is less than or equal to L.

[0019] The second determining module is used to determine the target process segment corresponding to the first batch of wafers based on the second position interval when the second detection result indicates that m2 wafers have detected defects in the second position interval. The second detection result includes the preset test results of the wafers other than the at least L wafers among the N wafers, m2 is a second preset threshold, and m2 is less than NL.

[0020] In some embodiments, the apparatus further includes:

[0021] A module is established to establish a set of associations between preset process segments and preset position intervals. The preset process segment includes the target process segment, the preset position interval includes the second position interval, and the set of associations includes the association between the target process segment and the second position interval. The preset process segment is the process segment corresponding to the first batch of wafer assembly production process, and the preset position interval is the position interval defined on the wafer based on the contact position of the preset process segment on the wafer.

[0022] In some embodiments, the preset test includes surface defect detection and edge defect detection, and the preset test result includes the surface defect detection result corresponding to the surface defect detection and the edge defect detection result corresponding to the edge defect detection. The first detection result includes at least one of the surface defect detection result and the edge defect detection result.

[0023] In some embodiments, when the preset test is the surface defect detection, the first position interval is a coordinate position interval determined based on the coordinate information of the defect detected on the wafer surface.

[0024] When the preset test is edge defect detection, the first position interval is an angle position interval determined based on the angle information of the defect detected at the wafer edge.

[0025] This invention also provides an electronic device, including: a processor, a memory, and a program stored in the memory and executable on the processor, wherein when the program is executed by the processor, it implements the steps of the wafer defect process segment determination method as described above.

[0026] This invention also provides a computer-readable storage medium storing a computer program, which, when executed by a processor, implements the steps of the wafer defect process segment determination method as described above.

[0027] The beneficial effects of this invention are:

[0028] In this embodiment, firstly, a first location interval of defect distribution is obtained by real-time inspection of a portion of the wafers in the first batch of wafer sets. Then, the monitoring range is dynamically expanded based on the first location interval to determine a second location interval, avoiding the omission of potential systemic anomalies due to the limitations of single-wafer inspection. Finally, by further setting a second preset threshold during subsequent inspections, if the number of wafers with defects in the second location interval reaches the second preset threshold during real-time inspection of the remaining wafers in the first batch of wafer sets, the target process segment corresponding to the first batch of wafer sets is determined based on the second location interval. In this way, based on the regular distribution of wafer defects in the first batch of wafer sets, the target process segment causing the defects can be quickly and accurately identified, improving the accuracy of determining the target process segment causing wafer defects, avoiding systemic risks caused by the inability of single-wafer inspection results to cover the entire wafer set, and improving wafer quality. Attached Figure Description

[0029] Figure 1 This is a schematic flowchart illustrating one of the methods for determining wafer defects in a process segment according to an embodiment of the present invention;

[0030] Figure 2 This diagram illustrates the detection logic of the data analysis software provided in this embodiment of the invention.

[0031] Figure 3 This is a schematic diagram illustrating the presence of defects on the surface of a wafer, as provided in an embodiment of the present invention.

[0032] Figure 4 This is a schematic diagram illustrating the presence of systematic surface defects in the first batch of wafer sets provided in this embodiment of the invention.

[0033] Figure 5 This is a schematic diagram illustrating the presence of defects at the edge of a wafer, as provided in an embodiment of the present invention.

[0034] Figure 6 This is a schematic diagram illustrating the presence of systematic edge defects in the first batch of wafer sets provided in this embodiment of the invention.

[0035] Figure 7 This is a second schematic flowchart illustrating a method for determining process segments of wafer defects according to an embodiment of the present invention.

[0036] Figure 8 This represents a simulation diagram of the test results output provided in the embodiments of the present invention;

[0037] Figure 9 This is a schematic diagram illustrating the structure of a wafer defect process segment determination device provided in an embodiment of the present invention;

[0038] Figure 10 This is a schematic diagram illustrating the structure of an electronic device provided in an embodiment of the present invention. Detailed Implementation

[0039] To make the objectives, technical solutions, and advantages of the embodiments of the present invention clearer, the technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some, not all, of the embodiments of the present invention. All other embodiments obtained by those skilled in the art based on the described embodiments of the present invention are within the scope of protection of the present invention.

[0040] A single wafer inspection result of "OK" only indicates that its individual defects have not exceeded the threshold, and cannot cover the systemic risks caused by front-end equipment malfunctions in the entire wafer lot. If such batch-wide anomalies are not identified in a timely manner, potential problems in the front-end process will continue to affect subsequent wafers. The existing solution for identifying wafer defects suffers from poor accuracy in the process stages.

[0041] This invention provides a method and apparatus for determining the process segment of wafer defects, which can improve the accuracy of determining the process segment of wafer defects.

[0042] This invention provides a method for determining the process segment of a wafer defect, such as... Figure 1 As shown, it includes:

[0043] Step 101: During the process of performing preset tests on each wafer in the first batch of wafer sets, the preset test results of each wafer are obtained in real time to obtain the first detection result of the first batch of wafer sets. The first detection result includes the preset test results of at least L wafers. The first batch of wafer sets includes N wafers, where L is less than or equal to N.

[0044] In this embodiment, the first batch of wafers can be any batch of wafers from multiple batches (Lots), i.e., a certain box of wafers. The first batch of wafers can include N wafers, where N is a positive integer. For example, it can be divided into batches of 15 wafers, so the first batch of wafers can include 15 wafers. Pre-set tests are performed sequentially on each wafer in the first batch of wafers, as described below:

[0045] In some embodiments, the preset test includes surface defect detection and edge defect detection, and the preset test result includes the surface defect detection result corresponding to the surface defect detection and the edge defect detection result corresponding to the edge defect detection. The first detection result includes at least one of the surface defect detection result and the edge defect detection result.

[0046] The preset test can be an EBFIS test, which includes surface defect detection and edge defect detection. Therefore, the first detection result can be either a surface defect detection result or an edge defect detection result. Preset tests are performed sequentially on the wafers in the first batch of wafer sets (taking N = 15 as an example), determining the preset test results for at least three wafers (taking L = 3 as an example, where L is an integer greater than or equal to 1 and less than or equal to N). These three preset test results can include the surface defect detection results and the edge defect detection results corresponding to each wafer. Thus, step 101 initially determines some detection information for the first batch of wafer sets, providing a data foundation for subsequent analysis. Then, the first detection result is further analyzed and processed in subsequent step 102. Simultaneously, preset tests are performed on the remaining wafers in the first batch of wafer sets (i.e., NL wafers) to obtain the second detection result. The second detection result is further analyzed and processed in subsequent step 103. The second detection result can also include at least one of the surface defect detection results and the edge defect detection results.

[0047] Step 102: When the first detection result indicates that defects are detected in all m1 wafers in the first position interval, a second position interval is determined based on the first position interval. The second position interval includes the first position interval, m1 is a first preset threshold, and m1 is less than or equal to L.

[0048] In this embodiment, at least L wafers have been pre-tested through step 101. Taking L = 3 as an example, these three wafers can be wafer A, wafer B, and wafer C. In one example, no defects are detected in wafers A, B, and C, so the pre-test is performed on the remaining wafers in the first batch of wafers. In another example, defects are detected in wafers A, B, and C, but the defect locations are not the same for each wafer, so the pre-test is performed on the remaining wafers in the first batch of wafers. In yet another example, defects are detected in wafers A, B, and C, and the defect locations are all located in the same location region (e.g., a first location interval). In this case, an early warning can be activated, and a second location interval is determined based on the first location interval. In this example, m1 equals 3. It should be noted that m1 is the first pre-set threshold, but it can also be other values, such as 2. For example, when L equals 4, m1 can be an integer greater than 1 and less than or equal to 4. The same technical effect can be achieved, and will not be elaborated further here.

[0049] When the first test result indicates that defects are detected in all m1 wafers (taking m1 equals 3 as an example), a second position interval is determined based on the first position interval. The second position interval can be a position interval defined on the wafer based on the contact position of different preset process segments on the wafer during wafer processing. In other words, different preset process segments correspond to different second position intervals on the wafer. The first position interval is a position interval determined based on the position of the defect actually detected during the preset test.

[0050] This can be achieved by analyzing and processing the detection results using data analysis software. The detection logic of the data analysis software can be as follows: Figure 2 As shown:

[0051] First, during the pre-set test, the pre-set test results are collected, including surface defect detection results and edge defect detection results:

[0052] In some embodiments, when the preset test is the surface defect detection, the first position interval is a coordinate position interval determined based on the coordinate information of the defect detected on the wafer surface.

[0053] In this example, when the preset test is wafer surface defect detection, once a defect is detected on the wafer surface, the system will use the coordinate information of the defect (such as X and Y axis coordinates) as the core reference. Figure 3As shown, a coordinate range can be extended or defined around the wafer, i.e., the first position range. This allows for precise delineation of the area where wafer surface defects occur, providing a concrete basis for subsequent judgment on whether there are systemic problems in the entire batch of wafers. For example, if the first batch of wafers has systemic surface defects, such as... Figure 4 As shown.

[0054] In some embodiments, when the preset test is the edge defect detection, the first position interval is an angular position interval determined based on the angle information of the defect detected at the wafer edge.

[0055] In this example, if the preset test is wafer edge defect detection, the angle information for detecting defects at the wafer edge can be determined based on the AC signal value. When a defect is detected at the wafer edge, such as... Figure 5 As shown, an angular position range, namely the first position range, can be defined based on the AC curve. This clearly defines the angular range where wafer edge defects are located, thus helping to determine whether equipment positioning, mechanical contact, or other factors cause multiple wafers to exhibit abnormal defects at the same edge angle when analyzing a batch of wafers. In cases where the first batch of wafers contains systematic edge defects, such as... Figure 6 As shown.

[0056] Then, the coordinate information of wafer defects in the surface defect detection results is analyzed, as well as the angle information (AC curve information) of wafer defects in the edge defect detection results are analyzed. In other words, the first detection result is analyzed using data analysis software. For example, if the surface defect detection result indicates that surface defects are detected in all m1 wafers in the first position interval, the data can be considered abnormal, and the second position interval can be determined based on the first position interval; and an early warning is initiated, starting to monitor subsequent surface defect detection results by setting a threshold (i.e., m2). For example, if the edge defect detection result indicates that edge defects are detected in all m1 wafers in the first position interval, the data can be considered abnormal, and the second position interval can be determined based on the first position interval; and an early warning is initiated, starting to monitor subsequent edge defect detection results by setting a threshold (i.e., m2). If the set threshold is exceeded, the machine system will mark the batch (Lot) corresponding to the first batch of wafer sets and output the corresponding mark (Code) and a photo of the defective wafer. Finally, the machine system determines which process caused the abnormality based on the collected angle or coordinate information corresponding to the contact point of the front-end process segment and marks it in the generated point abnormality map. See step 103 for details:

[0057] Step 103: When the second detection result indicates that m2 wafers have detected defects in the second position interval, the target process segment corresponding to the first batch of wafers is determined based on the second position interval. The second detection result includes the preset test results of the wafers other than the at least L wafers among the N wafers, m2 is the second preset threshold, and m2 is less than NL.

[0058] In this embodiment, based on the first detection results of at least L wafers obtained in step 101 and the determination of the second position interval based on the defects of m1 wafers in the first position interval in step 102, the remaining wafers (i.e., NL wafers) in the first batch of wafer sets are subjected to preset tests to obtain the second detection results. When the second detection results show that m2 wafers have defects detected in the second position interval, the machine system will determine the target process segment corresponding to the first batch of wafer sets according to the correspondence between the second position interval and the contact position of the preset process segment on the wafer. This step can also be implemented by data analysis software. If the number of wafers with defects in the second position interval reaches the second preset threshold (m2) in either the surface defect detection or the edge defect detection, the machine system can mark the batch and output the marking code and defective wafer photos. At the same time, combined with the collected coordinate or angle information corresponding to the contact point of the front-end process segment, the abnormal process segment is determined and marked in the point anomaly diagram, thereby achieving accurate positioning of the process segment causing wafer defects and providing a basis for process optimization.

[0059] In some embodiments, before determining the target process segment corresponding to the first batch of wafers based on the second location interval, the method further includes:

[0060] Establish a set of associations between preset process segments and preset position intervals. The preset process segment includes the target process segment, the preset position interval includes the second position interval, and the set of associations includes the association between the target process segment and the second position interval. The preset process segment is the process segment corresponding to the first batch of wafer assembly production process, and the preset position interval is the position interval defined on the wafer based on the contact position of the preset process segment on the wafer.

[0061] In this embodiment, the preset process segments cover all the process steps involved in wafer manufacturing. For example, the preset process segments may include polishing, forming, and crystal pulling. Each process segment contacts the wafer surface or edge through specific equipment (such as a robotic arm, transport track, or gripper), forming a characteristic contact position distribution. The target process segment can be one of these process steps. Based on the physical contact position of each process segment on the wafer, a predefined coordinate region or angle range is used to map each preset process segment to its corresponding contact position range, forming a set of association relationships. For example: process segment A corresponds to the edge angle range [A°~B°]; process segment B corresponds to the surface coordinate region [(x1,y1),(x2,y2)]; process segment C corresponds to the edge angle range [C°~D°], and process segment C corresponds to the surface coordinate region [(x3,y3),(x4,y4)]. By establishing a set of relationships, the correspondence between each preset process segment and a specific preset location interval is clarified, thereby providing a data foundation and logical basis for quickly and accurately back-tracing the target process segment that caused the defect based on the second location interval where the wafer defect is located.

[0062] For example, the association set obtained by mapping each preset process segment to its corresponding contact position interval can be stored in the machine system. When the machine system detects a concentrated defect in a second position interval, it can directly match the association set to locate the responsible process segment. For instance, if edge defects are concentrated in the [A°~B°] region, they can be immediately associated with process segment A; if surface defects are concentrated in the [(x1,y1),(x2,y2)] region, they can be immediately associated with process segment B; if edge defects are concentrated in the [C°~D°] region, and / or, the surface coordinate region [(x3,y3),(x4,y4)], it can be immediately associated with process segment C. This establishes an association between physical contact positions and preset process segments, enabling rapid location from defect location to the responsible process segment, improving the accuracy of identifying the target process segment causing wafer defects, and thus improving quality control efficiency in semiconductor manufacturing.

[0063] In this embodiment, firstly, a first location interval of defect distribution is obtained by real-time inspection of a portion of the wafers in the first batch of wafer sets. Then, the monitoring range is dynamically expanded based on the first location interval to determine a second location interval, avoiding the omission of potential systemic anomalies due to the limitations of single-wafer inspection. Finally, by further setting a second preset threshold during subsequent inspections, if the number of wafers with defects in the second location interval reaches the second preset threshold during real-time inspection of the remaining wafers in the first batch of wafer sets, the target process segment corresponding to the first batch of wafer sets is determined based on the second location interval. In this way, based on the regular distribution of wafer defects in the first batch of wafer sets, the target process segment causing the defects can be quickly and accurately identified, improving the accuracy of determining the target process segment causing wafer defects, avoiding systemic risks caused by the inability of single-wafer inspection results to cover the entire wafer set, and improving wafer quality.

[0064] In some alternative embodiments, such as Figure 7 As shown, the method for determining the process segment of wafer defects may include the following steps:

[0065] First, the testing begins. During the testing process, the equipment system collects test data for each wafer. This testing can be EBFIS testing, which is divided into surface inspection and edge inspection. Therefore, in surface inspection, the coordinate information of defects detected on each wafer is collected, and in edge inspection, the AC signal value of defects detected on each wafer is collected.

[0066] Next, the detection results are analyzed and processed using data analysis software. During testing, the software first collects the completed wafer data into a database for analysis. By analyzing the Surface detection results, it determines whether the coordinate information of the detected surface defects on the wafer is consistent; by analyzing the Edge detection results, it determines whether the angle information of the detected edge defects on the wafer is consistent. If the coordinate information of multiple surface defects (e.g., m1) in the Surface detection results is consistent (all within the same coordinate position range); or if the angle information of multiple edge defects (e.g., m1) in the Edge detection results is consistent (all within the same angle position range), then the machine system will activate an early warning and set a second position range. If it is within the same angle position range, i.e., the same angle AC signal value, the software sets a second position range centered around that same angle position. If it is within the same coordinate position range, the system sets a second position range centered around that same coordinate position.

[0067] Secondly, a monitoring function is set up. After the machine system sets the threshold, it starts monitoring whether there are defects in the second position interval of subsequent wafers. If multiple wafers (e.g., m2) still have defects in the second position interval, the machine system determines that the entire wafer lot has a contact point quality problem (NG), the entire wafer lot is marked as abnormal, and the test is stopped. Further, the system can generate a surface abnormal point map or an edge abnormal point map.

[0068] The system sets a new recipe, which includes two NG codes: Lot-Surface-abnormal and Lot-Edge-abnormal. If a defect is detected at the same coordinate on multiple wafer surfaces, the system determines Lot-Surface-abnormal based on the recipe. Figure 8 As shown.

[0069] If multiple wafers detect defects with AC signal values ​​at the same angle, the system determines Lot-Edge-abnormality based on the Recipe. The system collects the coordinates and angles of various points in the front-end process that can contact the wafer and sets threshold ranges. During testing, when multiple wafers in the same Lot have defects, the system compares the collected information with the coordinate information of the front-end process. If the test data is near a contact point in a certain process segment, it is judged as an anomaly in that process segment. Furthermore, the newly added function does not affect the original EBFIS test; testing of the newly added function is performed simultaneously during the testing process.

[0070] This improves the accuracy of identifying the target process segment that causes wafer defects, avoids systemic risks caused by the inability of a single wafer inspection result to cover the entire box of wafers, and improves wafer quality.

[0071] This invention also provides a device for determining the process segment of wafer defects, such as... Figure 9 As shown, it includes:

[0072] The acquisition module 91 is used to acquire the preset test results of each wafer in real time during the process of performing preset tests on each wafer in the first batch of wafer sets, and obtain the first detection result of the first batch of wafer sets. The first detection result includes the preset test results of at least L wafers. The first batch of wafer sets includes N wafers, where L is less than or equal to N.

[0073] The first determining module 92 is used to determine a second position interval based on the first position interval when the first detection result indicates that defects are detected in all m1 wafers in the first position interval. The second position interval includes the first position interval, m1 is a first preset threshold, and m1 is less than or equal to L.

[0074] The second determining module 93 is used to determine the target process segment corresponding to the first batch of wafers based on the second position interval when the second detection result indicates that m2 wafers have detected defects in the second position interval. The second detection result includes the preset test results of the wafers other than the at least L wafers among the N wafers, m2 is a second preset threshold, and m2 is less than NL.

[0075] In some embodiments, the apparatus further includes:

[0076] A module is established to establish a set of associations between preset process segments and preset position intervals. The preset process segment includes the target process segment, the preset position interval includes the second position interval, and the set of associations includes the association between the target process segment and the second position interval. The preset process segment is the process segment corresponding to the first batch of wafer assembly production process, and the preset position interval is the position interval defined on the wafer based on the contact position of the preset process segment on the wafer.

[0077] In some embodiments, the preset test includes surface defect detection and edge defect detection, and the preset test result includes the surface defect detection result corresponding to the surface defect detection and the edge defect detection result corresponding to the edge defect detection. The first detection result includes at least one of the surface defect detection result and the edge defect detection result.

[0078] In some embodiments, when the preset test is the surface defect detection, the first position interval is a coordinate position interval determined based on the coordinate information of the defect detected on the wafer surface.

[0079] In some embodiments, when the preset test is the edge defect detection, the first position interval is an angular position interval determined based on the angle information of the defect detected at the wafer edge.

[0080] The wafer defect process segment determination device can implement each process of the above-described method, with one-to-one correspondence of technical features and can achieve the same technical effect. To avoid repetition, it will not be described in detail here.

[0081] Please refer to Figure 10 The present invention also provides an electronic device 100, including a processor 1001, a memory 1002, and a computer program stored in the memory 1002 and executable on the processor 1001. When the computer program is executed by the processor 1001, it implements the various processes of the above-described method embodiment for determining the process segment of wafer defects and achieves the same technical effect. To avoid repetition, it will not be described again here.

[0082] This invention also provides a computer-readable storage medium storing a computer program. When the computer program is executed by a processor, it implements the various processes of the above-described method for determining the process segment of wafer defects and achieves the same technical effect. To avoid repetition, it will not be described again here.

[0083] The computer-readable storage medium, as defined herein, includes both permanent and non-permanent, removable and non-removable media, and information storage can be achieved by any method or technology. Information can be computer-readable instructions, data structures, program modules, or other data. Examples of computer storage media include, but are not limited to, phase-change memory (PRAM), static random access memory (SRAM), dynamic random access memory (DRAM), other types of random access memory (RAM), read-only memory (ROM), electrically erasable programmable read-only memory (EEPROM), flash memory or other memory technologies, CD-ROM, digital versatile optical disc (DVD) or other optical storage, magnetic tape, magnetic magnetic disk storage or other magnetic storage, or any other non-transfer medium that can be used to store information accessible to the terminal device under test. As defined herein, computer-readable storage media does not include transient media, such as modulated data signals and carrier waves.

[0084] This application also provides a computer program product, including computer instructions, which, when executed by a processor, implement the above-described... Figure 1 The various processes of the method embodiments shown can achieve the same technical effect, and will not be described again here to avoid repetition.

[0085] It should be noted that, in this document, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. Unless otherwise specified, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the process, method, article, or apparatus that includes that element.

[0086] Through the above description of the embodiments, those skilled in the art can clearly understand that the methods of the above embodiments can be implemented by means of software plus necessary general-purpose hardware platforms. Of course, they can also be implemented by hardware, but in many cases the former is a better implementation method. Based on this understanding, the technical solution of the present invention, in essence, or the part that contributes to the prior art, can be embodied in the form of a software product. This computer software product is stored in a storage medium (such as ROM / RAM, magnetic disk, optical disk), and includes several instructions to cause a terminal (which may be a mobile phone, computer, server, air conditioner, or network device, etc.) to execute the methods described in the various embodiments of the present invention.

[0087] In the various method embodiments of this disclosure, the sequence numbers of each step are not intended to limit the order of the steps. For those skilled in the art, any changes in the order of the steps are within the scope of protection of this disclosure without any creative effort.

[0088] It should be noted that the various embodiments in this specification are described in a progressive manner, and the same or similar parts between the various embodiments can be referred to mutually. Each embodiment focuses on describing the differences from other embodiments. In particular, since the embodiments are basically similar to the product embodiments, the descriptions are relatively simple, and the relevant parts can be referred to the descriptions of the product embodiments.

[0089] The above description represents the preferred embodiments of this disclosure. It should be noted that those skilled in the art can make various improvements and modifications without departing from the principles described herein, and these improvements and modifications should also be considered within the scope of protection of this disclosure.

Claims

1. A method for determining the process segment of a wafer defect, characterized in that, include: During the process of performing preset tests on each wafer in the first batch of wafer sets, the preset test results of each wafer are acquired in real time to obtain the first detection result of the first batch of wafer sets. The first detection result includes the preset test results of at least L wafers. The first batch of wafer sets includes N wafers, where L is less than or equal to N. When the first detection result indicates that defects are detected in all m1 wafers in the first position interval, a second position interval is determined based on the first position interval. The second position interval includes the first position interval, m1 is a first preset threshold, and m1 is less than or equal to L. When the second detection result indicates that m2 wafers have defects detected in the second position interval, the target process segment corresponding to the first batch of wafers is determined based on the second position interval. The second detection result includes the preset test results of the wafers other than the at least L wafers among the N wafers, m2 is the second preset threshold, and m2 is less than NL.

2. The method according to claim 1, characterized in that, Before determining the target process segment corresponding to the first batch of wafers based on the second location interval, the method further includes: Establish a set of associations between preset process segments and preset position intervals. The preset process segment includes the target process segment, the preset position interval includes the second position interval, and the set of associations includes the association between the target process segment and the second position interval. The preset process segment is the process segment corresponding to the first batch of wafer assembly production process, and the preset position interval is the position interval defined on the wafer based on the contact position of the preset process segment on the wafer.

3. The method according to any one of claims 1 and 2, characterized in that, The preset test includes surface defect detection and edge defect detection. The preset test result includes the surface defect detection result corresponding to the surface defect detection and the edge defect detection result corresponding to the edge defect detection. The first detection result includes at least one of the surface defect detection result and the edge defect detection result.

4. The method according to claim 3, characterized in that, When the preset test is the surface defect detection, the first position interval is a coordinate position interval determined based on the coordinate information of the defect detected on the wafer surface. When the preset test is edge defect detection, the first position interval is an angle position interval determined based on the angle information of the defect detected at the wafer edge.

5. A device for determining the process segment of a wafer defect, characterized in that, include: The acquisition module is used to acquire the preset test results of each wafer in real time during the process of performing preset tests on each wafer in the first batch of wafer sets, and obtain the first detection result of the first batch of wafer sets. The first detection result includes the preset test results of at least L wafers. The first batch of wafer sets includes N wafers, where L is less than or equal to N. The first determining module is used to determine a second position interval based on the first position interval when the first detection result indicates that defects are detected in all m1 wafers in the first position interval. The second position interval includes the first position interval, m1 is a first preset threshold, and m1 is less than or equal to L. The second determining module is used to determine the target process segment corresponding to the first batch of wafers based on the second position interval when the second detection result indicates that m2 wafers have detected defects in the second position interval. The second detection result includes the preset test results of the wafers other than the at least L wafers among the N wafers, m2 is a second preset threshold, and m2 is less than NL.

6. The apparatus according to claim 5, characterized in that, The device further includes: A module is established to establish a set of associations between preset process segments and preset position intervals. The preset process segment includes the target process segment, the preset position interval includes the second position interval, and the set of associations includes the association between the target process segment and the second position interval. The preset process segment is the process segment corresponding to the first batch of wafer assembly production process, and the preset position interval is the position interval defined on the wafer based on the contact position of the preset process segment on the wafer.

7. The apparatus according to any one of claims 5 and 6, characterized in that, The preset test includes surface defect detection and edge defect detection. The preset test result includes the surface defect detection result corresponding to the surface defect detection and the edge defect detection result corresponding to the edge defect detection. The first detection result includes at least one of the surface defect detection result and the edge defect detection result.

8. The apparatus according to claim 7, characterized in that, When the preset test is the surface defect detection, the first position interval is a coordinate position interval determined based on the coordinate information of the defect detected on the wafer surface. When the preset test is edge defect detection, the first position interval is an angle position interval determined based on the angle information of the defect detected at the wafer edge.

9. An electronic device, characterized in that, include: A processor, a memory, and a program stored in the memory and executable on the processor, wherein the program, when executed by the processor, implements the steps of the method for determining process segments of wafer defects as described in any one of claims 1 to 4.

10. A computer-readable storage medium, characterized in that, The computer-readable storage medium stores a computer program that, when executed by a processor, implements the steps of the method for determining wafer defects in process segments as described in any one of claims 1 to 4.

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