Unmanned aerial vehicle communication clock synchronization compensation device and method based on GPS / Beidou second pulse

Abstract

The invention belongs to the technical field of clock synchronization. The invention provides an unmanned aerial vehicle communication clock synchronization compensation device and method based on GPS / Beidou second pulse. According to the embodiment of the invention, a second pulse signal and a UTC timestamp are obtained; after several rounds of counting and sliding filtering are carried out on the second pulse signal interval time, the actual frequency and nominal value deviation of the crystal oscillator is calculated; the actual frequency and nominal value deviation of the crystal oscillator are stored, and the crystal oscillator drift model is updated; and dynamically adjusting the output clock frequency according to the nominal value deviation, and compensating the crystal oscillator error to obtain a compensated clock signal. And the second pulse loss duration is monitored, and the crystal oscillator drift model is updated according to the nominal value deviation in the storage module so as to predict the future clock deviation. And within the period of validity of the pulse per second, the clock synchronization error is reduced to improve the synchronization precision. And under the condition of GPS / Beidou, the synchronization precision can be maintained longer than that of a single GPS / Beidou method. And frequency offset automatic compensation along with temperature change can be realized.

Description

Technical Field

[0001] This disclosure relates to the field of clock synchronization technology, and in particular to a device and method for clock synchronization compensation in UAV communication based on GPS / BeiDou second pulses. Background Technology

[0002] Currently, in multi-UAV collaborative operations, the TDMA protocol is used for time slot allocation, and time synchronization between the ground station and UAVs, and among UAVs themselves, is achieved through GPS / BeiDou second pulses (1-second cycle). However, the following technical drawbacks exist: 1. Mismatch between synchronization period and communication period: The synchronization period (1 second) of GPS / BeiDou second pulse is much larger than the communication data interaction period of UAV (10-40ms), which causes the crystal oscillator cumulative error to be significantly amplified in the second half of the second pulse interval, resulting in a large clock deviation.

[0003] 2. Poor fault tolerance for satellite signal failure: When GPS / BeiDou signals are lost, the UAV clock relies solely on the freely oscillating crystal oscillator (typical error ±20ppm), and the synchronization error accumulates at a maximum rate of 10us / s, exceeding the TDMA protocol tolerance in a short time (usually requiring a protection time slot interval greater than 3ms).

[0004] 3. Limitations of existing compensation methods: Traditional phase-locked loops (PLLs) are only for single-second pulse trigger calibration, do not consider crystal oscillator temperature drift and long-term stability issues, and lack a predictive compensation mechanism after failure.

[0005] Therefore, it is necessary to improve one or more of the problems existing in the above-mentioned related technical solutions.

[0006] It should be noted that this section is intended to provide background or context for the technical solutions of this disclosure as set forth in the claims. The description herein does not constitute an admission that it is prior art simply because it is included in this section. Summary of the Invention

[0007] The purpose of this disclosure is to provide a device and method for synchronizing and compensating the communication clock of unmanned aerial vehicles (UAVs) based on GPS / BeiDou second pulses, thereby overcoming, to at least to some extent, one or more problems caused by the limitations and defects of related technologies.

[0008] According to a first aspect of the present disclosure, a UAV communication clock synchronization compensation device based on GPS / BeiDou second pulse is provided, the device comprising: Second pulse receiver module, used to output second pulse signal; The frequency difference calculation module is used to calculate the deviation between the actual frequency and the nominal value of the crystal oscillator after performing several rounds of counting and sliding filtering on the interval time of the second pulse signal. The storage module is used to save the actual frequency and nominal value deviation of the crystal oscillator; The digital phase-locked loop module is used to dynamically adjust the output clock frequency according to the nominal value deviation to compensate for crystal oscillator error and obtain a compensated clock signal. The frequency difference calculation module is electrically connected to the second pulse receiving module, the digital phase-locked loop module, and the storage module, respectively, and the digital phase-locked loop module and the storage module are electrically connected.

[0009] Furthermore, the device also includes: The failure prediction module is used to monitor the duration of second pulse loss and update the crystal oscillator drift model based on the nominal value deviation in the storage module in order to predict future clock deviations. The failure prediction module is electrically connected to the second pulse receiving module, the digital phase-locked loop module, and the storage module.

[0010] Furthermore, the frequency difference calculation module includes: The second pulse counting unit is used to count the interval time of the second pulse signal in several rounds using a crystal oscillator clock signal; The sliding filter unit is used to perform sliding filtering on the output of the second pulse counting unit using a sliding filtering algorithm. The frequency difference calculation unit is used to calculate the deviation between the actual frequency and the nominal value of the crystal oscillator based on the filtered data. The second pulse counting unit, the sliding filter unit, and the frequency difference calculation unit are electrically connected in sequence. The second pulse counting unit is electrically connected to the second pulse receiving module and the digital phase-locked loop module. The sliding filter unit is electrically connected to the failure prediction module. The frequency difference calculation unit is electrically connected to the storage module and the digital phase-locked loop module.

[0011] According to a second aspect of the present disclosure, a method for clock synchronization compensation in unmanned aerial vehicle (UAV) communication based on GPS / BeiDou second pulses is provided, comprising: Obtain the second pulse signal and UTC timestamp; After performing several rounds of counting and sliding filtering on the interval of the second pulse signal, the deviation between the actual frequency and the nominal value of the crystal oscillator is calculated; Store the actual frequency and nominal value deviation of the crystal oscillator, and update the crystal oscillator drift model in combination with the UTC timestamp; The output clock frequency is dynamically adjusted based on the nominal value deviation to compensate for the crystal oscillator error, so as to obtain a compensated clock signal.

[0012] Furthermore, the step of calculating the deviation between the actual frequency and the nominal value of the crystal oscillator after performing several rounds of counting and sliding filtering on the second pulse signal interval includes: The interval between second pulse signals is counted several times using a crystal oscillator clock signal, and the results are recorded. ; The output of the second pulse counting unit is filtered using a sliding filter algorithm to obtain the actual frequency of the crystal oscillator; Calculate the nominal value deviation based on the actual frequency of the crystal oscillator. Furthermore, the count value after sliding filtering is:

[0013] in, The count value is the smoothed count value, i.e., the actual frequency of the crystal oscillator. M is the size of the filtering window, and k is the index variable of the current time of the sliding window.

[0014] The nominal value deviation is:

[0015] in, =10*10 6 This represents the theoretical number of cycles per second for a 10MHz crystal oscillator. =1s.

[0016] Furthermore, the crystal oscillator drift model is as follows:

[0017] in, For time-accumulated drift, It is temperature dependent. For a fixed deviation, t is time and T is temperature.

[0018] Furthermore, the method also includes: Monitor the duration of lost second pulse signals ; like If the time is less than 10 seconds, the digital phase-locked loop module will be activated for predictive compensation. like If the time is ≥10s, the crystal oscillator drift model is activated. Based on the stored historical nominal value deviation and the crystal oscillator drift model, the cumulative error is dynamically integrated to predict the future clock deviation. The deviation is then offset by dynamically adjusting the DCO control word in the digital phase-locked loop module.

[0019] in, For cumulative error, This is a crystal oscillator drift model.

[0020] Furthermore, the method also includes: If the second pulse signal recovers, immediately start a new round of multi-round sampling, update the nominal value deviation, and reset the storage module; Based on the UTC timestamp, detect whether the time deviation of the synchronization message exceeds the threshold δmax=1ms: if it exceeds the limit, trigger the redundant path switching; if synchronization fails, enable the local crystal oscillator free oscillation mode and issue an alarm. The sliding filter window size M and the bandwidth parameters of the digital phase-locked loop module are dynamically adjusted based on future clock deviations.

[0021] The technical solutions provided by the embodiments of this disclosure may include the following beneficial effects: In the embodiments of this disclosure, the above-described UAV communication clock synchronization compensation device and method based on GPS / BeiDou second pulses acquires the second pulse signal and UTC timestamp; after several rounds of counting and sliding filtering of the second pulse signal interval, the deviation between the actual frequency and nominal value of the crystal oscillator is calculated; the actual frequency and nominal value deviation of the crystal oscillator are stored, and the crystal oscillator drift model is updated; the output clock frequency is dynamically adjusted according to the nominal value deviation to compensate for the crystal oscillator error, thereby obtaining a compensated clock signal. The duration of second pulse signal loss is monitored; if the loss duration is <10s, the digital phase-locked loop (PLL) module is activated for predictive compensation; if the loss duration is ≥10s, the crystal oscillator drift model is activated, and based on the stored historical nominal value deviation and the crystal oscillator drift model, the cumulative error is dynamically integrated to predict future clock deviations, and the deviation is offset by dynamically adjusting the DCO control word in the PLL module. Furthermore, within the validity period of the second pulse, the clock synchronization error is reduced, thereby improving synchronization accuracy. In the case of GPS / BeiDou, the synchronization accuracy is maintained for a longer period than when using the GPS / BeiDou method alone. It also enables automatic frequency offset compensation that varies with temperature. Attached Figure Description

[0022] The accompanying drawings, which are incorporated in and form part of this specification, illustrate embodiments consistent with this disclosure and, together with the description, serve to explain the principles of this disclosure. It is obvious that the drawings described below are merely some embodiments of this disclosure, and those skilled in the art can obtain other drawings based on these drawings without any inventive effort.

[0023] Figure 1 This diagram illustrates a GPS / BeiDou second pulse-based unmanned aerial vehicle (UAV) communication clock synchronization compensation device according to an exemplary embodiment of this disclosure. Figure 2 The diagram illustrates the steps of a UAV communication clock synchronization compensation method based on GPS / BeiDou second pulses in an exemplary embodiment of this disclosure. Figure 3 The diagram illustrates a specific flowchart of a UAV communication clock synchronization compensation method based on GPS / BeiDou second pulses in an exemplary embodiment of this disclosure. Detailed Implementation

[0024] Exemplary embodiments will now be described more fully with reference to the accompanying drawings. However, these exemplary embodiments can be implemented in many forms and should not be construed as limited to the examples set forth herein; rather, they are provided so that this disclosure will be more comprehensive and complete, and will fully convey the concept of the exemplary embodiments to those skilled in the art. The described features, structures, or characteristics may be combined in any suitable manner in one or more embodiments.

[0025] Furthermore, the accompanying drawings are merely illustrative diagrams of embodiments of this disclosure and are not necessarily drawn to scale. The same reference numerals in the drawings denote the same or similar parts, and therefore repeated descriptions of them will be omitted. Some block diagrams shown in the drawings are functional entities and do not necessarily correspond to physically or logically independent entities.

[0026] This example embodiment provides a UAV communication clock synchronization compensation device based on GPS / BeiDou second pulses. (Reference) Figure 1 As shown, the UAV communication clock synchronization compensation device based on GPS / BeiDou second pulses may include: Second pulse receiver module, used to output second pulse signal; The frequency difference calculation module is used to calculate the deviation between the actual frequency and the nominal value of the crystal oscillator after performing several rounds of counting and sliding filtering on the interval time of the second pulse signal. The storage module is used to save the actual frequency and nominal value deviation of the crystal oscillator; The digital phase-locked loop module is used to dynamically adjust the output clock frequency according to the nominal value deviation to compensate for crystal oscillator error and obtain a compensated clock signal. The frequency difference calculation module is electrically connected to the second pulse receiving module, the digital phase-locked loop module, and the storage module, respectively, and the digital phase-locked loop module and the storage module are electrically connected.

[0027] The aforementioned UAV communication clock synchronization compensation device based on GPS / BeiDou second pulses achieves the following: First, it acquires the second pulse signal and UTC timestamp; after several rounds of counting and sliding filtering of the second pulse signal interval, it calculates the deviation between the actual frequency and nominal value of the crystal oscillator; it stores the actual frequency and nominal value deviation of the crystal oscillator and updates the crystal oscillator drift model; it dynamically adjusts the output clock frequency according to the nominal value deviation to compensate for the crystal oscillator error, thus obtaining the compensated clock signal. It monitors the duration of second pulse signal loss; if the loss duration is <10s, it activates the digital phase-locked loop (PLL) module for predictive compensation; if the loss duration is ≥10s, it activates the crystal oscillator drift model, dynamically integrates and calculates the cumulative error based on the stored historical nominal value deviation and the crystal oscillator drift model, predicts future clock deviations, and offsets the deviation by dynamically adjusting the DCO control word in the PLL module. Second, within the validity period of the second pulse, the clock synchronization error decreases, thereby improving synchronization accuracy. In the case of GPS / BeiDou, it maintains synchronization accuracy for a longer period than using the GPS / BeiDou method alone. Furthermore, it can achieve automatic frequency offset compensation with temperature variations.

[0028] Below, we will refer to Figure 1 The steps of the above-described GPS / BeiDou second pulse-based UAV communication clock synchronization compensation device in this example embodiment will be described in more detail.

[0029] In one embodiment, the module composition of the UAV communication clock synchronization compensation device based on GPS / BeiDou second pulse is as follows: Figure 1 As shown: 1. Initialization of the second pulse receiving module The GPS / BeiDou dual-mode receiver starts up, captures satellite signals and outputs a 1PPS pulse and a UTC timestamp to establish an initial time reference and calibrate the local clock.

[0030] 2. Multi-round counting of second pulse signals The second pulse counting unit uses a 1-second window and a 10MHz crystal oscillator clock signal to count and record the interval of the second pulse signal in multiple rounds. This is used for subsequent filtering and frequency difference calculation.

[0031] 3. Sliding filter processing The filtering unit performs a moving average filter on the sampled data to eliminate short-term noise interference.

[0032]

[0033] in The count value is the result of smoothing and filtering, M=10 (filter window size).

[0034] 4. Calculation of crystal oscillator frequency difference (Δf) The frequency difference calculation unit calculates the deviation between the actual frequency and the nominal value based on the filtered data: Δf=

[0035] in =1s, =10*10 6 (Theoretical number of cycles per second for a 10MHz crystal oscillator) 5. Frequency difference data storage and model update The storage module periodically saves historical Δf data through storage chips. The crystal oscillator frequency deviation Δf(t) is mainly affected by the following factors: Accumulated time drift: long-term frequency shift due to crystal aging; Temperature dependence: the sensitivity of the crystal oscillator frequency to temperature changes; Fixed deviation: constant offset due to manufacturing errors or residual initial calibration. The failure prediction module uses the least squares method to fit a crystal oscillator drift model. Δf(t) =

[0036] Where: a∙t is the cumulative drift over time, b*T is the temperature dependence, and c is the fixed bias. t: time (unit: year); T: Temperature (unit: °C); a, b, c: coefficients to be determined.

[0037] 6. Dynamic adjustment of digital phase-locked loop (DPLL) The DPLL adjusts the DCO output frequency based on the current Δf to compensate for crystal oscillator errors.

[0038] Control logic: If the satellite signal is valid, a second-order phase-locked loop is used to suppress jitter; if the signal fails, it switches to a first-order phase-locked loop to quickly track the predicted value.

[0039] 7. Clock synchronization signal output The compensated clock signal is output to each communication module of the UAV to synchronize the TDMA time slot controller.

[0040] 8. Second pulse failure monitoring and timing The failure prediction module monitors the duration of 1PPS signal loss. Triggering a tiered compensation strategy: <10s: Short-term failure, enable DPLL prediction compensation; ≥10s: Long-term failure, activate crystal drift model.

[0041] 9. Predictive compensation during the failure period Based on the stored historical Δf data and drift model, the cumulative error δt is calculated by dynamic integration to predict future clock deviations, and the deviations are offset by dynamically adjusting the DCO control word.

[0042]

[0043] in: Cumulative error.

[0044] 10. Periodic calibration trigger If the satellite signal is restored, immediately start a new round of multi-round sampling, update the Δf data and reset the storage module, calibrate the interrupted current failure prediction process, and prioritize real-time performance.

[0045] 11. Anomaly Detection and Fault Tolerance Detect whether the time deviation of the synchronization message exceeds the threshold δ max =1ms: If the limit is exceeded, a redundant path switching will be triggered. If synchronization fails, the local crystal oscillator free oscillation mode will be enabled and an alarm will be issued.

[0046] 12. Performance feedback optimization Based on the synchronization error statistics, the sliding filter window size M and DPLL bandwidth parameters are dynamically adjusted to balance noise suppression and response speed, thereby optimizing long-term stability.

[0047] Furthermore, this example embodiment also provides a method for UAV communication clock synchronization compensation based on GPS / BeiDou second pulses. (Reference) Figure 2 As shown, the UAV communication clock synchronization compensation method based on GPS / BeiDou second pulses may include: Obtain the second pulse signal and UTC timestamp; After performing several rounds of counting and sliding filtering on the interval of the second pulse signal, the deviation between the actual frequency and the nominal value of the crystal oscillator is calculated; Store the actual frequency and nominal value deviation of the crystal oscillator, and update the crystal oscillator drift model in combination with the UTC timestamp; The output clock frequency is dynamically adjusted based on the nominal value deviation to compensate for the crystal oscillator error, so as to obtain a compensated clock signal.

[0048] In one specific embodiment, the module composition of the UAV communication clock synchronization compensation device based on GPS / BeiDou second pulse corresponding to the UAV communication clock synchronization compensation method includes: Dual-mode pulse-per-second receiver (i.e., pulse-per-second receiver module): supports GPS L1 / L5 and BeiDou B1 / B3 frequency bands, outputs 1PPS signal (accuracy ±50ns) and UTC timestamp; Frequency difference calculation FPGA: integrates a second pulse technology unit, a filtering unit (window M=10), and a failure prediction module, and supports dynamic adjustment of filtering parameters; Digital phase-locked loop (DPLL): A second-order DCO is implemented using a Xilinx Artix-7 FPGA with adjustable bandwidth (0.1Hz~1Hz). Temperature sensor: MAX31865 high-precision RTD module (±0.5℃), which monitors the ambient temperature in real time.

[0049] Crystal oscillator selection: 10MHz crystal oscillator (aging rate ±3ppm / year, temperature frequency difference ±20ppm / ℃); Storage module: AT24C02, implemented with I2C interface, for frequency offset and model data storage.

[0050] The clock synchronization compensation method for UAV communication based on GPS / BeiDou second pulses follows the workflow as follows: Figure 3 As shown: 1. Initialization and Signal Capture The ground station activates the GPS / BeiDou dual-mode receiver, outputting a 1PPS signal to calibrate the UAV's local clock, with an initial synchronization error ≤50ns.

[0051] The frequency difference calculation module counts the second pulse interval in multiple rounds using a 10MHz crystal oscillator (1 second per round, for 10 consecutive rounds). The sampled data is then filtered by sliding filter (M=10) to calculate Δf and suppress short-term noise.

[0052] 2. Dynamic Compensation and Failure Handling Signal validity period: The digital phase-locked loop (DPLL) adopts second-order control and dynamically adjusts the DCO output frequency according to Δf, suppressing the crystal oscillator error from ±20ppm to ±1ppm and the synchronization error ≤1μs / s.

[0053] Signal failure period: short-term failure ( =10s): Enable DPLL prediction compensation, fit a linear model based on historical Δf data (the storage module saves the most recent 10 sets of Δf), predict frequency offset and adjust DCO to control the deviation within ±10μs.

[0054] Long-term failure ( =15s): Switch to the crystal oscillator drift model, combine the temperature sensor data and aging coefficient, integrate to calculate the cumulative error δt, and dynamically cancel the cumulative error through the DCO control word.

[0055] 3. Recovery and Optimization Once the signal is recovered, a new round of multi-round sampling is immediately triggered to update Δf and reset the model parameters. The synchronization error converges to ≤100ns within 2 seconds.

[0056] The sliding filter window is automatically adjusted based on ambient temperature fluctuations (M dynamically expands from 10 to 20) to further suppress temperature drift noise and improve stability.

[0057] The aforementioned UAV communication clock synchronization compensation device and method based on GPS / BeiDou second pulses achieves the following: First, it acquires the second pulse signal and UTC timestamp; after several rounds of counting and sliding filtering of the second pulse signal interval, it calculates the deviation between the actual frequency and nominal value of the crystal oscillator; it stores the actual frequency and nominal value deviation of the crystal oscillator and updates the crystal oscillator drift model; it dynamically adjusts the output clock frequency according to the nominal value deviation to compensate for the crystal oscillator error, thus obtaining the compensated clock signal. It monitors the duration of second pulse signal loss; if the loss duration is <10s, it activates the digital phase-locked loop (PLL) module for predictive compensation; if the loss duration is ≥10s, it activates the crystal oscillator drift model, dynamically integrates and calculates the cumulative error based on the stored historical nominal value deviation and the crystal oscillator drift model, predicts future clock deviations, and offsets the deviation by dynamically adjusting the DCO control word in the PLL module. Second, within the validity period of the second pulse, the clock synchronization error decreases, thereby improving synchronization accuracy. In the case of GPS / BeiDou, it maintains synchronization accuracy for a longer period than using the GPS / BeiDou method alone. Furthermore, it can achieve automatic frequency offset compensation with temperature variations.

[0058] It should be understood that the terms "center", "longitudinal", "lateral", "length", "width", "thickness", "upper", "lower", "front", "rear", "left", "right", "vertical", "horizontal", "top", "bottom", "inner", "outer", "clockwise", "counterclockwise", etc., in the above description indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings. They are only for the convenience of describing the embodiments of this disclosure and simplifying the description, and are not intended to indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation. Therefore, they should not be construed as limitations on the embodiments of this disclosure.

[0059] Furthermore, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include one or more of that feature. In the description of embodiments of this disclosure, "a plurality of" means two or more, unless otherwise explicitly specified.

[0060] In the embodiments of this disclosure, unless otherwise expressly specified and limited, the terms "installation," "connection," "linking," "fixing," etc., should be interpreted broadly. For example, they can refer to a fixed connection, a detachable connection, or an integral part; they can refer to a mechanical connection or an electrical connection; they can refer to a direct connection or an indirect connection through an intermediate medium; they can refer to the internal communication of two components or the interaction between two components. Those skilled in the art can understand the specific meaning of the above terms in this disclosure according to the specific circumstances.

[0061] In embodiments of this disclosure, unless otherwise expressly specified and limited, "above" or "below" the second feature can include direct contact between the first and second features, or contact between the first and second features through another feature between them. Furthermore, "above," "over," and "on top" of the second feature includes the first feature being directly above or diagonally above the second feature, or simply indicates that the first feature is at a higher horizontal level than the second feature. "Below," "below," and "under" the second feature includes the first feature being directly below or diagonally below the second feature, or simply indicates that the first feature is at a lower horizontal level than the second feature.

[0062] In the description of this specification, the references to terms such as "one embodiment," "some embodiments," "example," "specific example," or "some examples," etc., indicate that a specific feature, structure, material, or characteristic described in connection with that embodiment or example is included in at least one embodiment or example of this disclosure. In this specification, the illustrative expressions of the above terms do not necessarily refer to the same embodiment or example. Furthermore, the specific features, structures, materials, or characteristics described may be combined in any suitable manner in one or more embodiments or examples. In addition, those skilled in the art can combine and integrate the different embodiments or examples described in this specification.

[0063] Other embodiments of this disclosure will readily occur to those skilled in the art upon consideration of the specification and practice of the invention disclosed herein. This application is intended to cover any variations, uses, or adaptations of this disclosure that follow the general principles of this disclosure and include common knowledge or customary techniques in the art not disclosed herein. The specification and examples are to be considered exemplary only, and the true scope and spirit of this disclosure are indicated by the appended claims.

Claims

1. A UAV communication clock synchronization compensation device based on GPS / BeiDou second pulse, characterized in that, The device includes: The second pulse receiving module is used to acquire the second pulse signal and UTC timestamp; The frequency difference calculation module is used to calculate the deviation between the actual frequency and the nominal value of the crystal oscillator after performing several rounds of counting and sliding filtering on the interval time of the second pulse signal. The storage module stores the actual frequency and nominal value deviation of the crystal oscillator, and updates the crystal oscillator drift model by combining the UTC timestamp; The digital phase-locked loop module is used to dynamically adjust the output clock frequency according to the nominal value deviation to compensate for crystal oscillator error and obtain a compensated clock signal. The frequency difference calculation module is electrically connected to the second pulse receiving module, the digital phase-locked loop module, and the storage module, respectively, and the digital phase-locked loop module and the storage module are electrically connected.

2. The UAV communication clock synchronization compensation device based on GPS / BeiDou second pulse according to claim 1, characterized in that, The device also includes: The failure prediction module is used to monitor the duration of second pulse loss and update the crystal oscillator drift model based on the nominal value deviation in the storage module in order to predict future clock deviations. The failure prediction module is electrically connected to the second pulse receiving module, the digital phase-locked loop module, and the storage module.

3. The UAV communication clock synchronization compensation device based on GPS / BeiDou second pulse according to claim 2, characterized in that, The frequency difference calculation module includes: The second pulse counting unit is used to count the interval time of the second pulse signal in several rounds using a crystal oscillator clock signal; The sliding filter unit is used to perform sliding filtering on the output of the second pulse counting unit using a sliding filtering algorithm. The frequency difference calculation unit is used to calculate the deviation between the actual frequency and the nominal value of the crystal oscillator based on the filtered data. The second pulse counting unit, the sliding filter unit, and the frequency difference calculation unit are electrically connected in sequence. The second pulse counting unit is electrically connected to the second pulse receiving module and the digital phase-locked loop module. The sliding filter unit is electrically connected to the failure prediction module. The frequency difference calculation unit is electrically connected to the storage module and the digital phase-locked loop module.

4. A method for clock synchronization compensation in UAV communication based on GPS / BeiDou second pulses, characterized in that, The method includes: Obtain the second pulse signal and UTC timestamp; After performing several rounds of counting and sliding filtering on the interval of the second pulse signal, the deviation between the actual frequency and the nominal value of the crystal oscillator is calculated; Store the actual frequency and nominal value deviation of the crystal oscillator, and update the crystal oscillator drift model in combination with the UTC timestamp; The output clock frequency is dynamically adjusted based on the nominal value deviation to compensate for the crystal oscillator error, so as to obtain a compensated clock signal.

5. The UAV communication clock synchronization compensation method based on GPS / BeiDou second pulse according to claim 4, characterized in that, The steps for calculating the deviation between the actual frequency and the nominal value of the crystal oscillator after performing several rounds of counting and sliding filtering on the interval of the second pulse signal include: The interval between second pulse signals is counted several times using a crystal oscillator clock signal, and the results are recorded. ; The output of the second pulse counting unit is filtered using a sliding filter algorithm to obtain the actual frequency of the crystal oscillator; The nominal value deviation is calculated based on the actual frequency of the crystal oscillator.

6. The UAV communication clock synchronization compensation method based on GPS / BeiDou second pulse according to claim 5, characterized in that, The count value after sliding filter is: in, The count value is the smoothed count value, i.e., the actual frequency of the crystal oscillator. M is the size of the filtering window, and k is the index variable of the current time of the sliding window. The nominal value deviation is: in, =10*10 6 This represents the theoretical number of cycles per second for a 10MHz crystal oscillator. =1s.

7. The UAV communication clock synchronization compensation method based on GPS / BeiDou second pulse according to claim 4, characterized in that, The crystal oscillator drift model is as follows: in, For time-accumulated drift, It is temperature dependent. For a fixed deviation, t represents time, calculated by the difference between the UTC timestamp and the crystal oscillator production date, and T represents temperature.

8. The UAV communication clock synchronization compensation method based on GPS / BeiDou second pulse according to claim 7, characterized in that, The method also includes: Monitor the duration of lost second pulse signals ; like If the time is less than 10 seconds, the digital phase-locked loop module will be activated for predictive compensation. like If the time is ≥10s, the crystal oscillator drift model is activated. Based on the stored historical nominal value deviation and the crystal oscillator drift model, the cumulative error is dynamically integrated to predict the future clock deviation. The deviation is then offset by dynamically adjusting the DCO control word in the digital phase-locked loop module. in, For cumulative error, This is a crystal oscillator drift model.

9. The UAV communication clock synchronization compensation method based on GPS / BeiDou second pulse according to claim 8, characterized in that, The method also includes: If the second pulse signal recovers, immediately start a new round of multi-round sampling, update the nominal value deviation, and reset the storage module; Based on the UTC timestamp, detect whether the time deviation of the synchronization message exceeds the threshold δmax=1ms: if it exceeds the limit, trigger the redundant path switching; if synchronization fails, enable the local crystal oscillator free oscillation mode and issue an alarm. The sliding filter window size M and the bandwidth parameters of the digital phase-locked loop module are dynamically adjusted based on future clock deviations.

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