Preparation method of hafnium oxide ferroelectric memory
By employing magnetron sputtering technology and oxygen flux control, combined with dielectric layer and annealing treatment, the problems of impurity introduction and process complexity in the fabrication of hafnium oxide-based ferroelectric memory have been solved, achieving efficient and reliable memory fabrication, improving performance and reducing costs.
Patent Information
- Application Number
- CN202511190134.9
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-08-25
- Publication Date
- 2025-11-11
AI Technical Summary
Existing hafnium oxide-based ferroelectric memory fabrication processes are complex, with impurity introduction and doping windows, making it difficult to meet the requirements for efficient and reliable memory fabrication.
Hafnium oxide ferroelectric memory was fabricated using magnetron sputtering technology combined with oxygen flux control. A ferroelectric layer was formed under a target containing hafnium, and a conductive material was deposited on its surface as the top electrode layer. The performance of the ferroelectric layer was optimized by combining a dielectric layer and annealing treatment.
This study achieved high-quality, low-cost preparation of hafnium oxide ferroelectric layers, improving memory performance and reliability, reducing production costs, and simplifying the process.
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Figure CN120936037A_ABST
Abstract
Description
Technical Field
[0001] This disclosure belongs to the field of microelectronics technology, and in particular, relates to a method for fabricating a hafnium ferroelectric memory. Background Technology
[0002] With the rapid development of information technology, the demand for data storage has exploded, placing more stringent requirements on memory performance, including higher storage capacity, smaller size, lower power consumption, and more competitive pricing. Traditional non-volatile memories, such as flash memory, despite their past success, are now facing inherent limitations. The continuous shrinking of device size has not only significantly increased manufacturing costs but also triggered a series of reliability issues, such as decreased data retention and increased read / write error rates. These problems severely restrict the ability of flash memory devices to continue improving performance in accordance with Moore's Law.
[0003] Therefore, finding and developing novel non-volatile memory technologies has become a top priority. Among numerous candidate technologies, hafnium oxide (HfO2)-based ferroelectric memories stand out due to their series of significant advantages. These memories not only possess high-speed read / write speeds and low power consumption, but their relatively simple structure also facilitates seamless integration with modern CMOS processes, greatly reducing manufacturing difficulty and costs. Furthermore, hafnium oxide-based ferroelectric memories also exhibit excellent data retention and read / write endurance, laying a solid foundation for them to secure a place in the post-Moore's Law era's market for novel non-volatile memories.
[0004] However, despite the enormous application potential of hafnium oxide-based ferroelectric memories, their fabrication process is relatively complex, with extremely stringent requirements on material composition, structure, and preparation conditions. Currently, the commonly used atomic layer deposition (ALD) technique for preparing doped HfO2 ferroelectric thin films has several limitations. First, there is a doping window for achieving good ferroelectricity in doped HfO2 films, increasing the complexity of the process. Second, the only typically controllable parameter during ALD film growth is the deposition temperature, and impurities such as hydrocarbons are easily introduced during the growth process.
[0005] Therefore, developing an efficient and reliable method for fabricating hafnium oxide-based ferroelectric memory is of great significance for promoting the practical application of this technology. Summary of the Invention
[0006] In view of this, in order to solve at least one technical problem in related technologies and other aspects, this disclosure proposes a method for fabricating a hafnium oxide ferroelectric memory. The method includes firstly depositing a conductive material on a substrate as a lower electrode layer; then forming a ferroelectric layer on the surface of the lower electrode layer by magnetron sputtering using a target containing hafnium in a protective atmosphere containing oxygen, wherein the oxygen flux is 0-10 sccm; and finally depositing a conductive material on the surface of the ferroelectric layer as an upper electrode layer to obtain the hafnium oxide ferroelectric memory.
[0007] According to embodiments of this disclosure, the target material containing hafnium includes any one of elemental hafnium target material, hafnium oxide target material, and a combination of elemental hafnium and hafnium oxide target material.
[0008] According to embodiments of this disclosure, when the target material containing hafnium is a hafnium elemental target, the sputtering power of the hafnium elemental target is 6-100W; when the target material containing hafnium is a hafnium oxide target, the sputtering power of the hafnium oxide target is 10-200W; when the target material containing hafnium is a combination of hafnium elemental and hafnium oxide target, the sputtering power of the hafnium elemental target is 6-100W and the sputtering power of the hafnium oxide target is 10-200W.
[0009] According to embodiments of this disclosure, the thickness of the ferroelectric layer is 3-150 nm.
[0010] According to embodiments of this disclosure, the materials of the lower electrode layer and the upper electrode layer are each independently selected from at least one of tungsten, iridium, rubidium, platinum, palladium, rubidium oxide, tantalum nitride, titanium nitride, and high-conductivity silicon.
[0011] According to embodiments of this disclosure, the aforementioned preparation method further includes: depositing a dielectric material on the surface of the lower electrode layer to form a first dielectric layer before forming the ferroelectric layer; and / or depositing a dielectric material on the surface of the ferroelectric layer away from the first dielectric layer after forming the ferroelectric layer to form a second dielectric layer.
[0012] According to embodiments of this disclosure, the dielectric constant of the dielectric material is 3.9 to 25.
[0013] According to embodiments of this disclosure, the dielectric material includes any one of silicon oxide, silicon nitride, and aluminum oxide.
[0014] According to embodiments of this disclosure, the thickness of the first dielectric layer and the second dielectric layer is 1-3 nm, and the thickness of the first dielectric layer is the same as the thickness of the second dielectric layer.
[0015] According to embodiments of this disclosure, the aforementioned preparation method further includes:
[0016] The hafnium oxide ferroelectric memory was annealed at 400-700℃ for 30s-1min to induce the crystalline phase of the ferroelectric layer to transform into a ferroelectric orthorhombic phase.
[0017] According to embodiments of this disclosure, a method for fabricating a hafnium oxide ferroelectric memory is proposed. This method ingeniously combines magnetron sputtering technology with precise control of oxygen flux to achieve the fabrication of a high-performance hafnium oxide ferroelectric layer. Atomic layer deposition (ALD) is commonly used in related technologies. Although it can precisely control the thickness and composition of the thin film, its equipment is complex and costly. In contrast, magnetron sputtering, as a mature thin film deposition technology, has advantages such as simple equipment, convenient operation, fast deposition rate, and low cost. This disclosure successfully fabricates a high-performance hafnium oxide ferroelectric layer by optimizing the oxygen flux during the magnetron sputtering process, thereby improving the quality of the ferroelectric layer and the performance of the memory while reducing production costs. Attached Figure Description
[0018] Figure 1 This is a schematic diagram of the structure of the hafnium oxide ferroelectric memory in Embodiment 1 of this disclosure;
[0019] Figure 2 This is a schematic diagram of the structure of the hafnium oxide ferroelectric memory in Embodiment 2 of this disclosure;
[0020] Figure 3 This is a schematic diagram of the structure of the hafnium oxide ferroelectric memory in Embodiment 3 of this disclosure;
[0021] Figure 4 This is a schematic diagram of the structure of the hafnium oxide ferroelectric memory in Embodiment 4 of this disclosure;
[0022] Figure 5 This is a graph showing the residual polarization of the hafnium oxide ferroelectric memory under different oxygen fluxes in Embodiment 1 of this disclosure;
[0023] Figure 6 This is a durability curve of the hafnium oxide ferroelectric memory under different oxygen fluxes in Embodiment 1 of this disclosure.
[0024] In the accompanying drawings of this disclosure, the reference numerals have the following meanings:
[0025] 11-Substrate; 1-Lower electrode layer; 2-Ferroelectric layer; 3-Upper electrode layer; 4-First dielectric layer; 5-Second dielectric layer. Detailed Implementation
[0026] To make the objectives, technical solutions, and advantages of this disclosure clearer, the following detailed description is provided in conjunction with specific embodiments and the accompanying drawings.
[0027] The endpoints and any values of the ranges disclosed in this disclosure are not limited to the precise ranges or values, and such ranges or values should be understood to include values close to such ranges or values. For numerical ranges, the endpoint values of the various ranges, the endpoint values of the various ranges and individual point values, and individual point values can be combined with each other to obtain one or more new numerical ranges, which should be regarded as specifically disclosed in this disclosure.
[0028] The terminology used herein is for the purpose of describing particular embodiments only and is not intended to limit this disclosure. The terms “comprising,” “including,” etc., as used herein indicate the presence of the stated features, steps, operations, and / or components, but do not exclude the presence or addition of one or more other features, steps, operations, or components.
[0029] All terms used herein (including technical and scientific terms) have the meanings commonly understood by those skilled in the art, unless otherwise defined. It should be noted that the terms used herein are to be interpreted in a manner consistent with the context of this specification, and not in an idealized or overly rigid way.
[0030] It should be noted that, unless otherwise defined, the technical or scientific terms used in this disclosure should have the ordinary meaning understood by a person with ordinary skill in the art to which this disclosure pertains. Where the terms "first," "second," etc., are used throughout, they are used only to distinguish similar objects and should not be construed as indicating or implying their relative importance, order of precedence, or implicitly specifying the number of technical features indicated. It should be understood that the data described by "first," "second," etc., can be interchanged where appropriate.
[0031] In the description of this disclosure, it should be understood that the terms "longitudinal", "length", "circumferential", "front", "rear", "left", "right", "top", "bottom", "inner", "outer", etc., indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings, and are only for the convenience of describing this disclosure and simplifying the description, and do not indicate or imply that the subsystem or element referred to must have a specific orientation, or be constructed and operated in a specific orientation, and therefore should not be construed as a limitation of this disclosure.
[0032] Throughout the accompanying drawings, identical elements are represented by the same or similar reference numerals. Conventional structures or configurations have been omitted where they may cause confusion in understanding this disclosure. Furthermore, the shapes, dimensions, and positional relationships of the components in the drawings do not reflect their actual size, scale, or actual positional relationships. Additionally, any reference symbols enclosed in parentheses should not be construed as limiting this disclosure.
[0033] Similarly, to simplify this disclosure and aid in understanding one or more of the various aspects of the disclosure, in the above description of exemplary embodiments of the present disclosure, various features of the present disclosure are sometimes grouped together in a single embodiment, figure, or description thereof. The use of terms such as "one embodiment," "some embodiments," "example," "specific example," or "some examples," etc., refers to a specific feature, structure, material, or characteristic described in connection with that embodiment or example, which is included in at least one embodiment or example of the present disclosure. In this specification, illustrative expressions of the above terms do not necessarily refer to the same embodiment or example. Furthermore, the specific features, structures, materials, or characteristics described may be combined in any suitable manner in one or more embodiments or examples.
[0034] Furthermore, the technical solutions of the various embodiments can be combined with each other, but only if they are based on the ability of a person skilled in the art to implement them. When the combination of technical solutions is contradictory or cannot be implemented, it should be considered that such combination of technical solutions does not exist and is not within the scope of protection claimed in this disclosure.
[0035] In the process of realizing this disclosure, it was discovered that magnetron sputtering does not introduce new impurities during deposition and allows control over various factors such as sputtering power, sputtering atmosphere, and deposition temperature. Furthermore, by depositing pure HfO2 thin films using magnetron sputtering, the performance of the ferroelectric thin film can be modulated by adjusting the oxygen flux during sputtering. This disclosure aims to provide an innovative method for fabricating hafnium oxide-based ferroelectric memories to meet the growing demand for information storage and to promote the continuous advancement of non-volatile memory technology.
[0036] This disclosure discloses a method for fabricating a hafnium oxide ferroelectric memory. The method includes first depositing a conductive material on a substrate 11 as a lower electrode layer 1; then forming a ferroelectric layer 2 on the surface of the lower electrode layer 1 by magnetron sputtering using a target containing hafnium in an oxygen-containing protective atmosphere, wherein the oxygen flux is 0-10 sccm; and finally depositing a conductive material on the surface of the ferroelectric layer 2 as an upper electrode layer 3 to obtain the hafnium oxide ferroelectric memory.
[0037] According to embodiments of this disclosure, a method for fabricating a hafnium oxide ferroelectric memory is proposed. This method ingeniously combines magnetron sputtering technology with precise control of oxygen flux to achieve the fabrication of a high-performance hafnium oxide ferroelectric layer. Atomic layer deposition (ALD) is commonly used in related technologies. Although it can precisely control the thickness and composition of the thin film, its equipment is complex and costly. In contrast, magnetron sputtering, as a mature thin film deposition technology, has advantages such as simple equipment, convenient operation, fast deposition rate, and low cost. This disclosure successfully fabricates a high-performance hafnium oxide ferroelectric layer by optimizing the oxygen flux during the magnetron sputtering process, thereby improving the quality of the ferroelectric layer and the performance of the memory while reducing production costs.
[0038] According to the embodiments of this disclosure, the method for preparing ferroelectric thin films using a target containing hafnium (referred to as HfOx target, where the range of x is not limited and only represents hafnium and its oxides) sputtering process is proposed in this disclosure. The pure HfO2 thin film prepared by this method has no doping window, and has the characteristics of short production cycle, low cost, and no introduction of other impurities during the growth process. The ferroelectric thin films prepared by the HfOx target sputtering process have excellent ferroelectric properties, low leakage current and high reliability.
[0039] According to embodiments of this disclosure, the construction of the lower electrode is fundamental to the ferroelectric memory. The quality and performance of the lower electrode layer 1 directly affect the subsequent growth of the ferroelectric layer 2 and the overall performance of the memory. Magnetron sputtering offers advantages such as high fabrication efficiency and good film quality. Simultaneously, by precisely controlling the oxygen flux (1-10 sccm), excellent ferroelectric properties of the ferroelectric layer 2 can be ensured. A metal layer is deposited on the surface of the ferroelectric layer 2 as the upper electrode layer 3, thereby completing the fabrication of the hafnium oxide ferroelectric memory. The upper electrode layer 3 not only forms a capacitor structure with the ferroelectric layer 2 but also directly affects the electrical performance and stability of the memory.
[0040] According to embodiments of this disclosure, during magnetron sputtering, the adjustment of oxygen flux directly affects the chemical reaction between sputtered metal atoms (such as hafnium) and oxygen molecules. An appropriate oxygen flux ensures sufficient reaction between metal atoms and oxygen, forming a stable and uniform hafnium oxide layer. If the oxygen flux is too low, the metal atoms may not be completely oxidized, forming a hafnium oxide layer containing metal impurities, affecting the quality and performance of the film. If the oxygen flux is too high, excessive oxidation may occur, forming an amorphous or loosely structured hafnium oxide layer, which is also detrimental to obtaining a high-quality ferroelectric layer 2. Oxygen flux can also affect the composition and deposition rate of the ferroelectric layer 2, thereby improving the uniformity and density of the hafnium oxide film. Uniform oxygen distribution promotes uniform deposition of metal atoms on the substrate, reducing localized overheating and uneven erosion. A dense and uniform film structure helps improve the stability and reliability of the ferroelectric layer 2, reducing defects and leakage current generation.
[0041] In some specific embodiments, the oxygen flux can be 0.2 sccm, 0.4 sccm, 0.6 sccm, 0.8 sccm, 1 sccm, 1.5 sccm, 2 sccm, 3 sccm, 4 sccm, 5 sccm, 6 sccm, 7 sccm, 8 sccm, 9 sccm, etc.
[0042] According to embodiments of this disclosure, the substrate 11 can be made of silicon (e.g., with a thickness of 500 μm), a combination of silicon and silicon oxide (e.g., with a silicon thickness of 500 μm and a silicon oxide thickness of 300 nm), germanium, potassium arsenide, polyimide, or other flexible substrates.
[0043] In some specific embodiments, the substrate 11 needs to be cleaned before forming the lower electrode layer 1. Specifically, the substrate 11 is soaked and cleaned in acetone and anhydrous ethanol in sequence; then it is soaked and rinsed in deionized water and dried.
[0044] In some specific embodiments, the sputtering process of the lower electrode layer 1 includes, but is not limited to, ion beam sputtering, DC sputtering, and reactive sputtering.
[0045] More specifically: The lower electrode layer 1 was deposited using an ion beam sputtering process with TiN as the deposition target, a beam voltage of 700~900V, a beam current of 40~60mA, an accelerating voltage of 150~170V, and an Ar / N2 mixed gas atmosphere with flow rates of (7~9 sccm) / (4~6 sccm).
[0046] According to embodiments of this disclosure, the target material containing hafnium includes any one of elemental hafnium target material, hafnium oxide target material, and a combination of elemental hafnium and hafnium oxide target material.
[0047] According to embodiments of this disclosure, when the target material containing hafnium is a hafnium elemental target, the sputtering power of the hafnium elemental target is 6-100W; when the target material containing hafnium is a hafnium oxide target, the sputtering power of the hafnium oxide target is 10-200W; when the target material containing hafnium is a combination of hafnium elemental and hafnium oxide target, the sputtering power of the hafnium elemental target is 6-100W and the sputtering power of the hafnium oxide target is 10-200W.
[0048] According to embodiments of this disclosure, adjustments within this process parameter range can yield better ferroelectric thin film quality, which is beneficial for the generation of ferroelectricity.
[0049] In some specific embodiments, HfOx targets with a purity of over 99% are selected. The targets are mounted on a magnetron sputtering coating equipment, and an AC power supply is used to set the sputtering power, wherein the sputtering power of HfOx can be between 10W and 200W; the range of Ar gas flow can be between 10 and 50 sccm, the range of O2 flow can be between 0 and 10 sccm, and the range of N2 flow can be between 0 and 10 sccm.
[0050] In some specific embodiments, HfOx + Hf elemental targets are selected, with a purity of over 99%. The targets are mounted on a magnetron sputtering coating equipment, and an AC power supply is used to set the sputtering power. The sputtering power of HfOx can be between 10W and 200W, and the sputtering power of Hf elemental can be between 6W and 100W. The range of Ar gas flow can be between 10 and 50 sccm, O2 can be between 0 and 10 sccm, and N2 can be between 0 and 10 sccm.
[0051] In some specific embodiments, Hf elemental target material is selected, with a purity of over 99%. The target material is mounted on a magnetron sputtering coating equipment, and an AC power supply is used to set the sputtering power, wherein the sputtering power of Hf elemental can be between 6W and 100W; the setting range for Ar gas can be between 10 and 50 sccm, the setting range for O2 can be between 0 and 10 sccm, and the setting range for N2 can be between 0 and 10 sccm.
[0052] According to embodiments of this disclosure, the thickness of the ferroelectric layer 2 is 3-150 nm.
[0053] In some specific embodiments, the ferroelectric layer 2 needs to be patterned before depositing the upper electrode layer 3 to define the area of the upper electrode layer 3. Specifically, photoresist is coated on the surface of the ferroelectric layer 2 and exposed and developed. More specifically, a negative resist is coated on the ferroelectric layer 2, pre-baked at 150°C for 2 min, exposed and then post-baked at 120°C for 2 min, immersed in developer for 45 s, and then rinsed with deionized water and dried.
[0054] In some specific embodiments, the sputtering process of the upper electrode layer 3 includes, but is not limited to, ion beam sputtering, DC sputtering, and reactive sputtering.
[0055] More specifically: the upper electrode layer 3 was deposited by ion beam sputtering with TiN as the deposition target, the beam voltage was 700~900V, the beam current was 40~60mA, the accelerating voltage was 150~170V, the deposition gas atmosphere was an Ar / N2 mixed gas, and the flow rates were (7~9 sccm) / (4~6 sccm).
[0056] In some specific embodiments, the upper electrode layer 3 and the lower electrode layer 1 have the same thickness, for example, 40 nm.
[0057] According to embodiments of this disclosure, the conductive materials of the lower electrode layer 1 and the upper electrode layer 3 are each independently selected from at least one of tungsten, iridium, rubidium, platinum, palladium, rubidium oxide, tantalum nitride, titanium nitride, and highly conductive silicon.
[0058] According to embodiments of this disclosure, the aforementioned preparation method further includes: depositing a dielectric material on the surface of the lower electrode layer 1 before forming the ferroelectric layer 2 to form a first dielectric layer 4; and / or depositing a dielectric material on the surface of the ferroelectric layer 2 away from the first dielectric layer 4 after forming the ferroelectric layer 2 to form a second dielectric layer 5.
[0059] According to embodiments of this disclosure, the introduction of the first dielectric layer 4 and the second dielectric layer 5 effectively isolates the direct electrical contact between the lower electrode layer 1, the ferroelectric layer 2, and the upper electrode layer 3, reducing leakage current and improving the electrical stability and reliability of the memory. This is crucial for improving the data retention capability and reducing power consumption of the memory. The presence of the dielectric layer can optimize the electric field distribution inside the memory, making the electric field act more uniformly on the ferroelectric layer 2, thereby improving the ferroelectric domain switching efficiency and the read / write speed of the memory. In addition, the dielectric layer can also serve as an electric field buffer layer, protecting the ferroelectric layer 2 from external electric field interference and extending the lifespan of the memory.
[0060] According to embodiments of this disclosure, the dielectric constant of the dielectric material is 3.9 to 25.
[0061] According to embodiments of this disclosure, materials with dielectric constants within this range typically exhibit better electrical properties, such as lower dielectric loss and leakage current, which are crucial for improving the electrical stability and reliability of the memory. An appropriate dielectric constant helps optimize the electric field distribution within the memory, improving the ferroelectric domain switching efficiency and the memory's read / write speed.
[0062] According to embodiments of this disclosure, the dielectric material includes any one of silicon oxide, silicon nitride, and aluminum oxide.
[0063] In some specific embodiments, the material of the first dielectric layer 4 and the material of the second dielectric layer 5 may be the same or different.
[0064] According to embodiments of this disclosure, the thickness of the first dielectric layer 4 and the second dielectric layer 5 is 1-3 nm, and the thickness of the first dielectric layer 4 is the same as the thickness of the second dielectric layer 5.
[0065] In some specific embodiments, the deposition method of the first dielectric layer 4 and the second dielectric layer 5 can be at least one of chemical vapor deposition (CVD), physical vapor deposition (CVD), and atomic layer deposition (ALD).
[0066] According to embodiments of this disclosure, the aforementioned preparation method further includes annealing the hafnium oxide ferroelectric memory at 400-700°C for 30s-1min to induce the crystal phase of the ferroelectric layer 2 to transform into a ferroelectric orthorhombic phase.
[0067] According to embodiments of this disclosure, annealing can effectively promote the phase transformation in the ferroelectric layer 2, transforming it from a non-ferroelectric or metastable ferroelectric phase to a stable ferroelectric orthorhombic phase. This transformation is crucial for improving the ferroelectric performance and storage density of the memory. The ferroelectric orthorhombic phase has higher remanent polarization and coercive electric field, which helps to improve the memory window and read / write stability. Simultaneously, the stable ferroelectric phase can also reduce leakage current and improve the data retention capability of the memory.
[0068] In some specific embodiments, the annealing temperature range (400~700°C) used in the fabrication method proposed in this disclosure is compatible with existing CMOS process steps. This means that the method can be easily integrated into the semiconductor manufacturing process without changing existing production lines. By precisely controlling the annealing temperature and time, the performance and structure of the ferroelectric layer 2 can be further optimized. This helps to reduce production costs and energy consumption while meeting performance requirements.
[0069] Example 1
[0070] Figure 1 This is a schematic diagram of the structure of the hafnium oxide ferroelectric memory in Embodiment 1 of this disclosure. In Embodiment 1, the hafnium oxide ferroelectric memory is prepared as follows... Figure 1 The hafnium oxide ferroelectric memory shown.
[0071] A silicon or silicon / silicon oxide substrate 11 is provided, wherein the silicon thickness is 500 μm and the silicon oxide thickness is 300 nm. The substrate 11 is then sequentially immersed in acetone and anhydrous ethanol for 3 min, then immersed in deionized water for 3 min, and dried to complete the cleaning of the substrate 11.
[0072] On a cleaned silicon or silicon / silicon oxide substrate 11, a TiN lower electrode layer 1 is prepared by ion beam sputtering. The sputtering target is a TiN target, the beam voltage is 800V, the beam current is 46mA, the accelerating voltage is 160V, the gas is an Ar / N2 mixed gas, and the flow rates are 8sccm / 5sccm. The thickness of the TiN lower electrode layer 1 is 40nm.
[0073] Then, a HfO2-based ferroelectric layer 2 was prepared on the TiN lower electrode layer 1 using magnetron sputtering. An HfOx target with a purity of over 99% was selected. The target was mounted on a magnetron sputtering coating device, and an AC power supply was used to set the sputtering power. The sputtering power of HfOx was 90W; the Ar flow rate was set to 20 sccm, and the O2 flow rate was set to 0–10 sccm, specifically 0 sccm, 0.2 sccm, 0.4 sccm, and 0.6 sccm. The thickness of the ferroelectric layer 2 was 10 nm.
[0074] The negative adhesive 1500 was coated on the ferroelectric layer 2, pre-baked at 150°C for 2 min, exposed and then post-baked at 120°C for 2 min, developed by immersing in developer for 45 s, rinsed with deionized water and dried.
[0075] Then, TiN top electrode layer 3 was prepared on the ferroelectric layer 2 by ion beam sputtering. The sputtering target was a TiN target, the beam voltage was 800V, the beam current was 46 mA, the accelerating voltage was 160V, the gas was an Ar / N2 mixed gas, and the flow rates were 8 sccm / 5 sccm, respectively. The thickness of TiN top electrode layer 3 was 40 nm.
[0076] The HfO2-based ferroelectric device with substrate 11, lower electrode layer 1, ferroelectric layer 2, and upper electrode layer 3 obtained through the above operation is immersed in acetone solution until the photoresist and excess metal are removed; then it is immersed in anhydrous ethanol to remove acetone; and then rinsed with deionized water and dried.
[0077] The HfO2-based ferroelectric device, after being rinsed and dried, was annealed in a N2 atmosphere at 500°C for 30 seconds to obtain the HfO2-based ferroelectric memory.
[0078] Example 2
[0079] Figure 2 This is a schematic diagram of the hafnium oxide ferroelectric memory in Embodiment 2 of this disclosure. In Embodiment 2, the hafnium oxide ferroelectric memory is prepared as follows... Figure 2 The hafnium oxide ferroelectric memory shown.
[0080] In this Example 2, the preparation method is the same as or similar to that in Example 1. The difference is that a first dielectric layer is inserted between the lower electrode layer 1 and the ferroelectric layer 2. Specifically, the material of the first dielectric layer is alumina. The Al2O3 first dielectric layer is prepared using the ALD process, with both the Al precursor and deionized water maintained at room temperature (20°C), using N2 as the carrier gas at a flow rate of 100 sccm. More specifically, the Al precursor is trimethylaluminum (TMA), deionized water is used as the oxygen source, the reaction chamber pressure is less than 2 mbar, and the deposition temperature is 200°C to obtain the first dielectric layer.
[0081] Example 3
[0082] Figure 3 This is a schematic diagram of the hafnium oxide ferroelectric memory in Embodiment 3 of this disclosure. In Embodiment 3, the hafnium oxide ferroelectric memory is prepared as follows... Figure 3 The hafnium oxide ferroelectric memory shown.
[0083] In this embodiment 3, the preparation method is the same as or similar to that in embodiment 1. The difference from embodiment 1 is that a second dielectric layer is inserted between the upper electrode layer 3 and the ferroelectric layer 2. Specifically, the material and preparation method of the second dielectric layer are the same as or similar to the material and preparation method of the first dielectric layer in embodiment 2.
[0084] Example 4
[0085] Figure 4 This is a schematic diagram of the structure of the hafnium oxide ferroelectric memory in Embodiment 4 of this disclosure. In Embodiment 4, the hafnium oxide ferroelectric memory is prepared as follows... Figure 4 The hafnium oxide ferroelectric memory shown.
[0086] In this embodiment 4, the preparation method is the same as or similar to that in embodiment 1. The difference from embodiment 1 is that a first dielectric layer is inserted between the lower electrode layer 1 and the ferroelectric layer 2, and a second dielectric layer is inserted between the upper electrode layer 3 and the ferroelectric layer 2. Specifically, the materials and preparation methods of the first and second dielectric layers are the same as or similar to those of the first dielectric layer in embodiment 2.
[0087] Test case
[0088] The ferroelectric memory devices (oxygen flux of 0 sccm, 0.2 sccm, 0.4 sccm, and 0.6 sccm) prepared in Example 1 were tested by applying voltage excitation. The specific steps are as follows:
[0089] A DC voltage is applied to the lower electrode layer 1 in voltage scanning mode, with the voltage value increasing from 0V to 3V and the current limited to 1μA. The upper electrode TiN is grounded.
[0090] Figure 5 This is a residual polarization curve of hafnium oxide ferroelectric memory under different oxygen fluxes in Embodiment 1 of this disclosure.
[0091] like Figure 5 As shown, the polarization hysteresis curve of the ferroelectric memory prepared in Example 1 was measured using PUND mode, with an applied pulse amplitude of 3V and a pulse width of 200μs. The different colored curves in the figure represent ferroelectric memories prepared under different oxygen fluxes. From 0 sccm (i.e., an oxygen-free environment) to 0.6 sccm, the increase in oxygen flux appears to have a significant effect on the remanent polarization. This indicates that oxygen flux is an important preparation parameter that can regulate the polarization characteristics of hafnium oxide ferroelectric materials.
[0092] The ferroelectric memory devices prepared in Example 1 (oxygen flux of 0 sccm, 0.2 sccm, and 0.4 sccm) were subjected to durability cycle tests.
[0093] Figure 6 This is a durability curve of the hafnium oxide ferroelectric memory under different oxygen fluxes in Embodiment 1 of this disclosure.
[0094] like Figure 6 As shown in the figure, the durability (expressed as the number of cycles) of the hafnium oxide ferroelectric memory (HOM) under three different oxygen fluxes of 0 sccm, 0.2 sccm, and 0.4 sccm is displayed. It can be seen that the durability of the HOM gradually increases with increasing oxygen flux. Furthermore, multiple cycles verified that by optimizing the oxygen flux parameters, a HOM with higher durability can be obtained.
[0095] The specific embodiments described above further illustrate the purpose, technical solutions, and beneficial effects of this disclosure. It should be understood that the above descriptions are merely specific embodiments of this disclosure and are not intended to limit this disclosure. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of this disclosure should be included within the protection scope of this disclosure.
Claims
1. A method for preparing a hafnium oxide ferroelectric memory, characterized in that, The preparation method includes: A conductive material is deposited on the substrate as the lower electrode layer; In a protective atmosphere containing oxygen, a ferroelectric layer is formed on the surface of the lower electrode layer by magnetron sputtering using a target material containing hafnium, wherein the oxygen flux is 0-10 sccm. A conductive material is deposited on the surface of the ferroelectric layer as an upper electrode layer to obtain a hafnium oxide ferroelectric memory.
2. The preparation method according to claim 1, wherein, The hafnium-containing target material includes any one of elemental hafnium target material, hafnium oxide target material, or a combination of elemental hafnium and hafnium oxide target material.
3. The preparation method according to claim 2, wherein, When the target material containing hafnium is a hafnium elemental target material, the sputtering power of the hafnium elemental target material is 6-100W; When the target containing hafnium is a hafnium oxide target, the sputtering power of the hafnium oxide target is 10-200W; When the target material containing hafnium is a combination of elemental hafnium and hafnium oxide, the sputtering power of the elemental hafnium target is 6-100W, and the sputtering power of the hafnium oxide target is 10-200W.
4. The preparation method according to claim 1, wherein, The thickness of the ferroelectric layer is 3-150 nm.
5. The preparation method according to claim 1, wherein, The materials of the lower electrode layer and the upper electrode layer are each independently selected from at least one of tungsten, iridium, rubidium, platinum, palladium, rubidium oxide, tantalum nitride, titanium nitride, and high-conductivity silicon.
6. The preparation method according to claim 1, further comprising: Prior to the operation of forming the ferroelectric layer, a dielectric material is deposited on the surface of the lower electrode layer to form a first dielectric layer; And / or after the operation of forming the ferroelectric layer, a dielectric material is deposited on the surface of the ferroelectric layer away from the first dielectric layer to form a second dielectric layer.
7. The preparation method according to claim 6, wherein, The dielectric constant of the dielectric material is 3.9~25.
8. The preparation method according to claim 6, wherein, The dielectric material includes any one of silicon oxide, silicon nitride, and aluminum oxide.
9. The preparation method according to claim 6, wherein, The thickness of the first dielectric layer and the second dielectric layer is 1-3 nm, and the thickness of the first dielectric layer is the same as that of the second dielectric layer.
10. The preparation method according to claim 1, further comprising: The hafnium oxide ferroelectric memory is annealed at 400-700°C for 30s-1min to induce the crystal phase of the ferroelectric layer to transform into a ferroelectric orthorhombic phase.