Semiconductor module

Abstract

The semiconductor module includes a conductive substrate, a plurality of first semiconductor elements, and a plurality of second semiconductor elements. The conductive substrate includes a first conductive portion electrically bonded to the plurality of first semiconductor elements, and a second conductive portion electrically bonded to the plurality of second semiconductor elements. The semiconductor module further includes a first input terminal, a second input terminal, and a third input terminal provided in the vicinity of the first conductive portion. The second input terminal and the third input terminal are spaced apart from each other across the first input terminal. The first input terminal is electrically connected to the first conductive portion. The polarity of the first input terminal is set to be opposite to the polarity of each of the second input terminal and the third input terminal.

Description

[0001] This application is a divisional application; its parent application number is "2021800555338", the application date is September 13, 2021, and the invention title is "Semiconductor Module". Technical Field

[0002] This disclosure relates to semiconductor modules. Background Technology

[0003] Conventionally, semiconductor modules incorporating power switching elements such as MOSFETs (Metal Oxide Semiconductor Field Effect Transistors) and IGBTs (Insulated Gate Bipolar Transistors) are known. These semiconductor modules are used in all electronic devices, from industrial equipment to home appliances, information terminals, and automotive equipment. Patent Document 1 discloses a conventional semiconductor module (power module). The semiconductor module described in Patent Document 1 includes a semiconductor element and a support substrate (ceramic substrate). The semiconductor element is, for example, an IGBT made of silicon (Si). The support substrate supports the semiconductor element. The support substrate includes an insulating substrate and conductive layers stacked on both sides of the substrate. The substrate is, for example, made of ceramic. Each conductive layer is, for example, made of copper (Cu), and the semiconductor element is bonded to one of the conductive layers.

[0004] Existing technical documents

[0005] Patent documents

[0006] Patent Document 1: Japanese Patent Application Publication No. 2015-220382 Summary of the Invention

[0007] The problem that the invention aims to solve

[0008] In recent years, there has been a demand for energy-efficient, high-performance, and miniaturized electronic devices. Therefore, there is a need for improved performance and miniaturization of semiconductor modules used in electronic devices.

[0009] In view of the above, one object of this disclosure is to provide a semiconductor module having a preferred module structure in terms of reducing parasitic inductance.

[0010] Solution for solving the problem

[0011] The semiconductor module disclosed herein includes: a conductive substrate having a main surface facing one side in the thickness direction and a back surface facing the opposite side to the main surface; a semiconductor element electrically connected to the main surface and having a switching function; a conducting member constituting a path for main circuit current switched by the semiconductor element; a first input terminal, a second input terminal, and a third input terminal disposed relative to the conductive substrate on one side in a first direction perpendicular to the thickness direction; and an output terminal disposed relative to the conductive substrate on the other side in the first direction. The conductive substrate includes a first conductive portion and a second conductive portion, and the semiconductor element includes a plurality of first semiconductor elements electrically connected to the first conductive portion and a plurality of second semiconductor elements electrically connected to the second conductive portion. The second input terminal and the third input terminal are disposed on one side and the other side in a second direction perpendicular to both the thickness direction and the first direction, separated by the first input terminal. The first input terminal is one of the positive and negative poles and is electrically connected to the first conductive part. The second and third input terminals are the other of the positive and negative poles.

[0012] Invention Effects

[0013] Based on the structure of this disclosure, a preferred module configuration in semiconductor modules can be provided in terms of reducing parasitic inductance. Attached Figure Description

[0014] Figure 1 This is a perspective view of the semiconductor module according to the first embodiment.

[0015] Figure 2 Is Figure 1 The sealing resin, resin part, and resin filling part are omitted from the three-dimensional drawing.

[0016] Figure 3 Is Figure 2 The diagram of the conductive component is omitted from the 3D representation.

[0017] Figure 4 This is a top view showing the semiconductor module of the first embodiment.

[0018] Figure 5 Is Figure 4 The top view shows the sealing resin, resin part, and resin filling part with imaginary lines.

[0019] Figure 6 It's enlarged. Figure 5 A partial enlarged view, omitting the imaginary lines of the sealing resin, resin part, and resin filling part.

[0020] Figure 7 It's enlarged. Figure 6 A magnified view of a portion of the image.

[0021] Figure 8 Is Figure 5 A diagram showing a portion of the conductive component in a top view using imaginary lines.

[0022] Figure 9 This is a front view showing the semiconductor module of the first embodiment.

[0023] Figure 10 This is a bottom view showing the semiconductor module of the first embodiment.

[0024] Figure 11 This is a left-side view of the semiconductor module according to the first embodiment.

[0025] Figure 12 This is a right-side view showing the semiconductor module of the first embodiment.

[0026] Figure 13 It is along Figure 5 A cross-sectional view of line XIII-XIII.

[0027] Figure 14 It is along Figure 5 A cross-sectional view of line XIV-XIV.

[0028] Figure 15 It's enlarged. Figure 14 A magnified view of a portion of the image.

[0029] Figure 16 It is along Figure 5 A cross-sectional view of the XVI-XVI line.

[0030] Figure 17 It is along Figure 5 A cross-sectional view of the XVII-XVII line.

[0031] Figure 18 It is along Figure 5 A cross-sectional view of the XVIII-XVIII line.

[0032] Figure 19 It is along Figure 5 A cross-sectional view of the XIX-XIX line.

[0033] Figure 20 This is an example of the circuit configuration of the semiconductor module in the first embodiment.

[0034] Figure 21 This is a top view showing one step of the manufacturing method of the semiconductor module according to the first embodiment.

[0035] Figure 22This is a cross-sectional schematic diagram showing one step of the manufacturing method of the semiconductor module according to the first embodiment.

[0036] Figure 23 This is a top view showing one step of the manufacturing method of the semiconductor module according to the first embodiment.

[0037] Figure 24 This is a cross-sectional end view showing one step of the manufacturing method of the first embodiment, and... Figure 13 The cross-section shown corresponds to the one depicted.

[0038] Figure 25 This is an enlarged cross-sectional view of a major part of a process in the manufacturing method of a semiconductor module according to the first embodiment, and is enlarged compared to... Figure 13 The diagram corresponds to a portion of the cross-section shown.

[0039] Figure 26 This is an enlarged cross-sectional view of a major part of a process in the manufacturing method of a semiconductor module according to the first embodiment, and is enlarged compared to... Figure 14 The diagram corresponds to a portion of the cross-section shown.

[0040] Figure 27 This is an enlarged cross-sectional view of a major part of a process in the manufacturing method of a semiconductor module according to the first embodiment, and is enlarged compared to... Figure 14 The diagram corresponds to a portion of the cross-section shown.

[0041] Figure 28 This is an enlarged cross-sectional view of a major part of a process in the manufacturing method of a semiconductor module according to the first embodiment, and is enlarged compared to... Figure 13 The diagram corresponds to a portion of the cross-section shown.

[0042] Figure 29 This is an enlarged cross-sectional view of a major part of a process in the manufacturing method of a semiconductor module according to the first embodiment, and is enlarged compared to... Figure 14 The diagram corresponds to a portion of the cross-section shown.

[0043] Figure 30 The semiconductor module in the second embodiment is related to... Figure 5 Same top view.

[0044] Figure 31 It's enlarged. Figure 30 A partial enlarged view, omitting the imaginary lines of the sealing resin, resin part, and resin filling part.

[0045] Figure 32 It's enlarged. Figure 31 A magnified view of a portion of the image.

[0046] Figure 33The semiconductor module in the third embodiment is related to... Figure 5 Same top view.

[0047] Figure 34 It is along Figure 33 A sectional view of the XXXIV-XXXIV line. Detailed Implementation

[0048] Preferred embodiments of the semiconductor module of this disclosure will now be described with reference to the accompanying drawings. In the following description, the same or similar components will be labeled with the same symbols, and repeated descriptions will be omitted.

[0049] Figures 1 to 20 The semiconductor module A1 represents the first embodiment. The semiconductor module A1 includes a plurality of semiconductor elements 10, a conductive substrate 2, a support substrate 3, a plurality of input terminals 41 to 43, a plurality of output terminals 44, a plurality of control terminals 45, a control terminal support 5, a conductive member 6, a first conductive bonding material 71, a second conductive bonding material 72, a plurality of metal wires 731 to 735, a sealing resin 8, a resin portion 87, and a resin filling portion 88.

[0050] Figure 1 This is a 3D diagram representing semiconductor module A1. Figure 2 Is Figure 1 The sealing resin 8, resin part 87, and resin filling part 88 are omitted from the three-dimensional view. Figure 3 Is Figure 2 The diagram of the conductive component 6 is omitted from the 3D view. Figure 4 This is a top view of semiconductor module A1. Figure 5 Is Figure 4 The top view shows the sealing resin 8, the resin part 87, and the resin filling part 88 with imaginary lines. Figure 6 It's enlarged. Figure 5 A magnified view of a portion of the image. Figure 6 The imaginary lines for sealing resin 8, resin part 87, and resin filling part 88 are omitted in the text. Figure 7 It's enlarged. Figure 6 A magnified view of a portion of the image. Figure 8 Is Figure 5 The top view shows a portion of the conductive component 6 (the second conductive component 62, described later) with imaginary lines. Figure 9 This is the front view of semiconductor module A1. Figure 10 This is a bottom view of semiconductor module A1. Figure 11 This is a left-side view of semiconductor module A1. Figure 12 This is a right-side view of semiconductor module A1. Figure 13 It is along Figure 5A cross-sectional view of line XIII-XIII. Figure 14 It is along Figure 5 A cross-sectional view of line XIV-XIV. Figure 15 It's enlarged. Figure 14 A magnified view of a portion of the image. Figure 16 It is along Figure 5 A cross-sectional view of the XVI-XVI line. Figure 17 It is along Figure 5 A cross-sectional view of the XVII-XVII line. Figure 18 It is along Figure 5 A cross-sectional view of the XVIII-XVIII line. Figure 19 It is along Figure 5 A cross-sectional view of the XIX-XIX line. Furthermore, in Figure 2 , Figure 3 , Figure 7 , Figure 14 , Figure 18 In the text, several metal wires 731 to 735 are omitted. Figure 20 This is an example of the circuit configuration of semiconductor module A1. Figure 20 In the circuit diagram, only one of each of the plurality of first semiconductor elements 10A (described later) and the plurality of second semiconductor elements 10B (described later) is recorded, and the other first semiconductor elements 10A and the other second semiconductor elements 10B are omitted.

[0051] For clarity, refer to three mutually orthogonal directions: the x-direction, y-direction, and z-direction. The z-direction is the thickness direction of semiconductor module A1. The x-direction is a top view of semiconductor module A1 (refer to...). Figure 4 The left and right directions are shown in the diagram. The y-direction is the top view of semiconductor module A1 (see reference). Figure 4 The vertical direction is defined as follows: One side of the x-direction is designated x1, and the other side is designated x2. Similarly, one side of the y-direction is designated y1, and the other side is designated y2; one side of the z-direction is designated z1, and the other side is designated z2. In the following description, "view from above" refers to observation in the z-direction. Additionally, there are cases where z1 is referred to as "down" and z2 as "up." The z-direction is an example of the "thickness direction," the x-direction is an example of the "first direction," and the y-direction is an example of the "second direction." Furthermore, in the following description, directions that are opposite to each other in one direction are referred to as "one side" and "the other side," but this disclosure is not limited to this. Specifically, the x2 direction is referred to as "one side of the first direction," and the x1 direction as "the other side of the first direction." Similarly, the y2 direction is referred to as "one side of the second direction," and the y1 direction as "the other side of the second direction." In addition, the z2 direction is referred to as "one side of the thickness direction" and the z1 direction is referred to as "the other side of the thickness direction".

[0052] Multiple semiconductor elements 10 serve as the functional hubs of the semiconductor module A1. The constituent material of each semiconductor element 10 is, for example, a semiconductor material primarily composed of SiC (silicon carbide). This semiconductor material is not limited to SiC; it can also be Si (silicon), GaAs (gallium arsenide), or GaN (gallium nitride), etc. Each semiconductor element 10, for example, has a switching function Q1 (see reference MOSFET) composed of a MOSFET (Metal-Oxide-Semiconductor Field-Effect Transistor). Figure 20 The switching function Q1 is not limited to a MOSFET; it can also be other transistors, such as a field-effect transistor including a MISFET (Metal-Insulator-Semiconductor FET) or a bipolar transistor like an IGBT. All semiconductor elements 10 are the same element. Each semiconductor element 10 is, for example, an n-channel MOSFET, but it can also be a p-channel MOSFET.

[0053] like Figure 15 As shown, each semiconductor element 10 has a main surface 101 and a back surface 102. In each semiconductor element 10, the main surface 101 and the back surface 102 are spaced apart in the z-direction. The main surface 101 faces the z2 direction, and the back surface 102 faces the z1 direction.

[0054] The plurality of semiconductor elements 10 includes a plurality of first semiconductor elements 10A and a plurality of second semiconductor elements 10B. In this embodiment, semiconductor module A1 has three first semiconductor elements 10A and three second semiconductor elements 10B. The number of first semiconductor elements 10A and the number of second semiconductor elements 10B are not limited to this structure and can be appropriately changed according to the performance requirements of semiconductor module A1. Figure 8 In this example, three of each of the first semiconductor element 10A and the second semiconductor element 10B are configured. The number of first semiconductor elements 10A and second semiconductor elements 10B can be one, two, or more than four each. The number of first semiconductor elements 10A and the number of second semiconductor elements 10B can be the same or different. The number of first semiconductor elements 10A and second semiconductor elements 10B is determined by the current processing capacity of semiconductor module A1.

[0055] like Figure 20As shown, semiconductor module A1 is configured, for example, as a half-bridge switching circuit. In this case, a plurality of first semiconductor elements 10A constitute the upper arm circuit of semiconductor module A1, and a plurality of second semiconductor elements 10B constitute the lower arm circuit. In the upper arm circuit, the plurality of first semiconductor elements 10A are connected in parallel with each other, and in the lower arm circuit, the plurality of second semiconductor elements 10B are connected in parallel with each other. Each first semiconductor element 10A and each second semiconductor element 10B are connected in series to form a bridging layer.

[0056] like Figure 8 as well as Figure 16 As shown, multiple first semiconductor elements 10A are respectively mounted on the conductive substrate 2. Figure 8 In the example shown, a plurality of first semiconductor elements 10A are arranged, for example, in the y-direction and spaced apart from each other. Each first semiconductor element 10A is electrically bonded to the conductive substrate 2 (the first conductive portion 2A described later) via a second conductive bonding material 72. When each first semiconductor element 10A is bonded to the first conductive portion 2A, the back surface 102 of the element is opposite to the first conductive portion 2A.

[0057] like Figure 8 as well as Figure 17 As shown, multiple second semiconductor elements 10B are respectively mounted on the conductive substrate 2. Figure 8 In the example shown, a plurality of second semiconductor elements 10B are arranged, for example, in the y-direction, spaced apart from each other. Each second semiconductor element 10B is electrically bonded to the conductive substrate 2 (the second conductive portion 2B described later) via a second conductive bonding material 72. When each second semiconductor element 10B is bonded to the second conductive portion 2B, the back surface 102 of the element faces the second conductive portion 2B. Figure 8 As understood, when viewed in the x-direction, the plurality of first semiconductor elements 10A overlap with the plurality of second semiconductor elements 10B, but they may not overlap.

[0058] Multiple semiconductor elements 10 (multiple first semiconductor elements 10A and multiple second semiconductor elements 10B) each have a first main surface electrode 11, a second main surface electrode 12, and a back electrode 15. The structures of the first main surface electrode 11, the second main surface electrode 12, and the back electrode 15, as described below, are common in each semiconductor element 10. The first main surface electrode 11 and the second main surface electrode 12 are disposed on the main surface 101 of the element. The first main surface electrode 11 and the second main surface electrode 12 are insulated by an insulating film (not shown). The back electrode 15 is disposed on the back surface 102 of the element.

[0059] The first main surface electrode 11 is, for example, a gate electrode, into which a drive signal (e.g., gate voltage) is input to drive the semiconductor element 10. In each semiconductor element 10, the second main surface electrode 12 is, for example, a source electrode, through which source current flows. The back electrode 15 is, for example, a drain electrode, through which drain current flows. The back electrode 15 covers substantially the entire area of ​​the back surface 102 of the element. The back electrode 15 is, for example, made of Ag plating.

[0060] If a drive signal (gate voltage) is input to the first main surface electrode 11 (gate electrode) via the aforementioned switching function Q1, each semiconductor element 10 switches between an on state and an off state according to the drive signal. The action of switching between these on and off states is called a switching operation. In the on state, current flows from the back electrode 15 (drain electrode) to the second main surface electrode 12 (source electrode); in the off state, no current flows. That is, each semiconductor element 10 performs a switching operation via the switching function Q1. The semiconductor module A1, through the switching function Q1 of the multiple semiconductor elements 10, converts, for example, a first power supply voltage (DC voltage) input between one input terminal 41 and two input terminals 42 and 43 into a second power supply voltage (AC voltage), and outputs the second power supply voltage from the output terminal 44. Input terminals 41-43 and output terminal 44 are both power supply terminals for processing power supply voltages. Input terminals 41-43 are the first power supply terminals for inputting the first power supply voltage. Output terminal 44 is the second power supply terminal for outputting the second power supply voltage.

[0061] Several of the multiple semiconductor elements 10 (in) Figure 8 The example shown has two units (Q1 and D1), which, in addition to the aforementioned switching function unit Q1, also have a diode function unit D1 (see reference). Figure 20 In semiconductor module A1, one of a plurality of first semiconductor elements 10A (configured in...) Figure 8 The first semiconductor element 10A (located on the side closest to the y2 direction) and one of the plurality of second semiconductor elements 10B (configured in Figure 8 The second semiconductor element 10B, located on the side closest to the y1 direction, includes a switching function unit Q1 and a diode function unit D1. The function and role of the diode function unit D1 are not particularly limited; for example, a temperature sensing diode can be used. Furthermore, Figure 20 The diode D2 shown is, for example, a parasitic diode component of the switching function unit Q1.

[0062] like Figure 8As shown, the semiconductor device 10 with diode function section D1, in addition to having a first main surface electrode 11, a second main surface electrode 12, and a back electrode 15, also has a third main surface electrode 13, a fourth main surface electrode 14, and a fifth main surface electrode 16. The structures of the third main surface electrode 13, the fourth main surface electrode 14, and the fifth main surface electrode 16, as described below, are common in all semiconductor devices 10 with diode function section D1. The third main surface electrode 13, the fourth main surface electrode 14, and the fifth main surface electrode 16 are formed on the main surface 101 of the device. In the semiconductor device 10 with diode function section D1, the third main surface electrode 13 and the fourth main surface electrode 14 are connected to the diode function section D1. The fifth main surface electrode 16 is, for example, a source sensing electrode, representing the source current in the current switching function section Q1.

[0063] like Figure 7 As shown, each of the first semiconductor elements 10A has a first side 191, a second side 192, a third side 193, and a fourth side 194 when viewed from above. Figure 7 The diagram shows a first semiconductor element 10A arranged in the y-direction, with the one positioned at the center. The other first semiconductor elements 10A also have a first side 191, a second side 192, a third side 193, and a fourth side 194. The first side 191 and the second side 192 extend in the y-direction. The first side 191 is the edge on the x2 direction side when viewed from above, and the second side 192 is the edge on the x1 direction side when viewed from above. The third side 193 and the fourth side 194 extend in the x-direction. The third side 193 is the edge on the y2 direction side when viewed from above, and the fourth side 194 is the edge on the y1 direction side when viewed from above. Each first semiconductor element 10A is rectangular in shape when viewed from above, therefore the four corners formed by the first side 191, the second side 192, the third side 193, and the fourth side 194 are approximately right angles when viewed from above. Figure 7 As shown, the four corners do not overlap with the conductive components 6 (the first conductive component 61 and the second conductive component 62 described later) when viewed from above. The lengths of the third side 193 and the fourth side 194 are greater than the lengths of the first side 191 and the second side 192.

[0064] The conductive substrate 2 is also called a lead frame. The conductive substrate 2 supports multiple semiconductor elements 10. The conductive substrate 2 is bonded to the support substrate 3 via a first conductive bonding material 71. The conductive substrate 2 is, for example, rectangular in shape when viewed from above. The conductive substrate 2, together with the conducting member 6, forms the path of the main circuit current switched by the multiple semiconductor elements 10.

[0065] The conductive substrate 2 includes a first conductive portion 2A and a second conductive portion 2B. Both the first conductive portion 2A and the second conductive portion 2B are plate-shaped components made of metal. This metal is, for example, Cu (copper) or a Cu alloy. The first conductive portion 2A and the second conductive portion 2B, together with a plurality of input terminals 41-43 and a plurality of output terminals 44, constitute a conduction path to a plurality of semiconductor elements 10. Figures 13-18 As shown, the first conductive portion 2A and the second conductive portion 2B are respectively bonded to the support substrate 3 via a first conductive bonding material 71. In the first conductive portion 2A, a plurality of first semiconductor elements 10A are respectively bonded via a second conductive bonding material 72. In the second conductive portion 2B, a plurality of second semiconductor elements 10B are respectively bonded via a second conductive bonding material 72. Figure 3 , Figure 8 , Figure 13 as well as Figure 14 As shown, the first conductive portion 2A and the second conductive portion 2B are spaced apart in the x-direction. In the example shown in the figure above, the first conductive portion 2A is located further x2 than the second conductive portion 2B. The first conductive portion 2A and the second conductive portion 2B are rectangular in shape, for example, when viewed from above. The first conductive portion 2A and the second conductive portion 2B overlap when viewed in the x-direction. The dimensions of the first conductive portion 2A and the second conductive portion 2B are, for example, 15mm to 25mm (preferably about 20mm) in the x-direction, 30mm to 40mm (preferably about 35mm) in the y-direction, and 1.5mm to 3.0mm (preferably about 2.0mm) in the z-direction.

[0066] The conductive substrate 2 has a main surface 201 and a back surface 202. For example... Figure 13 , Figure 14 as well as Figures 16-18 As shown, the main surface 201 and the back surface 202 are spaced apart in the z-direction. The main surface 201 faces the z2 direction, and the back surface 202 faces the z1 direction. The main surface 201 is a surface formed by joining the upper surfaces of the first conductive portion 2A and the second conductive portion 2B together. The back surface 202 is a surface formed by joining the lower surfaces of the first conductive portion 2A and the second conductive portion 2B together. The back surface 202 is bonded to the support substrate 3 in a manner that it faces the support substrate 3. Figure 5 , Figure 8 as well as Figure 13As shown, a plurality of recesses 201a are formed on the main surface 201. Each recess 201a is a portion recessed from the main surface 201 along the z-direction. The degree of recess (depth) of each recess 201a is, for example, greater than 0 μm and less than 100 μm. Each recess 201a is formed, for example, during the molding process described later. The plurality of recesses 201a include recesses formed on the main surface 201 in the first conductive portion 2A and recesses formed on the main surface 201 in the second conductive portion 2B. Two recesses 201a formed on the main surface 201 of the first conductive portion 2A are spaced apart in the y-direction and overlap when viewed in the y-direction. Two recesses 201a formed on the main surface 201 of the second conductive portion 2B are spaced apart in the y-direction and overlap when viewed in the y-direction.

[0067] The conductive substrate 2 (each of the first conductive portion 2A and the second conductive portion 2B) includes a substrate 21, a main surface bonding layer 22, and a back surface bonding layer 23 stacked on top of each other. The substrate 21 is a plate-shaped component made of metal. The metal is Cu or a Cu alloy. The main surface bonding layer 22 is formed on the upper surface of the substrate 21. The main surface bonding layer 22 is the surface layer on the z2 direction side of the conductive substrate 2. The upper surface of the main surface bonding layer 22 corresponds to the main surface 201 of the conductive substrate 2. The main surface bonding layer 22 is, for example, plated with Ag. The back surface bonding layer 23 is formed on the lower surface of the substrate 21. The back surface bonding layer 23 is the surface layer on the z1 direction side of the conductive substrate 2. The lower surface of the back surface bonding layer 23 corresponds to the back surface 202 of the conductive substrate 2. The back surface bonding layer 23 is the same as the main surface bonding layer 22, for example, plated with Ag.

[0068] The support substrate 3 supports the conductive substrate 2. The support substrate 3 is, for example, made of a DBC (Direct Bonded Copper) substrate. The support substrate 3 includes an insulating layer 31, a first metal layer 32, a first bonding layer 321, and a second metal layer 33.

[0069] The insulating layer 31 is, for example, a ceramic with excellent thermal conductivity. Examples of such ceramics include AlN (aluminum nitride). The insulating layer 31 is not limited to ceramic and can also be an insulating resin sheet, etc. The insulating layer 31 is, for example, rectangular in shape when viewed from above.

[0070] A first metal layer 32 is formed on the upper surface (facing the z2 direction) of the insulating layer 31. The constituent material of the first metal layer 32 includes, for example, Cu. This constituent material may also include Al instead of Cu. The first metal layer 32 includes a first portion 32A and a second portion 32B. The first portion 32A and the second portion 32B are spaced apart in the x direction. The first portion 32A is located on the x2 direction side of the second portion 32B. The first portion 32A is bonded to and supports the first conductive portion 2A. The second portion 32B is bonded to and supports the second conductive portion 2B. The first portion 32A and the second portion 32B are, for example, rectangular in shape when viewed from above.

[0071] A first bonding layer 321 is formed on the upper surface of the first metal layer 32 (each of the first part 32A and the second part 32B). The first bonding layer 321 is, for example, Ag plating. The first bonding layer 321 is provided to improve the bonding formed by solid-phase diffusion with the first conductive bonding material 71.

[0072] A second metal layer 33 is formed on the lower surface (the surface facing the z1 direction) of the insulating layer 31. The material constituting the second metal layer 33 is the same as that constituting the first metal layer 32. Figure 10 In the example shown, the lower surface of the second metal layer 33 (bottom surface 302, described later) is exposed from the sealing resin 8, for example. This lower surface may also be covered by the sealing resin 8 instead of being exposed from it. In a top view, the second metal layer 33 overlaps with both the first portion 32A and the second portion 32B.

[0073] like Figures 13-18 As shown, the support substrate 3 has a support surface 301 and a bottom surface 302. The support surface 301 and the bottom surface 302 are spaced apart in the z-direction. The support surface 301 faces the z2 direction, and the bottom surface 302 faces the z1 direction. Figure 10 As shown, the bottom surface 302 is exposed from the sealing resin 8. The support surface 301 is the upper surface of the first bonding layer 321, and is a surface formed by joining the upper surfaces of the first part 32A and the second part 32B together. The support surface 301 faces and is bonded to the conductive substrate 2. The bottom surface 302 is the lower surface of the second metal layer 33. A heat dissipation component (e.g., a heat sink) can be mounted on the bottom surface 302. The dimension in the z-direction of the support substrate 3 (the distance along the z-direction from the support surface 301 to the bottom surface 302) is, for example, 0.7 mm to 2.0 mm.

[0074] Multiple input terminals 41-43 and multiple output terminals 44 are each composed of a plate-shaped metal plate. The metal plate is made of, for example, Cu or a Cu alloy. Figures 1-5 , Figure 8 as well as Figure 10 In the example shown, semiconductor module A1 has three input terminals 41-43 and two output terminals 44.

[0075] A power supply voltage is applied between the three input terminals 41 to 43. In this embodiment, input terminal 41 is the positive terminal (P terminal), and the two input terminals 42 and 43 are the negative terminals (N terminals). Alternatively, input terminal 41 can be the negative terminal (N terminal), and the two input terminals 42 and 43 can be the positive terminals (P terminals). In this case, the wiring inside the package can be appropriately modified by changing the polarity of the terminals to make them consistent. The three input terminals 41 to 43 and the two output terminals 44 each include a portion covered by the encapsulating resin 8 and a portion exposed from the resin side of the encapsulating resin 8.

[0076] like Figure 14 As shown, the input terminal 41 is integrally formed with the first conductive portion 2A. Unlike this structure, the input terminal 41 is separate from the first conductive portion 2A, but can also be electrically connected to the first conductive portion 2A. Figure 8 As shown, the input terminal 41 is located on the x2 direction side relative to the plurality of first semiconductor elements 10A and the first conductive portion 2A (conductive substrate 2). The input terminal 41 is conductive to the first conductive portion 2A, and is also conductive to the back electrode 15 (drain electrode) of each first semiconductor element 10A via the first conductive portion 2A. The input terminal 41 is an example of a "first input terminal".

[0077] The input terminal 41 has an input-side mating surface 411 and an input-side side surface 412. The input-side mating surface 411 faces the z2 direction and extends towards the x2 direction. The input-side side surface 412, when viewed in the z-direction, is located at the periphery of the input-side mating surface 411 and faces the direction intersecting the input-side mating surface 411. In this embodiment, the input-side side surface 412 includes a front end surface 413 and a pair of side surfaces 414. The front end surface 413 is located at the x2 direction side end of the input terminal 41 and faces the x2 direction. The pair of side surfaces 414 are located at both ends of the input terminal 41 in the y-direction and face the y1 and y2 directions, respectively. At least one of the front end surface 413 and the pair of side surfaces 414 has an input-side machining mark on the input-side side surface 412. This input-side machining mark is formed by the cutting process of the lead frame, which will be described later.

[0078] like Figure 8 As shown, the two input terminals 42 and 43 are spaced apart from the first conductive part 2A. The two input terminals 42 and 43 are respectively connected to the second conductive member 62. Figure 8As shown, the two input terminals 42 and 43 are located on the x2 direction side relative to the plurality of first semiconductor elements 10A and the first conductive portion 2A (conductive substrate 2), respectively. The two input terminals 42 and 43 are respectively connected to the second conductive member 62, and are also connected to the second main surface electrode 12 (source electrode) of each second semiconductor element 10B via the second conductive member 62. Input terminal 42 is an example of a "second input terminal", and input terminal 43 is an example of a "third input terminal".

[0079] Input terminals 42 and 43 have input-side mating surfaces 421 and 431 and input-side side surfaces 422 and 432. The input-side mating surfaces 421 and 431 face towards the z2 direction and extend towards the x2 direction. When viewed in the z-direction, the input-side side surfaces 422 and 432 are located at the periphery of the input-side mating surfaces 421 and 431, facing a direction intersecting the input-side mating surfaces 421 and 431. In this embodiment, the input-side side surface 422 includes a front end surface 423 and a pair of side surfaces 424. The front end surface 423 is located at the x2 direction side end of the input terminal 42, facing the x2 direction. The pair of side surfaces 424 are located at both ends of the input terminal 42 in the y-direction, facing the y1 and y2 directions respectively. At least one of the front end surface 423 and the pair of side surfaces 424 in the input-side side surface 422 has an input-side machining mark. This input-side machining mark is formed by a sectioning process of the lead frame, described later. The input side surface 432 includes a front end surface 433 and a pair of side surfaces 434. The front end surface 433 is located at the x2 direction side end of the input terminal 43, facing the x2 direction. The pair of side surfaces 434 are located at both ends of the input terminal 43 in the y direction, facing the y1 and y2 directions respectively. In the input side surface 432, at least one of the front end surface 433 and the pair of side surfaces 434 has an input side machining mark. This input side machining mark is formed by the cutting process of the lead frame described later.

[0080] like Figures 1-5 , Figure 8 as well as Figure 10 As shown, three input terminals 41-43 protrude from the encapsulating resin 8 in the x2 direction within the semiconductor module A1. The three input terminals 41-43 are spaced apart from each other. Two input terminals 42 and 43 are located on opposite sides of input terminal 41 in the y-direction. Input terminal 42 is located on the y2 side of input terminal 41, and input terminal 43 is located on the y1 side of input terminal 41. The three input terminals 41-43 overlap when viewed in the y-direction.

[0081] As from Figure 8 as well as Figure 14 As understood, the two output terminals 44 are integrally formed with the second conductive portion 2B. Unlike this structure, the output terminals 44 are separate from the second conductive portion 2B, but can also be electrically connected to it. Figure 8 As shown, the two output terminals 44 are located on the x1 direction side relative to the plurality of second semiconductor elements 10B and the second conductive portion 2B (conductive substrate 2), respectively. Each output terminal 44 is conductive to the second conductive portion 2B, and is also conductive to the back electrode 15 (drain electrode) of each second semiconductor element 10B via the second conductive portion 2B. The two output terminals 44 are examples of a "first output terminal" and a "second output terminal".

[0082] The output terminal 44 has an output-side mating surface 441 and an output-side side surface 442. The output-side mating surface 441 faces the z2 direction and extends towards the x1 direction. When viewed in the z direction, the output-side side surface 442 is located at the periphery of the output-side mating surface 441 and faces the direction intersecting the output-side mating surface 441. In this embodiment, the output-side side surface 442 includes a front end surface 443 and a pair of side surfaces 444. The front end surface 443 is located at the x1 direction side end of the output terminal 44 and faces the x1 direction. The pair of side surfaces 444 are located at both ends of the output terminal 44 in the y direction and face the y1 and y2 directions, respectively. At least one of the front end surface 443 and the pair of side surfaces 444 in the output-side side surface 442 has an output-side machining mark. This output-side machining mark is formed by the cutting process of the lead frame described later. Furthermore, the number of output terminals 44 is not limited to two; for example, it can be one or more. For example, if there is only one output terminal 44, it is desirable to connect it to the central portion in the y direction of the second conductive part 2B.

[0083] The plurality of control terminals 45 are pin-shaped terminals used to control each semiconductor element 10. The plurality of control terminals 45 include a plurality of first control terminals 46A-46E and a plurality of second control terminals 47A-47D. The plurality of first control terminals 46A-46E are used to control each first semiconductor element 10A. The plurality of second control terminals 47A-47D are used to control each second semiconductor element 10B.

[0084] Multiple first control terminals 46A to 46E are arranged at intervals in the y-direction. For example... Figure 8 as well as Figure 14 As shown, each of the first control terminals 46A to 46E is supported on the first conductive portion 2A via the control terminal support 5 (the first support portion 5A described later). Figure 5 as well as Figure 8 As shown, in the x-direction, each of the first control terminals 46A to 46E is located between the plurality of first semiconductor elements 10A and the three input terminals 41 to 43.

[0085] The first control terminal 46A is a terminal (gate terminal) for inputting drive signals to the plurality of first semiconductor elements 10A. Drive signals (e.g., gate voltages) for driving the plurality of first semiconductor elements 10A are input to the first control terminal 46A.

[0086] The first control terminal 46B is a terminal (source sensing terminal) for detecting the source signal of the plurality of first semiconductor elements 10A. The voltage (voltage corresponding to the source current) applied to each of the second main surface electrodes 12 (source electrodes) of the plurality of first semiconductor elements 10A is detected by the first control terminal 46B.

[0087] The first control terminal 46C and the first control terminal 46D are terminals that are connected to the diode functional unit D1. The first control terminal 46C is connected to the third main surface electrode 13 of the first semiconductor element 10A having the diode functional unit D1, and the first control terminal 46D is connected to the fourth main surface electrode 14 of the first semiconductor element 10A having the diode functional unit D1.

[0088] The first control terminal 46E is a terminal (drain sensing terminal) for detecting the drain signal of the plurality of first semiconductor elements 10A. The voltage (voltage corresponding to the drain current) applied to each back electrode 15 (drain electrode) of the plurality of first semiconductor elements 10A is detected by the first control terminal 46E.

[0089] Multiple second control terminals 47A to 47D are arranged at intervals in the y-direction. For example... Figure 5 as well as Figure 18 As shown, each of the second control terminals 47A to 47D is supported on the second conductive portion 2B via the control terminal support 5 (the second support portion 5B described later). Figure 5 as well as Figure 8 As shown, in the x-direction, each of the second control terminals 47A to 47D is located between the plurality of second semiconductor elements 10B and the two output terminals 44.

[0090] Multiple control terminals 45 (multiple first control terminals 46A to 46E and multiple second control terminals 47A to 47D) each include a bracket 451 and a metal pin 452.

[0091] The support 451 is made of a conductive material. For example... Figure 15As shown, the bracket 451 is bonded to the control terminal support 5 (the first metal layer 52 described later) via a conductive bonding material 459. The bracket 451 includes a cylindrical portion, an upper protruding edge, and a lower protruding edge. The upper protruding edge is connected to the upper part of the cylindrical portion, and the lower protruding edge is connected to the lower part of the cylindrical portion. A metal pin 452 is inserted into at least the upper protruding edge and the cylindrical portion of the bracket 451. The upper surface of the upper protruding edge protrudes from the sealing resin 8 (the second protrusion 852 described later) and is covered by the resin portion 87.

[0092] The metal pin 452 is a rod-shaped component extending in the z-direction. The metal pin 452 is supported by being pressed into the bracket 451. The metal pin 452 is in communication with the control terminal support 5 (the first metal layer 52 described later) at least via the bracket 451. Figure 15 As shown in the example, when the lower end (the end on the z1 direction side) of the metal pin 452 is in contact with the conductive bonding material 459 in the through hole of the bracket 451, the metal pin 452 is connected to the control terminal support 5 via the conductive bonding material 459.

[0093] The control terminal support 5 supports multiple control terminals 45. The control terminal support 5 is located between the main surface 201 (conductive substrate 2) and the multiple control terminals 45.

[0094] The control terminal support 5 includes a first support portion 5A and a second support portion 5B. The first support portion 5A is disposed on the first conductive portion 2A of the conductive substrate 2, supporting a plurality of first control terminals 46A to 46E among the plurality of control terminals 45. Figure 15 As shown, the first support portion 5A is bonded to the first conductive portion 2A via a bonding material 59. The bonding material 59 can be either conductive or insulating, such as solder. The second support portion 5B is disposed on the second conductive portion 2B of the conductive substrate 2, supporting a plurality of second control terminals 47A to 47D among the plurality of control terminals 45. The second support portion 5B is bonded to the second conductive portion 2B via the bonding material 59.

[0095] The control terminal support 5 (each of the first support portion 5A and the second support portion 5B) is, for example, made of a DBC substrate. The control terminal support 5 has an insulating layer 51, a first metal layer 52 and a second metal layer 53 stacked on top of each other.

[0096] The insulating layer 51 is made of ceramic, for example. The insulating layer 51 is rectangular in shape when viewed from above.

[0097] like Figure 15 As shown, a first metal layer 52 is formed on the upper surface of the insulating layer 51. Each control terminal 45 is vertically disposed on the first metal layer 52. The first metal layer 52 is, for example, Cu or a Cu alloy. Figure 8As shown, the first metal layer 52 includes a first part 521, a second part 522, a third part 523, a fourth part 524, and a fifth part 525. The first part 521, the second part 522, the third part 523, the fourth part 524, and the fifth part 525 are spaced apart from each other and insulated from each other.

[0098] The first part 521 is connected to a plurality of metal wires 731, and is connected to the first main surface electrode 11 (gate electrode) of each semiconductor element 10 via each metal wire 731. Figure 8 As shown, the first control terminal 46A is engaged with the first part 521 of the first support part 5A, and the second control terminal 47A is engaged with the first part 521 of the second support part 5B.

[0099] The second part 522 is connected to a plurality of metal wires 732, and is connected to the second main surface electrode 12 (source electrode) of each semiconductor element 10 via each metal wire 732. Figure 8 As shown, the first control terminal 46B is engaged with the second part 522 of the first support part 5A, and the second control terminal 47B is engaged with the second part 522 of the second support part 5B.

[0100] The third part 523 is connected to the metal wire 733, and is connected to the third main electrode 13 of the semiconductor element 10 having the diode function part D1 via the metal wire 733. Figure 8 As shown, the first control terminal 46C is engaged with the third part 523 of the first support part 5A, and the second control terminal 47C is engaged with the third part 523 of the second support part 5B.

[0101] The fourth part 524 is connected to the metal wire 734, and is connected to the fourth main electrode 14 of the semiconductor element 10 having the diode function part D1 via the metal wire 734. For example... Figure 8 As shown, the first control terminal 46D is engaged with the fourth part 524 of the first support part 5A, and the second control terminal 47D is engaged with the fourth part 524 of the second support part 5B.

[0102] The fifth part 525 of the first support part 5A is joined to the metal wire 735, and is connected to the first conductive part 2A via the metal wire 735. The fifth part 525 of the second support part 5B is not connected to other structural parts. Figure 8 As shown, the first control terminal 46E is engaged with the fifth part 525 of the first support part 5A.

[0103] like Figure 15 As shown, a second metal layer 53 is formed on the lower surface of the insulating layer 51. Figure 15 As shown, the second metal layer 53 of the first support portion 5A is bonded to the first conductive portion 2A via a bonding material 59.

[0104] The second metal layer 53 of the second support portion 5B is bonded to the second conductive portion 2B via a bonding material 59.

[0105] The conductive component 6, together with the conductive substrate 2, forms the path of the main circuit current switched by the plurality of semiconductor elements 10. The conductive component 6 is spaced apart from the main surface 201 (conductive substrate 2) in the z2 direction and overlaps with the main surface 201 when viewed from above. In this embodiment, the conductive component 6 is made of a metal sheet. This metal is, for example, Cu or a Cu alloy. Specifically, the conductive component 6 is a bent metal sheet. It is not limited to this; the conductive component 6 may also be made of metal foil. In this embodiment, the conductive component 6 includes a plurality of first conductive components 61 and second conductive components 62. The main circuit current includes a first main circuit current and a second main circuit current. The first main circuit current is the current that forms a path between the input terminal 41 and the output terminal 44. The second main circuit current is the current that forms a path between the output terminal 44 and the input terminals 42 and 43.

[0106] Multiple first conductive components 61 are respectively coupled to the second main surface electrode 12 (source electrode) and the second conductive portion 2B of each first semiconductor element 10A, thereby making the second main surface electrode 12 and the second conductive portion 2B of each first semiconductor element 10A conductive. Each first conductive component 61 and the second main surface electrode 12 of each first semiconductor element 10A (see reference 2B) Figure 8 The first conductive component 61 and the second conductive part 2B are respectively bonded by a conductive bonding material 69. The conductive bonding material 69 is, for example, solder, metal paste, or sintered metal. Figure 8 As shown, each of the first conductive components 61 is a strip-shaped structure extending along the x-direction when viewed from above.

[0107] In this embodiment, such as Figure 6 As shown, in each of the first conductive members 61, an opening 61h is formed in the rectangular portion connecting each first semiconductor element 10A and the second conductive portion 2B. The opening 61h is preferably formed in the center of the rectangle when viewed from above, for example, as a through hole extending in the z-direction. When a fluid resin material is injected to form a sealing resin, an opening 61h is formed near each of the first conductive members 61 to facilitate the flow of the resin material between the upper side (z2 direction side) and the lower side (z1 direction side). The planar shape of the opening 61h can be a perfect circle, an ellipse, a rectangle, or other shapes. The shape of the first conductive member 61 is not limited to this structure; for example, the opening 61h may not be formed.

[0108] In this embodiment, three first conducting components 61 are provided corresponding to the number of first semiconductor elements 10A. As a variation, regardless of the number of first semiconductor elements 10A, a single first conducting component 61 that is common to all first semiconductor elements 10A can also be used.

[0109] The second conductive component 62 connects the second main surface electrode 12 of each second semiconductor element 10B to each input terminal 42, 43. The maximum dimension of the second conductive component 62 in the x-direction is, for example, 25mm to 40mm (preferably about 32mm), and the maximum dimension in the y-direction is, for example, 30mm to 45mm (preferably about 38mm). Figure 6 As shown, the second conductive component 62 includes a first wiring section 621, a second wiring section 622, a third wiring section 623, and a fourth wiring section 624.

[0110] The first wiring section 621 is connected to the input terminal 42. The first wiring section 621 and the input terminal 42 are joined by a conductive bonding material 69. The first wiring section 621 is a strip-shaped portion extending in the x-direction when viewed from above.

[0111] The second wiring section 622 is connected to the input terminal 43. The second wiring section 622 and the input terminal 43 are joined by a conductive bonding material 69. The second wiring section 622 is a strip-shaped portion extending in the x-direction when viewed from above. The first wiring section 621 and the second wiring section 622 are spaced apart in the y-direction and are arranged substantially parallel to each other. The second wiring section 622 is located in the y1 direction relative to the first wiring section 621.

[0112] The third wiring section 623 is connected to both the first wiring section 621 and the second wiring section 622. The third wiring section 623 is a strip-shaped portion extending in the y-direction when viewed from above. (As shown in the image...) Figure 6 As understood, the third wiring section 623 overlaps with a plurality of second semiconductor elements 10B when viewed from above. Figure 17 As shown, the third wiring portion 623 is connected to each of the second semiconductor elements 10B. The third wiring portion 623 has a plurality of concave regions 623a. Figure 17 As shown, each concave region 623a protrudes further in the z1 direction than other parts of the third wiring portion 623. Each concave region 623a in the third wiring portion 623 is bonded to each second semiconductor element 10B. Each concave region 623a of the third wiring portion 623 is bonded to the second main surface electrode 12 of each second semiconductor element 10B (see reference). Figure 8 They are bonded via conductive bonding material 69.

[0113] The fourth wiring section 624 is connected to both the first wiring section 621 and the second wiring section 622. Additionally, the fourth wiring section 624 is connected to the third wiring section 623. The fourth wiring section 624 is located further along the x2 direction than the third wiring section 623. Figure 6 As understood, the fourth wiring portion 624 overlaps with a plurality of first semiconductor elements 10A when viewed from above. The fourth wiring portion 624 includes a first strip portion 625 and a plurality of second strip portions 626.

[0114] The first strip-shaped portion 625 is spaced apart from the third wiring portion 623 in the x-direction and is the strip-shaped portion of the fourth wiring portion 624 when viewed from above. The first strip-shaped portion 625 is connected to both the first wiring portion 621 and the second wiring portion 622. The first strip-shaped portion 625 overlaps with a plurality of first semiconductor elements 10A when viewed from above. The first strip-shaped portion 625 has a plurality of convex regions 625a. (As shown...) Figure 16 As shown, each convex region 625a protrudes further in the z2 direction than other parts of the first strip 625. Figure 6 As shown, each convex region 625a overlaps with each first semiconductor element 10A when viewed from above. Figure 16 As shown, the first strip 625 has a plurality of convex regions 625a, and therefore each first semiconductor element 10A has a region for engaging each first conductive member 61. This prevents the first strip 625 from contacting each first conductive member 61.

[0115] Multiple second strip sections 626 are respectively connected to the first strip section 625 and the third wiring section 623. Each second strip section 626 is a strip extending in the x-direction when viewed from above. The multiple second strip sections 626 are spaced apart in the y-direction and arranged substantially parallel to each other. When viewed from above, one end of each of the multiple second strip sections 626 is connected between two adjacent first semiconductor elements 10A in the y-direction of the first strip section 625, and the other end is connected between two adjacent second semiconductor elements 10B in the y-direction of the third wiring section 623.

[0116] The first strip-shaped portion 625 has a first end edge 627 and a second end edge 628. For example... Figure 7 As shown, the first edge 627, when viewed from above, is located further in the x1 direction than the first side 191, and extends at least from the third side 193 to the fourth side 194 in the y direction. Therefore, when viewed from above, the two corners 171 and 172 on the x2 direction side of each first semiconductor element 10A do not overlap with the second conducting member 62. These two corners are the angle 171 formed by the first side 191 and the third side 193, and the angle 172 formed by the first side 191 and the fourth side 194. Therefore, in each first semiconductor element 10A, when viewed from above (specifically, in the x2 direction), the second conducting member 62 is not overlapped with the second conducting member 62. Figure 7Under the conditions shown (and so on), a portion of each of the two sides sandwiching angles 171 and 172 can be seen. Figure 7 As shown, the second edge 628, when viewed from above, is located further in the x2 direction than the second side 192, and extends at least from the third side 193 to 194 in the y direction. Therefore, when viewed from above, the two corners 173 and 174 on the x1 direction side of each first semiconductor element 10A do not overlap with the second conductive member 62. These two corners are the angle 173 formed by the second side 192 and the third side 193, and the angle 174 formed by the second side 192 and the fourth side 194. Therefore, in each first semiconductor element 10A, when viewed from above, a portion of each of the two sides sandwiching each corner 173 and 174 can be seen.

[0117] Of the aforementioned angles 171, 172, 173, and 174, the length of the portion sandwiching each angle 171, 172, 173, and 174 that is visible when viewed from above should be greater than 0 μm and less than 200 μm. Furthermore, when viewed from above, the length of the portion visible on each side sandwiching each angle 171, 172, 173, and 174 is preferably 5 μm or more and less than 150 μm. When the length of the portion visible on each side sandwiching each angle 171, 172, 173, and 174 is 2 μm or more, the angle of the first semiconductor element 10A can be detected; when the length of the portion visible on each side is 5 μm or more, the angle of the first semiconductor element 10A can be reliably detected. However, when the length of the portion visible on each side exceeds 200 μm, the bonding area between the first conducting member 61 and the first semiconductor element 10A becomes smaller than required, which is therefore not preferred. As long as the upper limit of the length of the visible portion on both sides is less than 150 μm, the junction area between the first conductive component 61 and the first semiconductor element 10A can be avoided from becoming too small, which is therefore preferable.

[0118] like Figure 6 As shown, the conducting member 6 (first conducting member 61 and second conducting member 62) has a first portion 601. The first portion 601 is the area that overlaps with the semiconductor element 10 (any one of the plurality of first semiconductor elements 10A and the plurality of second semiconductor elements 10B) when viewed from above. In the second conducting member 62, a portion of the fourth wiring portion 624 (the area that overlaps with the plurality of first semiconductor elements 10A when viewed from above) and a portion of the third wiring portion 623 (the area that overlaps with the plurality of second semiconductor elements 10B when viewed from above) constitute the first portion 601.

[0119] like Figure 6 , Figure 8As shown, the main surface electrodes 11, 13, 14, and 16 of the first semiconductor element 10A (the first semiconductor element 10A having a diode functional section D1) are arranged along the y-direction at the end of the first semiconductor element 10A on the x2 direction side. In a top view, the first conducting member 61 and the second conducting member 62 do not overlap with any of the main surface electrodes 11, 13, 14, and 16 of the first semiconductor element 10A, or any of the corners 171 and 172 on the x2 direction side. Furthermore, in a top view, the first conducting member 61 and the second conducting member 62 do not overlap with at least one of the corners 173 and 174 on the x1 direction side of the first semiconductor element 10A (the side opposite to the side where the main surface electrodes are disposed). Therefore, in a top view, at least three of the four corners 171, 172, 173, and 174 of the semiconductor element 10A can be seen. Therefore, with the semiconductor element 10A, the first conductive component 61, and the second conductive component 62 assembled on the conductive substrate 2, the correct assembly of the semiconductor element 10A can be checked by automatic visual inspection. When viewed from above, all four corners 171, 172, 173, and 174 of the semiconductor element 10A are also visible. Furthermore, the aforementioned main surface electrodes 11, 13, 14, and 16 of the first semiconductor element 10A are an example of a "one-sided main surface electrode".

[0120] In addition, such as Figure 6 As shown, each of the second semiconductor elements 10B, when viewed from above, is also rectangular in shape, similar to the first semiconductor element 10A, and has four corners 181, 182, 183, and 184 corresponding to the four corners 171, 172, 173, and 174 of the first semiconductor element 10A. The top-view relationship between the four corners 171, 172, 173, and 174 of each of the first semiconductor elements 10A and the first conducting member 61 and the second conducting member 62 is also the same as the top-view relationship between the four corners 181, 182, 183, and 184 of each of the second semiconductor elements 10B and the second conducting member 62.

[0121] like Figure 5 As shown, the second conductive member 62 includes a first portion 62A and a second portion 62B. The first portion 62A overlaps with the main surface 201 of the conductive substrate 2 (the main surface 201 of either the first conductive portion 2A or the second conductive portion 2B) when viewed from above, and does not overlap with any of the plurality of semiconductor elements 10 when viewed from above. The second portion 62B overlaps with the main surface 201 when viewed from above, and also overlaps with any of the plurality of semiconductor elements 10 when viewed from above. Figure 5 In the diagram, the first part 62A is marked with a rightward rising shadow line, and the second part 62B is marked with a rightward falling shadow line. The first part 62A has an opening 63. (As shown...) Figure 5 as well as Figure 13As shown, opening 63 is the portion that has been partially removed when viewed from above. In this embodiment, opening 63 overlaps with the main surface 201 of the first conductive portion 2A (conductive substrate 2) when viewed from above, and is located in a position that does not overlap with the plurality of semiconductor elements 10 when viewed from above. Opening 63 is, for example, a through hole extending in the z-direction. Opening 63 has a portion formed in the first wiring portion 621 and a portion formed in the second wiring portion 622. When viewed from above, opening 63 is provided near at least two of the four corners of the conductive substrate 2, for example, provided in the first wiring portion 621 and the second wiring portion 622 on the x2 direction side. Furthermore, the planar shape of opening 63 is not limited; it can be a hole as in this embodiment, or a cut as in this embodiment. Opening 63 can also be manufactured, for example, by electroforming. In this case, the second conductive member 62 has an opening 63 formed by a portion without metal electrodeposition, rather than an opening 63 formed by a removed portion.

[0122] In the second conductive member 62, an opening 625h is formed in the rectangular portion that overlaps with each of the first semiconductor elements 10A when viewed from above. In this embodiment, the opening 625h is preferably formed to overlap with the central portion of each of the first semiconductor elements 10A when viewed from above. The opening 625h is, for example, a through hole formed in each of the convex regions 625a of the first strip-shaped portion 625 (fourth wiring portion 624) (see reference). Figure 6 When the first conductive component 61 is joined to the first semiconductor element 10A, an opening 625h is used to optically confirm the joining status from above.

[0123] In the second conductive member 62, an opening 623h is formed in the rectangular portion that overlaps with each of the second semiconductor elements 10B when viewed from above. In this embodiment, the opening 623h is preferably formed to overlap with the central portion of the second semiconductor element 10B when viewed from above. The opening 623h is, for example, a through hole formed in each concave region 623a of the third wiring portion 623. The opening 623h is used when positioning the second conductive member 62 relative to the conductive substrate 2. The planar shapes of the two openings 623h and 625h can be circles, ellipses, rectangles, or other shapes.

[0124] The shape of the second conductive member 62 is not limited to this structure; for example, it may not include the fourth wiring portion 624. However, in terms of reducing the inductance value generated by the current flowing through the second conductive member 62, it is preferable to provide the fourth wiring portion 624 in the second conductive member 62.

[0125] A first conductive bonding material 71 is disposed between the conductive substrate 2 and the support substrate 3, thereby electrically bonding the conductive substrate 2 and the support substrate 3. The first conductive bonding material 71 has a portion that electrically bonds the first conductive portion 2A to the first portion 32A and a portion that electrically bonds the second conductive portion 2B to the second portion 32B. For example... Figure 15 As shown, the first conductive bonding material 71 has a first base layer 711, a first layer 712 and a second layer 713 that are stacked on top of each other.

[0126] like Figure 15 As shown, the side surface of the first conductive bonding material 71 and the side surface of the uppermost first metal layer 32 of the supporting substrate 3 are preferably on the same side. Preferably, when viewed from above, the side surface of the first metal layer 32 is located slightly inward than the side surface of the first conductive bonding material 71. That is, when viewed from above, the side surface of the first metal layer 32 is bonded in a manner that does not extend further outward than the side surface of the first conductive bonding material 71. If the side surface of the first metal layer 32 extends further outward than the side surface of the first conductive bonding material 71 when viewed from above, the surface distance between the first metal layer 32 and the second metal layer 33 becomes smaller, which is not preferable. Furthermore, when viewed from above, the side surface of the first metal layer 32 is positioned further outward than the side surface of the substrate 21 of the conductive substrate 2.

[0127] The first base layer 711 is made of metal, such as Al or an Al alloy. The first base layer 711 is a sheet. The Young's modulus of Al (aluminum), which is the constituent material of the first base layer 711, is 70.3 GPa.

[0128] A first layer 712 is formed on the upper surface of a first base layer 711. The first layer 712 is located between the first base layer 711 and the conductive substrate 2 (each of the first conductive portion 2A and the second conductive portion 2B). The first layer 712 is, for example, plated with Ag. The first layer 712 is bonded to each of the back bonding layers 23 of the first conductive portion 2A and the second conductive portion 2B, for example, through solid-phase diffusion of the metal. That is, the first layer 712 is bonded to each of the back bonding layers 23 of the first conductive portion 2A and the second conductive portion 2B through solid-phase diffusion bonding. Thus, the first layer 712 and each of the back bonding layers 23 are bonded in a state where they are directly in contact with each other at the bonding interface. Furthermore, in this disclosure, "A and B are bonded by solid-phase diffusion bonding" means that the result of implementing solid-phase diffusion bonding is that A and B are fixed to each other in a state where they are directly in contact with each other at the bonding interface; it can be said that A and B constitute a solid-phase diffusion bonding layer. Under ideal conditions, when solid-phase diffusion bonding is implemented, there are cases where the bonding interface is not clearly visible due to the diffusion of the metal element. On the other hand, if there are intermediates such as oxide films on the surfaces of A and B, or if there are gaps between A and B, these intermediates and gaps may exist at the bonding interface.

[0129] The second layer 713 is formed on the lower surface of the first base layer 711. The second layer 713 is located between the first base layer 711 and the support substrate 3 (the first part 32A and the second part 32B respectively). The second layer 713 is, for example, Ag plating. The second layer 713 is bonded to the first bonding layer 321 formed on the first part 32A and the second part 32B respectively, for example, by solid-phase diffusion of the metal. That is, the second layer 713 and the first bonding layer 321 are bonded by solid-phase diffusion bonding, so that they are bonded in a state where they are in direct contact with each other at the bonding interface. The Young's modulus of the Ag plating (silver) that forms the first layer 712 and the second layer 713 is 82.7 GPa.

[0130] In the first conductive bonding material 71, the constituent materials of the first base layer 711 and the constituent materials of the first layer 712 and the second layer 713 are the materials described above. Therefore, the Young's modulus of the first base layer 711 is smaller than that of the first layer 712 and the second layer 713. The thickness (z-direction dimension) of the first base layer 711 is larger than the thickness of the first layer 712 and the second layer 713.

[0131] In the first conductive bonding material 71, no Ag plating is formed on the end face of the first base layer 711, which is Al or an Al alloy, and the end face of the first base layer 711 is exposed. However, Ag plating may also be formed on the end face of the first base layer 711. From the viewpoint of reducing the manufacturing cost of the first conductive bonding material 71, it is preferable to form Ag plating on both sides of a large-area sheet and then manufacture the first conductive bonding material 71 by slicing the sheet with Ag plating. According to this viewpoint, it is preferable not to form Ag plating on the end face of the first base layer 711.

[0132] A second conductive bonding material 72 is disposed between the conductive substrate 2 and each semiconductor element 10, thereby electrically bonding the conductive substrate 2 to each semiconductor element 10. The second conductive bonding material 72 has portions that electrically bond each first semiconductor element 10A to a first conductive portion 2A and portions that electrically bond each second semiconductor element 10B to a second conductive portion 2B. For example... Figure 15 As shown, the second conductive bonding material 72 includes a second base layer 721, a third layer 722, and a fourth layer 723 that are stacked on top of each other.

[0133] The second base layer 721 is made of metal, such as Al or an Al alloy. The second base layer 721 is a sheet.

[0134] A third layer 722 is formed on the upper surface of the second base layer 721. The third layer 722 is located between the second base layer 721 and each semiconductor element 10. The third layer 722 is, for example, Ag plating. The third layer 722 is bonded to the back electrode 15 of each semiconductor element 10, for example, by solid-phase diffusion of the metal. That is, the third layer 722 and the back electrode 15 are bonded by solid-phase diffusion bonding, so that they are bonded in a state where they are directly in contact with each other at the bonding interface.

[0135] A fourth layer 723 is formed on the lower surface of the second base layer 721. The fourth layer 723 is located between the second base layer 721 and the conductive substrate 2 (each of the first conductive portion 2A and the second conductive portion 2B). The fourth layer 723 is, for example, plated with Ag. The fourth layer 723 is bonded to the main surface bonding layers 22 of the first conductive portion 2A and the second conductive portion 2B, for example, by solid-phase diffusion of the metal. That is, the fourth layer 723 is bonded to each main surface bonding layer 22 by solid-phase diffusion bonding, so that they are bonded in a state where they are directly in contact with each other at the bonding interface.

[0136] In the second conductive bonding material 72, the constituent materials of the second base layer 721 and the constituent materials of the third layer 722 and the fourth layer 723 are the same as those described above. Therefore, the Young's modulus of the second base layer 721 is smaller than that of the third layer 722 and the fourth layer 723. The thickness (z-direction dimension) of the second base layer 721 is larger than that of the third layer 722 and the fourth layer 723.

[0137] In the second conductive bonding material 72, no Ag plating is formed on the end face of the second base layer 721, which is Al or an Al alloy, and the end face of the second base layer 721 is exposed. However, Ag plating may also be formed on the end face of the second base layer 721. From the viewpoint of reducing the manufacturing cost of the second conductive bonding material 72, it is preferable to form Ag plating on both sides of a sheet of area, and then manufacture the second conductive bonding material 72 by cutting the sheet with Ag plating. According to this viewpoint, it is preferable not to form Ag plating on the end face of the second base layer 721.

[0138] Multiple metal wires 731-735 respectively conduct electricity between two spaced-apart portions. The multiple metal wires 731-735 are, for example, bonding leads. The constituent materials of the multiple metal wires 731-735 include, for example, any one of Au (gold), Al, or Cu.

[0139] like Figure 8 As shown, multiple metal wires 731 are respectively connected to the first main surface electrode 11 (gate electrode) of each semiconductor element 10 and the first part 521 (first metal layer 52) of each control terminal support 5, making them conductive. Figure 8As shown, the plurality of metal wires 731 include a plurality of first metal wires 731a and a plurality of second metal wires 731b. The plurality of first metal wires 731a are respectively connected to the first main surface electrode 11 (gate electrode) of each first semiconductor element 10A and the first portion 521 (first metal layer 52) of the first support portion 5A. Thus, the first control terminal 46A is connected to the first main surface electrode 11 (gate electrode) of each first semiconductor element 10A via the first metal wires 731a. The plurality of second metal wires 731b are respectively connected to the first main surface electrode 11 (gate electrode) of each second semiconductor element 10B and the first portion 521 (first metal layer 52) of the second support portion 5B. Thus, the second control terminal 47A is connected to the first main surface electrode 11 (gate electrode) of each second semiconductor element 10B via the second metal wires 731b.

[0140] like Figure 8 As shown, multiple metal wires 732 are respectively connected to the second main surface electrode 12 (source electrode) of each semiconductor element 10 and the second part 522 (first metal layer 52) of each control terminal support 5 to make them conductive. However, in each semiconductor element 10 having a diode function part D1, each metal wire 732 is connected to the fifth main surface electrode 16 (source sensing electrode) instead of the second main surface electrode 12 (source electrode).

[0141] like Figure 8 As shown, multiple metal wires 733 are respectively connected to the third main surface electrode 13 of each semiconductor element 10 having a diode function section D1 and the third part 523 (first metal layer 52) of each control terminal support body 5, so that they are connected.

[0142] like Figure 8 As shown, multiple metal wires 734 are respectively connected to the fourth main surface electrode 14 of each semiconductor element 10 having a diode function section D1 and the fourth part 524 (first metal layer 52) of each control terminal support body 5, so that they are connected.

[0143] like Figure 8 As shown, the metal wire 735 is joined to the main surface 201 of the first conductive part 2A (conductive substrate 2) and the fifth part 525 (first metal layer 52) of the first support part 5A (control terminal support 5) to make them conductive.

[0144] The sealing resin 8 covers a plurality of semiconductor elements 10, a conductive substrate 2, a support substrate 3 (except for the bottom surface 302), a portion of each of a plurality of input terminals 41-43, a portion of each of a plurality of output terminals 44, a portion of each of a plurality of control terminals 45, a control terminal support 5, a conductive component 6, and a plurality of metal wires 731-735. The sealing resin 8 is, for example, made of black epoxy resin. The sealing resin 8 is formed, for example, by molding as described later. The sealing resin 8 has a dimension of approximately 35 mm to 60 mm in the x-direction, approximately 35 mm to 50 mm in the y-direction, and approximately 4 mm to 15 mm in the z-direction. The above dimensions are the size of the largest portion in each direction. The sealing resin 8 has a resin main surface 81, a resin back surface 82, and a plurality of resin side surfaces 831-834.

[0145] like Figure 9 , Figure 11 as well as Figure 12 As shown, the resin main surface 81 and the resin back surface 82 are spaced apart in the z-direction. The resin main surface 81 faces the z2 direction, and the resin back surface 82 faces the z1 direction. Multiple control terminals 45 (multiple first control terminals 46A-46E and multiple second control terminals 47A-47D) protrude from the resin main surface 81. Figure 10 As shown, the resin back surface 82 is a frame-like structure that surrounds the bottom surface 302 (lower surface of the second metal layer 33) of the support substrate 3 when viewed from above. The bottom surface 302 of the support substrate 3 protrudes from the resin back surface 82, for example, being the same surface as the resin back surface 82. Multiple resin side surfaces 831-834 are respectively connected to both the resin main surface 81 and the resin back surface 82, and are sandwiched between them in the z-direction. Figure 4 As shown, resin side 831 and resin side 832 are spaced apart in the x-direction. Resin side 831 faces the x1 direction, and resin side 832 faces the x2 direction. Two output terminals 44 protrude from resin side 831, and three input terminals 41-43 protrude from resin side 832. Figure 4 As shown, resin side surface 833 and resin side surface 834 are spaced apart in the y-direction. Resin side surface 833 faces the y1 direction, and resin side surface 834 faces the y2 direction.

[0146] like Figure 4 As shown, a plurality of recesses 832a are formed on the resin side surface 832. Each recess 832a is a portion that is recessed in the x-direction when viewed from above. The plurality of recesses 832a have portions formed between input terminals 41 and 42 and between input terminals 41 and 43 when viewed from above. The plurality of recesses 832a are provided to increase the surface distances along the resin side surface 832 between input terminals 41 and 42, and between input terminals 41 and 43.

[0147] like Figure 13 as well as Figure 14 As shown, the sealing resin 8 has a plurality of first protrusions 851, a plurality of second protrusions 852, and resin voids 86.

[0148] Multiple first protrusions 851 protrude from the resin main surface 81 along the z-direction. When viewed from above, the multiple first protrusions 851 are positioned near the four corners of the sealing resin 8. A first protruding end face 851a is formed at the front end (end in the z2 direction) of each first protrusion 851. Each first protruding end face 851a of the multiple first protrusions 851 is substantially parallel to the resin main surface 81 and lies on the same plane (x-y plane). Each first protrusion 851 is, for example, a hollow truncated cone shape with a bottom. In a device utilizing power generated by the semiconductor module A1, when the semiconductor module A1 is mounted on a control circuit board or the like, the multiple first protrusions 851 serve as spacers. Each of the multiple first protrusions 851 has a recess 851b and an inner wall surface 851c formed in the recess 851b. The shape of each first protrusion 851 can be cylindrical, but is preferred. The recess 851b is preferably cylindrical, and the inner wall surface 851c is a single perfect circle when viewed from above. Each first protrusion 851 is an example of a "protrusion", and each first protruding end face 851a is an example of a "protruding end face".

[0149] The semiconductor module A1 may be mechanically fixed to a control circuit board or the like by means of threaded fixing. In this case, thread teeth can be formed on the inner wall surface 851c of the recess 851b in the plurality of first protrusions 851. Alternatively, an embedded nut can be inserted into the recess 851b in the plurality of first protrusions 851.

[0150] like Figure 14 As shown, a plurality of second protrusions 852 protrude from the resin main surface 81 along the z-direction. The plurality of second protrusions 852 overlap with a plurality of control terminals 45 when viewed from above. Each metal pin 452 of the plurality of control terminals 45 protrudes from each second protrusion 852. A portion of the bracket 451 (the upper surface of the upper protruding edge) protrudes from the upper end face of each second protrusion 852. Each second protrusion 852 is frustoconical. A resin portion 87 is disposed on each second protrusion 852.

[0151] like Figure 13As shown, the resin void portion 86 extends from the resin main surface 81 through the recess 201a formed on the main surface 201 of the conductive substrate 2 in the z-direction. The resin void portion 86 is formed from the resin main surface 81 in the recess 201a into a conical shape whose cross-sectional area decreases as it moves toward the z-direction. The resin void portion end edge 861 in the resin void portion 86 that contacts the main surface 201, and the recess end edge 201b in the recess 201a that contacts the main surface 201, coincide with each other. The resin void portion 86 is formed during the molding process described later, and is the portion during which the sealing resin 8 is not formed.

[0152] A resin portion 87 is disposed on the second protrusion 852 of the sealing resin 8. The resin portion 87 covers a portion of the bracket 451 (the upper surface of the upper protruding edge) and a portion of the metal pin 452 exposed from the sealing resin 8 in each control terminal 45. The resin portion 87 is made of epoxy resin, for example, the same as the sealing resin 8, but may also be made of a different material than the sealing resin 8.

[0153] The resin filling portion 88 fills the resin void portion 86 in a manner that fills the resin void portion 86. The resin filling portion 88 is made of epoxy resin, for example, the same as the sealing resin 8, but it may also be made of a different material than the sealing resin 8.

[0154] The following is for reference Figures 21-29 The manufacturing method of semiconductor module A1 is described. Figure 21 This is a top view showing one step in the manufacturing process of semiconductor module A1. Figure 22 This is a cross-sectional schematic diagram showing one step in the manufacturing method of semiconductor module A1. Figure 23 This is a top view showing one step in the manufacturing process of semiconductor module A1. Figure 24 This is a cross-sectional end view of one step in the manufacturing method of semiconductor module A1. Figure 24 and Figure 13 The cross-section shown corresponds to the one depicted. Figure 25 as well as Figure 28 This is an enlarged cross-sectional view of a major part of a process in the manufacturing method of semiconductor module A1, compared with an enlarged view of... Figure 13 The diagram corresponds to a portion of the cross-section shown. Figure 26 , Figure 27 as well as Figure 29 This is an enlarged cross-sectional view of a major part of a process in the manufacturing method of semiconductor module A1, compared with an enlarged view of... Figure 14 The diagram corresponds to a portion of the cross-section shown.

[0155] First, multiple semiconductor elements 10, conductive substrate 2, support substrate 3, multiple input terminals 41-43, and multiple output terminals 44 are prepared. The structures of the multiple semiconductor elements 10, conductive substrate 2, and support substrate 3 are as described above. During the preparation of these components, the multiple semiconductor elements 10, conductive substrate 2, and support substrate 3 are prepared separately and are not connected to each other. Furthermore, as... Figure 21 As shown, the conductive substrate 2, multiple input terminals 41-43, and multiple output terminals 44 are interconnected, for example, formed by the same lead frame. Furthermore, as... Figure 21 As shown, no recess 201a is formed on the main surface 201 of the conductive substrate 2.

[0156] Next, as Figure 22 As shown, a conductive substrate 2 is placed on a support substrate 3 with a first conductive bonding material 71 as a separator, and each semiconductor element 10 is placed on the conductive substrate 2 with a second conductive bonding material 72 as a separator. Then, while clamping the lower surface of the support substrate 3 and the upper surface of each semiconductor element 10 (see reference 1), Figure 22 (The thick arrow indicates the direction of the heat). While heating, each semiconductor element 10 is bonded to the conductive substrate 2 via solid-state diffusion, and the conductive substrate 2 is bonded to the support substrate 3 via solid-state diffusion. Specifically, solid-state diffusion is used to bond the first bonding layer 321 (support substrate 3) on the first metal layer 32 to the second layer 713 (first conductive bonding material 71), the first layer 712 (first conductive bonding material 71) to the back bonding layer 23 (conductive substrate 2), the fourth layer 723 (second conductive bonding material 72) to the main bonding layer 22 (conductive substrate 2), and the third layer 722 (second conductive bonding material 72) to the back electrode 15 of each semiconductor element 10. Under solid-state diffusion conditions, the heating temperature during bonding only needs to be in the range of 200°C to 350°C, and the pressure applied during bonding (the clamping force mentioned above) only needs to be in the range of 1 MPa to 100 MPa. Solid-state diffusion is assumed to be carried out in the atmosphere, but it can also be carried out in a vacuum. Thus, the conductive substrate 2 is bonded to the support substrate 3 via the first conductive bonding material 71, and each semiconductor element 10 is bonded to the conductive substrate 2 via the second conductive bonding material 72. Furthermore, the bonding of the conductive substrate 2 to the support substrate 3 and the bonding of the conductive substrate 2 to each semiconductor element 10 can be processed separately rather than together. However, for the purpose of improving manufacturing efficiency, it is preferable to process them together.

[0157] like Figure 16 as well as Figure 17 As shown, when each semiconductor element 10 is mounted on the conductive substrate 2 with a second conductive bonding material 72 between them, a separate second conductive bonding material 72 is disposed corresponding to each semiconductor element 10. However, this is not a limitation; alternatively, materials may be disposed with... Figure 16 The three semiconductor elements 10 shown are generally associated with a second conductive bonding material 72.

[0158] Next, as Figure 23 As shown, the connection of the control terminal support 5, the connection of each bracket 451 of the plurality of control terminals 45, the connection of the leads of the plurality of metal wires 731 to 735, the connection of the plurality of first conductive parts 61, and the connection of the second conductive parts 62 are performed. Furthermore, the order of the above processes is not limited.

[0159] Next, sealing resin 8 is formed. Sealing resin 8 is formed, for example, by molding. Figure 24 As shown, the metal mold 91 used in the molding process is provided with a pressing pin 911 as a pressing member. The front end of the pressing pin 911 is in contact with the main surface 201 of the conductive substrate 2. At this time, a recess 201a is formed on the main surface 201 by pressing the pressing pin 911 against the main surface 201. The degree of recess (depth) of the recess 201a is changed by the magnitude of the pressing force, etc. In addition, the pressing pin 911, which is in contact with the main surface 201 in the first conductive part 2A, is inserted into the opening 63 of the second conductive member 62. Then, a flowable resin material is injected into the cavity space 919 of the metal mold 91 sequentially through the resin flow path and the resin injection port (both omitted from the figure). The injected flowable resin material is cured to form a sealing resin 8. Figure 25 as well as Figure 26 As shown, the formed sealing resin 8 has the aforementioned first protrusion 851, the aforementioned second protrusion 852, and the aforementioned resin void 86. For example... Figure 25 As shown, the resin void end edge 861 in the resin void 86 that is in contact with the main surface 201, and the recess end edge 201b in the recess 201a that is in contact with the main surface 201, are identical to each other. Figure 26 As shown, the upper surface of the bracket 451 protrudes from the second protrusion 852 and is on the same surface as the upper surface of the second protrusion 852. Additionally, as from... Figure 24 as well as Figure 25 As understood, the resin void 86 is formed by using a non-flowing resin material filled with a pressing pin 911. Furthermore, the pressing pin 911 can also be a movable pin. In this case, the pressing pin 911 is preferably provided in a hole formed in the metal mold 91 and is elastically supported. It is not limited to a pin-shaped pressing member; a block-shaped pressing member can also be used.

[0160] Next, the metal mold 91 is opened, and the lead frame containing the conductive substrate 2 and the molded body containing the sealing resin 8 are removed. Then, the sealing resin 8 is separated from the resin that has cured in the resin flow path and the resin injection port. In this process, resin separation marks are formed on the resin side surface 831 in the x1 direction of the sealing resin 8 at any of the following locations. The first location is Figure 1 The resin side surface 831 shown is located at at least one of two positions near the two ends in the y-direction, or at the corners of both ends. If resin separation marks are formed at the corners of both ends, the resin separation marks are formed on the surface formed at the corners (the portion that is chamfered into a C-shape when viewed from above). The aforementioned beveled surface includes the resin side surface 831 on the x1-direction side of the sealing resin 8. The second position is... Figure 1 The resin separation marks are between the two output terminals 44 in the resin side 831 shown. These resin separation marks correspond to the position of the resin injection port of the metal mold 91 and are formed by separating the sealing resin 8 from the resin cured in the resin injection port. In order to suppress the bias of resin propagation, it is preferable to inject resin from the central position in the y direction. In this case, resin separation marks are formed between the two output terminals 44.

[0161] Next, as Figure 27 As shown, the metal pins 452 of the plurality of control terminals 45 are pressed into the respective brackets 451. Specifically, a cylindrical portion (see reference) having a larger diameter than that of each bracket 451 is inserted into the bracket. Figure 26 Each metal pin 452, with a cross-sectional dimension slightly larger than its inner diameter, is inserted while applying insertion pressure. Thus, each bracket 451 and each metal pin 452 are mechanically fixed and electrically connected. Alternatively, solder can be used to electrically connect each bracket 451 and each metal pin 452. Then, as... Figure 28 as well as Figure 29 As shown, a resin portion 87 and a resin-filled portion 88 are formed. The resin portion 87 and the resin-filled portion 88 are formed, for example, by potting.

[0162] Next, by appropriately cutting the aforementioned lead frame, the multiple input terminals 41-43 and the output terminal 44 are separated. Figure 21 Among the input terminals 41-43 and output terminal 44 shown, only the area near the connection between each terminal and the outer frame of the lead frame should be cut using a metal mold or the like (in... Figure 21 (The portion shown in dashed lines) is acceptable. Here, front end faces 413, 423, and 433, serving as input-side machining marks, are formed on input terminals 41 to 43, respectively. A front end face 443, serving as an output-side machining mark, is formed on output terminal 44. In the lead frame, if a pull rod is provided that connects adjacent terminals in the y-direction, the pull rod can be cut using a metal mold or the like. In this case, machining marks are formed on both sides facing the y-direction on each terminal. Through the above processes, a product is manufactured. Figures 1 to 20 The semiconductor module A1 shown.

[0163] Semiconductor module A1 is mounted on a control circuit board or the like. Here, each metal pin 452 is inserted into a pin hole on the circuit board on which the semiconductor module A1 is mounted, and connects to terminals around the pin hole. Input terminals 41, 42, and 43 each have input-side mating surfaces 411, 421, and 431 facing one side (z2 direction). Each output terminal 44 has an output-side mating surface 441 facing one side (z2 direction). The input-side mating surfaces 411, 421, 431 and the output-side mating surfaces 441 are connected to the terminals on the circuit board on which the semiconductor module A1 is mounted, for example, using solder.

[0164] The path of current from input terminal 41 to output terminal 44 in the semiconductor module A1 of this embodiment will be described below. A first main circuit current flows in the path referred to as input terminal 41, first conductive portion 2A, each first semiconductor element 10A, first conducting member 61, second conductive portion 2B, and each output terminal 44. Between the second main surface electrode 12 of each first semiconductor element 10A and the second conductive portion 2B, the first main circuit current flows in the x-direction via each first conducting member 61. In the second conductive portion 2B, between the portion engaging with each first conducting member 61 and each output terminal 44, the first main circuit current flows in the x-direction and in a direction slightly inclined from the x-direction.

[0165] The path of current from output terminal 44 to input terminals 42 and 43 will be described below. A second main circuit current flows through the path referred to as output terminal 44, second conductive portion 2B, each of the second semiconductor elements 10B, second conducting member 62, input terminal 42, and input terminal 43. The path of the second main circuit current includes the second conducting member 62, through which the second main circuit current flows between a third wiring portion 623 extending in the y-direction and a first wiring portion 621 and a second wiring portion 622 connected to both ends of the third wiring portion 623 and extending in the x2-direction. Furthermore, the path includes two second strip portions 626 arranged between the first wiring portion 621 and the second wiring portion 622 and extending in the x-direction, and a first strip portion 625 arranged between the first wiring portion 621 and the second wiring portion 622 and extending in the y-direction, through which the second main circuit current flows.

[0166] A second main circuit current flows between the input terminals 42 and 43 and the second main surface electrodes 12 of each second semiconductor element 10B, via the first wiring portion 621, the second wiring portion 622, the third wiring portion 623, the two second strip portions 626, and the first strip portion 625 included in each second conducting member 62. In the first wiring portion 621, the second wiring portion 622, and the two second strip portions 626, the second main circuit current flows in the x-direction. The direction of flow of the first main circuit current is opposite to the direction of flow of the second main circuit current.

[0167] The direction of the first main circuit current flow in the first conducting member 61 and the direction of the second main circuit current flow in the first wiring portion 621, the second wiring portion 622 and the two second strip portions 626 included in the second conducting member 62 are both in the x direction.

[0168] The function and effect of semiconductor module A1 are as follows.

[0169] Semiconductor module A1 includes a conductive substrate 2, multiple input terminals 41-43, an output terminal 44, and a conductive component 6. The conductive substrate 2 includes a first conductive portion 2A bonded to multiple first semiconductor elements 10A and a second conductive portion 2B bonded to multiple second semiconductor elements 10B. Input terminals 41 are connected to the first conductive portion 2A and are conductive to the multiple first semiconductor elements 10A via the first conductive portion 2A. Input terminals 42 and 43 are conductive to the multiple second semiconductor elements 10B via the second conductive component 62 (conductive component 6). Output terminals 44 are connected to the second conductive portion 2B and are conductive to the multiple second semiconductor elements 10B via the second conductive portion 2B. The conductive component 6 includes a first conductive component 61 that connects each first semiconductor element 10A to the second conductive portion 2B, and a second conductive component 62 that connects each second semiconductor element 10B to each input terminal 42, 43. Multiple input terminals 41-43 are arranged relative to the conductive substrate 2 in the x2 direction, and the output terminal 44 is arranged relative to the conductive substrate 2 in the x1 direction. Furthermore, two input terminals 42 and 43 are arranged on opposite sides in the y-direction, separated by input terminal 41. In a semiconductor module with a different structure than semiconductor module A1, where input terminal 43 is absent and input terminals 41 and 42 are arranged side-by-side in the y-direction, the following possibilities exist: the path of current flowing from input terminal 41 to output terminal 44 via each first semiconductor element 10A deviates, and the path of current flowing from output terminal 44 to input terminal 42 via each second semiconductor element 10B deviates. Therefore, in semiconductor module A1, two input terminals 42 and 43 are provided. By sandwiching input terminal 41 between the two input terminals 42 and 43, the deviation of the current path flowing from input terminal 41 to output terminal 44 via each first semiconductor element 10A can be reduced, and the deviation of the current path flowing from output terminal 44 to each input terminal 42 and 43 via each second semiconductor element 10B can also be reduced. This reduces the parasitic inductance component of semiconductor module A1. In other words, semiconductor module A1 has a preferred packaging structure in terms of reducing parasitic inductance.

[0170] In semiconductor module A1, the upper arm current path and the lower arm current path overlap when viewed from above. The upper arm current path is the path of current flowing from the input terminal 41 through the first conductive part 2A, each of the first semiconductor elements 10A, each of the first conducting parts 61, and the second conductive part 2B to each output terminal 44. In this embodiment, if from... Figure 5 As understood, from the x2 direction side along the x1 direction side. The lower arm current path is the path of current flowing from the output terminal 44 through each of the second semiconductor elements 10B and the second conducting member 62 to the input terminal 42. In this embodiment, as from... Figure 5As understood, from the x1 direction side along the x2 direction side. According to this structure, the magnetic field generated by the current along the upper arm current path cancels out the magnetic field generated by the current along the lower arm current path, thus reducing parasitic inductance. In particular, in the semiconductor module A1, by constructing the conducting components 6 (each of the plurality of first conducting components 61 and the second conducting component 62) from a metal plate, the overlapping area of ​​the upper arm current path and the lower arm current path when viewed from above can be adequately ensured. That is, the semiconductor module A1 constitutes a preferred packaging structure in terms of reducing parasitic inductance.

[0171] In semiconductor module A1, the second conducting component 62 constituting the lower arm current path includes a first wiring section 621, a second wiring section 622, a third wiring section 623, and a fourth wiring section 624. The first wiring section 621 and the second wiring section 622 are respectively connected to input terminals 42 and 43, which are arranged on opposite sides of each other in the y-direction across the input terminal 41, and extend in the x-direction. The third wiring section 623 is connected to both the first wiring section 621 and the second wiring section 622 and extends in the y-direction, connecting to a plurality of second semiconductor elements 10B respectively. The fourth wiring section 624 is connected to both the first wiring section 621 and the second wiring section 622, and overlaps with a plurality of first semiconductor elements 10A when viewed from above. The second conductive member 62, comprising the first wiring portion 621, the second wiring portion 622, the third wiring portion 623, and the fourth wiring portion 624, is arranged at intervals in the z-direction from the main surface 201 (conductive substrate 2), overlapping a wide area of ​​the main surface 201 when viewed from above. With this structure, the deviation of the current path flowing from the output terminal 44 to the input terminals 42, 43 via each second semiconductor element 10B can be appropriately reduced, which is suitable for reducing parasitic inductance.

[0172] When viewed in the x-direction, the multiple first semiconductor elements 10A and the multiple second semiconductor elements 10B overlap each other. With this structure, the size of the conductive substrate 2 (first conductive portion 2A and second conductive portion 2B) on which the multiple first semiconductor elements 10A and the multiple second semiconductor elements 10B are disposed can be suppressed in the y-direction, and the miniaturization of the semiconductor module A1 can be achieved.

[0173] The fourth wiring portion 624 of the second conductive member 62 has a first strip portion 625 and a plurality of second strip portions 626. The first strip portion 625 is connected to both the first wiring portion 621 and the second wiring portion 622 and extends in the y-direction, overlapping with the plurality of first semiconductor elements 10A when viewed from above. The plurality of second strip portions 626 are connected to the first strip portion 625 and the third wiring portion 623 respectively, and are strips extending in the x-direction when viewed from above. The plurality of second strip portions 626 are spaced apart in the y-direction and arranged substantially parallel. When viewed from above, one end of each of the plurality of second strip portions 626 is connected between two adjacent first semiconductor elements 10A in the y-direction of the first strip portion 625, and the other end is connected between two adjacent second semiconductor elements 10B in the y-direction of the third wiring portion 623. With this structure, the size of the fourth wiring portion 624 (second conductive member 62) when viewed from above can be better ensured. This is preferable in terms of reducing parasitic inductance.

[0174] The first strip 625 has a plurality of convex regions 625a that protrude further in the z2 direction than other portions. Each convex region 625a overlaps with each first semiconductor element 10A when viewed from above. Due to the structure of the first strip 625 having a plurality of convex regions 625a, improper contact between the first strip 625 and the first conductive member 61 bonded to the first semiconductor element 10A can be avoided.

[0175] The third wiring portion 623 has a plurality of concave regions 623a that protrude further in the z1 direction than other portions. Each concave region 623a is engaged with any one of the plurality of second semiconductor elements 10B. With this structure, the third wiring portion 623 (second conductive member 62) can be properly connected to the plurality of second semiconductor elements 10B, and the size of the third wiring portion 623 (second conductive member 62) in plan view can be ensured to a greater extent.

[0176] In the semiconductor module A1, in addition to the conducting components 6 (first conducting component 61 and second conducting component 62) with the above-described structure, there are also multiple first control terminals 46A-46E and multiple second control terminals 47A-47D for controlling multiple first semiconductor elements 10A and multiple second semiconductor elements 10B. The multiple first control terminals 46A-46E and multiple second control terminals 47A-47D are respectively arranged to extend along the z-direction on the main surface 201 of the conductive substrate 2. The semiconductor module A1 with this structure can achieve miniaturization when viewed from above, and is therefore suitable for achieving miniaturization when viewed from above while reducing parasitic inductance.

[0177] A plurality of first control terminals 46A to 46E are supported on the first conductive portion 2A and disposed further in the x2 direction than the plurality of first semiconductor elements 10A. A plurality of second control terminals 47A to 47D are supported on the second conductive portion 2B and disposed further in the x1 direction than the plurality of second semiconductor elements 10B. The plurality of first control terminals 46A to 46E and the plurality of second control terminals 47A to 47D are respectively arranged at intervals in the y direction. Thus, the plurality of first control terminals 46A to 46E and the plurality of second control terminals 47A to 47D are appropriately disposed in regions corresponding to the plurality of first semiconductor elements 10A constituting the upper arm circuit and the plurality of second semiconductor elements 10B constituting the lower arm circuit, respectively. This structure of semiconductor module A1 is more preferable in terms of reducing parasitic inductance while achieving miniaturization.

[0178] The first semiconductor element 10A and the second semiconductor element 10B each have a first main surface electrode 11 (gate electrode) facing the z2 direction. A first control terminal 46A is connected to the first main surface electrode 11 (gate electrode) of each first semiconductor element 10A via each first metal wire 731a. A second control terminal 47A is connected to the first main surface electrode 11 (gate electrode) of each second semiconductor element 10B via each second metal wire 731b. Thus, a drive signal for driving the first semiconductor element 10A (second semiconductor element 10B) with switching function can be appropriately input to the first main surface electrode 11 via the first control terminal 46A (second control terminal 47A) and the first metal wire 731a (second metal wire 731b).

[0179] When the semiconductor module A1 is mounted on the circuit board, each metal pin 452 is inserted into the pin hole of the circuit board on which the semiconductor module A1 is mounted and connected to the terminals around the pin hole. Input terminals 41, 42, and 43 each have input-side mating surfaces 411, 421, and 431 facing one side (z2 direction). Each output terminal 44 has an output-side mating surface 441 facing one side (z2 direction). The input-side mating surfaces 411, 421, 431 and the output-side mating surfaces 441 are connected to the terminals of the circuit board on which the semiconductor module A1 is mounted, for example, using solder. With the above structure, the power system circuit board connected to the input terminals 41-43 and the output terminal 44, and the control system circuit board connected to each metal pin 452, can be separately configured in the z-direction. Therefore, firstly, the freedom of arrangement of signal terminals in the semiconductor module A1 is increased. Secondly, the freedom of winding and length of signal wiring in the semiconductor module A1 is increased. Third, when using semiconductor module A1, the user has more freedom in configuring the circuit board.

[0180] In semiconductor module A1, each control terminal 45 protrudes from the resin main surface 81 and extends along the z-direction. In structures different from semiconductor module A1, there are cases where each control terminal 45 is configured to extend along a plane orthogonal to the z-direction (x-y plane). In this structure, miniaturization when viewed from above is limited. Therefore, as in semiconductor module A1, by configuring each control terminal 45 to extend along the z-direction, miniaturization of semiconductor module A1 when viewed from above can be achieved. That is, semiconductor module A1 is configured with a preferred packaging structure in terms of miniaturization when viewed from above.

[0181] In the semiconductor module A1 of this embodiment, a control terminal support 5 is located between each control terminal 45 and the main surface 201 (conductive substrate 2). The control terminal support 5 has an insulating layer 51, and each control terminal 45 is supported on the conductive substrate 2 via the control terminal support 5. With this structure of having a control terminal support 5, insulation between the control terminal support 5 and the conductive substrate 2 can be ensured, and the control terminals 45 can be properly supported on the conductive substrate 2.

[0182] The control terminal support 5 is a laminated structure having an insulating layer 51, a first metal layer 52, and a second metal layer 53 stacked on top of each other. The control terminal 45 is bonded to the first metal layer 52 formed on the upper surface of the control terminal support 5 via a conductive bonding material 459. With this structure, a pre-fabricated laminated structure (such as a DBC substrate) can be used as the control terminal support 5, and the control terminal 45 can be electrically bonded to the control terminal support 5 (first metal layer 52).

[0183] Semiconductor element 10 has a main surface 101 facing the z2 direction and a back surface 102 facing the z1 direction. A first main surface electrode 11 (gate electrode) is disposed on the main surface 101. The first main surface electrode 11 of each semiconductor element 10 is connected to the first metal layer 52 (first part 521) by a conductive metal wire 731. Thus, a drive signal for driving the semiconductor element 10 with switching function can be appropriately input to the first main surface electrode 11 via the control terminal 45, the first metal layer 52, and the metal wire 731.

[0184] Each control terminal 45 includes a bracket 451 and a metal pin 452. The bracket 451 is made of a conductive material and is configured to include a cylindrical portion. The metal pin 452 is a rod-shaped member extending in the z-direction and is pressed into the bracket 451. Furthermore, a portion of the bracket 451 (the upper surface of the upper protruding edge) protrudes from the sealing resin 8. With this structure, through the formation (molding) of the sealing resin 8, the bracket 451 is covered by the sealing resin 8 except for a portion (the upper end face), and the upper end face of the bracket 451 protrudes from the sealing resin 8. Therefore, the metal pin 452 can be inserted into the bracket 451 after the sealing resin 8 is formed. Thus, with the structure of the control terminal 45 including the aforementioned bracket 451 and metal pin 452, the complexity of the metal mold 91 used in the molding process can be avoided, making it suitable for efficiently manufacturing the semiconductor module A1.

[0185] The semiconductor module A1 of this embodiment includes a resin portion 87 that is bonded to the sealing resin 8. The resin portion 87 covers a portion of the support 451 (the upper surface of the upper protruding edge) and a portion of the metal pin 452 exposed from the sealing resin 8. This structure prevents foreign objects from intruding into the connection between the support 451 and the metal pin 452. The semiconductor module A1 with the above structure is preferred in terms of improved durability and reliability.

[0186] The sealing resin 8 has a plurality of second protrusions 852 protruding from the resin main surface 81. The plurality of second protrusions 852 surround a plurality of control terminals 45 when viewed from above. Each metal pin 452 of the plurality of control terminals 45 protrudes from each of the second protrusions 852. A resin portion 87 is disposed on each of the second protrusions 852. With this structure, the surface distance along the resin main surface 81 between adjacent control terminals 45 can be increased. This is preferable in terms of improving the voltage withstand capability of adjacent control terminals 45.

[0187] The conductive substrate 2 includes a first conductive portion 2A and a second conductive portion 2B spaced apart from each other in the x-direction. The first conductive portion 2A is located further in the x2 direction than the second conductive portion 2B. A plurality of semiconductor elements 10 include a first semiconductor element 10A bonded to the first conductive portion 2A and a second semiconductor element 10B bonded to the second conductive portion 2B. A plurality of control terminals 45 include first control terminals 46A-46E and second control terminals 47A-47D. The first control terminals 46A-46E are supported on the first conductive portion 2A and are located in the x-direction between the first semiconductor element 10A and input terminals 41, 42, etc. The second control terminals 47A-47D are located in the x-direction between the second semiconductor element 10B and output terminal 44. According to this structure, the plurality of control terminals 45 (first control terminals 46A-46E and second control terminals 47A-47D) are suitably arranged in regions corresponding to the first semiconductor element 10A constituting the upper arm circuit and the second semiconductor element 10B constituting the lower arm circuit, respectively. This structure is preferred for miniaturizing the semiconductor module A1.

[0188] The sealing resin 8 has a plurality of first protrusions 851 protruding from the resin main surface 81. A first protruding end face 851a is formed at the front end of each first protrusion 851. Each first protruding end face 851a of the plurality of first protrusions 851 is substantially parallel to the resin main surface 81 and lies on the same plane (x-y plane). According to this structure, in a device utilizing the power generated by the semiconductor module A1, a predetermined gap can be ensured between the surface of the control circuit board on which the semiconductor module A1 is mounted and the resin main surface 81. Thus, even when various functional components are mounted on the control circuit board opposite to the semiconductor module A1, improper contact between the functional components and the sealing resin 8 can be avoided.

[0189] In the semiconductor module A1, a conductive substrate 2 is provided on which each semiconductor element 10 is bonded. According to this structure, heat generated by energizing each semiconductor element 10 is transferred to the conductive substrate 2, and the heat transferred from each semiconductor element 10 diffuses on the conductive substrate 2. Therefore, the semiconductor module A1 is configured as a preferred packaging structure in terms of improving the heat dissipation performance of each semiconductor element 10.

[0190] In semiconductor module A1, conductive substrate 2 and support substrate 3 are bonded via a first conductive bonding material 71. The first conductive bonding material 71 comprises a first layer 712 and a second layer 713. The first layer 712 is bonded to the conductive substrate 2 via solid-state diffusion of a metal, such that they are directly in contact at the bonding interface. The second layer 713 is bonded to the support substrate 3 via solid-state diffusion of a metal, such that they are directly in contact at the bonding interface. According to this structure, compared to a case where the conductive substrate 2 and support substrate 3 are bonded using a bonding material such as solder, the bonding strength between the conductive substrate 2 and support substrate 3 can be improved. Therefore, semiconductor module A1 is a preferred packaging structure in terms of suppressing the peeling of the conductive substrate 2 and support substrate 3.

[0191] In semiconductor module A1, each semiconductor element 10 is bonded to the conductive substrate 2 via a second conductive bonding material 72. The second conductive bonding material 72 includes a third layer 722 and a fourth layer 723. The third layer 722 is bonded to each semiconductor element 10 (back electrode 15) via solid-state diffusion of a metal, such that they are directly in contact at the bonding interface. The fourth layer 723 is bonded to the conductive substrate 2 via solid-state diffusion of a metal, such that they are directly in contact at the bonding interface. According to this structure, compared to bonding the semiconductor elements 10 to the conductive substrate 2 using bonding materials such as solder, the bonding strength between the semiconductor elements 10 and the conductive substrate 2 can be improved. Therefore, semiconductor module A1 is a preferred packaging structure in terms of suppressing peeling between the semiconductor elements 10 and the conductive substrate 2.

[0192] In the semiconductor module A1 of this embodiment, the Young's modulus of the first base layer 711 in the first conductive bonding material 71 is smaller than the Young's modulus of the constituent materials of the first layer 712 and the second layer 713. According to this structure, when the first conductive bonding material 71 is bonded to the conductive substrate 2 and the support substrate 3 by solid-phase diffusion, stress can be mitigated by the relatively soft first base layer 711, achieving smoothing of the bonding boundary. Thus, the first layer 712 is more firmly bonded to the conductive substrate 2, and the second layer 713 is more firmly bonded to the support substrate 3 through solid-phase diffusion.

[0193] Furthermore, in this embodiment, the thickness of the first base layer 711 is greater than the thickness of both the first layer 712 and the second layer 713. Therefore, when bonding is achieved using solid-phase diffusion, the pressing pressure applied to the boundary between the first layer 712 and the conductive substrate 2 (back bonding layer 23), and to the boundary between the second layer 713 and the support substrate 3 (first bonding layer 321), becomes more uniform. Consequently, the first layer 712 and the conductive substrate 2, and the second layer 713 and the support substrate 3, can achieve a more robust conductive bonding state.

[0194] The first layer 712 and the second layer 713 are each composed of silver. According to this structure, when solid-phase diffusion bonding is used with the first conductive bonding material 71, oxidation of the first layer 712 and the second layer 713 can be suppressed, achieving good solid-phase diffusion bonding. Furthermore, the back bonding layer 23 and the first bonding layer 321, which are bonded to the first layer 712 and the second layer 713, also contain silver, thus achieving even better solid-phase diffusion bonding.

[0195] In this embodiment, the Young's modulus of the second base layer 721 in the second conductive bonding material 72 is smaller than that of the constituent materials of the third layer 722 and the fourth layer 723. According to this structure, when the second conductive bonding material 72 is bonded to the semiconductor element 10 (back electrode 15) and the conductive substrate 2 by solid-phase diffusion, stress can be mitigated by the relatively soft second base layer 721, achieving smoothing of the bonding boundary. Thus, the third layer 722 is more firmly bonded to the semiconductor element 10 (back electrode 15), and the fourth layer 723 is more firmly bonded to the conductive substrate 2 by solid-phase diffusion.

[0196] Furthermore, in this embodiment, the thickness of the second base layer 721 is greater than the thicknesses of the third layer 722 and the fourth layer 723. Therefore, during solid-phase diffusion bonding, the pressing pressure acting on the boundary between the third layer 722 and the semiconductor element 10 (back electrode 15), and on the boundary between the fourth layer 723 and the conductive substrate 2 (main surface bonding layer 22), becomes more uniform. Consequently, the third layer 722 and the semiconductor element 10 (back electrode 15), and the fourth layer 723 and the conductive substrate 2, can achieve a more robust conductive bonding state.

[0197] The third layer 722 and the fourth layer 723 are each composed of silver. According to this structure, when solid-state diffusion bonding is used with the second conductive bonding material 72, oxidation of the third layer 722 and the fourth layer 723 can be suppressed, achieving good solid-state diffusion bonding. Furthermore, the back electrode 15 and the main bonding layer 22, which are bonded to the third layer 722 and the fourth layer 723, also contain silver, thus achieving even better solid-state diffusion bonding.

[0198] The first conductive bonding material 71 has a structure in which a first layer 712 and a second layer 713, serving as Ag plating layers, are laminated on both sides of a first base layer 711 made of an Al-containing sheet. Similarly, the second conductive bonding material 72 has a structure in which a third layer 722 and a fourth layer 723, serving as Ag plating layers, are laminated on both sides of a second base layer 721 made of an Al-containing sheet. With this structure, the first conductive bonding material 71 and the second conductive bonding material 72 can be easily prepared.

[0199] In semiconductor module A1, an opening 63 is formed in the second conductive member 62. The opening 63 overlaps with the main surface 201 (conductive substrate 2) when viewed from above, but does not overlap with any of the semiconductor elements 10. According to this structure, during the molding process (the process of forming the sealing resin 8) in the manufacturing process of semiconductor module A1, a pressing pin 911 provided on the metal mold 91 can be inserted through the opening 63. Therefore, there is no interference with the second conductive member 62, and the conductive substrate 2 can be pressed by the pressing pin 911, thus suppressing warping of the support substrate 3 to which the conductive substrate 2 is bonded. This warping occurs, for example, in a manner where the two outer sides of the support substrate 3 in the y-direction are located higher than the central side in the y-direction. It is assumed that if the support substrate 3 is formed, there is a concern that the bonding strength between the conductive substrate 2 and the support substrate 3 may decrease. Furthermore, during molding, sometimes due to resin leakage, a portion of the sealing resin 8 forms on the bottom surface 302, which is a cause of poor bonding of heat dissipation components (e.g., heat sinks) bonded to the bottom surface 302. Therefore, the semiconductor module A1 is a preferred packaging structure in terms of improving the bonding strength between the conductive substrate 2 and the support substrate 3 by suppressing the warping of the support substrate 3, and is also a preferred packaging structure in terms of suppressing resin leakage of the sealing resin 8 to undesirable locations.

[0200] The conductive substrate 2 includes a first conductive portion 2A bonded to a plurality of first semiconductor elements 10A and a second conductive portion 2B bonded to a plurality of second semiconductor elements 10B. The first conductive portion 2A and the second conductive portion 2B are spaced apart in the x-direction, with the first conductive portion 2A located further x2 than the second conductive portion 2B. The second conductive member 62 is connected to the plurality of second semiconductor elements 10B and input terminals 42, 43, and the opening 63 of the second conductive member 62 overlaps with the main surface 201 of the first conductive portion 2A when viewed from above. With this structure, while ensuring a larger size of the second conductive member 62 when viewed from above, interference with the second conductive member 62 can be avoided during the formation of the sealing resin 8 (during molding), and the conductive substrate 2 can be pressed by the pressing pin 911 provided on the metal mold 91. Furthermore, by increasing the size of the second conductive member 62 when viewed from above, the parasitic resistance component of the second conductive member 62 (conducting member 6) constituting the path of the main circuit current can be suppressed.

[0201] The second conductive component 62 includes a first wiring portion 621, a second wiring portion 622, a third wiring portion 623, and a fourth wiring portion 624. The first wiring portion 621 and the second wiring portion 622 are respectively connected to input terminals 42 and 43, which are arranged on opposite sides of each other in the y-direction across the input terminal 41, and extend in the x-direction. The third wiring portion 623 is connected to both the first wiring portion 621 and the second wiring portion 622, extends in the y-direction, and is respectively connected to a plurality of second semiconductor elements 10B. An opening 63 is formed in each of the first wiring portions 621 and the second wiring portion 622 at a position near the x2 direction. Therefore, when viewed from above, the opening 63 is located near the two outer corners of the conductive substrate 2 (first conductive portion 2A) in the y-direction. Thus, when viewed from above, the opening 63 is located near the two outer corners of the support substrate 3 supporting the conductive substrate 2 (first conductive portion 2A) in the y-direction. This structure ensures a relatively large dimension of the second conductive member 62 in a top view, and during the formation of the sealing resin 8 (during molding), the pressing pin 911 provided on the metal mold 91 can be inserted into the opening 63 to press near the corners of the two outer sides in the y-direction of the conductive substrate 2 (first conductive part 2A). As described above, the warping of the support substrate 3 to which the conductive substrate 2 is joined occurs such that the two outer sides of the support substrate 3 in the y-direction are located higher than the central side in the y-direction. According to the above structure, the warping of the support substrate 3 during molding can be effectively suppressed.

[0202] In this embodiment, the conductive members 6 (first conductive member 61 and second conductive member 62) are made of sheet metal. This allows for the easy formation of an opening 63 in the second conductive member 62. Furthermore, the sheet metal conductive members 6 (first conductive member 61 and second conductive member 62) are readily adaptable to various shapes and sizes, and by ensuring sufficient contact area with other parts, the reliability of the connection with other parts can be improved.

[0203] A recess 201a is formed on the main surface 201 of the conductive substrate 2 (first conductive portion 2A) at a location overlapping with each opening 63 when viewed from above. Each recess 201a is a mark left by pressing pressure applied to the main surface 201 by the pressing pin 911 during molding. In this embodiment, by studying the arrangement of the second conductive member 62 and the opening 63 formed therein, interference with functional elements such as the semiconductor element 10 can be avoided during molding, and the appropriate location of the conductive substrate 2 (first conductive portion 2A) can be pressed by the pressing pin 911.

[0204] A resin void 86 is formed in the sealing resin 8, extending from the resin main surface 81 through the recess 201a. The resin void 86 is conical in shape, and its cross-sectional area decreases as it moves from the resin main surface 81 toward the recess 201a. This resin void 86 is formed during molding (when the sealing resin 8 is formed). After molding, the surface of the recess 201a in the main surface 201 of the conductive substrate 2 is exposed from the sealing resin 8. In this embodiment, the resin void 86 is filled with a resin filling portion 88 to bury it. With this structure, it is possible to prevent foreign matter (including moisture) from intruding into the recess 201a exposed from the sealing resin 8. The semiconductor module A1 with the above structure is preferred in terms of improving durability and reliability.

[0205] In this embodiment, each opening 63 formed in the second conductive member 62 (conductive member 6) is a through hole extending in the z-direction. According to this structure, in the second conductive member 62 (conductive member 6) constituting the path of the main circuit current, the deviation of the current path caused by the formation of the opening 63 can be suppressed.

[0206] Semiconductor module A1 includes a conducting component 6. The conducting component 6 forms the path of the main circuit current switched by each semiconductor element 10. The conducting component 6 includes first conducting components 61 connected to each first semiconductor element 10A, and second conducting components 62 connected to each second semiconductor element 10B. The conducting components 6 (each first conducting component 61 and each second conducting component 62) are made of a metal plate. The main circuit current is sometimes a relatively large value. In this case, suppressing the parasitic resistance component in the conducting component 6, which serves as the path of the main circuit current, is preferable in terms of reducing the power consumption of semiconductor module A1. Therefore, in semiconductor module A1, as described above, the conducting component 6 is made of a metal plate instead of bonding leads to suppress the parasitic resistance component in the conducting component 6. That is, semiconductor module A1 is configured with a preferred packaging structure in terms of suppressing parasitic resistance components.

[0207] In semiconductor module A1, each first semiconductor element 10A is rectangular in shape when viewed from above, and the four corners of the first semiconductor element 10A do not overlap with the second conductive member 62 when viewed from above. According to this structure, in the manufacturing process of semiconductor module A1, before the process of forming the encapsulating resin 8, a visual inspection can be performed to check whether the first semiconductor elements 10A are properly bonded. That is, semiconductor module A1 can be inspected midway through manufacturing (e.g., during the manufacturing process). Figure 23In the state shown, a visual inspection of the bonding state of each first semiconductor element 10A is performed, thereby determining whether each first semiconductor element 10A is properly bonded. For example, the distance between the four corners of the first semiconductor element 10A is measured by laser ranging. If the measured distance difference between the four corners is small, it can be determined that the first semiconductor element 10A is properly bonded. Therefore, the semiconductor module A1 can perform visual inspection during manufacturing, thus constituting a preferred packaging structure in terms of improving reliability. Furthermore, during the visual inspection, it is sufficient to confirm at least three corners of the first semiconductor element 10A when viewed from above, so it is sufficient that these three corners do not overlap with the second conductive member 62. In addition, as shown... Figure 5 As shown, similarly, in each of the second semiconductor elements 10B, when viewed from above, the four corners of each second semiconductor element 10B do not overlap with the second conductive member 62. Therefore, in the manufacturing process of the semiconductor module A1, before the process of forming the encapsulating resin 8, a visual inspection can be performed to check whether each of the second semiconductor elements 10B is properly bonded. The visual inspection can also be an automated visual inspection using photography and image processing.

[0208] The second conductive component 62 includes a first wiring section 621, a second wiring section 622, a third wiring section 623, and a fourth wiring section 624. The first wiring section 621 and the second wiring section 622 are respectively connected to input terminals 42 and 43, which are arranged on opposite sides of each other in the y-direction across the input terminal 41, and extend in the x-direction. The third wiring section 623 is connected to both the first wiring section 621 and the second wiring section 622, extends in the y-direction, and is connected to a plurality of second semiconductor elements 10B. The fourth wiring section 624 is connected to both the first wiring section 621 and the second wiring section 622. The fourth wiring section 624 is located on the x2 direction side relative to the third wiring section 623 and overlaps with the plurality of first semiconductor elements 10A when viewed from above. The second conductive member 62, which comprises the first wiring portion 621, the second wiring portion 622, the third wiring portion 623, and the fourth wiring portion 624, overlaps with a wide area of ​​the main surface 201 when viewed from above, resulting in a relatively large size when viewed from above. This increased size of the second conductive member 62 when viewed from above is more preferable in terms of suppressing the parasitic resistive component of the second conductive member 62 (conductive member 6) that forms the path of the main circuit current.

[0209] Each first semiconductor element 10A, when viewed from above, has a first side 191, a second side 192, a third side 193, and a fourth side 194. The first side 191 and the second side 192 extend in the y-direction. The first side 191 is the edge on the x2 direction side when viewed from above, and the second side 192 is the edge on the x1 direction side when viewed from above. The third side 193 and the fourth side 194 extend in the x-direction. The third side 193 is the edge on the y2 direction side when viewed from above, and the fourth side 194 is the edge on the y1 direction side when viewed from above. Each first semiconductor element 10A is rectangular in shape when viewed from above, therefore the four corners formed by the first side 191, the second side 192, the third side 193, and the fourth side 194 are approximately right angles when viewed from above. On the other hand, the fourth wiring portion 624 (first strip portion 625) of the second conducting member 62 has a first edge 627 and a second edge 628. The first edge 627 is the edge in the fourth wiring portion 624 located in the x2 direction, and when viewed from above, it is located further in the x1 direction than the first side 191. The first edge 627 also extends at least from the third side 193 to the fourth side 194 in the y direction. Therefore, when viewed from above, the two corners 171 and 172 on the x2 direction side of each first semiconductor element 10A do not overlap with the second conductive member 62. The second edge 628 is the edge in the fourth wiring portion 624 (first strip portion 625) located in the x1 direction, and when viewed from above, it is located further in the x2 direction than the second side 192. The second edge 628 also extends at least from the third side 193 to the fourth side 194 in the y direction. Therefore, when viewed from above, the two corners 173 and 174 on the x1 direction side of each first semiconductor element 10A do not overlap with the second conductive member 62. In this structure, by ensuring that the area of ​​the fourth wiring portion 624 overlaps with each of the first semiconductor elements 10A when viewed from above, the size of the second conducting member 62 when viewed from above is increased, and the four corners of the first semiconductor elements 10A do not overlap with the second conducting member 62 when viewed from above. Therefore, the parasitic resistance component of the second conducting member 62 (conducting member 6) can be effectively suppressed, and the visual inspection of the bonding state of each of the first semiconductor elements 10A can be performed during the manufacturing of the semiconductor module A1.

[0210] The fourth wiring portion 624 (first strip portion 625) has multiple convex regions 625a that protrude further in the z2 direction than other portions. Each convex region 625a overlaps with each first semiconductor element 10A when viewed from above. Due to the structure of the fourth wiring portion 624 having multiple convex regions 625a, improper contact between the fourth wiring portion 624 and the first conductive member 61 bonded to the first semiconductor element 10A can be avoided.

[0211] The third wiring portion 623 has a plurality of concave regions 623a that protrude further in the z1 direction than other portions. Each concave region 623a is engaged with any one of the plurality of second semiconductor elements 10B. With this structure, the third wiring portion 623 (second conductive member 62) can be properly connected to the plurality of second semiconductor elements 10B, and the size of the third wiring portion 623 (second conductive member 62) in plan view can be ensured to a greater extent.

[0212] When viewed in the x-direction, the multiple first semiconductor elements 10A and the multiple second semiconductor elements 10B overlap each other. With this structure, the size of the conductive substrate 2 (first conductive portion 2A and second conductive portion 2B) on which the multiple first semiconductor elements 10A and the multiple second semiconductor elements 10B are disposed can be suppressed in the y-direction, and the miniaturization of the semiconductor module A1 can be achieved.

[0213] Semiconductor module A1 includes a conductive substrate 2, two input terminals 41 and 42 (or two input terminals 41 and 43), an output terminal 44, and a conductive component 6. The conductive substrate 2 includes a first conductive portion 2A and a second conductive portion 2B arranged in the x-direction when viewed from above. A plurality of first semiconductor elements 10A are electrically connected to the first conductive portion 2A. Additionally, a plurality of second semiconductor elements 10B are electrically connected to the second conductive portion 2B. The plurality of first semiconductor elements 10A and the plurality of second semiconductor elements 10B are arranged at intervals along the y-direction. The two input terminals 41 and 42 (or two input terminals 41 and 43) are located in the x2 direction relative to the first conductive portion 2A. Input terminal 41 is a positive terminal and is connected to the first conductive portion 2A. Input terminal 42 (or input terminal 43) is a negative terminal. The output terminal 44 is located in the x1 direction relative to the second conductive portion 2B. The conducting component 6 includes a first conducting component 61 connected to a plurality of first semiconductor elements 10A and a second conductive portion 2B, and a second conducting component 62 connected to a plurality of second semiconductor elements 10B and an input terminal 42 (or an input terminal 43). According to this structure, the path of the main circuit current, configured to be switched by the plurality of semiconductor elements 10 (a plurality of first semiconductor elements 10A and a plurality of second semiconductor elements 10B), is along the x-direction when viewed from above, and is configured as the axis of symmetry of the semiconductor module A1 in a planar structure (see reference). Figure 5The auxiliary line L1 is along the y-direction when viewed from above. That is, the aforementioned axis of symmetry is orthogonal to the path of the main circuit current. As a result, in the main circuit current input from the two input terminals 41, 42 (or the two input terminals 41, 43) and output from the output terminal 44, the difference in current paths to the plurality of first semiconductor elements 10A and the plurality of second semiconductor elements 10B can be reduced. That is, the deviation of parasitic inductance components and current deviation in semiconductor module A1 can be suppressed. Therefore, semiconductor module A1 is configured in a preferred package structure in terms of equalizing parasitic inductance components in the path of main circuit current and equalizing the amount of current to each semiconductor element 10.

[0214] Each first semiconductor element 10A and each second semiconductor element 10B are spaced apart in the x-direction. Each first semiconductor element 10A and each second semiconductor element 10B are arranged along the y-direction. Therefore, the direction in which the semiconductor elements 10A are arranged is orthogonal to the direction of flow of the first main circuit current or the second main circuit current. Thus, when multiple switching elements are connected in parallel as in this embodiment, the difference in the length of the current path that generates the first main circuit current between the three first semiconductor elements 10A can be suppressed. Therefore, the parasitic resistance component in the conducting member 6, which serves as the path for the main circuit current, can be suppressed.

[0215] The regions where the first main circuit current flows and the regions where the second main circuit current flows are configured to overlap when viewed from above. That is, to allow the second main circuit current to flow, the second conductive member 62, which connects the output terminal 44 and the first input terminal 42 (which serves as the negative terminal) and the second input terminal 43, is positioned above the region where the first main circuit current flows (first conductive part 2A, first conductive member 61, second conductive part 2B). The direction of the first main circuit current flow is opposite to the direction of the second main circuit current flow. Therefore, with this configuration, the magnetic fields generated by the first main circuit current and the second main circuit current can be canceled out, thus reducing inductance.

[0216] The semiconductor module A1 in this embodiment has two input terminals 42 and 43. These input terminals 42 and 43 are both negative terminals and are separated from the input terminal 41 in the y-direction. Furthermore, the second conducting member 62 is connected to the two input terminals 42 and 43. With this structure, the deviation of the current path flowing from the output terminal 44 through each of the second semiconductor elements 10B and the second conducting member 62 to each of the input terminals 42 and 43 can be further reduced.

[0217] In semiconductor module A1, the second conducting component 62 includes a first wiring section 621, a second wiring section 622, a third wiring section 623, and a fourth wiring section 624. The first wiring section 621 and the second wiring section 622 are respectively connected to input terminals 42 and 43, which are arranged on opposite sides of each other in the y-direction across the input terminal 41, and extend in the x-direction. The third wiring section 623 is connected to both the first wiring section 621 and the second wiring section 622, extends in the y-direction, and is connected to a plurality of second semiconductor elements 10B. The fourth wiring section 624 is located on the x2-direction side relative to the third wiring section 623 and is connected to any one of the first wiring section 621, the second wiring section 622, and the third wiring section 623. The second conductive member 62, configured to include the first wiring section 621, the second wiring section 622, the third wiring section 623, and the fourth wiring section 624, overlaps extensively with the main surface 201 when viewed from above, thus ensuring a larger dimensional footprint when viewed from above. With this structure, deviations in the path of current flowing from the output terminal 44 through each of the second semiconductor elements 10B and the second conductive member 62 to each of the input terminals 42, 43 can be appropriately reduced. Therefore, the semiconductor module A1 of this embodiment is more preferable in achieving equalization of the parasitic inductance component in the path of the main circuit current (the second conductive member 62) and equalization of the amount of current flowing to each of the second semiconductor elements 10B.

[0218] The fourth wiring portion 624 is connected to both the first wiring portion 621 and the second wiring portion 622, and overlaps with multiple first semiconductor elements 10A when viewed from above. Furthermore, the fourth wiring portion 624 (first strip portion 625) has multiple convex regions 625a that protrude further in the z2 direction than other portions. Each convex region 625a overlaps with each first semiconductor element 10A when viewed from above. With this structure, the dimensions of the fourth wiring portion 624 (second conductive member 62) when viewed from above can be largely ensured, and improper contact between the fourth wiring portion 624 and the first conductive member 61 bonded to the first semiconductor element 10A can be avoided.

[0219] When viewed in the x-direction, the multiple first semiconductor elements 10A and the multiple second semiconductor elements 10B overlap each other. With this structure, the size of the conductive substrate 2 (first conductive portion 2A and second conductive portion 2B) on which the multiple first semiconductor elements 10A and the multiple second semiconductor elements 10B are disposed can be suppressed in the y-direction, and the miniaturization of the semiconductor module A1 can be achieved.

[0220] Figures 30-32 This refers to the semiconductor module of the second embodiment. In the semiconductor module A2 of this embodiment, the structure of the second conducting member 62 is different from that of the semiconductor module A1 of the above embodiment.

[0221] In this embodiment, the area occupied by the fourth wiring portion 624 of the second conducting member 62 differs from that in the embodiment described above. Specifically, the x-direction dimension of the first strip portion 625 is larger than that of the semiconductor module A1 described above. For example... Figure 31 , Figure 32 As shown, compared to the semiconductor module A1 described above, the second edge 628 of the first strip 625 is located on the x1 direction side. Figure 32 As shown, the second edge 628 is located further in the x1 direction than the second side 192 of the first semiconductor element 10A when viewed from above. Therefore, when viewed from above, the two corners of the x1 direction side of each first semiconductor element 10A overlap with the second conducting member 62 (first strip 625).

[0222] The semiconductor module A2 according to this embodiment also achieves the same functional effect as the semiconductor module A1 of the above embodiment. Furthermore, in the semiconductor module A2, the size of the first strip portion 625 (second conducting member 62) of the fourth wiring portion 624 when viewed from above can be significantly improved. This is even more preferable in terms of reducing parasitic inductance.

[0223] Figure 33 as well as Figure 34 This refers to the semiconductor module of the third embodiment. The main difference between the semiconductor module A3 of this embodiment and the semiconductor module A1 of the above embodiment lies in the structure of the second conducting component 62.

[0224] In semiconductor module A3, unlike the embodiment described above, the second conductive member 62 does not have an opening 63. When manufacturing semiconductor module A3, the metal mold 91 used for forming (molding) the sealing resin 8 does not have a pressing pin 911. Therefore, as... Figure 34 As shown, no resin voids 86 are formed in the sealing resin 8, and no recesses 201a are formed on the main surface 201 of the conductive substrate 2 (the first conductive portion 2A and the second conductive portion 2B). Furthermore, since no resin voids 86 are formed in the sealing resin 8, the semiconductor module A3 of this embodiment also lacks the resin filling portion 88 used to fill the resin voids 86 in the above embodiment.

[0225] In this embodiment, the semiconductor module A3 also has the same effect as the semiconductor module A1 in the above embodiment.

[0226] The semiconductor module disclosed herein is not limited to the embodiments described above. The specific structure of each part of the semiconductor module disclosed herein can be freely modified in various ways.

[0227] In the above embodiment, the first conductive portion 2A and the second conductive portion 2B are arranged at a distance from each other in the x-direction, and the plurality of first semiconductor elements 10A bonded to the first conductive portion 2A and the plurality of second semiconductor elements 10B bonded to the second conductive portion 2B are arranged side by side in the y-direction. Alternatively, unlike the above structure, the first conductive portion 2A and the second conductive portion 2B may be arranged at a distance from each other in the y-direction. In this case, the plurality of first semiconductor elements 10A bonded to the first conductive portion 2A and the plurality of second semiconductor elements 10B bonded to the second conductive portion 2B are arranged side by side in the x-direction. According to this structure, in the configuration where the input terminals 41-43 are arranged relative to the conductive substrate 2 in the x2 direction and the output terminal 44 is arranged relative to the conductive substrate 2 in the x1 direction, the upper arm current path flowing from the first conductive portion 2A through each first semiconductor element 10A and each first conducting member 61 to the second conductive portion 2B, and the lower arm current path flowing from the second conductive portion 2B through each second semiconductor element 10B to the second conducting member 62, are respectively along the y direction and are oriented in opposite directions. According to this structure, the magnetic field generated by the current along the upper arm current path and the magnetic field generated by the current along the lower arm current path cancel each other out, thereby reducing the parasitic inductance component.

[0228] In the above embodiments, the plurality of control terminals 45 (the plurality of first control terminals 46A to 46E and the plurality of second control terminals 47A to 47D) are configured such that each control terminal 45 extends along the z-direction, but this is not a limitation. For example, it may also be a structure in which each control terminal 45 extends along a plane orthogonal to the z-direction (x-y plane).

[0229] This disclosure includes the structure described in the following notes.

[0230] Postscript 1.

[0231] A semiconductor module, comprising:

[0232] A conductive substrate having a main surface facing one side in the thickness direction and a back surface facing the opposite side to the main surface;

[0233] A semiconductor element electrically connected to the aforementioned main surface and having a switching function;

[0234] The conducting component forms the path of the main circuit current switched by the aforementioned semiconductor element;

[0235] The first input terminal, the second input terminal, and the third input terminal are disposed on one side of a first direction perpendicular to the thickness direction relative to the conductive substrate; and

[0236] The output terminal is disposed on the opposite side of the aforementioned conductive substrate in the first direction.

[0237] The aforementioned conductive substrate includes a first conductive portion and a second conductive portion.

[0238] The aforementioned semiconductor element includes a first semiconductor element electrically connected to the first conductive portion and a second semiconductor element electrically connected to the second conductive portion.

[0239] The second input terminal and the third input terminal are disposed on one side and the other side of a second direction that is perpendicular to both the thickness direction and the first direction, separated by the first input terminal.

[0240] The aforementioned first input terminal is one of the positive and negative terminals, and is electrically connected to the aforementioned first conductive part.

[0241] The aforementioned second input terminal and the aforementioned third input terminal are the other pole between the positive and negative poles.

[0242] Postscript 2.

[0243] According to the semiconductor module described in Appendix 1,

[0244] The aforementioned first input terminal is electrically connected to the aforementioned first conductive part.

[0245] The aforementioned output terminal is electrically connected to the aforementioned second conductive part.

[0246] The aforementioned conductive components include:

[0247] A first conductive component, which is connected to the first semiconductor element and the second conductive portion; and

[0248] The second conductive component is connected to the second semiconductor element, the second input terminal, and the third input terminal, and overlaps with the first semiconductor element when viewed in the thickness direction.

[0249] Postscript 3.

[0250] According to the semiconductor module described in Appendix 2,

[0251] The first conductive portion and the second conductive portion are disposed on one side of the first direction and the other side of the first direction.

[0252] The aforementioned second conductive component includes:

[0253] The first wiring section is connected to the second input terminal and extends in the first direction;

[0254] The second wiring section is connected to the third input terminal and extends in the first direction.

[0255] The third wiring section is connected to both the first wiring section and the second wiring section, and extends in the second direction to connect to the second semiconductor element; and

[0256] The fourth wiring section is connected to both the first wiring section and the second wiring section, and is located on one side of the first direction relative to the third wiring section, and overlaps with the first semiconductor element when viewed in the thickness direction.

[0257] Appendix 4.

[0258] According to the semiconductor module described in Appendix 3,

[0259] The first semiconductor element and the second semiconductor element respectively have a source electrode facing one side of the thickness direction and a drain electrode facing the other side of the thickness direction.

[0260] The aforementioned first conducting component is connected to the aforementioned source electrode of the aforementioned first semiconductor element.

[0261] The first conductive portion is connected to the drain electrode of the first semiconductor element.

[0262] The third wiring section is connected to the source electrode of the second semiconductor element.

[0263] The second conductive portion is connected to the drain electrode of the second semiconductor element.

[0264] Postscript 5.

[0265] According to the semiconductor module described in Appendix 4,

[0266] The first semiconductor element and the second semiconductor element overlap when viewed in the first direction.

[0267] Postscript 6.

[0268] According to the semiconductor module described in Appendix 5,

[0269] The aforementioned fourth wiring section has a first strip section and a second strip section.

[0270] The first strip portion is spaced apart from the third wiring portion in the first direction, and is connected to both the first wiring portion and the second wiring portion, extending in the second direction, and overlaps with the first semiconductor element when viewed in the thickness direction.

[0271] When viewed in the aforementioned thickness direction, one end of the second strip is connected between the first semiconductor elements adjacent to the first strip, and the other end is connected between the second semiconductor elements adjacent to the third wiring portion.

[0272] Postscript 7.

[0273] According to the semiconductor module described in Appendix 6,

[0274] When viewed in the thickness direction, the first strip overlaps with the first semiconductor element and has a convex region that protrudes further in the thickness direction than other portions.

[0275] Postscript 8.

[0276] According to any one of the notes 3 to 7, the semiconductor module

[0277] The aforementioned third wiring section has a concave region that protrudes further to the opposite side of the aforementioned thickness direction than other parts.

[0278] The concave region is bonded to the second semiconductor element.

[0279] Postscript 9.

[0280] According to any one of the notes 3 to 8, the semiconductor module

[0281] It includes a first control terminal and a second control terminal for controlling the first semiconductor element and the second semiconductor element.

[0282] The first control terminal and the second control terminal are respectively disposed on the main surface and extend along the thickness direction.

[0283] Postscript 10.

[0284] According to the semiconductor module described in Appendix 9,

[0285] The aforementioned first control terminal is supported on the aforementioned first conductive portion and is disposed on the side further away from the aforementioned first direction than the aforementioned first semiconductor element.

[0286] The second control terminal is supported on the second conductive portion and is disposed on the side further away from the first direction than the second semiconductor element.

[0287] Postscript 11.

[0288] According to the semiconductor module described in Appendix 10,

[0289] The first semiconductor element and the second semiconductor element each have a gate electrode facing one side of the thickness direction.

[0290] The first control terminal is connected to the gate electrode of the first semiconductor element via a conductive first metal wire.

[0291] The second control terminal is connected to the gate electrode of the second semiconductor element via a conductive second metal wire.

[0292] Postscript 12.

[0293] According to the semiconductor module described in any one of Appendix 1 to 11,

[0294] The first input terminal, the second input terminal, and the third input terminal overlap when viewed in the second direction.

[0295] Postscript 13.

[0296] According to the semiconductor module described in any one of Appendix 1 to 12,

[0297] The aforementioned conductive components are made of metal sheet.

[0298] Postscript 14.

[0299] According to the semiconductor module described in any one of Appendix 1 to 13,

[0300] The first input terminal, the second input terminal, and the third input terminal each include an input-side mating surface extending toward one side of the first direction and toward one side of the thickness direction.

[0301] The aforementioned output terminal includes an output-side mating surface that extends toward the other side of the aforementioned first direction and toward the other side of the aforementioned thickness direction.

[0302] Postscript 15.

[0303] According to any one of the appendices 1 to 14, the semiconductor module

[0304] The first input terminal, the second input terminal, and the third input terminal each have: an input-side side surface located at the periphery of the input-side mating surface when viewed in the thickness direction and facing a direction intersecting the input-side mating surface; and an input-side machining mark formed on the input-side side surface.

[0305] The output terminal has an output side surface located at the periphery of the output side mating surface when viewed in the thickness direction and facing the direction intersecting the output side mating surface; and an output side machining mark formed on the output side surface.

[0306] Postscript 16.

[0307] According to any one of the notes 1 to 15, the semiconductor module

[0308] It also includes a sealing resin that covers at least a portion of the conductive substrate, the semiconductor element, and the conductive component.

[0309] Postscript 17.

[0310] According to the semiconductor module described in any one of Appendix 3 to 12,

[0311] A plurality of the aforementioned first semiconductor elements are arranged at intervals in the aforementioned second direction; and

[0312] A plurality of the aforementioned second semiconductor elements are arranged at intervals in the aforementioned second direction.

[0313] Postscript 18.

[0314] A semiconductor module, comprising:

[0315] A conductive substrate having a main surface facing one side in the thickness direction and a back surface facing the opposite side to the main surface;

[0316] A semiconductor element electrically connected to the aforementioned main surface and having a switching function;

[0317] The conducting component, which forms the path of the main circuit current switched by the semiconductor element, is spaced apart from the main surface on one side of the thickness direction.

[0318] The first input terminal, the second input terminal, and the third input terminal are disposed on one side of a first direction perpendicular to the thickness direction relative to the conductive substrate; and

[0319] The output terminal is disposed on the opposite side of the aforementioned conductive substrate in the first direction.

[0320] The aforementioned conductive substrate includes a first conductive portion and a second conductive portion that are spaced apart from each other when viewed in the aforementioned thickness direction.

[0321] The aforementioned semiconductor element includes a plurality of first semiconductor elements electrically bonded to the aforementioned first conductive portion, and a plurality of second semiconductor elements electrically bonded to the aforementioned second conductive portion.

[0322] The second input terminal and the third input terminal are disposed on one side and the other side of a second direction that is perpendicular to both the thickness direction and the first direction, separated by the first input terminal.

[0323] The first input terminal is connected to the first conductive part.

[0324] The aforementioned output terminal is connected to the aforementioned second conductive part.

[0325] The aforementioned conductive component includes: a first conductive component connected to the plurality of first semiconductor elements and the second conductive portion; and a second conductive component connected to the plurality of second semiconductor elements, the second input terminal, and the third input terminal, and overlapping with the first semiconductor elements when viewed in the thickness direction.

[0326] Postscript 19.

[0327] According to the semiconductor module described in Appendix 18,

[0328] The first conductive portion and the second conductive portion are disposed on one side of the first direction and the other side of the first direction.

[0329] The plurality of first semiconductor elements and the plurality of second semiconductor elements are respectively arranged at intervals along the second direction.

[0330] The aforementioned second conductive component includes:

[0331] The first wiring section is connected to the second input terminal and extends in the first direction;

[0332] The second wiring section is connected to the third input terminal and extends in the first direction.

[0333] The third wiring section is connected to both the first wiring section and the second wiring section, and extends in the second direction, connecting to the plurality of second semiconductor elements respectively; and

[0334] The fourth wiring section is connected to both the first wiring section and the second wiring section, and is located on one side of the first direction relative to the third wiring section, and overlaps with the plurality of first semiconductor elements when viewed in the thickness direction.

[0335] Postscript 20.

[0336] According to the semiconductor module described in Appendix 19,

[0337] The first semiconductor element and the second semiconductor element respectively have a source electrode facing one side of the thickness direction and a drain electrode facing the other side of the thickness direction.

[0338] The aforementioned first conducting component is connected to the aforementioned source electrode of the aforementioned first semiconductor element.

[0339] The first conductive portion is connected to the drain electrode of the first semiconductor element.

[0340] The third wiring section is connected to the source electrode of the second semiconductor element.

[0341] The second conductive portion is connected to the drain electrode of the second semiconductor element.

[0342] Postscript 21.

[0343] According to the semiconductor module described in Appendix 20,

[0344] The aforementioned plurality of first semiconductor elements and the aforementioned plurality of second semiconductor elements overlap when viewed in the aforementioned first direction.

[0345] Postscript 22.

[0346] According to the semiconductor module described in Appendix 21,

[0347] The aforementioned fourth wiring section has a first strip section and a second strip section.

[0348] The first strip portion is spaced apart from the third wiring portion in the first direction, and is connected to both the first wiring portion and the second wiring portion, extending in the second direction. When viewed in the thickness direction, it overlaps with the plurality of first semiconductor elements.

[0349] When viewed in the aforementioned thickness direction, one end of the second strip is connected between the first semiconductor elements adjacent to the first strip, and the other end is connected between the second semiconductor elements adjacent to the third wiring portion.

[0350] Postscript 23.

[0351] According to the semiconductor module described in Appendix 22,

[0352] When viewed in the thickness direction, the first strip overlaps with each of the first semiconductor elements and has multiple convex regions that protrude further toward one side of the thickness direction than other portions.

[0353] Postscript 24.

[0354] According to the semiconductor module described in any one of notes 19 to 23,

[0355] The aforementioned third wiring section has multiple concave regions that protrude further toward the other side in the thickness direction than the other parts.

[0356] Each of the aforementioned concave regions is coupled to any one of the aforementioned plurality of second semiconductor elements.

[0357] Postscript 25.

[0358] According to the semiconductor module described in any one of notes 19 to 24,

[0359] It includes multiple first control terminals and multiple second control terminals for controlling the plurality of first semiconductor elements and the plurality of second semiconductor elements.

[0360] The aforementioned plurality of first control terminals and the aforementioned plurality of second control terminals are respectively disposed on the aforementioned main surface and extend along the aforementioned thickness direction.

[0361] Postscript 26.

[0362] According to the semiconductor module described in Appendix 25,

[0363] The aforementioned plurality of first control terminals are supported on the aforementioned first conductive portion, and are arranged at intervals in the aforementioned second direction on a side further away from the aforementioned first semiconductor elements than in the aforementioned first direction.

[0364] The aforementioned plurality of second control terminals are supported on the aforementioned second conductive portion and are arranged at intervals in the aforementioned second direction on the side further away from the aforementioned first direction than the aforementioned plurality of second semiconductor elements.

[0365] Postscript 27.

[0366] According to the semiconductor module described in Appendix 26,

[0367] The first semiconductor element and the second semiconductor element each have a gate electrode facing one side of the thickness direction.

[0368] The first control terminal is connected to the gate electrode of the first semiconductor element via a conductive first metal wire.

[0369] The second control terminal is connected to the gate electrode of the second semiconductor element via a conductive second metal wire.

[0370] Postscript 28.

[0371] According to any one of the notes 18 to 27, the semiconductor module

[0372] The first input terminal, the second input terminal, and the third input terminal overlap when viewed in the second direction.

[0373] Postscript 29.

[0374] According to any one of the appendices 18 to 28, the semiconductor module

[0375] The first conductive component and the second conductive component are made of metal plates.

[0376] Explanation of symbols

[0377] A1, A2, A3—Semiconductor modules; 10—Semiconductor element; 10A—First semiconductor element; 10B—Second semiconductor element; 101—Element main surface; 102—Element back surface; 11—First main surface electrode (gate electrode); 12—Second main surface electrode (source electrode); 13—Third main surface electrode; 14—Fourth main surface electrode; 15—Back surface electrode (drain electrode); 16—Fifth main surface electrode; 171, 172, 173, 174, 181, 182, 183, 184—Corners; 191—First side; 192—Second side; 193—Third side; 194—Fourth side; 2—Conductive substrate; 2A—First conductive portion; 2B—Second conductive portion; 201—Main surface; 201a—Recess; 2 01b—Recessed edge, 202—Back side, 21—Substrate, 22—Main surface bonding layer, 23—Back surface bonding layer, 3—Support substrate, 301—Support surface, 302—Bottom surface, 31—Insulating layer, 32—First metal layer, 32A—First part, 32B—Second part, 321—First bonding layer, 33—Second metal layer, 41—Input terminal (first input terminal), 411—Input side bonding surface, 412—Input side surface, 413—Front end surface, 414—Side surface, 42—Input terminal (second input terminal), 421—Input side bonding surface, 422—Input side surface, 423—Front end surface, 424—Side surface, 43—Input terminal (third input terminal), 431—Input side bonding surface, 432— Input side surface, 433—Front end face, 434—Side surface, 44—Output terminal, 441—Output side mating surface, 442—Output side surface, 443—Front end face, 444—Side surface, 45—Control terminal, 451—Bracket, 452—Metal pin, 459—Conductive bonding material, 46A, 46B, 46C, 46D, 46E—First control terminal, 47A, 47B, 47C, 47D—Second control terminal, 5—Control terminal support, 51—Insulating layer, 52—First metal layer, 521—First part, 522—Second part, 523—Third part, 524—Fourth part, 525—Fifth part, 53—Second metal layer, 59—Bonding material, 6—Conductive component, 601—First part 61—First conductive component, 61h—Opening, 62—Second conductive component, 62A—First part, 62B—Second part, 621—First wiring part, 622—Second wiring part, 623—Third wiring part, 623a—Concave region, 623h—Opening, 624—Fourth wiring part, 625—First strip-shaped part, 625a—Convex region, 625h—Opening, 626—Second strip-shaped part, 627—First end edge, 628—Second end edge, 63—Opening, 69—Conductive bonding material, 71—First conductive bonding material, 711—First base layer, 712—First layer, 713—Second layer, 72—Second conductive bonding material, 721—Second base layer, 722—Third layer, 723—Fourth layer731—Metal wire (for connecting the gate electrode to the first metal layer), 731a—First metal wire, 731b—Second metal wire, 732, 733, 734, 735—Metal wires, 8—Sealing resin, 81—Main surface of resin, 82—Back surface of resin, 831, 832—Side surface of resin, 832a—Recess, 833, 834—Side surface of resin, 851—First protrusion, 851a—First protruding end face, 851b—Recess, 851c—Inner wall surface, 852—Second protrusion, 86—Resin void, 861—End edge of resin void, 87—Resin portion, 88—Resin filling portion, 91—Metal mold, 911—Pressing pin.

Claims

1. A semiconductor module, characterized in that, have: A conductive substrate having a main surface facing one side in the thickness direction and a back surface facing the opposite side to the main surface; A semiconductor element electrically connected to the aforementioned main surface and having a switching function; Multiple control terminals are used to control the aforementioned semiconductor components; The conducting component forms the path of the main circuit current switched by the aforementioned semiconductor element; The first input terminal, the second input terminal, and the third input terminal are disposed on one side of a first direction perpendicular to the thickness direction relative to the conductive substrate. The output terminal is disposed on the opposite side of the conductive substrate in the first direction; and A sealing resin that covers at least a portion of the conductive substrate, the semiconductor element, and the conductive component. The aforementioned conductive substrate includes a first conductive portion and a second conductive portion. The aforementioned semiconductor element includes a plurality of first semiconductor elements electrically bonded to the aforementioned first conductive portion, and a plurality of second semiconductor elements electrically bonded to the aforementioned second conductive portion. The aforementioned plurality of control terminals include a first control terminal for controlling each of the plurality of first semiconductor elements, and a second control terminal for controlling each of the plurality of second semiconductor elements. The second input terminal and the third input terminal are disposed on one side and the other side of a second direction that is perpendicular to both the thickness direction and the first direction, separated by the first input terminal. The aforementioned first input terminal is one of the positive and negative terminals, and is electrically connected to the aforementioned first conductive part. The aforementioned second input terminal and the aforementioned third input terminal are the other pole between the positive and negative poles. When viewed in the aforementioned thickness direction, the sealing resin forms a first recess between the first input terminal and the second input terminal, recessed towards the other side of the first direction; and when viewed in the aforementioned thickness direction, a second recess between the first input terminal and the third input terminal, recessed towards the other side of the first direction, is formed. The first control terminal and the second control terminal extend from the sealing resin in the thickness direction, respectively. The aforementioned plurality of first semiconductor elements, the aforementioned plurality of second semiconductor elements, the aforementioned conducting component, the aforementioned output terminal, the aforementioned first control terminal, the aforementioned second control terminal, the aforementioned first input terminal, the aforementioned second input terminal, and the aforementioned third input terminal constitute a half-bridge switching circuit.

2. The semiconductor module according to claim 1, characterized in that, Each of the aforementioned plurality of first semiconductor elements and each of the aforementioned plurality of second semiconductor elements has a gate electrode facing one side of the aforementioned thickness direction. The aforementioned first control terminal is connected to each of the aforementioned gate electrodes of the plurality of first semiconductor elements via a conductive first metal wire. The second control terminal is connected to each of the gate electrodes of the plurality of second semiconductor elements via a conductive second metal wire.

3. The semiconductor module according to claim 1, characterized in that, The aforementioned sealing resin has a resin back side facing the same direction as the aforementioned back side of the conductive substrate. The back side of the conductive substrate is exposed from the back side of the sealing resin. The back side of the conductive substrate and the back side of the sealing resin are the same side.

4. The semiconductor module according to claim 2, characterized in that, The aforementioned first control terminal and the aforementioned second control terminal each include a bracket and a metal pin. In each of the aforementioned first control terminal and the aforementioned second control terminal, the bracket is made of a conductive material and includes a cylindrical portion. In each of the first control terminal and the second control terminal, the metal pin is a rod-shaped member extending in the thickness direction and is pressed into the bracket.

5. The semiconductor module according to claim 1, characterized in that, Each of the aforementioned plurality of first semiconductor elements and each of the aforementioned plurality of second semiconductor elements includes a MOSFET and contains SiC in the constituent material.

6. The semiconductor module according to any one of claims 1 to 5, characterized in that, The first input terminal, the second input terminal, and the third input terminal overlap when viewed in the second direction.

7. The semiconductor module according to claim 1, characterized in that, The semiconductor module also includes a first control terminal support and a second control terminal support, each having an insulating layer. The first conductive portion has a first main surface facing one of the aforementioned sides in the thickness direction. The second conductive portion has a second main surface facing one of the aforementioned sides in the thickness direction. The aforementioned first control terminal support is located between the aforementioned first main surface and the aforementioned first control terminal. The second control terminal support is located between the second main surface and the second control terminal.

8. The semiconductor module according to claim 7, characterized in that, The first control terminal support and the second control terminal support each have a first metal layer stacked on one side of the thickness direction of the insulating layer and a second metal layer stacked on the other side of the thickness direction of the insulating layer and facing the main surface, respectively, and bonded to the conductive substrate.

9. The semiconductor module according to claim 1, characterized in that, The first control terminal and the second control terminal are respectively disposed on the main surface.

10. A semiconductor module, characterized in that, have: A conductive substrate having a main surface facing one side in the thickness direction and a back surface facing the opposite side to the main surface; A semiconductor element electrically connected to the aforementioned main surface and having a switching function; Multiple control terminals are used to control the aforementioned semiconductor components; The conducting component forms the path of the main circuit current switched by the aforementioned semiconductor element; The first input terminal, the second input terminal, and the third input terminal are disposed on one side of a first direction perpendicular to the thickness direction relative to the conductive substrate. The output terminal is disposed on the opposite side of the conductive substrate in the first direction; and A sealing resin that covers at least a portion of the conductive substrate, the semiconductor element, and the conductive component. The aforementioned conductive substrate includes a first conductive portion and a second conductive portion. The aforementioned sealing resin has a resin back side facing the same direction as the aforementioned back side of the conductive substrate. The back side of the aforementioned conductive substrate is exposed from the back side of the aforementioned sealing resin. The back side of the aforementioned conductive substrate is the same as the back side of the aforementioned sealing resin. The aforementioned semiconductor element includes a plurality of first semiconductor elements electrically bonded to the aforementioned first conductive portion, and a plurality of second semiconductor elements electrically bonded to the aforementioned second conductive portion. The aforementioned plurality of control terminals include a first control terminal for controlling each of the plurality of first semiconductor elements, and a second control terminal for controlling each of the plurality of second semiconductor elements. The aforementioned first control terminal and the aforementioned second control terminal each include a bracket and a metal pin. In each of the aforementioned first control terminal and the aforementioned second control terminal, the bracket is made of a conductive material and includes a cylindrical portion. In each of the aforementioned first control terminal and the aforementioned second control terminal, the aforementioned metal pin is a rod-shaped member extending in the aforementioned thickness direction and is pressed into the aforementioned bracket. The second input terminal and the third input terminal are disposed on one side and the other side of a second direction that is perpendicular to both the thickness direction and the first direction, separated by the first input terminal. The aforementioned first input terminal is one of the positive and negative terminals, and is electrically connected to the aforementioned first conductive part. The aforementioned second input terminal and the aforementioned third input terminal are the other pole between the positive and negative poles. When viewed in the aforementioned thickness direction, the sealing resin forms a first recess between the first input terminal and the second input terminal, recessed towards the other side of the first direction; and when viewed in the aforementioned thickness direction, a second recess between the first input terminal and the third input terminal, recessed towards the other side of the first direction, is formed. The first control terminal and the second control terminal extend from the sealing resin in the thickness direction, respectively. The aforementioned plurality of first semiconductor elements, the aforementioned plurality of second semiconductor elements, the aforementioned conducting component, the aforementioned output terminal, the aforementioned first control terminal, the aforementioned second control terminal, the aforementioned first input terminal, the aforementioned second input terminal, and the aforementioned third input terminal constitute a half-bridge switching circuit.

11. The semiconductor module according to claim 10, characterized in that, Each of the aforementioned plurality of first semiconductor elements and each of the aforementioned plurality of second semiconductor elements has a gate electrode facing one side of the aforementioned thickness direction. The aforementioned first control terminal is connected to each of the aforementioned gate electrodes of the plurality of first semiconductor elements via a conductive first metal wire. The second control terminal is connected to each of the gate electrodes of the plurality of second semiconductor elements via a conductive second metal wire.

12. The semiconductor module according to claim 10, characterized in that, Each of the aforementioned plurality of first semiconductor elements and each of the aforementioned plurality of second semiconductor elements includes a MOSFET and contains SiC in the constituent material.

13. The semiconductor module according to any one of claims 10 to 12, characterized in that, The first input terminal, the second input terminal, and the third input terminal overlap when viewed in the second direction.

14. The semiconductor module according to claim 10, characterized in that, The semiconductor module also includes a first control terminal support and a second control terminal support, each having an insulating layer. The first conductive portion has a first main surface facing one of the aforementioned sides in the thickness direction. The second conductive portion has a second main surface facing one of the aforementioned sides in the thickness direction. The aforementioned first control terminal support is located between the aforementioned first main surface and the aforementioned first control terminal. The aforementioned second control terminal support is located between the aforementioned second main surface and the aforementioned second control terminal.

15. The semiconductor module according to claim 14, characterized in that, The first control terminal support and the second control terminal support each have a first metal layer stacked on one side of the thickness direction of the insulating layer and a second metal layer stacked on the other side of the thickness direction of the insulating layer and facing the main face, respectively, and bonded to the conductive substrate.

16. The semiconductor module according to claim 10, characterized in that, The first control terminal and the second control terminal are respectively disposed on the main surface.

Images