Electronic device
By setting a reasonable ratio of emission and penetration areas in the electronic panel of a full-screen electronic device, the display defects caused by under-display sensors are solved, achieving high sensing accuracy and a good user experience.
Patent Information
- Application Number
- CN202410576451.3
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2024-05-10
- Publication Date
- 2025-11-11
AI Technical Summary
Existing full-screen electronic devices suffer from penetration defects in the display area due to the placement of under-display sensors, which affects the user's viewing experience.
An emission area and a transmission area are set in the first area of the electronic panel, and the proportion range of the transmission area in the first element is controlled to ensure that the sensor can effectively receive the sensing signal. At the same time, a shielding area is set in the second area to maintain the display effect.
This technology enables the sensor to achieve high sensing accuracy even in full-screen displays, improving the user experience and reducing the visual impact of display defects.
Smart Images

Figure CN120936216A_ABST
Abstract
Description
Technical Field
[0001] This disclosure relates to an electronic device, and more particularly to a full-screen electronic device with sensing capabilities. Background Technology
[0002] Existing full-screen electronic devices have sensing capabilities by integrating under-display sensors; however, at least one additional penetrating area must be left in the display area of the full-screen electronic device to correspond to the under-display sensor. Since no display element is set in this penetrating area, users can easily notice display defects when viewing the screen of this full-screen electronic device. Summary of the Invention
[0003] Some embodiments disclosed herein are directed to an electronic device that can have relatively good sensing capabilities in the case of a full-screen display.
[0004] An electronic device according to some embodiments of the present disclosure includes an electronic panel and a sensor. The electronic panel has a first region and a second region. The first region includes a first element and a second element, which are spaced apart by a first distance. The second region includes a third element and a fourth element, which are spaced apart by a second distance. Each of the first and second elements has a transmitting region and a transmitting region. The sensor overlaps with the first region of the electronic panel and is configured to receive a sensing signal through the transmitting region. A first ratio between the second distance and the first distance is 0.76 to 1.24, and a second ratio between the area of the transmitting region and the area of the first element is 0.52 to 0.96.
[0005] Based on this, an emission area and a penetration area are provided in the first region of the electronic device provided in this disclosure, and this disclosure limits the proportion range of the penetration area in the first element of the first region to obtain a relatively good sensing accuracy, which enables the electronic device provided in this disclosure to have relatively good sensing function in the case of full-screen display.
[0006] To make the above-mentioned features and advantages disclosed herein more apparent and understandable, specific embodiments are described below in conjunction with the accompanying drawings. Attached Figure Description
[0007] Figure 1A This is a partial top view of the electronic device according to the first embodiment of this disclosure;
[0008] Figure 1B for Figure 1A A magnified top view of region R1 in the diagram;
[0009] Figure 1C for Figure 1A A magnified top view of region R2 in the diagram;
[0010] Figure 1D for Figure 1A A cross-sectional diagram based on section line A1-A1';
[0011] Figure 1E for Figure 1A A cross-sectional diagram based on section line A2-A2';
[0012] Figure 1F for Figure 1A A magnified top view of region R3 in the diagram;
[0013] Figure 2 This is a graph showing the relationship between the sensor's sensing accuracy and the ratio between the area of the penetrated region and the area of the first element.
[0014] Figure 3A This is a partial top view of the electronic device according to the second embodiment of this disclosure;
[0015] Figure 3B for Figure 3A A cross-sectional schematic diagram of an embodiment based on section line B-B';
[0016] Figure 3C for Figure 3A A cross-sectional schematic diagram based on another embodiment of section line B-B';
[0017] Figure 3D for Figure 3A A partial top view of one embodiment of the heat dissipation layer;
[0018] Figure 3E for Figure 3A A partial top view schematic diagram of an embodiment of the arrangement of multiple first contact pads;
[0019] Figure 4 This is a partial cross-sectional schematic diagram of the electronic device according to the third embodiment of this disclosure;
[0020] Figure 5 This is a partial cross-sectional schematic diagram of the electronic device according to the fourth embodiment of this disclosure;
[0021] Figure 6 This is a partial cross-sectional schematic diagram of the electronic device according to the fifth embodiment of this disclosure;
[0022] Figure 7 This is a partial cross-sectional schematic diagram of a circuit board in an electronic device according to an embodiment of the present disclosure;
[0023] Figure 8 This is a partial cross-sectional schematic diagram of the electronic device according to the sixth embodiment of this disclosure;
[0024] Figure 9A This is a partial cross-sectional schematic diagram of the electronic device according to the seventh embodiment of this disclosure;
[0025] Figure 9B This is a partial cross-sectional schematic diagram of the electronic device according to the eighth embodiment of the present disclosure;
[0026] Figure 9C This is a partial cross-sectional schematic diagram of the electronic device according to the ninth embodiment of this disclosure;
[0027] Figure 9D This is a partial cross-sectional schematic diagram of the electronic device according to the tenth embodiment of this disclosure;
[0028] Figure 9E Based on Figure 9B A partial top view of the electronic device;
[0029] Figure 10A for Figure 9C An enlarged top view of an embodiment of region R4 in the diagram;
[0030] Figure 10B for Figure 9C An enlarged top view of another embodiment of region R4 in the diagram;
[0031] Figure 10C for Figure 9C An enlarged top view of another embodiment of region R4 in the diagram. Detailed Implementation
[0032] Reference will now be made in detail to exemplary embodiments of the invention, examples of which are illustrated in the accompanying drawings. Wherever possible, the same element references are used in the drawings and description to denote the same or similar parts.
[0033] This disclosure can be understood by referring to the following detailed description in conjunction with the accompanying drawings. It should be noted that, for ease of understanding and for the sake of brevity, many of the drawings in this disclosure depict only a portion of the electronic device, and certain components in the drawings are not drawn to scale. Furthermore, the number and dimensions of the components in the drawings are for illustrative purposes only and are not intended to limit the scope of this disclosure.
[0034] Throughout this disclosure and in the appended claims, certain terms are used to refer to specific elements. Those skilled in the art will understand that electronic device manufacturers may use different names to refer to the same element. This document is not intended to distinguish between elements that have the same function but different names. In the following description and claims, words such as “comprising,” “containing,” and “having” are open-ended terms and should therefore be interpreted as “containing but not limited to…”. Thus, when the terms “comprising,” “containing,” and / or “having” are used in the description of this disclosure, they specify the presence of the corresponding feature, area, step, operation, and / or component, but do not exclude the presence of one or more of the corresponding feature, area, step, operation, and / or component.
[0035] The directional terms used herein, such as "up," "down," "front," "back," "left," and "right," are for reference only when referring to the accompanying drawings. Therefore, the directional terms used are illustrative and not intended to limit this disclosure. In the accompanying drawings, each figure illustrates general features of the methods, structures, and / or materials used in specific embodiments. However, these figures should not be construed as defining or limiting the scope or nature covered by these embodiments. For example, for clarity, the relative dimensions, thicknesses, and locations of various films, regions, and / or structures may be reduced or enlarged.
[0036] When a component (e.g., a membrane or region) is referred to as "on another component," it can be directly on that component, or there may be other components between them. Conversely, when a component is referred to as "directly on another component," there are no components between them unless otherwise specified in the specification. Furthermore, when a component is referred to as "on another component," the two components are vertically related in the planar view, and this component can be above or below the other component, depending on the orientation of the device.
[0037] The terms “equal to” or “same as”, “substantially” or “approximately” are generally interpreted as being within 20% of a given value or range, or as being within 10%, 5%, 3%, 2%, 1% or 0.5% of a given value or range.
[0038] The ordinal numbers used in the specification and claims, such as "first," "second," etc., to modify elements, do not in themselves imply or represent any prior ordinal number of that element (or those elements), nor do they represent the order of one element with another, or the order of manufacturing processes. The use of these ordinal numbers is solely to clearly distinguish one named element from another element with the same name. The claims and specification may not use the same terminology; therefore, a first element in the specification may be a second element in the claims.
[0039] It should be understood that the features in the following embodiments can be replaced, recombined, or mixed to complete other embodiments without departing from the spirit of this disclosure. Features between embodiments can be arbitrarily mixed and combined as long as they do not violate the spirit of the invention or conflict with it.
[0040] The electrical connection or connection described in this disclosure can refer to a direct connection or an indirect connection. In the case of a direct connection, the endpoints of the two circuit components are directly connected or connected to each other by a conductor segment. In the case of an indirect connection, there is a switch, diode, capacitor, inductor, other suitable component, or combination of the above components between the endpoints of the two circuit components, but not limited to these.
[0041] In this disclosure, the thickness, length, width, and area can be measured using an optical microscope, and the thickness can be measured from a cross-sectional image using an electron microscope, but these methods are not limited to these. Furthermore, any two values or directions used for comparison may have a certain degree of error. If the first value equals the second value, it implies an error of approximately 10% between the two values; if the first direction is perpendicular to the second direction, the angle between the first and second directions may be between 80 and 100 degrees; if the first direction is parallel to the second direction, the angle between the first and second directions may be between 0 and 10 degrees.
[0042] The electronic devices disclosed herein can be applied to display devices, light-emitting devices, backlight devices, antenna devices, sensing devices, or splicing devices, or as temporary substrates for arranging electronic units at specific intervals, but are not limited thereto. The electronic devices can be bendable or flexible. The display devices can be non-self-emissive or self-emissive. The antenna devices can be liquid crystal type or non-liquid crystal type antenna devices, and the sensing devices can be sensing capacitance, light, heat, or ultrasound, but are not limited thereto. The electronic devices can include passive and active electronic components, such as capacitors, resistors, inductors, diodes, and transistors. Diodes can include light-emitting diodes or photodiodes. Light-emitting diodes (LEDs) can include, for example, organic light-emitting diodes (OLEDs), mini LEDs, micro LEDs, or quantum dot LEDs, but are not limited thereto. Splicing devices can be, for example, display splicing devices or antenna splicing devices, but are not limited thereto. It should be noted that the electronic device can be any of the aforementioned arrangements and combinations, but is not limited thereto. Furthermore, the electronic device can be rectangular, circular, polygonal, have curved edges, or other suitable shapes. The electronic panel can include a display panel, a sensing panel, or an antenna panel, but is not limited thereto.
[0043] Figure 1A This is a partial top view of the electronic device according to the first embodiment of this disclosure. Figure 1B for Figure 1A A magnified top view of region R1 in the diagram. Figure 1C for Figure 1A A magnified top view of region R2 in the diagram. Figure 1D for Figure 1A Based on the cross-sectional diagram of section line A1-A1', and Figure 1E for Figure 1A The cross-sectional diagram is based on section line A2-A2'.
[0044] Please refer to the following at the same time Figures 1A to 1E The electronic device 10a in this embodiment includes a substrate SB, an electronic panel 100, and a sensor 200. That is, in this embodiment, the electronic device 10a is a display device including sensing functions, but this disclosure is not limited thereto.
[0045] The substrate SB can be made of, for example, glass, plastic, or a combination thereof. For instance, the substrate SB may be made of quartz, sapphire, silicon (Si), germanium (Ge), silicon carbide (SiC), gallium nitride (GaN), silicon germanium (SiGe), polymethyl methacrylate (PMMA), polycarbonate (PC), polyimide (PI), polyethylene terephthalate (PET), or other suitable materials or combinations thereof, and this disclosure is not limited thereto. In this embodiment, the substrate SB is made of glass.
[0046] The electronic panel 100 is disposed, for example, on a substrate SB. In this embodiment, the electronic panel 100 includes a plurality of electronic components EC and a shielding layer BM.
[0047] Multiple electronic components EC are disposed, for example, on a substrate SB. In some embodiments, the multiple electronic components EC may include chips, light-emitting diodes, variable capacitors, variable resistors, varactor diodes, other suitable electronic components, or combinations thereof, and this disclosure is not limited thereto. In this embodiment, at least one of the multiple electronic components EC includes a light-emitting element. For example, the electronic component EC may include diodes, organic light-emitting diodes (OLEDs), inorganic light-emitting diodes (LEDs), such as mini LEDs or micro LEDs, quantum dots (QDs), quantum dot light-emitting diodes (QDLEDs), fluorescence, phosphorescence, other suitable materials, or combinations of the above materials, and this disclosure is not limited thereto. In other embodiments, at least one of the multiple electronic components EC may include a communication element. In this embodiment, the electronic component EC is a vertical micro light-emitting diode. Specifically, one of the multiple electronic components EC may, for example, include a first semiconductor layer SE1, a second semiconductor layer SE2, and an emission layer L, and this disclosure is not limited thereto. The first semiconductor layer SE1 and the second semiconductor layer SE2 may each include, for example, an N-type doped semiconductor and a P-type doped semiconductor; or each may include a P-type doped semiconductor and an N-type doped semiconductor. The materials of the first semiconductor layer SE1 and the second semiconductor layer SE2 may include, for example, gallium nitride (GaN), indium gallium nitride (InGaN), gallium arsenide (GaAs), aluminum gallium indium phosphide (AlGaInP), or other materials composed of Group IIIA and Group VA elements, or other suitable materials, and this disclosure is not limited thereto. The emitter layer L may, for example, have quantum wells (QWs), which may be, for example, single quantum wells (SQWs), multiple quantum wells (MQWs), or other quantum wells. Based on this, holes and electrons provided by the first semiconductor layer SE1 and the second semiconductor layer SE2 can combine in the emitter layer L and emit light energy.
[0048] In this embodiment, the multiple electronic components EC include a first component EC1, a second component EC2, a third component EC3, and a fourth component EC4, which will be described in detail in the following embodiments.
[0049] A shielding layer BM is disposed on a substrate SB, for example, and is adjacent to or surrounds a plurality of electronic components EC. The material of the shielding layer BM may include, for example, black resin, black photoresist, metal, or combinations thereof, but this disclosure is not limited thereto. In some embodiments, the shielding layer BM includes a via BM_V, through which the second semiconductor layer SE2 of the electronic component EC is electrically connected to a transistor (not shown) and / or a trace (not shown) disposed on the substrate SB, but this disclosure is not limited thereto. In this embodiment, the shielding layer BM includes a plurality of openings BM_OP. In some embodiments, the openings BM_OP may have a circular, elliptical, or other suitable shape in the top view z direction of the electronic device 10a, and this disclosure is not limited thereto. The plurality of openings BM_OP can be used to define the penetration regions TR of the first component EC1 and the second component EC2, which will be detailed in the following embodiments.
[0050] In some embodiments, the electronic panel 100 may further include a separator layer RL and a filler layer FL.
[0051] A separating layer RL is disposed, for example, on a shielding layer BM, and is disposed, for example, adjacent to or surrounding an electronic component EC. In some embodiments, the material of the separating layer RL includes, for example, a light-absorbing material, a reflective material, a scattering material, or a combination thereof, and this disclosure is not limited thereto. The separating layer RL may, for example, reduce the possibility of light emanating from adjacent electronic components EC interfering with each other and / or may, for example, reduce light leakage problems caused by electronic components EC. In addition, the separating layer RL may also, for example, have a heat dissipation function. In some embodiments, the separating layer RL may include a distributed Bragg reflector (DBR), but this disclosure is not limited thereto. A Bragg reflector includes a plurality of alternating high-refractive-index insulating layers and low-refractive-index insulating layers.
[0052] A filler layer FL is disposed, for example, on a shielding layer BM, and is disposed, for example, adjacent to or surrounding an electronic component EC. In some embodiments, the filler layer FL is disposed between a separating layer RL and an electronic component EC, but this disclosure is not limited thereto. The filler layer FL may be used, for example, to fix or protect the electronic component EC. In some embodiments, the filler layer FL may comprise a transparent material. For example, the material of the filler layer FL may comprise epoxy resin, acrylic, other suitable materials, or combinations thereof, but this disclosure is not limited thereto.
[0053] In this embodiment, the electronic panel 100 has a first region 100R1 and a second region 100R2. The first region 100R1 is, for example, the region where the electronic panel 100 and the sensor 200 overlap in the top view z direction of the electronic device 10a, and the second region 100R2 is, for example, the region where the electronic panel 100 and the sensor 200 do not overlap in the top view z direction of the electronic device 10a. In this embodiment, the second region 100R2 surrounds the first region 100R1, but this disclosure is not limited thereto.
[0054] The first region 100R1 of the electronic panel 100 includes, for example, a first element EC1 and a second element EC2. Detailed descriptions of the first element EC1 and the second element EC2 can be found in the electronic element EC of the above embodiment. Briefly, the first element EC1 and the second element EC2 in this embodiment can be the aforementioned vertical micro-light-emitting diodes, which will not be repeated here. In this embodiment, since the first region 100R1 is the region where the electronic panel 100 and the sensor 200 overlap in the top view z direction of the electronic device 10a, each of the first element EC1 and the second element EC2 has the following characteristics: Figure 1B The emission region ER1 and the penetration region TR are shown, where Figure 1B Taking the first element EC1 as an example, the emission region ER1 is defined, for example, as the emission area of the first element EC1. In some embodiments, the first element EC1 may have multiple first units U1. Therefore, the emission region ER1 may be defined, for example, as the sum of the emission areas of the multiple first units U1. In some embodiments, the first units U1 may include light-emitting elements that emit light of the same or different colors, and this disclosure is not limited thereto. Similarly, the second element EC2 may also have, for example, multiple first units U1, which will not be elaborated here. The penetration region TR is defined, for example, as the area in the electronic panel 100 that allows the sensing signal to be sensed by the sensor 200 to penetrate, which may be defined, for example, by multiple openings BM_OP of the shielding layer BM.
[0055] In some embodiments, the area of the emitting region ER1 is smaller than the area of the penetrating region TR, as shown below. Figure 1BAs shown. Further, in some embodiments, the ratio between the area of the penetrating region TR and the area of the first element EC1 is 0.52 to 0.96, but this disclosure is not limited thereto. In other embodiments, the ratio between the area of the penetrating region TR and the area of the first element EC1 is 0.7 to 0.9. In still other embodiments, the ratio between the area of the penetrating region TR and the area of the first element EC1 is 0.7 to 0.84. The area of the first element EC1 is defined, for example, as the area of the first region 100R1 divided by the number of first elements EC1 in the first region 100R1. For example, when the area of the first region 100R1 is A and the number of first elements EC1 in the first region 100R1 is B, the area of the first element EC1 is A / B. In this embodiment, the area of the first element EC1 is as follows... Figure 1B The area of region R1 is shown, but this disclosure is not limited thereto. Similarly, the area of the penetration region TR and the area of the second element EC2 may also have the above-described ratio relationship, which will not be repeated here.
[0056] Please refer to Figure 2 , Figure 2 A graph showing the relationship between the sensing accuracy of sensor 200 and the ratio of the area of the penetration region TR to the area of the first element EC1 is presented. The graph is obtained from the detection results of a large-scale experiment, where the number of experiments is greater than 100. In this embodiment, by setting the ratio between the area of the penetration region TR and the area of the first element EC1 to 0.52 to 0.96, sensor 200 can achieve a sensing accuracy greater than 90%. Based on this, the electronic device 10a of this embodiment, in addition to its display function, can also have relatively good sensing capabilities.
[0057] In this embodiment, the first element EC1 and the second element EC2 are spaced apart by a first distance s1. The first distance s1 is defined, for example, as the shortest distance between the first element EC1 and the second element EC2 in a direction perpendicular to the top view direction z of the electronic device 10a. For details, please refer to... Figure 1D The first element EC1 and the second element EC2 are spaced apart from each other by a first distance s1 in the direction x, wherein the first distance s1 is defined as the distance from the first unit U1 of the first element EC1 that is closest to the second element EC2 to the first unit U1 of the second element EC2 that is closest to the first element EC1.
[0058] The second region 100R2 of the electronic panel 100 includes, for example, a third element EC3 and a fourth element EC4. In some embodiments, the third element EC3 and the fourth element EC4 may each be the same as or similar to the first element EC1 and / or the second element EC2. That is, the third element EC3 and the fourth element EC4 may be, for example, the vertical micro-light-emitting diodes described above, which will not be repeated here.
[0059] In this embodiment, since the second region 100R2 is the region where the electronic panel 100 and the sensor 200 do not overlap in the top view z direction of the electronic device 10a, each of the third element EC3 and the fourth element EC4 has the following characteristics: Figure 1C The emission area ER2 and the shielding area BR are shown, in which Figure 1C Taking the third element EC3 as an example, the emitting region ER2 is defined, for example, as the emitting area of the third element EC3. In some embodiments, the third element EC3 has a plurality of second units U2. Therefore, the emitting region ER2 can be defined, for example, as the sum of the emitting areas of the plurality of second units U2. In some embodiments, the third element EC3 may include light-emitting elements that each emit light of the same or different colors, but this disclosure is not limited thereto. Similarly, the fourth element EC4 may also have, for example, a plurality of second units U2, which will not be elaborated here. The shielding region BR is defined, for example, as components and wiring inside the electronic device 10a in the electronic panel 100 that are not intended to be seen by the user, but this disclosure is not limited thereto. In this embodiment, the shielding region BR includes the shielding layer BM described above. The shielding layer BM is, for example, adjacent to or surrounding the plurality of second units U2. In some embodiments, the area of the emitting region ER2 is smaller than the area of the shielding region BR, as shown below. Figure 1C As shown.
[0060] In this embodiment, the third element EC3 and the fourth element EC4 are spaced apart by a second distance s2. The second distance s2 is defined, for example, as the shortest distance between the third element EC3 and the fourth element EC4 in a direction perpendicular to the top view direction z of the electronic device 10a. For details, please refer to... Figure 1E The third element EC3 and the fourth element EC4 are spaced apart by a second distance s2 in the x-direction, where the second distance s2 is defined as the distance from the second unit U2 of the third element EC3 closest to the fourth element EC4 to the second unit U2 of the fourth element EC4 closest to the third element EC3. In this embodiment, the ratio between the second distance s2 and the first distance s1 is between 0.76 and 1.24. By making the ratio between the second distance s2 and the first distance s1 have the above-mentioned ratio range, the electronic device 10a of this embodiment can make the display images of the first area 100R1 and the second area 100R2 more consistent when displaying in full screen.
[0061] In this embodiment, the distance d1 between two adjacent first units U1 is less than the distance d2 between two adjacent second units U2. For details, please refer to... Figure 1F , Figure 1F for Figure 1A A magnified top view of region R3 in the diagram. Figure 1FFor example, the distance d1 between two adjacent first units U1 in the first element EC1 is smaller than the distance d2 between two adjacent second units U2 in the third element EC3. Furthermore, in this embodiment, the size of the first unit U1 is smaller than the size of the second unit U2. Through the above design, the first element EC1 and the second element EC2 in the first region 100R1 can each include a relatively small emission area ER1, allowing the first element EC1 and the second element EC2 to each have a relatively large penetration area TR, thereby enabling the electronic device 10a to have relatively good sensing capabilities.
[0062] Please continue to refer to Figure 1F , Figure 1F The diagram also shows the pitch p1 between adjacent first elements EC1 and second elements EC2, and the pitch p2 between adjacent third elements EC3 and fourth elements EC4. Pitch p1 can be defined, for example, as the distance between adjacent first elements EC1 and second elements EC2 at the same relative position, and pitch p2 can be defined, for example, as the distance between adjacent third elements EC3 and fourth elements EC4 at the same relative position. In this embodiment, pitch p1 and pitch p2 can be equal to each other because the size of the first unit U1 is proportionally reduced to the distance d1 between two adjacent first units U1, but this disclosure is not limited thereto. Furthermore, it is worth noting that pitch p1 can be, for example, the size of the first element EC1 and / or the second element EC2 in a direction perpendicular to the top view direction z of the electronic device 10a, and pitch p2 can be, for example, the size of the third element EC3 and / or the fourth element EC4 in a direction perpendicular to the top view direction z of the electronic device 10a. In this embodiment, pitch p1 is the length of the first element EC1 and the second element EC2 in the x-direction and / or the width in the y-direction, and pitch p2 is the length of the third element EC3 and the fourth element EC4 in the x-direction and / or the width in the y-direction, but this disclosure is not limited thereto. Additionally, in this embodiment, pitch p12 is the distance between the second element EC2 and the third element EC3 in the x-direction, which may also be equal to pitch p1 and pitch p2, but this disclosure is not limited thereto.
[0063] Sensor 200 overlaps, for example, with a first region 100R1 of electronic panel 100. Please refer to... Figure 1DIn this embodiment, sensor 200 overlaps with a first region 100R1 of electronic panel 100 in the top view z direction of electronic device 10a. Sensor 200 is configured, for example, to receive a sensing signal through a penetration region TR of the first region 100R1, wherein the definition of the penetration region TR can be referred to in the above embodiment and will not be repeated here. In some embodiments, sensor 200 includes a light sensor, which can be used to sense visible or non-visible light. In this embodiment, sensor 200 is disposed on the surface of substrate SB away from electronic component EC, but this disclosure is not limited thereto. Sensor 200 may include, for example, a visible light sensor, a near-infrared light sensor, an infrared light sensor, a Li-Fi (light fidelity) receiver, or other suitable sensors, and this disclosure is not limited thereto.
[0064] Figure 3A This is a partial top view of the electronic device according to the second embodiment of this disclosure. Figure 3B for Figure 3A A cross-sectional schematic diagram based on an embodiment of section line B-B'. Figure 3C for Figure 3A A cross-sectional schematic diagram based on another embodiment of section line B-B', and Figure 3D for Figure 3A A partial top view of the insulating layer on the substrate. It should be noted that... Figure 3A as well as Figure 3B ( Figure 3C The embodiments can be used independently. Figure 1A and Figure 1D The component references and partial contents of the embodiments are as follows, wherein the same or similar references are used to represent the same or similar components, and the description of the same technical content is omitted.
[0065] Please refer to the following at the same time Figure 3A as well as Figure 3B The main difference between the electronic device 10b in this embodiment and the electronic device 10a described above is that the electronic device 10b also includes a signal source SS.
[0066] In detail, in this embodiment, the second region 100R2 of the electronic panel 100 further includes a signal source SS. The signal source SS is configured, for example, to provide a sensing signal, wherein the peak wavelength of this sensing signal is, for example, 700 nm to 1400 nm. For example, the signal source SS may include a near-infrared light emitter (NIR emitter). Specifically, the signal source SS may include a first semiconductor layer SE1', a second semiconductor layer SE2', and an emitting layer L'. The emitting layer L' may, for example, include a material suitable for emitting near-infrared light having a peak wavelength of 700 nm to 1400 nm, but this disclosure is not limited thereto. The descriptions of the first semiconductor layer SE1' and the second semiconductor layer SE2' in the above embodiments are referenced and will not be repeated here.
[0067] It is worth noting that, although Figure 3A The diagram shows signal sources SS arranged in an array in the display area of electronic device 10b, but this disclosure is not limited thereto. In other embodiments, signal sources SS may be disposed in the peripheral area of electronic device 10b and / or attached to the periphery of electronic device 10b.
[0068] In this embodiment, the electronic device 10b further includes an insulating layer PV, a common electrode CE, and a collimation structure AS.
[0069] An insulating layer PV is disposed, for example, between a shielding layer BM and a substrate SB. In this embodiment, the insulating layer PV is disposed in a first region 100R1 and a second region 100R2 of the electronic panel 100, and fills a plurality of openings BM_OP in the shielding layer BM. The insulating layer PV may, for example, include a suitable insulating material to reduce the possibility that the sensing signal received by the sensor 200 will be blocked. In this embodiment, the insulating layer PV includes a plurality of vias PV_V, wherein one of the plurality of vias PV_V is in communication with a corresponding via BM_V in the shielding layer BM.
[0070] Please refer to Figure 3C In some embodiments, a heat dissipation layer HD may be further provided on the sidewall of at least one of the plurality of openings BM_OP of the shielding layer BM to reduce the heat generated by the electronic component EC. The heat dissipation layer HD may, for example, be electrically connected to the common electrode CE. Also, please refer to... Figure 3D The heat dissipation layer HD, for example, has a ring shape in the top view z direction of the electronic device 10b, but this disclosure is not limited thereto. In other embodiments, an optical layer (not shown) may be provided on the sidewall of at least one of the plurality of openings BM_OP of the shielding layer BM, which may have the function of absorbing and / or reflecting light, but this disclosure is not limited thereto.
[0071] Multiple first pads PAD1 are disposed, for example, on the surface of the insulating layer PV near the substrate SB. The first pads PAD1 may, for example, comprise a suitable conductive material, and this disclosure is not limited thereto. In some embodiments, each of the multiple first pads PAD1 may be electrically connected to an electronic component EC or a signal source SS through a via BM_V of a corresponding shielding layer BM and a via PV_V communicating therewith, but this disclosure is not limited thereto.
[0072] Please refer to Figure 3E , Figure 3E The arrangement of multiple first pads (PAD1) is shown. In this embodiment, the multiple first pads (PAD1) do not overlap with the penetration area TR in the top view z direction of the electronic device 10b. This design reduces the possibility that the sensing signal received by the sensor 200 will be affected by the multiple first pads (PAD1). Furthermore, in this embodiment, the traces (CL) electrically connected to the corresponding first pads (PAD1) also do not overlap with the penetration area TR in the top view z direction of the electronic device 10b, thereby reducing the possibility that the sensing signal received by the sensor 200 will be affected.
[0073] The common electrode CE is disposed, for example, on the surface of the insulating layer PV away from the substrate SB, and may at least partially overlap with the electronic component EC and the signal source SS in the top view z direction of the electronic device 10b. In this embodiment, the common electrode CE is electrically connected to the second semiconductor layer SE2 of the electronic component EC and the second semiconductor layer SE2' of the signal source SS, and can be electrically connected to the first pad PAD1 through the aforementioned vias BM_V and PV_V.
[0074] The collimation structure AS is disposed, for example, on the common electrode CE. In this embodiment, the collimation structure AS includes collimation structure AS1 and collimation structure AS2, wherein collimation structure AS1 at least partially overlaps with the signal source SS in the top view z direction of the electronic device 10b, and collimation structure AS2 at least partially overlaps with the penetration region TR in the top view z direction of the electronic device 10b. In some embodiments, the collimation structure AS includes a microlens. For example, the collimation structure AS may be a biconvex lens, a plano-convex lens, or a concave-convex lens, but this disclosure is not limited thereto. By setting the collimation structure AS, the signal emitted by the signal source SS can be formed into an array light signal via the collimation structure AS1 and reach the sensing object, and the sensor 200 can receive the collimated light signal via the collimation structure AS2, which can effectively suppress crosstalk or background noise (unintended sensing signals) from non-corresponding regions, thereby further increasing the signal-to-noise ratio (SNR).
[0075] It is worth noting that in this embodiment, the first unit U1 has a relatively small size (e.g., less than 10 micrometers). Therefore, although the first unit U1 and the penetration area TR at least partially overlap in the top view z direction of the electronic device 10b, its relatively small size can reduce the possibility of affecting the signal sensed by the sensor 200.
[0076] In some embodiments, a protective layer PL may be provided to encapsulate the sensor 200 to protect the sensor 200, but this disclosure is not limited thereto.
[0077] Figure 4 This is a partial cross-sectional schematic diagram of the electronic device according to the third embodiment of this disclosure. It should be noted that... Figure 4 The embodiments can be used Figure 3B and Figure 3C The component references and partial contents of the embodiments are as follows, wherein the same or similar references are used to represent the same or similar components, and the description of the same technical content is omitted.
[0078] Please refer to Figure 4 The main difference between the electronic device 10c in this embodiment and the electronic device 10b described above is that the electronic device 10c also includes a circuit board 300a.
[0079] In this embodiment, the circuit board 300a is disposed on the surface of the substrate SB facing the insulating layer PV, and includes a driver DR, a capsule layer EL, and a second pad PAD2.
[0080] The driver DR may include, for example, a micro integrated circuit (micro IC) chip. For instance, the driver DR may include suitable semiconductor chips such as application-specific integrated circuit (ASIC) chips, analog chips, digital chips, voltage regulator chips, sensor chips, and / or memory chips, but this disclosure is not limited thereto. In some embodiments, the driver DR may include an integrated circuit fabricated using a silicon wafer as a substrate; or it may include an integrated circuit fabricated using a glass substrate (glass IC), but this disclosure is not limited thereto. In some embodiments, a chip adhesive film (not shown) may be formed between the driver DR and the surface of the substrate SB facing the insulating layer PV to allow the driver DR to adhere to the substrate SB. The material of the chip adhesive film may include, for example, organic materials, inorganic materials, or other suitable adhesive materials, but this disclosure is not limited thereto. In this embodiment, the driver DR is configured face-up. In other words, in some embodiments, a bonding pad (not shown) may be provided on the surface of the driver DR away from the substrate SB, but this disclosure is not limited thereto.
[0081] In this embodiment, the driver DR does not overlap with the penetration area TR in the top view z direction of the electronic device 10c, so as to reduce the possibility of affecting the signal sensed by the sensor 200.
[0082] An encapsulation layer EL is disposed, for example, on a driver DR. In this embodiment, the encapsulation layer EL is disposed around the driver DR and includes an interconnect structure IS, wherein the driver DR is electrically connected to the interconnect structure IS. The material of the encapsulation layer EL may be, for example, an organic material or other suitable material. In this embodiment, the material of the encapsulation layer EL may be epoxy resin, but this disclosure is not limited thereto.
[0083] The second pad PAD2 is disposed, for example, on the encapsulation layer EL, and is electrically connected to the driver DR, for example, through the interconnect structure IS in the encapsulation layer EL. The material of the second pad PAD2 may be the same as or similar to the material of the first pad PAD1 in the above embodiment, and will not be described again here.
[0084] In this embodiment, the first pad PAD1 and the second pad PAD2 are joined. Specifically, the first pad PAD1 and the second pad PAD2 can be electrically connected to each other through a redistribution layer (not shown) disposed therebetween, which will be described in detail in the following embodiments.
[0085] Figure 5 This is a partial cross-sectional schematic diagram of the electronic device according to the fourth embodiment of this disclosure. It should be noted that... Figure 5 The embodiments can be used Figure 4 The component references and partial contents of the embodiments are as follows, wherein the same or similar references are used to represent the same or similar components, and the description of the same technical content is omitted.
[0086] Please refer to Figure 5 The main difference between the electronic device 10d in this embodiment and the electronic device 10c described above is that the electronic device 10d also includes a redistribution layer 400a and a sensor 210.
[0087] The redistribution layer 400a is disposed, for example, between the electronic panel 100 and the circuit board 300a. In this embodiment, the redistribution layer 400a includes a connection structure CS1, a plurality of third pads PAD3, and a plurality of fourth pads PAD4.
[0088] The connection structure CS1 can, for example, serve as a wiring layer for the electronic device 10d to provide the required conductive transmission path. For instance, as... Figure 5As shown, the connection structure CS1 may include an insulating layer IL1, a conductive layer M1, an insulating layer IL2, a conductive layer M2, an insulating layer IL3, and a conductive layer M3. Each of the insulating layers IL1, IL2, and IL3 has multiple through-holes, and the corresponding through-holes of insulating layers IL1 and IL2, and the corresponding through-holes of insulating layers IL2 and IL3, at least partially overlap and are interconnected. The conductive layers M1, M2, and M3 are each filled into the multiple through-holes of the insulating layers IL1, IL2, and IL3, and are electrically connected to each other through these interconnected through-holes to form a conductive transmission path; however, this disclosure is not limited to this.
[0089] Multiple third pads PAD3 are disposed, for example, on the surface of the insulating layer IL1 near the electronic panel 100, and are electrically connected, for example, to the conductive layer M1. The material of the third pads PAD3 may be the same as or similar to the material of the first pads PAD1, and will not be described further here. In this embodiment, the third pads PAD3 and the first pads PAD1 are electrically connected. Specifically, the third pads PAD3 and the first pads PAD1 may be electrically connected to each other through an interconnect structure (not shown) or a conductive adhesive layer (not shown) disposed therebetween.
[0090] Multiple fourth pads PAD4 are disposed, for example, on the surface of the insulating layer IL3 near the sensor 200, and are electrically connected, for example, to the conductive layer M3. The material of the fourth pads PAD4 may be the same as or similar to the material of the first pads PAD1, and will not be described further here. In this embodiment, the fourth pads PAD4 are electrically connected to the second pads PAD2. Specifically, the fourth pads PAD4 and the second pads PAD2 may be electrically connected to each other through an interconnect structure (not shown) or a conductive adhesive layer (not shown) disposed therebetween.
[0091] Based on the above, in this embodiment, the corresponding third pad PAD3 can be electrically connected to the corresponding fourth pad PAD4 through the connection structure CS1.
[0092] In this embodiment, the center C3 of the third pad PAD3 and the center C4 of the fourth pad PAD4 are offset in the horizontal direction. For details, please refer to... Figure 5 The partial cross-sectional view shown shows that, since the third pad PAD3 is set to correspond with the first pad PAD1, and the fourth pad PAD4 is set to correspond with the second pad PAD2, the center C3 of the third pad PAD3 and the center C4 of the fourth pad PAD4 are respectively offset in the x-direction due to the setting of the first pad PAD1 and the second pad PAD2.
[0093] Sensor 210 is disposed, for example, on the surface of substrate SB away from electronic component EC, and is adjacent to sensor 200. In this embodiment, the transmission direction of the signal sensed by sensor 210 is opposite to the transmission direction of the signal sensed by sensor 220. Therefore, sensor 210 can overlap with the second region 100R2 of electronic panel 100 in the top view z direction of electronic device 10d, but this disclosure is not limited thereto. In this embodiment, sensor 210 is a sensor utilizing photoplethysmography (PPG). By setting sensor 210, electronic device 10d can be used, for example, to detect blood oxygen saturation in the human body. For example, the human heart causes blood vessels to contract and dilate with each beat, both of which affect the reflection and / or scattering of light by blood vessels. Based on this, when the signal source (signal source SS in the above embodiment) emits near-infrared light to the human body, the sensor 210 can be used to receive the near-infrared light reflected and / or scattered by the blood vessels of the human body. By using a processing circuit (not shown) to read the electrical signals (e.g., electrons and / or holes) generated by the sensor 210 and calculating, the blood oxygen saturation in the human body can be determined. However, this disclosure is not limited thereto. In other embodiments, the electronic device 10d can be applied to biometric systems for fingerprints, irises, retina, or other human organs.
[0094] Figure 6 This is a partial cross-sectional schematic diagram of the electronic device according to the fifth embodiment of this disclosure. It should be noted that... Figure 6 The embodiments can be used Figure 5 The component references and partial contents of the embodiments are as follows, wherein the same or similar references are used to represent the same or similar components, and the description of the same technical content is omitted.
[0095] Please refer to Figure 6 The main difference between the electronic device 10e in this embodiment and the electronic device 10d described above is that the architecture of the redistribution layer 400b in the electronic device 10e is different from that of the redistribution layer 400a.
[0096] In detail, the redistribution layer 400b includes, for example, a connection structure CS2, a plurality of third pads PAD3 and a plurality of fourth pads PAD4, wherein the description of the third pads PAD3 and the fourth pads PAD4 can be referred to the above embodiments and will not be repeated here.
[0097] In this embodiment, the sensor 200 corresponds to an insulating layer in the connection structure CS2 in the top view z direction of the electronic device 10e. Specifically, the insulating layers IL1', IL2', and IL3' of the connection structure CS2 may have the following characteristics: Figure 6The structure shown includes insulating layers IL2' and IL3' each having an opening in the top view z of the electronic device 10e corresponding to the sensor 200, and insulating layer IL1' filling this opening. Based on this, the possibility of the insulating layers IL1', IL2', and IL3' having different refractive indices affecting the signal received by the sensor 200 can be reduced.
[0098] In addition, in this embodiment, a transparent conductive layer TL may be provided on the surface of the insulating layer IL1' near the electronic panel 100. The transparent conductive layer TL is disposed corresponding to the penetration area TR in the top view z direction of the electronic device 10e and is electrically connected to the corresponding third pad PAD3. The transparent conductive layer TL can, for example, further provide the conductive transmission path required by the electronic device 10e and can reduce the possibility of affecting the signal received by the sensor 200.
[0099] Figure 7 This is a partial cross-sectional schematic diagram of a circuit board in an electronic device according to an embodiment of this disclosure. It should be noted that... Figure 7 The embodiments can be used Figure 4 The component references and partial contents of the embodiments are as follows, wherein the same or similar references are used to represent the same or similar components, and the description of the same technical content is omitted.
[0100] Please refer to Figure 7 The circuit board 300b of this embodiment shows that the types of drivers DR may include driver DR1 and / or temperature sensor DR2, and shows the arrangement relationship between driver DR1 and temperature sensor DR2.
[0101] The driver DR1 may include, for example, a driving element for controlling the operation of the electronic component EC in the above embodiments, and the temperature sensor DR2 may include, for example, a driving element for sensing the temperature of the electronic component EC during operation. In some embodiments, the temperature sensor DR2 may include a thermal diode, but this disclosure is not limited thereto.
[0102] In some embodiments, temperature sensor DR2 may be transferred together with driver DR1 to the same surface of substrate SB, wherein temperature sensor DR2 is disposed between adjacent drivers DR1 for being driven thereto, but this disclosure is not limited thereto. The density of temperature sensor DR2 on substrate SB may, for example, differ from the density of driver DR1 on substrate SB, but this disclosure is not limited thereto. In other embodiments, temperature sensor DR2 may be integrated with driver DR1 via interposer INT using panel-level packaging to form driver DR3, but this disclosure is not limited thereto. Interposer INT may be, for example, a silicon interposer, a glass interposer, or an organic interposer. A plurality of microbump structures (not shown) may be provided on the surface of interposer 200 facing temperature sensor DR2 to allow temperature sensor DR2 to be bonded to interposer INT. Although Figure 7 Not shown, in some other embodiments, the temperature sensor DR2 may be arranged in an array on a carrier plate (not shown), wherein the carrier plate may be attached to the surface of the substrate SB away from the driver DR1.
[0103] In this embodiment, by setting the temperature sensor DR2, the temperature sensor DR2 can detect the temperature information of each area of the electronic device 10c, and can transmit this information to the driver DR1 so that the driver DR1 can correspondingly provide voltage control to the electronic components EC in each area.
[0104] Figure 8 This is a partial cross-sectional schematic diagram of the electronic device according to the sixth embodiment of this disclosure. It should be noted that... Figure 8 The embodiments can be used Figure 5 The component references and partial contents of the embodiments are as follows, wherein the same or similar references are used to represent the same or similar components, and the description of the same technical content is omitted.
[0105] Please refer to Figure 8 The main difference between the electronic device 10f in this embodiment and the electronic device 10d described above is that the sensor 200 and the plurality of drivers DR in the electronic device 10f are disposed on the same surface of the substrate SB.
[0106] Specifically, the sensor 200 may be transferred, for example, along with a plurality of driver DRs, to a surface of the substrate SB near the electronic panel 100. In this embodiment, the encapsulation layer EL may surround the sensor 200 and the plurality of driver DRs.
[0107] In this embodiment, since the driver DR and the sensor 200 are disposed together on the surface of the substrate SB near the electronic panel 100, the driver DR and the sensor 200 are arranged facing upwards. The driver DR can be electrically connected to the conductive layer M3 of the connection structure CS1 through the bonding pad, but this disclosure is not limited thereto.
[0108] In this embodiment, the redistribution layer 400a can be bonded to the electronic panel 100 via the adhesive layer AL. The adhesive layer AL may, for example, comprise a conductive material. For instance, the adhesive layer AL may comprise anisotropic conductive film (ACF) or other suitable materials, and this disclosure is not limited thereto.
[0109] Figure 9A This is a partial cross-sectional schematic diagram of the electronic device according to the seventh embodiment of this disclosure. It should be noted that... Figure 9A The embodiments can be used Figure 8 The component references and partial contents of the embodiments are as follows, wherein the same or similar references are used to represent the same or similar components, and the description of the same technical content is omitted.
[0110] Please refer to Figure 9A The main difference between the electronic device 10g in this embodiment and the electronic device 10f described above is that the architecture of the circuit board 500 in the electronic device 10g is different from the overall architecture composed of the circuit board 300a, the redistribution layer 400a and the substrate SB.
[0111] In this embodiment, the circuit board 500 includes a base layer 510, a first circuit layer 520, and a second circuit layer 530.
[0112] The substrate layer 510, for example, has a through-hole 510_V, wherein the through-hole 510_V penetrates a first side 510S1 and a second side 510S2 of the substrate layer 510, and the first side 510S1 is closer to the electronic panel 100 than the second side 510S2. The material of the substrate layer 510 can be described, for example, with reference to the substrate SB of the above embodiment, and will not be repeated here. In this embodiment, the material of the substrate layer 510 is glass. Based on this, the through-hole 510_V of the substrate layer 510 can be, for example, a through-glass via (TGV). In other embodiments, the material of the substrate layer 510 includes polymethyl methacrylate (PMMA), polycarbonate (PC), polyimide (PI), polyethylene terephthalate (PET), or other suitable materials or combinations thereof.
[0113] It is worth noting that, in this embodiment, the density of vias 510_V overlapping with the first region 100R1 in the top view z direction of the electronic device 10g can be less than the density of vias 510_V overlapping with the second region 100R2 in the top view z direction of the electronic device 10g. This design reduces the possibility that the sensing signal received by the sensor 200 will be affected by the vias 510_V.
[0114] It is worth noting that the second region 100R2 is considered as the display area in the electronic device 10g, and the first region 100R1 is considered as the area in the electronic device 10g that can be used for both sensing and display, but this disclosure is not limited thereto.
[0115] In some embodiments, a crack sensor may be disposed on the first side 510S1 of the substrate 510. The crack sensor may be disposed, for example, in the edge region of the substrate 510 and / or in the region where the density of the vias 510_V in the substrate 510 changes (e.g., at the junction of the first region 100R1 and the second region 100R2), because cracks are more likely to occur in the aforementioned regions.
[0116] The first circuit layer 520 is disposed, for example, on the first side 510S1 of the substrate layer 510. In this embodiment, the first circuit layer 520 includes an insulating layer IL1, a conductive layer M1, an insulating layer IL2, a conductive layer M2, an insulating layer IL3, and a conductive layer M3. The conductive layers M1 to M3 are electrically connected to each other to form a conductive transmission path, as described in the above embodiment regarding the connection structure CS1, and will not be repeated here. The first circuit layer 520 is electrically connected to the third pad PAD3, for example, through the conductive layer M1.
[0117] The second circuit layer 530 is disposed, for example, on the second side 510S2 of the base layer 510. In this embodiment, the second circuit layer 530 includes an insulating layer IL4, a conductive layer M4, an insulating layer IL5, a conductive layer M5, an insulating layer IL6, and a conductive layer M6. The conductive layers M4 to M6 are electrically connected to each other to form a conductive transmission path, as described in the above embodiment regarding the connection structure CS1, and will not be repeated here. The conductive layer M6 in the second circuit layer 530 may be, for example, a heat dissipation pad, but this disclosure is not limited thereto.
[0118] In some embodiments, the conductive layer M6 in the second circuit layer 530 is electrically connected to the conductive terminal CT, thereby enabling electrical connection to external electronic components (not shown). The conductive terminal CT may be, for example, as shown below. Figure 9AThe solder balls shown are not limited to this embodiment. In this embodiment, the first circuit layer 520 and the second circuit layer 530 are electrically connected through vias 510_V in the base layer 510. Specifically, the conductive layer M3 in the first circuit layer 520 is electrically connected, for example, to the via EL_V of the encapsulation layer EL, and the conductive layer M4 in the second circuit layer 530 is electrically connected, for example, to the via 510_V of the base layer 510. Since the corresponding vias EL_V of the encapsulation layer EL and the corresponding vias 510_V of the base layer 510 at least partially overlap and are electrically connected to each other, the first circuit layer 520 and the second circuit layer 530 can be electrically connected to each other.
[0119] In addition, in this embodiment, the circuit board 500 is electrically connected to the electronic panel 100 through the third pad PAD3.
[0120] In this embodiment, the electronic device 10g further includes a driver DR and a sensor 200. The driver DR is disposed on the circuit board 500, for example, and may be configured to drive a first element EC1, a second element EC2, a third element EC3, and a fourth element EC4. For example, the driver DR may provide signals to the first element EC1, the second element EC2, the third element EC3, and / or the fourth element EC4 to cause them to emit light or electromagnetic waves, but this disclosure is not limited thereto. The sensor 200 is disposed on the circuit board 500, for example, and may include a sensor 200a and a sensor 200b. Sensors 200a and 200b may have the same or different functions and may be configured to receive the same or different sensing signals, for example. In this embodiment, the driver DR and the sensor 200 are disposed together on the first side 510S1 of the substrate layer 510. That is, the driver DR and the sensor 200 are arranged facing upwards, and each can be electrically connected to the conductive layer M3 of the first circuit layer 520 via bonding pads, but this disclosure is not limited thereto.
[0121] Figure 9B This is a partial cross-sectional schematic diagram of the electronic device according to the eighth embodiment of this disclosure. It should be noted that... Figure 9B The embodiments can be used Figure 9A The component references and partial contents of the embodiments are as follows, wherein the same or similar references are used to represent the same or similar components, and the description of the same technical content is omitted.
[0122] Please refer to Figure 9B The main difference between the electronic device 10h in this embodiment and the electronic device 10g described above is that the driver DR and the sensor 200 in the electronic device 10h are disposed together on the second side 510S2 of the substrate layer 510.
[0123] In detail, the driver DR and the sensor 200 are disposed on the insulating layer IL6 of the second circuit layer 530, and each can be electrically connected to the conductive layer M6 of the second circuit layer 530 through bonding pads CP1, CP2 and CP3, but this disclosure is not limited thereto.
[0124] Additionally, in this embodiment, the substrate layer 510 also includes a via 510_V'. The via 510_V' overlaps, for example, with the penetration region TR in the first region 100R1 in the top view z direction of the electronic device 10h. In this embodiment, the material in the via 510_V' is the same as or similar to the material of the insulating layer PV. This design reduces the possibility that the sensing signal received by the sensor 200 will be affected by the substrate layer 510, which has a different refractive index.
[0125] It is worth noting that, although Figure 9B Not shown, in other embodiments, the via 510_V' may comprise two materials. Specifically, the inner layer of the via 510_V' may be made of the same or similar material as, for example, the insulating layer PV, and the outer layer of the via 510_V' may be made of the same or similar material as, for example, the via 510_V. This design further improves the collimation of the sensing signal received by the sensor 200.
[0126] Figure 9C This is a partial cross-sectional schematic diagram of the electronic device according to the ninth embodiment of this disclosure. It should be noted that... Figure 9C The embodiments can be used Figure 9B The component references and partial contents of the embodiments are as follows, wherein the same or similar references are used to represent the same or similar components, and the description of the same technical content is omitted.
[0127] Please refer to Figure 9B The main difference between the electronic device 10i in this embodiment and the electronic device 10h described above is that the driver DR and the sensor 200 in the electronic device 10i are disposed together on the second side 510S2 of the substrate layer 510.
[0128] Side wiring layer 540 is disposed, for example, on the third side 510S3 and the fourth side 510S4 of the substrate layer 510, wherein the third side 510S3 and the fourth side 510S4 of the substrate layer 510 are respectively connected to the first side 510S1 and the second side 510S2. In this embodiment, the side wiring layer 540 is electrically connected to the first wiring layer 520 and the second wiring layer 530 through the second pad PAD2 and the fourth pad PAD4, which can provide additional circuit transmission paths. Furthermore, in some embodiments, the side wiring layer 540 may extend from the third side 510S3 and / or the fourth side 510S4 of the substrate layer 510 to the side surface of the first wiring layer 520 and / or the second wiring layer 530 to be electrically connected to the corresponding conductors in the first wiring layer 520 and / or the second wiring layer 530.
[0129] A protective layer 550 is disposed, for example, on the third side 510S3 and the fourth side 510S4 of the base layer 510, and for example, covers the side circuit layer 540. In some embodiments, the material of the protective layer 550 may include acrylic resin, polyurethane resin, synthetic rubber resin, or silicone resin. The protective layer 550 may, for example, have relatively high hardness and / or strength to provide scratch resistance, thereby protecting the side circuit layer 540.
[0130] An encapsulation layer 560 is disposed, for example, on the electronic panel 100. In this embodiment, the encapsulation layer 560 covers the electronic panel 100. The encapsulation layer 560 may be used, for example, to protect the electronic components EC in the electronic panel 100. In this embodiment, the encapsulation layer 560 may be further disposed between the electronic panel 100 and the first circuit layer 520 to protect the first pad PAD1 and the third pad PAD3. In some embodiments, the encapsulation layer 560 may extend further to the side surface of the first circuit layer 520. The material of the encapsulation layer 560 may be, for example, an inorganic material (e.g., silicon oxide, silicon nitride, silicon oxynitride, or a stack of at least two of the above materials), an organic material (e.g., polytetrafluoroethylene, polyimide, poly(p-xylene), benzocyclobutene, or other suitable materials), or a combination thereof, but this disclosure is not limited thereto.
[0131] Figure 9D This is a partial cross-sectional schematic diagram of the electronic device according to the tenth embodiment of this disclosure. It should be noted that... Figure 9D The embodiments can be used Figure 9A The component references and partial contents of the embodiments are as follows, wherein the same or similar references are used to represent the same or similar components, and the description of the same technical content is omitted.
[0132] Please refer to Figure 9DThe main difference between the electronic device 10j in this embodiment and the electronic device 10g described above is that: (1) the electronic panel 100' in the electronic device 10j includes multiple communication elements 600; (2) the driver DR and the sensor 200 are embedded in the substrate layer 510.
[0133] The communication element 600 may be applicable, for example, to the fields of communications, radar / light-based systems, reconfigurable intelligent surface (RIS) technology, or other suitable fields / technologies, and this disclosure is not limited thereto. In some embodiments, the communication element 600 may include a variable capacitor, a variable resistor, a varactor diode, a phase shifter, an amplifier, an antenna, a biometric sensor, a graphene sensor, other suitable tuning elements, or combinations thereof. The communication element 600 may, for example, have functions to increase the operable bandwidth, but this disclosure is not limited thereto.
[0134] In this embodiment, the communication element 600 includes communication element 600a and communication element 600b. Communication element 600a overlaps with the first region 100R1, for example, in the top view z direction of the electronic device 10j, and communication element 600b does not overlap with the first region 100R1, for example, in the top view z direction of the electronic device 10j. In this embodiment, the size of communication element 600a is smaller than the size of communication element 600b and / or the density of communication element 600a is smaller than the density of communication element 600b. This design reduces the possibility that the sensing signal received by the sensor 200 will be affected by the communication element 600a.
[0135] In this embodiment, the substrate 510 has a first groove 512 and a second groove 514, and the sensor 200 and the driver DR are respectively disposed in the first groove 512 and the second groove 514. In some embodiments, the driver DR and the sensor 200 may be embedded together in the first side 510S1 of the substrate 510, but this disclosure is not limited thereto. In other embodiments, the driver DR may be embedded in the first side 510S1 of the substrate 510, and the sensor 200 may be embedded in the second side 510S2 of the substrate 510, in which case the sensor 200 is configured in a face-down manner, but this disclosure is not limited thereto.
[0136] In some embodiments, at least a portion of the communication element 600b disposed in the second region 100R2 may be replaced with a flip-chip light-emitting diode, which enables the second region 100R2 to have both light-emitting and communication functions.
[0137] Figure 9E Based on Figure 9B A partial top view of the electronic device. It should be noted that... Figure 9E The embodiments can be used Figure 9B The component references and partial contents of the embodiments are as follows, wherein the same or similar references are used to represent the same or similar components, and the description of the same technical content is omitted.
[0138] Please refer to Figure 9E The electronic device 10h may further include a communication element 600'. In this embodiment, the communication element 600' is a near field communication (NFC) antenna, but this disclosure is not limited thereto.
[0139] The communication element 600' may, for example, be disposed between the electronic panel 100 and the first circuit layer 520. In this embodiment, the trace CL in the communication element 600' belongs to the same layer as the cathode traces of the first unit U1 and the second unit U2 in the electronic panel 100. The communication element 600' can be electrically connected to the common electrode CE through the via BM_V of the shielding layer BM.
[0140] Figure 10A , Figure 10B as well as Figure 10C Each for themselves Figure 9C Enlarged top view schematic diagram of some embodiments of region R4 in the diagram. It should be noted that... Figure 10A , Figure 10B as well as Figure 10C The embodiments can be used Figure 9C The component references and partial contents of the embodiments are as follows, wherein the same or similar references are used to represent the same or similar components, and the description of the same technical content is omitted.
[0141] Please refer to Figure 10A The electronic device 10i may include a filter structure FS. The filter structure FS is disposed, for example, on a substrate layer 510. In some embodiments, the filter structure FS is disposed on a first side 510S1 of the substrate layer 510, but this disclosure is not limited thereto. In this embodiment, the filter structure FS and the transmission region TR at least partially overlap in the top view direction z of the electronic device 10i. Based on this, the sensor 200 can receive the optical signal to be sensed via the filter structure FS, thereby further increasing the signal-to-noise ratio of the optical signal.
[0142] Please refer to Figure 10BThe electronic device 10i may include a beam splitter BS. The beam splitter BS is disposed, for example, on a substrate 510. In some embodiments, the beam splitter BS is disposed on a first side 510S1 of the substrate 510, but this disclosure is not limited thereto. The material of the beam splitter BS may include, for example, a metallic or dielectric material. For example, the material of the beam splitter BS may include aluminum, tin, copper, silver, silicon nitride, or aluminum nitride. In this embodiment, the beam splitter BS and the penetration region TR at least partially overlap in the top view z direction of the electronic device 10i. Based on this, the beam splitter BS can split the optical signal to facilitate subsequent sensing of the optical signal by the sensor 200.
[0143] Please refer to Figure 10C The electronic device 10i may include a lens structure LS. The lens structure LS is disposed, for example, on a substrate layer 510. In some embodiments, the lens structure LS is disposed on a first side 510S1 of the substrate layer 510, but this disclosure is not limited thereto. The lens structure LS may be formed, for example, by performing atomic layer deposition (ALD), physical vapor deposition (PVD), or chemical vapor deposition (CVD) processes, but this disclosure is not limited thereto. The material of the lens structure LS may include, for example, a metallic material or a dielectric material. For example, the material of the lens structure LS may include titanium dioxide, aluminum oxide, hafnium oxide, zinc oxide, or silicon nitride. In this embodiment, the lens structure LS and the transmission region TR at least partially overlap in the top view direction z of the electronic device 10i. Based on this, by setting the lens structure LS, the sensor 200 can receive collimated optical signals via the lens structure LS, which can effectively suppress crosstalk or background noise from signals from non-corresponding regions, thereby further increasing the signal-to-noise ratio.
[0144] In summary, the electronic device provided in some embodiments of this disclosure includes a first region and a second region, wherein the first region overlapping with the sensor is provided with a transmitting region and a transmitting region. By defining the proportion of the transmitting region in the first region to obtain a relatively good sensing accuracy, the electronic device provided in some embodiments of this disclosure can have relatively good sensing capabilities in full-screen display. Furthermore, by making the first unit in the first region have a relatively small size and / or making the distance between adjacent first units relatively small, the first region can have a relatively large transmitting region, thereby enabling the electronic device provided in some embodiments of this disclosure to have relatively good sensing capabilities.
[0145] In other embodiments of the electronic device disclosed herein, by making the distance between adjacent electronic components in the first region and the second region have a specific proportional range, the electronic device provided in other embodiments of the disclosure herein can have relatively good sensing function in the case of full-screen display.
[0146] In the electronic device provided in some embodiments of this disclosure, by forming various structures between the penetrating area of the electronic panel and the sensor to reduce the influence of the sensing signal, the signal-to-noise ratio of the sensor's sensing signal can be further increased.
[0147] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention, and not to limit them; although the present invention has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some or all of the technical features; and these modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the scope of the technical solutions of the embodiments of the present invention.
Claims
1. An electronic device, characterized in that, include: An electronic panel has a first region and a second region, wherein the first region includes a first element and a second element, the first element and the second element being spaced apart from each other by a first distance, the second region includes a third element and a fourth element, the third element and the fourth element being spaced apart from each other by a second distance, and each of the first element and the second element has a emitting region and a penetrating region; as well as A sensor, overlapping the first region of the electronic panel, wherein the sensor is configured to receive sensing signals through the penetration region. The first ratio between the second distance and the first distance is 0.76 to 1.24, and the second ratio between the area of the penetrated region and the area of the first element is 0.52 to 0.
96.
2. The electronic device according to claim 1, wherein the second ratio is 0.7 to 0.
9.
3. The electronic device according to claim 2, wherein the second ratio is 0.7 to 0.
84.
4. The electronic device according to claim 1, wherein the area of the transmitting region is smaller than the area of the penetrating region.
5. The electronic device according to claim 1, wherein the first element has a plurality of first units, the third element has a plurality of second units, and the distance between two adjacent first units is less than the distance between two adjacent second units.
6. The electronic device of claim 1, wherein the second region further comprises a signal source configured to provide the sensing signal, and the sensing signal has a peak wavelength of 700 nm to 1400 nm.
7. The electronic device according to claim 1, further comprising a circuit board disposed between the electronic panel and the sensor, wherein the electronic panel is electrically connected to the circuit board.
8. The electronic device of claim 7, wherein the electronic panel includes a first pad, the circuit board includes a second pad, the first pad is engaged with the second pad, the first pad is electrically connected to the first element, and the first pad does not overlap with the penetration area.
9. The electronic device of claim 8, further comprising a redistribution layer disposed between the electronic panel and the circuit board, wherein the redistribution layer comprises: The third pad is electrically connected to the first pad; The fourth pad is electrically connected to the second pad; as well as The connection structure is electrically connected to the third and fourth pads. In the cross-sectional view of the electronic device, the center of the third pad is offset from the center of the fourth pad in the horizontal direction.
10. The electronic device of claim 1, further comprising a circuit board electrically connected to the electronic panel, wherein the circuit board comprises: basal layer; The first circuit layer is disposed on the first side of the base layer; as well as The second circuit layer is disposed on the second side of the base layer. The first circuit layer and the second circuit layer are electrically connected through vias in the substrate layer, and the first side is closer to the electronic panel than the second side.
11. The electronic device of claim 10, wherein the substrate layer comprises glass.
12. The electronic device of claim 10, further comprising a driver disposed on the circuit board and configured to drive the first element, the second element, the third element, and the fourth element.
13. The electronic device of claim 12, wherein the driver and the sensor are disposed on the second side of the substrate layer.
14. The electronic device of claim 12, wherein the driver and the sensor are disposed on the first side of the substrate layer.
15. The electronic device of claim 12, wherein the driver and the sensor are each disposed on the second side and the first side of the substrate layer.
16. The electronic device of claim 12, wherein the substrate layer has a first groove and a second groove, and the sensor and the driver are each disposed in the first groove and the second groove.
17. The electronic device of claim 12, wherein the driver does not overlap with the penetration region.
Citation Information
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