Semiconductor structure and manufacturing method thereof

Abstract

The invention relates to a semiconductor structure and a manufacturing method thereof, the semiconductor structure comprises a substrate and a light resistance structure located on the substrate, the light resistance structure comprises an opening exposing the substrate, the opening comprises a first part close to one side of the substrate and a second part away from one side of the substrate, and the first part and the second part are arranged on the substrate. The width of the first part is not changed in the direction of vertically entering the surface of the substrate, the width of the second part is gradually reduced, and the minimum width of the second part is equal to the width of the first part. According to the invention, the problem of etching agent residue in the subsequent wet etching process is reduced or avoided, so that the probability of pollution or damage to the surface of the substrate exposed by the opening is effectively reduced or avoided, and the performance and stability of the semiconductor device are improved.

Description

Technical Field

[0001] This application relates to the field of semiconductor manufacturing technology, and in particular to a semiconductor structure and a method for manufacturing the same. Background Technology

[0002] In existing 28nm processes, the requirements for gate oxide vary across different voltage regions. Therefore, a typical process adds an exposure step after growing a gate oxide (GOX) layer to adapt to the requirements of different voltage regions by varying the thickness of the GOX layer. However, due to limitations in photoresist structure design, liquid residue can easily occur in concave areas (or openings) of the photoresist structure. For example, hydrofluoric acid (HF), which consumes the gate oxide layer, is easily blocked by the photoresist structure and remains in the concave areas (or openings). This residual hydrofluoric acid can then corrode the gate oxide layer and further damage the silicon substrate beneath it, causing damage to the silicon substrate and, in severe cases, even affecting the performance of the semiconductor device. Summary of the Invention

[0003] Therefore, it is necessary to provide a semiconductor structure and its manufacturing method to reduce or avoid the probability of residual liquid in the opening of the photoresist structure, thereby helping to improve the yield of semiconductor devices.

[0004] This application provides a semiconductor structure, including:

[0005] Base;

[0006] A photoresist structure is located on the substrate. The photoresist structure includes an opening that exposes the substrate. The opening includes a first portion on a side close to the substrate and a second portion on a side away from the substrate. Along a direction perpendicular to the surface of the substrate, the width of the first portion remains constant, the width of the second portion gradually decreases, and the minimum width of the second portion is equal to the width of the first portion.

[0007] In one embodiment, the ratio between the height of the first portion and the height of the second portion ranges from 1:15 to 5:32.

[0008] In one embodiment, the inclination angle of the sidewall of the second part ranges from 15° to 30°.

[0009] In one embodiment, the height range of the first portion includes 2kÅ to 6kÅ.

[0010] In one embodiment, the first part has a rectangular cross-sectional shape, and the second part has an inverted trapezoidal cross-sectional shape.

[0011] In one embodiment, the substrate includes a stacked substrate and a gate oxide layer, the photoresist structure is disposed on the gate oxide layer, and the opening exposes the gate oxide layer.

[0012] Accordingly, this application also provides a method for manufacturing a semiconductor structure, comprising:

[0013] A substrate is provided, and a photoresist layer is formed on the substrate;

[0014] The first exposure process is performed to form a first exposure area within the photoresist layer;

[0015] A second exposure process is performed to form a second exposure area within the photoresist layer, and the orthographic projection of the first exposure area toward the substrate falls within the orthographic projection of the second exposure area toward the substrate;

[0016] The photoresist layer is developed to remove portions of the photoresist layer located within the first exposure area and the second exposure area, thereby forming a photoresist structure with an opening that exposes the substrate.

[0017] The opening includes a first portion near the substrate and a second portion away from the substrate. Along the direction perpendicular to the surface of the substrate, the width of the first portion remains constant, the width of the second portion gradually decreases, and the minimum width of the second portion is equal to the width of the first portion.

[0018] In one embodiment, the focal length of the first exposure process is smaller than the focal length of the second exposure process, and the injection dose of the first exposure process is smaller than the injection dose of the second exposure process.

[0019] In one embodiment, the focal length range of the first exposure process includes 150nm to 250nm, and the exposure dose ranges from 200J / m. 2 ~300J / m 2 ;

[0020] The focal length range of the second exposure process includes 250nm~350nm, and the exposure dose ranges from 300J / m. 2 ~500J / m 2 .

[0021] In one embodiment, the process of providing the substrate includes:

[0022] Provide substrate;

[0023] A gate oxide layer is formed on the substrate to form the substrate comprising the substrate and the gate oxide layer;

[0024] The photoresist structure is formed on the gate oxide layer, and the opening exposes the gate oxide layer.

[0025] An unexpected effect of this application is that by providing a photoresist structure with an opening on the substrate, and keeping the width of the first portion of the opening near the substrate constant along the direction perpendicular to the surface of the substrate, while keeping the width of the second portion of the opening away from the substrate gradually decreasing along the aforementioned direction, and the minimum width of the second portion being equal to the width of the first portion, the problem of etchant residue during subsequent wet etching is reduced or avoided. This effectively reduces or avoids the probability of contamination or damage to the substrate surface exposed by the opening, thereby helping to improve the performance and stability of semiconductor devices. Attached Figure Description

[0026] To more clearly illustrate the technical solutions in the embodiments of this application or the conventional technology, the drawings used in the description of the embodiments or the conventional technology will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0027] Figure 1 This is a three-dimensional structural diagram of a concave photoresist in a related technology.

[0028] Figure 2 This is a schematic diagram of a semiconductor structure provided in one embodiment of this application.

[0029] Figure 3 A flowchart illustrating a method for manufacturing a semiconductor structure according to one embodiment of this application.

[0030] Figure 4 This is a schematic diagram of the structure corresponding to the step of providing a substrate in the manufacturing method of a semiconductor structure provided in one embodiment of this application.

[0031] Figure 5 This is a schematic diagram of the structure corresponding to the step of forming a photoresist layer on a substrate in a method for manufacturing a semiconductor structure according to one embodiment of this application.

[0032] Figure 6 This is a schematic diagram of the structure corresponding to the first exposure process in the manufacturing method of a semiconductor structure provided in one embodiment of this application.

[0033] Figure 7 This is a schematic diagram of the structure corresponding to the second exposure process in the manufacturing method of the semiconductor structure provided in one embodiment of this application.

[0034] Figure 8 This is a schematic diagram of the structure corresponding to the step of developing the photoresist layer in the manufacturing method of a semiconductor structure provided in one embodiment of this application.

[0035] The reference numerals in the figures include: 100-silicon substrate; 101-gate oxide layer; 110-concave photoresist; 111-concave opening; A-bottom corner region; 200-substrate; 201-substrate; 202-gate oxide layer; 210-photoresist structure; 211-opening; 211a-first part; 211b-second part; 212-photoresist layer; 212a-first exposure area; 212b-second exposure area; α-tilt angle. Detailed Implementation

[0036] To facilitate understanding of this application, a more complete description will be provided below with reference to the accompanying drawings, which illustrate embodiments of the present application. However, the present application can be implemented in many different forms and is not limited to the embodiments described herein. Rather, these embodiments are provided so that the disclosure of this application will be thorough and complete.

[0037] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this application belongs. The terminology used herein is for the purpose of describing particular embodiments only and is not intended to be limiting of the application.

[0038] It should be understood that when an element or layer is referred to as "on," "adjacent to," "connected to," or "coupled to" other elements or layers, it may be directly on, adjacent to, connected to, or coupled to other elements or layers, or there may be intervening elements or layers. Conversely, when an element is referred to as "directly on," "directly adjacent to," "directly connected to," or "directly coupled to" other elements or layers, there are no intervening elements or layers. It should be understood that although the terms first, second, third, etc., may be used to describe various elements, parts, regions, layers, doping types, and / or portions, these elements, parts, regions, layers, doping types, and / or portions should not be limited by these terms. These terms are only used to distinguish one element, part, region, layer, doping type, or portion from another element, part, region, layer, doping type, or portion. Therefore, without departing from the teachings of this application, the first element, component, region, layer, doping type, or portion discussed below may be represented as a second element, component, region, layer, or portion; for example, the first doping type may be referred to as the second doping type, and similarly, the second doping type may be referred to as the first doping type; the first doping type and the second doping type are different doping types, for example, the first doping type may be P-type and the second doping type may be N-type, or the first doping type may be N-type and the second doping type may be P-type.

[0039] Spatial relation terms such as “below,” “under,” “below,” “under,” “above,” “above,” etc., are used herein to describe the relationship between one element or feature shown in the figure and other elements or features. It should be understood that, in addition to the orientation shown in the figure, spatial relation terms also include different orientations of the device in use and operation. For example, if the device in the figure is flipped, the element or feature described as “below,” “under,” or “below” will be oriented “above” the other element or feature. Therefore, the exemplary terms “below” and “under” can include both above and below orientations. Furthermore, the device may also include other orientations (e.g., rotated 90 degrees or other orientations), and the spatial descriptive terms used herein will be interpreted accordingly.

[0040] When used herein, the singular forms of “a,” “an,” and “ / the” may also include the plural forms unless the context clearly indicates otherwise. It should also be understood that the terms “comprising / including” or “having,” etc., specify the presence of the stated features, wholes, steps, operations, components, parts, or combinations thereof, but do not preclude the possibility of the presence or addition of one or more other features, wholes, steps, operations, components, parts, or combinations thereof. Meanwhile, in this specification, the term “and / or” includes any and all combinations of the associated listed items.

[0041] Figure 1 This is a schematic diagram of the three-dimensional structure of a concave photoresist. (See attached image.) Figure 1 A gate oxide layer 101 is disposed on a silicon substrate 100, and a concave photoresist 110 is disposed on the gate oxide layer 101. The concave photoresist 110 includes a concave opening 111 that exposes part of the gate oxide layer 101. The cross-section of the concave opening 111 is rectangular along the direction perpendicular to the surface of the silicon substrate 100.

[0042] During wet etching based on the concave photoresist 110, the etchant (e.g., hydrofluoric acid) accumulates within the concave opening 111 and etches the exposed portion of the gate oxide layer 101. However, after wet etching is completed, due to the obstruction of the sidewalls of the concave opening 111, etchant residue is easily left at the bottom corner region A within the concave opening 111. This residue continues to corrode the gate oxide layer 101, and in severe cases, may even further damage the silicon substrate 100, thereby causing damage to the silicon substrate 100 and affecting the performance of the final semiconductor device.

[0043] Therefore, it is necessary to provide a semiconductor structure and its manufacturing method to reduce or avoid the probability of residual liquid in the opening of the photoresist structure, thereby helping to improve the yield of semiconductor devices.

[0044] Figure 2 This is a schematic diagram of a semiconductor structure provided in one embodiment of this application. (See attached diagram.) Figure 2 One embodiment of this application provides a semiconductor structure including a substrate 200 and a photoresist structure 210 located on the substrate 200; wherein, the photoresist structure 210 includes an opening 211 exposing the substrate 200, the opening 211 including a first portion 211a on the side close to the substrate 200 and a second portion 211b on the side away from the substrate 200, along the direction perpendicular to the surface of the substrate 200, the width W1 of the first portion 211a remains unchanged, the width W2 of the second portion 211b gradually decreases, and the minimum width W2 of the second portion 211b is... min The width W1 of the first part 211a is equal to (i.e., W2) min =W1).

[0045] It should be noted that by setting an opening with a first part and a second part, and setting the first part with a constant width, the photoresist structure has sufficient thickness to protect the substrate and ensures that the substrate covered by the photoresist structures on both sides of the first part will not be damaged in subsequent process steps. At the same time, by making the width of the second part gradually decrease along the direction perpendicular to the substrate surface, and making the minimum width of the second part equal to the width of the first part, the etchant in the subsequent wet etching process can flow out along the sidewalls of the opening.

[0046] As can be seen, the photoresist structure described above, by providing a photoresist structure with an opening on the substrate, and keeping the width of the first portion of the opening near the substrate constant along the direction perpendicular to the surface of the substrate, and keeping the width of the second portion of the opening away from the substrate gradually decreasing along the aforementioned direction, with the minimum width of the second portion being equal to the width of the first portion, reduces or avoids the problem of etchant residue during subsequent wet etching, thereby effectively reducing or avoiding the probability of contamination or damage to the substrate surface exposed by the opening, and thus helping to improve the performance and stability of semiconductor devices.

[0047] Continue reading Figure 2 In one embodiment, the ratio between the height H1 of the first portion 211a and the height H2 of the second portion 211b ranges from 1:15 to 5:32. Optionally, the height H1 of the first portion 211a ranges from 2 kÅ to 6 kÅ. Optionally, the inclination angle α of the sidewall of the second portion 211b ranges from 15° to 30°.

[0048] It should be noted that the height, width, tilt angle and other parameters of the first and second parts inside the opening can be adjusted according to actual needs. It is only necessary to ensure that the shape of the opening can meet the two conditions that "the height of the first part is greater than or equal to the minimum thickness of the photoresist structure that can protect the substrate from damage" and "the etchant in the subsequent wet etching process can flow out along the sidewall of the opening". This application does not impose any restrictions on this.

[0049] See Figure 2 In one embodiment, the first portion 211a has a rectangular cross-sectional shape, and the second portion 211b has an inverted trapezoidal cross-sectional shape. In other embodiments of this application, since the width of the first portion remains constant in the direction perpendicular to the substrate surface, the cross-sectional shape of the first portion is always rectangular; while the cross-sectional shape of the second portion can be adjusted according to actual needs, as long as the width of the second portion gradually decreases in the direction close to the substrate, this application does not impose any restrictions on this.

[0050] Continue reading Figure 2 In one embodiment, the substrate 200 includes a substrate 201 and a gate oxide layer 202 stacked together, a photoresist structure 210 disposed on the gate oxide layer 202, and an opening 211 exposing the gate oxide layer 202. Optionally, the substrate 201 is a silicon substrate, and the gate oxide layer 202 is a silicon oxide layer.

[0051] Accordingly, see Figure 3 One embodiment of this application also provides a method for manufacturing a semiconductor structure, including the following steps S01 to S04.

[0052] Step S01: Provide a substrate and form a photoresist layer on the substrate.

[0053] Step S02: Perform the first exposure process to form a first exposure area within the photoresist layer.

[0054] Step S03: Perform a second exposure process to form a second exposure area within the photoresist layer, and the orthographic projection of the first exposure area toward the substrate falls within the orthographic projection of the second exposure area toward the substrate.

[0055] Step S04: The photoresist layer is developed to remove portions of the photoresist layer located within the first exposure area and the second exposure area, thereby forming a photoresist structure with an opening that exposes the substrate; wherein the opening includes a first portion near the substrate and a second portion away from the substrate, and along the direction perpendicular to the surface of the substrate, the width of the first portion remains constant, the width of the second portion gradually decreases, and the minimum width of the second portion is equal to the width of the first portion.

[0056] It should be noted that the portion of the first exposure area closer to the substrate forms the first part of the opening after the development process in step S04, and the portion of the second exposure area farther from the substrate forms the second part of the opening after the development process in step S04. Therefore, the morphology of the final opening can be adjusted by adjusting the process parameters of the first and second exposure processes.

[0057] Furthermore, it should be emphasized that the above process changes the commonly used single exposure process to a two-exposure process, forming a partially overlapping first and second exposure area. Without changing the original critical dimension (CD) of the photoresist structure, an opening with a first part and a second part is formed, and the opening has a shape similar to a "slide" so that the etchant in the subsequent wet etching process can flow out along the sidewall of the opening.

[0058] The semiconductor structure manufacturing method described above involves forming a photoresist layer on a substrate, defining the morphology of the opening through a first exposure process and a second exposure process, and forming a photoresist structure with the opening through a development process. This reduces or avoids the problem of etchant residue during subsequent wet etching, thereby effectively reducing or avoiding the probability of contamination or damage to the substrate surface exposed by the opening, and thus helping to improve the performance and stability of the semiconductor device.

[0059] See Figure 4In one embodiment, the process of providing the substrate 200 includes: providing a substrate 201; and forming a gate oxide layer 202 on the substrate 201 to form a substrate 200 including the substrate 201 and the gate oxide layer 202. Optionally, the substrate 201 may be a silicon substrate, and the gate oxide layer 202 may be a silicon oxide layer. In other embodiments of this application, the specific structure of the substrate may be adjusted according to actual needs, and this application does not impose any limitations on it.

[0060] See Figure 5 In one embodiment, a photoresist layer 212 is formed on a substrate 200. When the substrate 200 includes a substrate 201 and a gate oxide layer 202, the photoresist layer 212 is formed on the gate oxide layer 202.

[0061] See Figure 6 In one embodiment, a first exposure process is performed to form a first exposure region 212a within the photoresist layer 212. Optionally, the width of the first exposure region 212a remains constant along the direction perpendicular to the surface of the substrate 200; preferably, the cross-sectional shape of the first exposure region 212a is rectangular.

[0062] In one embodiment, the focal length of the first exposure process ranges from 150 nm to 250 nm, and the exposure dose ranges from 200 J / m. 2 ~300J / m 2 In other embodiments of this application, the specific process parameters of the first exposure process can be adjusted according to actual needs, and this application does not impose any restrictions on this.

[0063] See Figure 7 In one embodiment, a second exposure process is performed to form a second exposure region 212b within the photoresist layer 212, and the orthographic projection of the first exposure region 212a toward the substrate 200 falls within the orthographic projection of the second exposure region 212b toward the substrate 200. Optionally, the width of the second exposure region 212b gradually increases in the direction away from the substrate 200. Preferably, the cross-sectional shape of the second exposure region 212b is an inverted trapezoid.

[0064] In one embodiment, the focal length of the second exposure process is greater than that of the first exposure process, and the injection dose of the second exposure process is greater than that of the first exposure process. Optionally, the focal length of the second exposure process ranges from 250 nm to 350 nm, and the exposure dose ranges from 300 J / m. 2 ~500J / m 2In other embodiments of this application, the specific process parameters of the second exposure process can be adjusted according to actual needs, as long as the conditions of "the focal length of the second exposure process is greater than the focal length of the first exposure process and the injection dose of the second exposure process is greater than the injection dose of the first exposure process" are met. This application does not impose any restrictions on this.

[0065] See Figure 7 and Figure 8 In one embodiment, the photoresist layer 212 is developed to remove portions of the photoresist layer 212 located within the first exposure region 212a and the second exposure region 212b, thereby forming a photoresist structure 210 with an opening 211 that exposes the substrate 200. The opening 211 includes a first portion 211a near the substrate 200 and a second portion 211b away from the substrate 200. Along the direction perpendicular to the surface of the substrate 200, the width W1 of the first portion 211a remains constant, while the width W2 of the second portion 211b gradually decreases, and the minimum width W2 of the second portion 211b is... min It has the same width W1 as the first part 211a.

[0066] Continue reading Figure 8 In the case where the substrate 200 includes a substrate 201 and a gate oxide layer 202, a photoresist structure 210 is formed on the gate oxide layer 202, and an opening 211 exposes the gate oxide layer 202.

[0067] It should be noted that by forming an opening with a first portion and a second portion, and keeping the width of the first portion constant, the photoresist structure can have sufficient thickness to protect the substrate and ensure that the substrate covered by the photoresist structures on both sides of the first portion is not damaged in subsequent process steps. Simultaneously, by gradually decreasing the width of the second portion along the direction perpendicular to the substrate surface, and making the minimum width of the second portion equal to the width of the first portion, the etchant in the subsequent wet etching process can flow out along the sidewalls of the opening. This effectively reduces or avoids the probability of contamination or damage to the substrate surface exposed by the opening, thereby contributing to improved performance and stability of the semiconductor device.

[0068] An unexpected effect of this application is that by providing a photoresist structure with an opening on the substrate, and keeping the width of the first portion of the opening near the substrate constant along the direction perpendicular to the surface of the substrate, while keeping the width of the second portion of the opening away from the substrate gradually decreasing along the aforementioned direction, and the minimum width of the second portion being equal to the width of the first portion, the problem of etchant residue during subsequent wet etching is reduced or avoided. This effectively reduces or avoids the probability of contamination or damage to the substrate surface exposed by the opening, thereby helping to improve the performance and stability of semiconductor devices.

[0069] In the description of this specification, the references to terms such as "some embodiments," "other embodiments," "ideal embodiments," etc., refer to specific features, structures, materials, or characteristics described in connection with that embodiment or example that are included in at least one embodiment or example of this application. In this specification, the illustrative descriptions of the above terms do not necessarily refer to the same embodiments or examples.

[0070] The technical features of the above embodiments can be combined in any way. For the sake of brevity, not all possible combinations of the technical features of the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.

[0071] The embodiments described above are merely illustrative of several implementation methods of this application, and while the descriptions are relatively specific and detailed, they should not be construed as limiting the scope of the patent application. It should be noted that those skilled in the art can make various modifications and improvements without departing from the concept of this application, and these all fall within the protection scope of this application. Therefore, the protection scope of this patent application should be determined by the appended claims.

Claims

1. A semiconductor structure, characterized in that, include: Base; A photoresist structure is located on the substrate. The photoresist structure includes an opening that exposes the substrate. The opening includes a first portion on a side close to the substrate and a second portion on a side away from the substrate. Along a direction perpendicular to the surface of the substrate, the width of the first portion remains constant, the width of the second portion gradually decreases, and the minimum width of the second portion is equal to the width of the first portion.

2. The semiconductor structure according to claim 1, characterized in that, The ratio between the height of the first part and the height of the second part ranges from 1:15 to 5:

32.

3. The semiconductor structure according to claim 1, characterized in that, The inclination angle of the sidewall of the second part ranges from 15° to 30°.

4. The semiconductor structure according to claim 1, characterized in that, The height range of the first part includes 2kÅ to 6kÅ.

5. The semiconductor structure according to claim 1, characterized in that, The first part has a rectangular cross-sectional shape, and the second part has an inverted trapezoidal cross-sectional shape.

6. The semiconductor structure according to claim 1, characterized in that, The substrate includes a substrate and a gate oxide layer stacked together, the photoresist structure is disposed on the gate oxide layer, and the opening exposes the gate oxide layer.

7. A method for manufacturing a semiconductor structure, characterized in that, include: A substrate is provided, and a photoresist layer is formed on the substrate; The first exposure process is performed to form a first exposure area within the photoresist layer; A second exposure process is performed to form a second exposure area within the photoresist layer, and the orthographic projection of the first exposure area toward the substrate falls within the orthographic projection of the second exposure area toward the substrate; The photoresist layer is developed to remove portions of the photoresist layer located within the first exposure area and the second exposure area, thereby forming a photoresist structure with an opening that exposes the substrate. The opening includes a first portion near the substrate and a second portion away from the substrate. Along the direction perpendicular to the surface of the substrate, the width of the first portion remains constant, the width of the second portion gradually decreases, and the minimum width of the second portion is equal to the width of the first portion.

8. The method for manufacturing a semiconductor structure according to claim 7, characterized in that, The focal length of the first exposure process is smaller than that of the second exposure process, and the injection dose of the first exposure process is smaller than that of the second exposure process.

9. The method for manufacturing a semiconductor structure according to claim 8, characterized in that, The focal length range of the first exposure process includes 150nm~250nm, and the exposure dose ranges from 200J / m. 2 ~300J / m 2 ; The focal length range of the second exposure process includes 250nm~350nm, and the exposure dose ranges from 300J / m. 2 ~500J / m 2 .

10. The method for manufacturing a semiconductor structure according to claim 7, characterized in that, The process of providing the substrate includes: Provide substrate; A gate oxide layer is formed on the substrate to form the substrate comprising the substrate and the gate oxide layer; The photoresist structure is formed on the gate oxide layer, and the opening exposes the gate oxide layer.

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