Packaging method and packaging structure of vehicle-gauge-level chip

Abstract

The invention relates to the technical field of a chip packaging technology, and provides a packaging method and a packaging structure of a vehicle-gauge-level chip, and the method comprises the steps: S1, preparing a core board and a power module, and preparing a third wiring layer and a fourth wiring layer on the core board; a first through groove is machined in the first semi-finished board, and the power module is installed in the first through groove; the power module comprises a chip and a heat dissipation copper base, and the chip is arranged on the heat dissipation copper base. S2, preparing a second wiring layer and a fifth wiring layer; s3, preparing a copper block; a second through groove is machined in the second semi-finished board on the outer side of the first through groove, and the copper block is installed in the second through groove; s4, preparing a first wiring layer and a sixth wiring layer; the first wiring layer is in heat conduction connection with the power module and the copper block, and / or the sixth wiring layer is in heat conduction connection with the power module and the copper block.

Description

Technical Field

[0001] This invention belongs to the technical field of chip packaging technology, and more specifically, it relates to a packaging method and packaging structure for automotive-grade chips. Background Technology

[0002] The application of automotive power chips is becoming increasingly widespread. As users' demands for the computing speed of automotive power chips gradually increase, the computing power of these chips is also becoming more powerful. During operation, excessively high temperatures in automotive power chips can severely impact computing performance. Existing automotive-grade functional chips typically form power modules on a heat-dissipating copper substrate for heat dissipation. This substrate usually has a cavity, and the chip is fixed to the inner wall of the cavity. After the chip and the heat-dissipating copper substrate are packaged together, heat is sometimes difficult to transfer to the external environment. As heat gradually accumulates within the chip, the ambient temperature around the chip gradually rises, severely affecting the chip's normal operation.

[0003] Existing chip packaging methods can be found in the L1 to L6 chip packaging methods used in (Chinese Invention Patent; Publication No.: CN118763009A; Subject Title: A Packaging Method and Packaging Structure for Automotive-Grade Chips; Publication Date: 2024.10.11). The L1 layer corresponds to the first wiring layer in this application, the L2 layer corresponds to the second wiring layer, the L3 layer corresponds to the third wiring layer, the L4 layer corresponds to the fourth wiring layer, the L5 layer corresponds to the fifth wiring layer, and the L6 layer corresponds to the sixth wiring layer.

[0004] Existing chip packaging methods can be found in the L1 to L6 chip packaging method used in (Chinese Invention Patent; Publication No.: CN115841959A; Subject Title: A Packaging Structure and Method for a High-Power Chip; Publication Date: 2023.03.24). Wherein, L1 corresponds to the first wiring layer in this application, L2 corresponds to the second wiring layer in this application, L3 corresponds to the third wiring layer in this application, L4 corresponds to the fourth wiring layer in this application, L5 corresponds to the fifth wiring layer in this application, and L6 corresponds to the sixth wiring layer in this application. Summary of the Invention

[0005] The purpose of this invention is to provide a packaging method for automotive-grade chips to solve the technical problem in the prior art where heat gradually accumulates on the chip itself and is difficult to transfer to the external space.

[0006] To achieve the above objectives, the technical solution adopted by the present invention is: to provide a packaging method for automotive-grade chips, comprising:

[0007] S1: Prepare a core board and a power module, and fabricate a third wiring layer and a fourth wiring layer on the core board; process a first through slot on the first semi-finished board and install the power module into the first through slot; the power module includes: a chip and a heat dissipation copper base, and the chip is disposed on the heat dissipation copper base;

[0008] S2: Fabricate the second wiring layer and the fifth wiring layer;

[0009] S3: Prepare copper blocks; process a second through groove on the second semi-finished plate outside the first through groove and install the copper blocks into the second through groove;

[0010] S4: Prepare a first wiring layer and a sixth wiring layer; wherein the first wiring layer is thermally connected to the power module and the copper block respectively, and / or the sixth wiring layer is thermally connected to the power module and the copper block respectively.

[0011] Further, step S1 includes:

[0012] S11: The upper surface of the core board is surface treated to form a third wiring layer, the lower surface of the core board is surface treated to form a fourth wiring layer, and the surface-treated core board is processed to form the first through groove and subjected to browning treatment.

[0013] S12: Apply the first tape to the surface of the fourth wiring layer and mount the power module into the first through slot.

[0014] Further, step S2 includes:

[0015] S21: Plasma treatment is performed on the third wiring layer and the fourth wiring layer, and multiple layers of semi-cured resin sheets and a layer of copper foil are sequentially stacked on the surface of the third wiring layer and pressed together to form a second wiring layer. The resin is heated and melted and fills the gap between the power module and the inner wall of the first through slot before curing.

[0016] S22: Remove the first tape from the surface of the fourth wiring layer and perform supplementary browning treatment on the surface of the heat dissipation copper base near the fourth wiring layer;

[0017] S23: Multiple layers of semi-cured resin sheets and a layer of copper foil are sequentially stacked on the surface of the fourth wiring layer and pressed together to form the fifth wiring layer.

[0018] Further, step S3, "processing a second through groove on the second semi-finished plate outside the first through groove and installing the copper block into the second through groove," includes:

[0019] S31: A second semi-finished plate penetrating the outside of the first through slot forms the second through slot, and the copper block is installed into the second through slot.

[0020] Further, step S31 includes:

[0021] S311: Perform pattern transfer on the second semi-finished board; etch away the copper foil directly above the position of the first copper pillar for subsequent installation of L2-chip, L2-L3 and L5-L4 to form a first etched window; etch away the copper foil directly above the position of the copper block to form a second etched window, wherein the second etched window is larger than the copper block on one side.

[0022] S312: The second semi-finished plate is machined with a second through slot using an automatic optical alignment milling machine. The second through slot is larger than the copper block on one side.

[0023] S313: A high-temperature second adhesive tape is applied to the surface of the fifth wiring layer;

[0024] S314: Place the copper block into the second through slot;

[0025] S315: Create a selective via-plugging film, with a light-shielding area within 100μm of the outer edge of the copper block on the film, and the rest of the board area set as a light-transmitting area;

[0026] S316: Use the film prepared in step S315 to make a selective plugging screen plate, wherein the area within 100μm from the outer edge of the copper block on the screen plate is the oil-feeding area, and the remaining area is set as the oil-blocking area;

[0027] S317: Selective vacuum sealing resin is applied to the second semi-finished board. The gap between the copper block and the second through groove on the second semi-finished board is filled with sealing resin, and then baked at 180°C for 1 hour to allow the resin to cure completely.

[0028] S318: Remove the high-temperature second adhesive tape from the surface of the fifth wiring layer, and smooth out the excess resin protrusions on the surface of the second wiring layer and / or the fifth wiring layer by using a resin removal grinding plate.

[0029] Furthermore, the first etched window is circular; the second etched window is L-shaped or T-shaped.

[0030] Furthermore, there are three copper blocks and three second through slots; the three copper blocks and the three second through slots correspond one-to-one; two of the copper blocks are L-shaped and one of the copper blocks is T-shaped.

[0031] Furthermore, the number of power modules is 12, and the number of first through slots is 12; the 12 power modules and the 12 first through slots correspond one-to-one.

[0032] Furthermore, the second etched window is 150 μm larger than the copper block on one side.

[0033] Furthermore, the second through slot is 60 μm larger on one side than the copper block on one side.

[0034] Further, step S4 includes:

[0035] S41: A first blind via is processed between the second and third wiring layers and between the fifth and fourth wiring layers inside the first etched window, and the first copper pillar that is thermally connected to the power module is filled in the first blind via.

[0036] S42: The sidewalls of the second wiring layer, the fifth wiring layer, and the second semi-finished board after surface treatment are browned.

[0037] S43: Only retain the browning film on the sidewalls of the second semi-finished board;

[0038] S44: Fill the surface line spacing of the fifth wiring layer with resin;

[0039] S45: The second semi-finished board is baked in two stages.

[0040] Furthermore, the diameter of the first copper pillar is 230 μm.

[0041] Further, step S41 includes:

[0042] S411: The second semi-finished board is laser-drilled, and the first blind hole is processed on the copper surface and chip position of the embedded power module using a laser drilling machine;

[0043] S412: The second semi-finished board passes through the degumming line to remove drilling debris from the first blind hole and roughen the exposed plugging resin surface;

[0044] S413: Electroplating is performed on the second semi-finished board to fill the first blind hole, forming the first copper pillar, and the L2 / 5 layer of copper foil is connected to the copper block.

[0045] Furthermore, the diameter of the first blind hole is 230 μm.

[0046] Furthermore, the first blind hole is formed by stacking multiple sub-blind holes with a diameter of 60μm.

[0047] Furthermore, the sub-blind holes within the same circle overlap by 40%, and the sub-blind holes in adjacent circles overlap by 25%.

[0048] Further, step S4, which involves fabricating the first wiring layer and the sixth wiring layer, includes:

[0049] S46, Plasma treatment is performed on the second wiring layer and the fifth wiring layer. Multiple layers of semi-cured resin sheets and a layer of copper foil are stacked on the surface of the second wiring layer and pressed together to form the first wiring layer. A single-sided copper-clad high thermal conductivity insulating film is arranged on the surface of the fifth wiring layer and pressed together to form the sixth wiring layer.

[0050] S47, a second blind hole is processed between the first wiring layer and the second wiring layer, and the second blind hole is filled by electroplating to form the second copper pillar. The first wiring layer and the sixth wiring layer are surface treated to form a third semi-finished board. The third semi-finished board is then processed to form the finished product.

[0051] Furthermore, the diameter of the first copper pillar and / or the second copper pillar is 230 μm; the center-to-center distance between adjacent first copper pillars or adjacent second copper pillars is 350 μm.

[0052] Furthermore, the thickness-to-diameter ratio of the first blind hole and / or the second blind hole is less than 1.

[0053] Furthermore, it also includes: a heat sink; the heat sink is thermally connected to the sixth wiring layer.

[0054] Furthermore, the heat-dissipating copper base has a cavity, and the chip is fixed to the inner wall of the cavity by a first sintered silver layer; a first heat dissipation path and / or a second heat dissipation path are provided between the chip and the heat sink;

[0055] The components that conduct heat in sequence on the first heat dissipation path are: chip, first sintered silver layer, heat dissipation copper base, first copper pillar on L4 / 5, L5 copper layer, L5 / 6 layer of high thermal conductivity material, L6 copper layer, second sintered silver layer, and heat sink;

[0056] The components that conduct heat in sequence on the second heat dissipation path are: chip, first sintered silver layer, heat dissipation copper base, first copper pillar on L2 / 3, L2 copper layer, copper block, L5 copper layer, L5 / 6 layer of high thermal conductivity material, L6 copper layer, second sintered silver layer, and heat sink.

[0057] Furthermore,

[0058] The thickness of layers L1-2, L2-3, L4 / 5, and L5-6 is 200 μm.

[0059] Furthermore, the distance between adjacent power modules in the X and Y directions is 2mm; and / or the distance between the power module and the copper block in the X and Y directions is 2mm.

[0060] Further, the resin in step S317 is a high heat-resistant pore-sealing resin with a Tg value of 170°C.

[0061] Furthermore, the copper block is embedded using a vacuum-sealed process with the pore-filling resin.

[0062] The present invention also provides a packaging structure for an automotive-grade chip, comprising: a core board, a power module, a copper block, a first wiring layer, a second wiring layer, a third wiring layer, a fourth wiring layer, a fifth wiring layer, and a sixth wiring layer;

[0063] The first wiring layer, the second wiring layer, the third wiring layer, the fourth wiring layer, the fifth wiring layer, and the sixth wiring layer are respectively disposed on the core board; the first semi-finished board has a first through slot, and the power module is installed in the first through slot; the power module includes: a chip and a heat-dissipating copper base, and the chip is disposed on the heat-dissipating copper base; the second semi-finished board has a second through slot, and the copper block is installed in the second through slot; the power module and the copper block are thermally connected, and / or the sixth wiring layer is thermally connected to the power module and the copper block respectively.

[0064] The beneficial effects of the automotive-grade chip packaging method provided by this invention are as follows: Compared with the prior art, the automotive-grade chip packaging method provided by this invention prepares a third wiring layer and a fourth wiring layer on a core board; a first through slot is opened on a first semi-finished product board, and the power module can be installed and positioned after being installed in the first through slot; a second wiring layer and a fifth wiring layer are prepared, and a second through slot is processed on the second semi-finished product board, and the copper block can be installed and positioned after being installed in the second through slot; a first wiring layer and a sixth wiring layer are prepared, the first wiring layer is thermally connected to the power module and the copper block respectively, and / or the sixth wiring layer is thermally connected to the power module and the copper block respectively, so that heat can be transferred between the power module and the copper block, which facilitates heat dissipation; the power module and the copper block can transfer heat to the outside through the first wiring layer and / or the sixth wiring layer, avoiding heat accumulation inside the chip. Attached Figure Description

[0065] Figure 1 A schematic diagram illustrating the fabrication of a third wiring layer and a fourth wiring layer on a core board provided in an embodiment of the present invention;

[0066] Figure 2 A schematic diagram showing the first through groove formed in the first semi-finished plate provided in an embodiment of the present invention;

[0067] Figure 3 A schematic diagram of attaching a first adhesive tape to a first semi-finished product plate according to an embodiment of the present invention;

[0068] Figure 4 This is a schematic diagram of installing the power module into the first through slot, provided as an embodiment of the present invention.

[0069] Figure 5This is a schematic diagram of the fabrication of the second wiring layer provided in an embodiment of the present invention;

[0070] Figure 6 This is a schematic diagram of tearing off the first adhesive tape according to an embodiment of the present invention;

[0071] Figure 7 This is a schematic diagram of the fabrication of the fifth wiring layer provided in an embodiment of the present invention;

[0072] Figure 8 This is a schematic diagram illustrating the removal of a portion of the copper foil according to an embodiment of the present invention;

[0073] Figure 9 This is a schematic diagram of applying the second adhesive tape according to an embodiment of the present invention;

[0074] Figure 10 This is a schematic diagram of filling the second through groove and tearing off the second adhesive tape according to an embodiment of the present invention;

[0075] Figure 11 A schematic diagram of opening a first blind hole provided for an embodiment of the present invention;

[0076] Figure 12 This is a schematic diagram of electroplating provided in an embodiment of the present invention;

[0077] Figure 13 A schematic diagram of the fabrication of the first wiring layer and the sixth wiring layer and the installation of a heat sink provided for an embodiment of the present invention (the arrows in the diagram indicate the direction of heat flow);

[0078] Figure 14 A schematic diagram illustrating the packaging process of an automotive-grade chip provided in an embodiment of the present invention;

[0079] Figure 15 A schematic diagram of the packaging structure of an automotive-grade chip provided in an embodiment of the present invention;

[0080] Figure 16 This is a schematic diagram of sub-blind holes stacked to form a first blind hole, provided in an embodiment of the present invention.

[0081] The following are the labeling elements in the figure:

[0082] 1-Core board; 11-First through slot; 12-Second through slot; 21-Power module; 21-Copper base for heat dissipation; 22-Chip; 31-First wiring layer; 31a-Copper foil of the first wiring layer; 31b-Dielectric layer of the first wiring layer; 32-Second wiring layer; 32a-Copper foil of the second wiring layer; 32b-Dielectric layer of the second wiring layer; 33-Third wiring layer; 34-Fourth wiring layer; 35-Fifth wiring layer; 35a-Copper foil of the fifth wiring layer; 35b-Dielectric layer of the fifth wiring layer; 36-Sixth wiring layer; 36a-Copper foil of the sixth wiring layer; 36b-Dielectric layer of the sixth wiring layer; 41-First blind via; 411-Sub-blind via; 42-Second blind via; 43-First copper pillar; 44-Second copper pillar; 45-Copper block; 51-First tape; 52-Second tape; 53-First sintered silver layer; 54-Second sintered silver layer; 55-Heat sink. Detailed Implementation

[0083] It should be noted that the specific embodiments are only used to explain the present invention and are not intended to limit the present invention.

[0084] It should be noted that, in the description of the embodiments of this application, unless otherwise stated, " / " means "or". For example, A / B can mean A or B. The "and / or" in this document is merely a description of the relationship between related objects, indicating that three relationships can exist. For example, A and / or B can represent: A existing alone, A and B existing simultaneously, and B existing alone. Here, A and B can be singular or plural, respectively.

[0085] It should be noted that when a component is referred to as "fixed to" or "set on" another component, it can be directly on or indirectly on that other component. When a component is referred to as "connected to" or "attached to" another component, it can be directly connected to or indirectly connected to that other component. When a component is referred to as "fixed to" or "set on" another component, it can be directly on or indirectly on that other component.

[0086] It should be noted that the terms "length", "width", "upper", "lower", "front", "rear", "left", "right", "vertical", "horizontal", "top", "bottom", "inner", and "outer" indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings. They are only for the convenience of describing the present invention and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation. Therefore, they should not be construed as limitations on the present invention.

[0087] It should be noted that the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of technical features indicated. Therefore, a feature defined with "first" or "second" may explicitly or implicitly include one or more of that feature.

[0088] It should be noted that the term "multiple" means two or more, unless otherwise explicitly specified.

[0089] Please refer to the following: Figures 1 to 16 The packaging method for automotive-grade chips provided by this invention will now be described. The packaging method for automotive-grade chips includes: S1: preparing a core board 1 and a power module 2, and preparing a third wiring layer 33 and a fourth wiring layer 34 on the core board 1; processing a first through slot 11 on the first semi-finished board and installing the power module 2 into the first through slot 11; the power module 2 includes: a chip 22 and a heat-dissipating copper base 21, with the chip 22 disposed on the heat-dissipating copper base 21; S2: preparing a second wiring layer 32 and a fifth wiring layer 35; S3: preparing a copper block 45; processing a second through slot 12 on the second semi-finished board outside the first through slot 11 and installing the copper block 45 into the second through slot 12; S4: preparing a first wiring layer 31 and a sixth wiring layer 36; wherein the first wiring layer 31 is thermally connected to the power module 2 and the copper block 45 respectively, and / or the sixth wiring layer 36 is thermally connected to the power module 2 and the copper block 45 respectively.

[0090] Thus, a third wiring layer 33 and a fourth wiring layer 34 are fabricated on the core board 1; a first through slot 11 is formed on the first semi-finished board, and the power module 2 can be installed and positioned after being installed in the first through slot 11; a second wiring layer 32 and a fifth wiring layer 35 are fabricated, and a second through slot 12 is processed on the second semi-finished board, and the copper block 45 can be installed and positioned after being installed in the second through slot 12; a first wiring layer 31 and a sixth wiring layer 36 are fabricated, the first wiring layer 31 is thermally connected to the power module 2 and the copper block 45 respectively, and / or the sixth wiring layer 36 is thermally connected to the power module 2 and the copper block 45 respectively, so that heat can be transferred between the power module 2 and the copper block 45, which facilitates the dissipation of heat; the power module 2 and the copper block 45 can transfer heat to the outside through the first wiring layer 31 and / or the sixth wiring layer 36, avoiding the accumulation of heat inside the chip 22.

[0091] In one embodiment, the core board 1 is a substrate used as the "core" layer in the chip 22 packaging process. It is usually a double-sided copper-clad board that carries and interconnects the inner layer circuits, and provides a basis for the subsequent embedding of the power module 2 and the processing of heat dissipation channels.

[0092] In one embodiment, the first semi-finished board is a core board 1 after the third wiring layer 33 and the fourth wiring layer 34 have been fabricated. That is, the first semi-finished board includes: core board 1, third wiring layer 33 and fourth wiring layer 34.

[0093] In one embodiment, the second semi-finished board is: a core board 1 after the second wiring layer 32 and the fifth wiring layer 35 have been prepared. That is, the second semi-finished board includes: core board 1, third wiring layer 33 and fourth wiring layer 34, second wiring layer 32 and fifth wiring layer 35.

[0094] In one embodiment, the third semi-finished board is: a core board 1 after the first wiring layer 31 and the sixth wiring layer 36 have been prepared. That is, the third semi-finished board includes: core board 1, first wiring layer 31, third wiring layer 33 and fourth wiring layer 34, second wiring layer 32 and fifth wiring layer 35 and sixth wiring layer 36.

[0095] In one embodiment, the first semi-finished board is: L3 / 4 semi-finished board.

[0096] In one embodiment, the second semi-finished board is: L2 / 5 semi-finished board.

[0097] In one embodiment, the third semi-finished board is: L1 / 6 semi-finished board.

[0098] In one embodiment, in this application, "Lx / y semi-finished board" (or Lx / y, Lx / y layer) means: core board 1 after the x layer and y layer have been prepared.

[0099] In one embodiment, the first through groove 11 is a hole.

[0100] In one embodiment, the second through groove 12 is a hole.

[0101] In one embodiment, the top of the heat-dissipating copper base 21 has a recess, and the chip 22 is disposed in the recess.

[0102] In one embodiment, the heat-dissipating copper base 21 is a copper component.

[0103] In one embodiment, the first wiring layer 31, L1 copper foil 31a, L1 dielectric layer 31b, second wiring layer 32, L2 copper foil 32a, L2 dielectric layer 32b, third wiring layer 33, fourth wiring layer 34, fifth wiring layer 35, L5 copper foil 35a, L5 dielectric layer 35b, sixth wiring layer 36, L6 copper foil 36a, and L6 dielectric layer 36b can be found in: (Chinese Invention Patent; Publication No.: CN118763009A; Subject Title: A Packaging Method and Packaging Structure for Automotive-Grade Chips; Publication Date: 2024.10.11).

[0104] In one embodiment, chip 22 is either a MOSFET chip 22 or an IGBT chip 22. The full name of the MOSFET chip 22 is "Metal-Oxide-Semiconductor Field-Effect Transistor Chip 22"; the full name of the IGBT chip 22 is "Insulated Gate Bipolar Transistor Chip 22".

[0105] Further, please refer to Figures 1 to 16 As a specific embodiment of the packaging method for automotive-grade chips provided by the present invention, step S1 includes: S11: surface treating the upper surface of the core board 1 to form a third wiring layer 33, surface treating the lower surface of the core board 1 to form a fourth wiring layer 34, and processing the surface-treated core board 1 to form a first through groove 11 and performing a browning treatment; S12: attaching a first adhesive tape 51 to the surface of the fourth wiring layer 34 and mounting the power module 2 into the first through groove 11. Thus, after the browning treatment, attaching the high-temperature resistant first adhesive tape 51 to the surface of the fourth wiring layer 34 temporarily fixes the power module 2 into the first through groove 11. The high-temperature resistance of the first adhesive tape 51 ensures that the power module 2 will not undergo micro-displacement during subsequent high-temperature pressure transmission or composite adhesive film curing, maintaining a tight fit within the first through groove 11, thereby ensuring the initial adhesion and positioning between the power module 2 and the core board 1, providing a reliable prerequisite for subsequent multilayer stacking and thermal path construction.

[0106] In one embodiment, "browning treatment" in this application refers to a chemical roughening process performed on the copper surface during PCB manufacturing, also known as "browning" or "browning oxidation." Its main purpose is to significantly improve the mechanical interlocking force and chemical bonding strength between the subsequent adhesive film, semi-cured resin sheet, or dry film and the copper surface by generating a micron-sized brown oxide film or roughening layer on the copper surface, thereby ensuring that delamination or separation does not occur between layers during multilayer board lamination. In one embodiment, for example, in a specific oxidizing solution (common formulations include sodium hypochlorite / sulfite systems, sodium nitrite + hydrochloric acid systems, or iminophosphates, etc.), a trace oxidation reaction occurs on the copper surface, generating a layer of brownish copper oxide (Cu2O / CuO) and / or copper hydroxy compounds. Simultaneously, a small amount of copper selectively dissolves, forming a rough honeycomb or needle-like microstructure.

[0107] Further, please refer to Figures 1 to 16As a specific embodiment of the packaging method for automotive-grade chips provided by the present invention, step S2 includes: S21: Plasma treatment of the third wiring layer 33 and the fourth wiring layer 34, and sequentially stacking multiple layers of semi-cured resin sheets and a layer of copper foil on the surface of the third wiring layer 33 and pressing them together to form the second wiring layer 32. The resin is heated and melted and fills the gap between the power module 2 and the inner wall of the first through groove 11 before curing; S22: Removing the first adhesive tape 51 from the surface of the fourth wiring layer 34, and performing supplementary browning treatment on the surface of the heat dissipation copper base 21 near the fourth wiring layer 34; S23: Sequentially stacking multiple layers of semi-cured resin sheets and a layer of copper foil on the surface of the fourth wiring layer 34 and pressing them together to form the fifth wiring layer 35.

[0108] Thus, plasma treatment is performed on the third wiring layer 33 and the fourth wiring layer 34 respectively. This treatment activates the surface into a roughened honeycomb structure before the semi-cured resin sheet and the core board 1 form the second wiring layer 32 and the fifth wiring layer 35, and generates hydrophilic hydroxyl and carboxyl groups on the surface, so that the subsequently stacked semi-cured resin sheet can obtain higher wettability and permeability at the interface. By stacking and pressing the semi-cured resin sheet and copper foil, multiple layers of semi-cured resin sheet and single layer of copper foil are constructed on the surface of the third wiring layer 33 to form the second wiring layer 32. This stacked structure builds a composite system of dielectric and thermally conductive layers with uniform thickness around the power module 2. The adhesive film is heated and melted during the heating and pressure transmission process and fills the gap between the power module 2 and the core board 1 before curing. This creates a void-free filling effect between the side wall of the power module 2 and the inner wall of the core board 1, thereby avoiding high-voltage breakdown caused by local thinness of the dielectric layer or the presence of air gaps. By removing the first adhesive tape 51 from the surface of the fourth wiring layer 34 and performing supplementary browning treatment on the surface of the heat-dissipating copper base 21 near the fourth wiring layer 34, the roughening and chemical bonding performance of the metal substrate surface is further improved. This significantly increases the bonding strength between the heat-dissipating copper base 21 and the semi-cured resin sheet during subsequent lamination, reducing the risk of interlayer debonding or interface failure caused by thermal cycling fatigue. Finally, multiple layers of semi-cured resin sheets and copper foil are sequentially stacked on the surface of the fourth wiring layer 34 and laminated to form the fifth wiring layer 35. This laminated structure, symmetrical to the second wiring layer 32, forms a dual-channel heat flow diffusion network between the third wiring layer 33 and the fourth wiring layer 34, and provides equal heat flow paths on the upper and lower sides of the power module 2, ensuring that heat can be rapidly and uniformly diffused in the multilayer composite structure, significantly reducing local temperature rise and temperature gradient.

[0109] Further, please refer to Figures 1 to 16As a specific embodiment of the packaging method for automotive-grade chips provided by the present invention, step S3, "processing a second through groove 12 on the second semi-finished board outside the first through groove 11 and installing the copper block 45 into the second through groove 12", includes: S31: forming a second through groove 12 through the second semi-finished board outside the first through groove 11, and installing the copper block 45 into the second through groove 12.

[0110] Thus, opening the second through slot 12 is very convenient; it only requires the second semi-finished plate to penetrate the outer side of the first through slot 11.

[0111] Further, please refer to Figures 1 to 16 As a specific embodiment of the packaging method for automotive-grade chips provided by the present invention, step S31 includes: S311: performing pattern transfer on the second semi-finished board; etching away the copper foil directly above the position of the first copper pillar 43 for subsequent mounting of L2-chip 22, L2-L3, and L5-L4 to form a first etched window; etching away the copper foil directly above the position of the copper block 45 to form a second etched window, wherein the second etched window is larger than one side of the copper block 45; S312: machining a second through slot 12 on the second semi-finished board using an automatic optical alignment milling machine, wherein the second through slot 12 is larger than one side of the copper block 45; S313: attaching a high-temperature second adhesive tape 52 to the surface of the fifth wiring layer 35; S314: placing the copper block 45 into the second through slot 12; S315: fabricating selective... S316: Using the film prepared in step S315, a selectively plugged screen is made. The area within 100μm of the outer edge of the copper block 45 on the screen is designated as a light-shielding area, and the remaining area of ​​the entire board is designated as a light-transmitting area. S317: Selective vacuum plugging resin is applied to the second semi-finished board. The gap between the copper block 45 and the second through groove 12 on the second semi-finished board is filled with plugging resin, and then baked at 180°C for 1 hour to completely cure the resin. S318: The high-temperature second adhesive tape 52 on the surface of the fifth wiring layer 35 is removed. The excess resin protrusions on the surface of the second wiring layer 32 and / or the fifth wiring layer 35 are smoothed by using a resin-removing grinding plate.

[0112] In one embodiment, "second wiring layer 32-third wiring layer 33" means: second wiring layer 32 to third wiring layer 33 (including second wiring layer 32 and third wiring layer 33).

[0113] Thus, by transferring the pattern of the second semi-finished board and etching away the copper foil directly above the L2-chip 22 position, the copper foil between the second wiring layer 32 and the third wiring layer 33, and the copper foil between the fifth wiring layer 35 and the fourth wiring layer 34 to form the first etched window, and etching away the copper foil directly above the copper block 45 position to form the second etched window, and the second etched window is larger than the copper block 45 on one side, it ensures that the copper block 45 can be smoothly inserted when the second through slot 12 is processed by the milling machine in the subsequent process, and provides sufficient gap for the resin to fill between the side wall of the window and the edge of the copper block 45. This not only avoids side wall scratches and local stress concentration caused by excessive tight fit, but also ensures that a multi-dimensional channel is formed between the first etched window and the second etched window, so as to promote the uniform escape of gas and volatiles between the interface during the subsequent resin filling and baking curing, and reduce the generation of voids and bubbles. In the vacuum resin plugging process, the plugging resin can achieve complete penetration and dense filling of the micron-level gap between the second semi-finished board and the copper block 45, which greatly improves the interface bonding strength and reduces the interface thermal resistance. Furthermore, the second through slot 12 is machined using an automated optical alignment milling machine. Through optical calibration with alignment accuracy down to the micrometer level, the dimensional tolerance that the single side of the through slot is larger than the single side of the copper block 45 is consistently maintained during mass production. This ensures that the gap between each copper block 45 and the second through slot 12 is uniform and controlled, providing a reliable guarantee for the subsequent insertion and positioning of the copper block 45 within the second through slot 12. This integrated milling and insertion process creates multi-point contact in terms of mechanical support, significantly enhancing the package's shear resistance and thermal shock resistance under high vibration and thermal cycling conditions. Additionally, applying a high-temperature second adhesive tape 52 to the surface of the fifth wiring layer 35 not only protects the surface of the fifth wiring layer 35 from contamination by debris, impurities, or oxides during milling and copper block insertion, but also allows for precise demarcation and convenient removal of resin protrusions by removing the high-temperature tape, simplifying subsequent resin removal and board surface preparation processes. In addition, the fabrication of selective via-filling film and selective via-filling mesh based on the film provides a micro-segmentation function for resin injection and oiling processes: on the film, the area within 100μm from the outer edge of the copper block 45 is set as a light-shielding area, and the remaining area is a light-transmitting area, so that the resin is only applied to the target area and effectively blocks the resin flow in non-target areas; then, the area within 100μm from the outer edge of the copper block 45 is set as the oiling area and the remaining area is set as the oil-blocking area through the mesh, further controlling the coating shape and thickness of the via-filling resin, ensuring that the resin is injected only into the gap between the second through groove 12 and the copper block 45 in a vacuum environment through selective oiling, without unnecessary resin accumulation or overflow in the side areas, which greatly improves the accuracy of interface filling and resin utilization.Furthermore, vacuum suction ensures full penetration of the plugging resin, followed by baking at 180°C for 1 hour to complete curing. This not only eliminates residual gases and volatile components in the resin, preventing subsequent volume shrinkage and cracking, but also forms a highly cross-linked resin network structure after high-temperature curing. This network achieves both chemical and mechanical bonding with the edges of the copper block 45 and the sidewalls of the second semi-finished board, ensuring long-term reliability and thermal fatigue resistance of the encapsulation structure. Additionally, removing the high-temperature adhesive tape from the surface of the fifth wiring layer 35 and smoothing out excess resin protrusions on the surfaces of the second wiring layer 32 and / or the fifth wiring layer 35 through resin removal and grinding ensures the smoothness of the encapsulation surface and facilitates subsequent processes.

[0114] In one embodiment, regarding "pattern transfer" in this application: "Pattern transfer" is a collective term for a series of photolithography processes in printed circuit board (PCB) manufacturing that accurately transfer a designed circuit pattern from film (or digital mask) to the surface of a copper clad laminate (CCL) or a prepreg resin layer. Its core purpose is to form a photolithographic resist pattern on the substrate that is completely consistent with the circuit design, so that the required conductive lines can be accurately etched or electroplated subsequently.

[0115] Further, please refer to Figures 1 to 16 In one specific embodiment of the automotive-grade chip packaging method provided by this invention, the first etched window is circular; the second etched window is L-shaped or T-shaped. This facilitates space utilization and also facilitates heat distribution and transfer.

[0116] Further, please refer to Figures 1 to 16 In one specific embodiment of the automotive-grade chip packaging method provided by the present invention, there are three copper blocks 45 and three second through slots 12; the three copper blocks 45 and the three second through slots 12 correspond one-to-one; two copper blocks 45 are L-shaped and one copper block 45 is T-shaped. In this way, the multiple through holes and multiple second through slots 12 cooperate with each other to disperse stress and heat.

[0117] Further, please refer to Figures 1 to 16 In one specific embodiment of the automotive-grade chip packaging method provided by the present invention, the number of power modules 2 is 12, and the number of first through slots 11 is 12; the 12 power modules 2 and the 12 first through slots 11 correspond one-to-one. In this way, the integrated arrangement of multiple power modules 2 can improve space utilization.

[0118] Further, please refer to Figures 1 to 16In one specific embodiment of the automotive-grade chip packaging method provided by the present invention, the second etched window is 150 μm larger than the copper block 45 on one side. Thus, the 150 μm gap allows for the formation of a uniform resin or adhesive film filling layer between the sidewall of the copper block 45 and the wall of the second etched window.

[0119] Further, please refer to Figures 1 to 16 In one specific embodiment of the automotive-grade chip packaging method provided by the present invention, the second through slot 12 is 60 μm larger on one side than the copper block 45 on one side. This 60 μm fit gap, through precise calculation, not only ensures ease of operation when inserting the copper block 45 and avoids jamming caused by the adhesive film, browning film, or trace impurities, but also maintains sufficient resin space in the side seam after the copper block 45 is placed. This allows the adhesive film or epoxy resin to be uniformly filled along the entire side wall gap during the browning treatment and resin filling process in step S4, and cured through a hot-pressing process to form a continuous dielectric isolation layer.

[0120] Further, please refer to Figures 1 to 16 As a specific embodiment of the packaging method for automotive-grade chips provided by the present invention, step S4 includes: S41: processing a first blind hole 41 between the second wiring layer 32 to the third wiring layer 33 and between the fifth wiring layer 35 to the fourth wiring layer 34 on the inner side of the first etched window, and filling the first blind hole 41 with a first copper pillar 43 that is thermally connected to the power module 2; S42: performing a browning treatment on the sidewalls of the surface-treated second wiring layer 32, the fifth wiring layer 35, and the second semi-finished board; S43: retaining only the browning film on the sidewalls of the second semi-finished board; S44: filling the surface line spacing of the fifth wiring layer 35 with resin; S45: performing two-stage baking on the second semi-finished board.

[0121] Thus, by processing first blind vias 41 between the second wiring layer 32 and the third wiring layer 33 and between the fifth wiring layer 35 and the fourth wiring layer 34, and filling them with first copper pillars 43, a direct heat-conducting column path is formed from the heat dissipation copper base 21 of the power module 2 upward to L1 / second wiring layer 32 and downward to L5 / sixth wiring layer 36. After browning the second wiring layer 32, the fifth wiring layer 35 and the sidewall of the second semi-finished board, only the browning film on the sidewall of the second semi-finished board is retained while the browning film in other areas is removed. By generating a high-roughness organic complex protective film on the sidewall, the wettability and mechanical interlocking force between the sidewall and the adhesive film or epoxy resin are significantly improved. The heat conduction of the first copper pillar 43, the browning of the sidewall to enhance bonding, the resin filling and the two-stage baking form a tight and efficient thermal-mechanical-electric composite conduction and bonding network, realizing the high thermal conductivity of the packaging structure.

[0122] Further, please refer to Figures 1 to 16In one specific embodiment of the automotive-grade chip packaging method provided by the present invention, the diameter of the first copper pillar 43 is 230 μm. Thus, the 230 μm diameter ensures a sufficiently large thermal conductivity cross-sectional area for the copper pillar while also considering material cost and processing difficulty.

[0123] Further, please refer to Figures 1 to 16 As a specific embodiment of the automotive-grade chip packaging method provided by the present invention, step S41 includes: S411: Laser drilling is performed on the second semi-finished board, and a first blind hole 41 is processed on the copper surface of the embedded power module 2 and the position of the chip 22 using a laser drilling machine; S412: The second semi-finished board passes through a descaling line to remove drilling debris from the first blind hole 41 and roughen the exposed resin surface of the plugging hole; S413: Electroplating is performed on the second semi-finished board to fill the first blind hole 41, forming a first copper pillar 43, and connecting the L2 / 5 layer copper foil to the copper block 45. In this way, the first blind hole 41 is precisely processed on the copper surface of the embedded power module 2 and the position of the chip 22 on the second semi-finished board using a laser drilling machine. This laser drilling, through the rapid and localized action of a high-energy laser beam on the copper base and resin composite layer, not only ensures the alignment accuracy between the power module 2 and the copper block 45, but also avoids the risks of hole wall cracks and interlayer peeling caused by traditional mechanical drilling. In addition, the drilling debris inside the first blind hole 41 is cleaned using a descaling line process, and the exposed resin plugging surface is roughened. The descaling line efficiently removes organic residues and trace metal spatter generated during laser drilling, while the roughening step forms a micron-scale honeycomb-like uneven microstructure on the resin hole wall. This microstructure significantly improves the wettability and mechanical interlocking of the hole wall with subsequent filling materials, greatly enhancing the interfacial bonding strength between the blind hole sidewall and the first copper pillar 43, effectively suppressing the propagation of microcracks and peeling failure of the hole wall and filler under thermal cycling and vibration loads. Furthermore, the roughened first blind hole 41 is filled and the first copper pillar 43 is formed by electroplating the second semi-finished board. Simultaneously, the L2 / 5 layer copper foil and the copper block 45 are interconnected using the principle of electrochemical deposition.

[0124] Further, please refer to Figures 1 to 16 In one specific embodiment of the automotive-grade chip packaging method provided by the present invention, the diameter of the first blind via 41 is 230 μm. Thus, 230 μm balances positioning accuracy and processing efficiency. Furthermore, this aperture size provides an optimal deposition environment for the formation of the first copper pillar 43 during the electroplating filling stage.

[0125] Further, please refer to Figures 1 to 16As a specific embodiment of the automotive-grade chip packaging method provided by the present invention, the first blind via 41 is formed by stacking multiple sub-blind vias 411 with a diameter of 60μm. Thus, distributing the sub-blind vias 411 with a diameter of 60μm in a certain stacking manner on the copper surface of the power module 2 and the chip 22 effectively reduces the laser drilling energy requirement and the heat-affected zone range of a single hole; by processing multiple sub-blind vias 411 to form a first blind via 41 with a larger diameter, higher processing precision is achieved.

[0126] Further, please refer to Figures 1 to 16 In one specific embodiment of the automotive-grade chip packaging method provided by the present invention, the sub-blind holes 411 within the same circle are stacked by 40% with each other, and the blind holes 411 in adjacent circles are stacked by 25% with each other. This improves the processing efficiency of the first blind hole 41.

[0127] In one embodiment, μm stands for micrometer.

[0128] Further, please refer to Figures 1 to 16 As a specific embodiment of the packaging method for automotive-grade chips provided by the present invention, step S4, which prepares the first wiring layer 31 and the sixth wiring layer 36, includes: S46, performing plasma treatment on the second wiring layer 32 and the fifth wiring layer 35, stacking multiple layers of semi-cured resin sheets and a layer of copper foil on the surface of the second wiring layer 32, and pressing them together to form the first wiring layer 31; arranging a single-sided copper-clad high thermal conductivity insulating film on the surface of the fifth wiring layer 35, and pressing it together to form the sixth wiring layer 36; S47, processing a second blind hole 42 between the first wiring layer 31 and the second wiring layer 32, electroplating to fill the second blind hole 42 to form a second copper pillar 44, performing surface treatment on the first wiring layer 31 and the sixth wiring layer 36 to form a third semi-finished board; and processing on the basis of the third semi-finished board to form the finished product.

[0129] Thus, plasma treatment of the second wiring layer 32 and the fifth wiring layer 35 generates a highly roughened honeycomb structure on the surface of the dielectric resin or copper foil of these two layers, which is rich in hydrophilic functional groups, effectively improving the bonding strength between the subsequent semi-cured resin sheet and the base layer. Multiple layers of semi-cured resin sheets and a layer of copper foil are sequentially stacked on the surface of the plasma-treated second wiring layer 32 and pressed together to form the first wiring layer 31. The L1 dielectric layer and the L2 copper foil are tightly bonded together, ensuring a reliable electrical connection between the first wiring layer 31 and the lower circuit. A single-sided copper-clad high thermal conductivity insulating film is arranged on the surface of the fifth wiring layer 35 and pressed together to form the sixth wiring layer 36. The L6 dielectric layer 36B and the L6 copper foil 36A form a top metal surface layer with excellent thermal conductivity. A second blind via 42 is processed between the first wiring layer 31 and the second wiring layer 32 and electroplated to fill it to form a second copper pillar 44. At the same time, the surfaces of the first wiring layer 31 and the sixth wiring layer 36 are surface treated to form the third semi-finished board.

[0130] In one embodiment, the single-sided copper-clad high thermal conductivity insulating film can be found in: (Chinese Invention Patent; Publication No.: CN118763009A; Subject: A Packaging Method and Packaging Structure for Automotive-Grade Chips; Publication Date: 2024.10.11).

[0131] Further, please refer to Figures 1 to 16 In one specific embodiment of the automotive-grade chip packaging method provided by the present invention, the diameter of the first copper pillar 43 and / or the second copper pillar 44 is 230 μm; the center-to-center distance between adjacent first copper pillars 43 or adjacent second copper pillars 44 is 350 μm. Thus, 230 μm balances positioning accuracy and processing efficiency. Furthermore, this aperture size provides an optimal deposition environment for the formation of the first copper pillar 43 during the electroplating filling stage.

[0132] Further, please refer to Figures 1 to 16 In one specific embodiment of the automotive-grade chip packaging method provided by the present invention, the aspect ratio of the first blind via 41 and / or the second blind via 42 is less than 1. Thus, an aspect ratio <1 means that the diameter of the first blind via 41 and / or the second blind via 42 is greater than the thickness of the board layer, which is beneficial to the gravity and flow of the liquid phase fluid (such as copper plating solution, via-filling resin) inside the hole during subsequent electroplating or resin filling processes, reducing air entrapment areas.

[0133] Further, please refer to Figures 1 to 16 As a specific embodiment of the automotive-grade chip packaging method provided by the present invention, it further includes: a heat sink 55; the heat sink 55 is thermally connected to the sixth wiring layer 36. Thus, heat on the sixth wiring layer 36 can be dissipated through the heat sink 55.

[0134] Further, please refer to Figures 1 to 16As a specific embodiment of the packaging method for automotive-grade chips provided by the present invention, the heat-dissipating copper base 21 has a cavity, and the chip 22 is fixed on the inner wall of the cavity by a first sintered silver layer 53; there is a first heat dissipation path and / or a second heat dissipation path between the chip 22 and the heat sink 55; the heat-conducting components in the first heat dissipation path are: chip 22, first sintered silver layer 53, heat-dissipating copper base 21, first copper pillar 43 on L4 / 5, L5 copper layer, L5 / 6 layer of high thermal conductivity material, L6 copper layer, second sintered silver layer 54, and heat sink 55; the heat-conducting components in the second heat dissipation path are: chip 22, first sintered silver layer 53, heat-dissipating copper base 21, first copper pillar 43 on L2 / 3, L2 copper layer, copper block 45, L5 copper layer, L5 / 6 layer of high thermal conductivity material, L6 copper layer, second sintered silver layer 54, and heat sink 55.

[0135] In this way, the chip 22 can be easily dissipated to the outside through the first heat dissipation path and / or the second heat dissipation path.

[0136] In one embodiment, the high thermal conductivity materials of the L5 / 6 layers are: L5 dielectric layer 35b and L6 dielectric layer 36b.

[0137] Further, please refer to Figures 1 to 16 In one specific embodiment of the automotive-grade chip packaging method provided by this invention, the dielectric thickness of layers L1-2, L2-3, L4 / 5, and L5-6 is 200μm. Thus, in automotive-grade application platforms of 800V and above, insufficient dielectric thickness between multilayer boards can easily lead to creepage or breakdown under high field strength. A dielectric thickness of 200μm provides sufficient insulation distance and electrical strength margin, making it less prone to dielectric breakdown or surface creepage failure under high-voltage conditions.

[0138] Further, please refer to Figures 1 to 16 In one specific embodiment of the automotive-grade chip packaging method provided by the present invention, the distance between adjacent power modules 2 in the X and Y directions is 2mm; and / or the distance between power module 2 and copper block 45 in the X and Y directions is 2mm. Thus, the 2mm safety distance ensures compliance with surface creepage distance regulations under operating voltage, preventing short circuits or flashover failures caused by static electricity or overvoltage between power modules 2 or between power modules 2 and copper block 45; the compact arrangement ensures uniform thermal path distance between power modules 2 and the added-layer copper block 45.

[0139] Further, please refer to Figures 1 to 16As a specific embodiment of the packaging method for automotive-grade chips provided by the present invention, the resin in step S317 is a high-heat-resistant plugging resin with a Tg value of 170°C. Thus, the high-Tg resin not only possesses excellent thermal stability but also maintains appropriate flow during short-term high-temperature and high-pressure pressing, allowing the resin's micro-flow to fill the narrowest through-slot gaps. Simultaneously, after curing, it possesses a sufficient balance between dielectric strength and thermal conductivity.

[0140] Further, please refer to Figures 1 to 16 As a specific embodiment of the automotive-grade chip packaging method provided by the present invention, a vacuum-sealed via-filling resin process is used to embed the copper block 45. In this way, the via-filling resin is driven by the pressure difference to completely penetrate into the gap between the copper block 45 and the wall of the second through groove 12, eliminating air or other inert gases and avoiding the air bubble residue and resin voids commonly found in conventional pressure or gravity via-filling processes.

[0141] Please see Figures 1 to 16 The present invention also provides a packaging structure for an automotive-grade chip, comprising: a core board, a power module, a copper block, a first wiring layer, a second wiring layer, a third wiring layer, a fourth wiring layer, a fifth wiring layer, and a sixth wiring layer; the first wiring layer, the second wiring layer, the third wiring layer, the fourth wiring layer, the fifth wiring layer, and the sixth wiring layer are respectively disposed on the core board; a first semi-finished board has a first through slot, and the power module is installed in the first through slot; the power module includes: a chip and a heat-dissipating copper base, the chip being disposed on the heat-dissipating copper base; a second semi-finished board has a second through slot, and the copper block is installed in the second through slot; the power module and the copper block are thermally connected, and / or the sixth wiring layer is thermally connected to the power module and the copper block respectively.

[0142] Thus, a third wiring layer 33 and a fourth wiring layer 34 are fabricated on the core board 1; a first through slot 11 is formed on the first semi-finished board, and the power module 2 can be installed and positioned after being installed in the first through slot 11; a second wiring layer 32 and a fifth wiring layer 35 are fabricated, and a second through slot 12 is processed on the second semi-finished board, and the copper block 45 can be installed and positioned after being installed in the second through slot 12; a first wiring layer 31 and a sixth wiring layer 36 are fabricated, the first wiring layer 31 is thermally connected to the power module 2 and the copper block 45 respectively, and / or the sixth wiring layer 36 is thermally connected to the power module 2 and the copper block 45 respectively, so that heat can be transferred between the power module 2 and the copper block 45, which facilitates the dissipation of heat; the power module 2 and the copper block 45 can transfer heat to the outside through the first wiring layer 31 and / or the sixth wiring layer 36, avoiding the accumulation of heat inside the chip 22.

[0143] Example 1: The process flow of a packaging method for automotive-grade chips is as follows:

[0144] [Processing Step 1] Please refer to Figure 1The inner layer pattern is transferred from the L3 / 4 layer core board with a copper thickness of 1.292mm to form the L3 / 4 layer pattern.

[0145] Thus, a double-sided copper-clad laminate with a copper thickness of 1.292mm was selected as the substrate for the L3 / 4 layer core board. The copper foil on the upper and lower surfaces of the core board underwent rigorous cleaning and activation treatment to remove surface oxides and oil stains, ensuring consistent adhesion between the photoresist and the copper surface. Subsequently, dry film photoresist was uniformly coated on the clean and flat copper surface, and the mask carrying the circuit layout pattern was precisely aligned with the photosensitive adhesive layer using an exposure machine. L3 (upper surface) and L4 (lower surface) were then irradiated with ultraviolet light. After irradiation, alkaline developer was used to dissolve and remove the photoresist in the unexposed areas, exposing the copper foil area to be etched. Then, a chemical etching process was used to completely dissolve the exposed excess copper. Finally, the remaining photoresist was stripped with a solvent to obtain the L3 / 4 inner layer pattern consistent with the designed circuit.

[0146] [Processing Step 2] Please refer to Figure 2 The L3 / 4 layer core board uses an automatic optical alignment milling machine to process through slots. Each substrate has 12 through slots, and the slot size is 100μm larger on each side than that of the power module.

[0147] Thus, the first semi-finished board is loaded into a CNC milling machine with automatic optical alignment function. The L3 / L4 circuit pattern or special mark etched on the board surface is identified by machine vision, and the coordinates of the through slot processing are adaptively corrected. Then, 12 through slots are processed on the board using a milling cutter. The shape of the through slots matches the copper base groove of the power module, and the single-sided dimension is designed to be 100μm larger than the single-sided dimension of the power module to take into account both assembly allowance and tightness of fit.

[0148] [Processing Step 3] Please refer to [Step 3] Figure 3 L3 / 4 core board is browned, and L4 surface is covered with high-temperature tape.

[0149] Thus, the first semi-finished board undergoes a browning treatment (chemical oxidation). The principle is to generate a thin film of organic copper complex on the copper surface. This film is brown and possesses a high specific surface area and polar characteristics. The chemical oxidation reaction enhances the roughness and surface energy of the copper surface, significantly improving the adhesion between the subsequent resin or adhesive film and the copper interface. Next, high-temperature resistant tape is applied to the L4 side to fix the module position during subsequent power module mounting and high-temperature pressing, preventing module displacement or detachment. The nanoscale porous structure of the browning film not only promotes the penetration and mechanical locking of the encapsulation resin into the sidewalls but also ensures that only the sidewall browning layer remains after removing the top browning film, achieving a clean top surface of the circuit board through optimized grinding processes.

[0150] [Processing Step 4] Please refer to Figure 4The surface of the automotive-grade power module is browned, and then the power module is mounted into the through slot using a high-precision pick-and-place machine. The power module is fixed with tape, and 12 power modules are mounted on a single substrate.

[0151] In this way, the brown coating film improves the adhesion strength of the module sidewalls. Even during the subsequent high-temperature and high-pressure transmission process, the resin can penetrate deep into the micropores of the brown coating film to achieve excellent mechanical locking and prevent the module from falling off and the interface from delaminating. The temporary fixation of the tape ensures the stability of the module position during the mounting stage, effectively avoiding micro-movement caused by vibration or thermal stress, thereby improving the mounting yield. The introduction of high-precision mounting equipment replaces the traditional manual or semi-automatic process, significantly reducing positioning errors and ensuring the consistency and flatness of 12 modules on the same board, laying the foundation for subsequent high-reliability packaging and mass production.

[0152] [Processing Step 5] Please refer to [Step 5] Figure 5 Two 1086 prepreg sheets are placed on the L3 side, and then a copper foil is placed on top and laminated to form the L2 / 4 layer structure, which is the first pressure transfer (high temperature lamination). The resin in the prepreg melts when heated, flows in and fills the gap between the power module and the through slot of the L3 / 4 layer core board, and then the resin cures, firmly embedding the power module inside the PCB board.

[0153] In this way, the resin gradually solidifies after filling the gaps, forming a composite structure that is tightly bonded to the copper base sidewalls, the bottom of the slot, and the surrounding copper foil. This achieves mechanical and stable embedding of the power module inside the PCB, avoiding the warping and stress concentration problems of traditional surface mount technology. The molten resin layer acts as a dielectric insulator and heat conduction medium, connecting the module with the upper and lower copper layers through the heat diffusion path, effectively reducing the internal thermal resistance of the module, improving heat dissipation efficiency, and ensuring interlayer electrical isolation and flame retardant performance.

[0154] [Processing Step 6] Please refer to [Step 6] Figure 6 Remove the high-temperature tape from L4 side.

[0155] Thus, after high-temperature pressing is completed and properly heat-insulated and cured, the high-temperature tape used for L4 surface mounting is removed to restore the permeability of the through groove and the surface smoothness of subsequent lamination processes.

[0156]

Step 7

[0157] Thus, supplemental browning ensures a more consistent surface and stronger surface activation of the core board; during the subsequent hot pressing of the prepreg, the resin achieves deep penetration and mechanical "interlocking" through the microporous structure of the browning film, significantly improving the interfacial shear strength and preventing delamination or board bursting of the module under thermal cycling and high voltage electric field.

[0158]

Step 8

[0159] Thus, the surface of the core board, including the filled and cured resin ink and browning film, is bombarded with active ions from plasma. During the bombardment process, the resin surface is etched into a honeycomb-like micro-rough structure, and a large number of polar functional groups (mainly hydroxyl –OH and carboxyl –COOH) are introduced onto its surface, significantly increasing surface energy and hydrophilicity. In addition, after plasma treatment, the micropores and polar groups on the resin surface can better chemically crosslink and physically penetrate with the prepreg resin used in subsequent lamination, overcoming interfacial incompatibility between different resin systems and reducing the probability of interfacial voids and microcracks.

[0160] [Processing Step 9] Please refer to [Step 9] Figure 7 Two 1086 prepreg sheets are placed on the L4 side, and then a copper foil is placed on top and laminated to form the L2 / 5 layer structure.

[0161] In this way, the resin supply of the double-layer prepreg is tightly packed and bubble-free; the molten resin achieves "multi-scale" penetration and locking with the porous network structure of the previous browning film through the honeycomb-shaped coarse pores formed by plasma, further improving the interfacial bonding strength and long-term heat resistance; the embedding of copper foil not only provides continuous electrical interconnection and interlayer heat diffusion channels, but also forms a mechanical stress buffer layer in the overall structure, balancing the difference in thermal expansion coefficient and reducing thermal cycling fatigue.

[0162]

Step 10

[0163] Thus, a non-woven fabric brush roller is used to "grind" the L2 surface: by controlling the speed, pressure and movement speed of the brush roller, the flexible fiber structure and moderate abrasive force of the non-woven fabric itself are used to perform slight mechanical friction on the copper surface, effectively peeling off the brown film on the top surface, while retaining the brown film on the side wall to avoid affecting the bonding effect of the side wall resin.

[0164] [Step 11] Please refer to Figure 8 The pattern transfer is performed on the add-on board (second semi-finished board). The copper foil directly above the φ230μm copper pillars of L2-chip, L2-L3 and L5-L4 is etched away to form a φ230μm circular blind hole etching window. At the same time, the copper foil directly above the L / T-shaped heat dissipation copper block is etched away to form L-shaped and T-shaped etching windows. The L-shaped and T-shaped etching windows are 150μm larger on each side than the L-shaped and T-shaped copper blocks to prevent burrs from being generated when milling the copper foil of the second or fifth wiring layer during the optical milling process in step 12.

[0165] Thus, the 150μm safety margin design takes into account both manufacturing tolerances and machining alignment errors, avoiding structural damage during secondary processing; it also optimizes the material flow and adhesion conditions during subsequent resin and electroplating filling, ensuring the resin / copper bonding strength and unobstructed heat dissipation channels in blind holes and heat dissipation window areas, providing reliable assurance for reliable operation under high voltage (≥800V) and high temperature (≥150 degrees Celsius) conditions.

[0166]

Step 12

[0167]

Step 13

[0168] Thus, the tape helps to secure the heat dissipation copper block in the 14th processing step.

[0169] [Processing Step 14] Please refer to [link / reference] Figure 9 Place an L / T-shaped heat sink copper block into the through slot.

[0170] In this way, by using an L / T shape instead of the traditional large-area square, the heat sink embedding can be maximized within a limited PCB area, taking into account the optimal layout between the power module and the heat sink, and improving the overall module density and heat dissipation efficiency.

[0171]

Step 15

[0172] In this way, the light-shielding area corresponds to the copper block and its surroundings, which can prevent the resin from accidentally flowing into the heat dissipation channel when the vacuum plugging hole of the mesh board is completed, and ensure that the resin around the heat dissipation block and in the through groove is densely filled.

[0173]

Step 16

[0174] In this way, the same screen can achieve separate areas for ink application and ink blocking, eliminating the need for multiple screen changes and significantly improving screen production efficiency. When vacuum plugging or screen printing resin, this screen can precisely control the resin to flow out only in the ink application area to fill the holes, while completely blocking the resin in the ink blocking area. This precise area application reduces resin loss and contamination, and also prevents resin from overflowing or accumulating in areas where it is not needed.

[0175]

Step 17

[0176] Thus, by combining vacuum-assisted and capillary penetration mechanisms, the vacuum-plugged resin not only fills the tiny gaps between the copper block and the substrate, providing excellent mechanical support and shear strength, but also maintains long-term thermal cycling reliability through a high Tg value. In addition, the uniform resin filling forms a continuous dielectric layer, avoiding the risk of local stress concentration and electric field breakdown caused by poor filling, and ensuring the stable operation of the board under high voltage (≥800V) and high temperature environments.

[0177] [Processing Step 18] Please refer to [Step 18] Figure 10 Remove the high-temperature tape from the L5 side, and use the extension board (second semi-finished board) as a resin removal grinding board to smooth out the excess resin protrusions on the L2 and / or L5 sides.

[0178] Thus, the surface flatness after grinding is higher, providing an ideal reference surface for subsequent inner layer pattern transfer, blind hole drilling and lamination; on the other hand, removing the surface protruding resin avoids subsequent layer alignment misalignment and pressure unevenness problems, ensuring consistent pressure transmission and bonding effect of each layer in downstream processes, greatly improving the overall process yield of multilayer boards and the consistency of electrical and thermal performance of the final product.

[0179] [Processing Step 19] Please refer to [link / reference] Figure 11 and 16 Laser drilling was performed on the add-on board (second semi-finished board) to process φ230μm blind vias on the copper surface and chip locations of the embedded power module using a laser drilling machine. Because the φ230μm blind vias were too large to be directly machined, they were instead formed by stacking 23 smaller 60μm blind vias.

[0180] Thus, laser-formed stacked holes overcome the limitation of single-hole diameter caused by laser drilling, while avoiding the burrs and stress concentrations caused by mechanical drilling, ensuring high surface quality of the hole walls and a low heat-affected zone. The φ230μm blind hole provides sufficient conductive cross-sectional area to maintain low resistance and high reliability in high-current applications.

[0181]

Step 20

[0182] Thus, after the "resin removal line" treatment, the resin surface inside the blind hole changes from its original smooth and dense state to a porous and rough state, which significantly improves the wettability and mechanical adhesion of the electroplated copper layer.

[0183] [Processing Step 21] Please refer to [Step 21] Figure 12 Electroplating is performed on the extension board (second semi-finished board) to fill the φ230μm blind holes, forming φ230μm copper pillars, and connecting the L2 / 5 layer large copper sheet with the L / T shaped heat dissipation large copper block.

[0184] In this way, the main copper foil of the L2 / 5 layer has achieved direct electrical and thermal communication with the buried via copper pillars and the L / T-shaped heat dissipation copper block: on the one hand, the copper pillars penetrate the inner layers of L2-3 and L4-5, forming a short-path, highly conductive current channel; on the other hand, the L / T-shaped copper block is electroplated and welded to the main copper foil of L2 / 5 to form two fast heat dissipation paths, which lead the heat of the module to the large-area hot surface of the outer layer.

[0185]

Step 22

[0186]

Step 23

[0187] Thus, the browning film has a nanoscale porous honeycomb structure, high specific surface area and polar functional groups (such as –NH, –OH), which can significantly improve surface energy and wettability.

[0188]

Step 24

[0189] Thus, removing the top polar brown film restores the pure copper surface, improving the wetting and adhesion uniformity of subsequent photoresist and solder resist inks, and ensuring a clear and sharp edge boundary between the outer layer pattern and the solder resist pattern; retaining the sidewall brown film ensures that the through holes, blind holes and heat sink sidewalls continue to have high surface energy and mechanical interlocking, which is beneficial for subsequent resin penetration, filling and interlayer bonding of multilayer lamination.

[0190]

Step 25

[0191] In this way, ultraviolet exposure cures the photosensitive emulsion in the light-transmitting parts of the film, while the emulsion layer in the light-shielding parts does not cure and is removed by the developer, forming a selective plugging screen with distinct oil-sealing (opening) and oil-blocking (sealing) functions.

[0192]

Step 26

[0193] In this way, all line spacing and via gaps on the L5 surface are filled through capillary action and pressure. The entire process is automated and bubble-free, allowing the resin to deeply penetrate and bond tightly to the browned / plasma-activated sidewall surfaces.

[0194]

Processing Step 27

[0195]

Step 28

[0196] In one embodiment, the drilling debris and carbides are first thoroughly removed, and a preliminary rough texture is etched onto the resin surface. Subsequently, a low-pressure plasma treatment is performed, typically by exciting the plasma in an argon / oxygen mixed atmosphere. This causes active ions to bombard the resin ink surface, breaking down the surface polymer chains and forming a honeycomb-like microporous structure, while introducing a large number of hydrophilic functional groups (–OH, –COOH). This process, combining physical micro-roughening and chemical activation, significantly increases the specific surface area and surface energy of the resin pore walls. This allows the prepreg resin to penetrate and fill along the honeycomb pores and co-crosslink with the substrate sidewall resin during subsequent lamination under high temperature and pressure, thereby greatly improving interlayer adhesion strength and thermal cycling reliability.

[0197]

Step 29

[0198] In this way, the resin in the prepreg and the single-sided copper-clad high thermal conductivity insulating film melts and flows under hot pressing, filling and encapsulating the through-slots and the micro-gaps around the heat dissipation copper block, and then cures and forms the final shape. This process utilizes the high surface activity of the browning film to promote mechanical bonding between the resin and the sidewalls of the copper foil, while the high filler content of the single-sided copper-clad high thermal conductivity insulating film and the copper foil layer provide a stable dielectric connection while enhancing heat dissipation performance, ultimately forming an L1 / 6 end metal panel structure.

[0199]

Step 30

[0200]

Step 31

[0201] In this way, the φ230μm copper pillars not only provide high current carrying capacity and realize electrical interconnection within and across layers, but also form a stable mechanical and electrical bond with the sidewall resin and the copper foil of L2 / L3, L4 / fifth wiring layers, significantly improving the conductivity and thermal conductivity of the board.

[0202]

Step 32

[0203]

Step 33

[0204] In one embodiment, liquid solder resist ink is first uniformly coated onto the surface of the semi-finished board using a precision screen printing machine. The ink forms a thin film only in the areas between the pre-reserved lines and pads and the via cap areas. Subsequently, the board surface is UV-irradiated using a solder resist mask in a visible light exposure machine, causing the ink in the light-transmitting areas to cross-link and cure, while the light-shielding areas remain soluble. Next, the board is immersed in an alkaline developer to wash away the uncured ink, exposing the pads and via caps, while retaining the insulating protective film. Finally, the board is post-cured at 100°C–120°C (30–60 min).

[0205]

Step 34

[0206] Thus, the nickel layer acts as a copper-tin diffusion barrier and provides mechanical support; the palladium layer inhibits nickel oxidation, provides a protective gold layer for adhesion, and serves as a backup solderable surface; the outermost ultra-thin gold layer provides excellent solder wettability and long-term anti-oxidation capability, ensuring good reflow / wave solder joint formation and preventing solder sputtering.

[0207] [Processing Step 35] Please refer to [Step 35] Figure 13The product sprue forms a Set unit, which in turn forms the final product.

[0208] Thus, after all electroplating and surface treatment are completed, the outer semi-finished board needs to be "routed" and separated to form a unit that meets the requirements of the back-end assembly.

[0209] The above description is only a preferred embodiment of the present invention. It should be noted that for those skilled in the art, several improvements and substitutions can be made without departing from the technical principles of the present invention, and these improvements and substitutions should also be considered within the scope of protection of the present invention.

Claims

1. A packaging method for an automotive-grade chip, characterized in that, include: S1: Prepare the core board and power module, and prepare the third wiring layer and the fourth wiring layer on the core board to form the first semi-finished board; A first through slot is processed on the first semi-finished board and the power module is installed in the first through slot; the power module includes: a chip and a heat dissipation copper base, the chip being disposed on the heat dissipation copper base; S2: Prepare the second wiring layer and the fifth wiring layer to form the second semi-finished board; S3: Prepare copper blocks; process a second through groove on the second semi-finished plate outside the first through groove and install the copper blocks into the second through groove; S4: Prepare a first wiring layer and a sixth wiring layer; wherein the first wiring layer is thermally connected to the power module and the copper block respectively, and / or the sixth wiring layer is thermally connected to the power module and the copper block respectively.

2. The packaging method for automotive-grade chips as described in claim 1, characterized in that, Step S1 includes: S11: The upper surface of the core board is surface treated to form a third wiring layer, the lower surface of the core board is surface treated to form a fourth wiring layer, and the surface-treated core board is processed to form the first through groove and subjected to browning treatment. S12: Apply the first adhesive tape to the surface of the fourth wiring layer and mount the power module into the first through slot.

3. The packaging method for automotive-grade chips as described in claim 2, characterized in that, Step S2 includes: S21: Plasma treatment is performed on the third wiring layer and the fourth wiring layer, and multiple layers of semi-cured resin sheets and a layer of copper foil are sequentially stacked on the surface of the third wiring layer and pressed together to form the second wiring layer. The resin is heated and melted and fills the gap between the power module and the inner wall of the first through slot before curing. S22: Remove the first tape from the surface of the fourth wiring layer and perform supplementary browning treatment on the surface of the heat dissipation copper base near the fourth wiring layer; S23: Multiple layers of semi-cured resin sheets and a layer of copper foil are sequentially stacked on the surface of the fourth wiring layer and pressed together to form the fifth wiring layer.

4. The packaging method for automotive-grade chips as described in claim 1, characterized in that, Step S3, "processing a second through groove on the second semi-finished plate outside the first through groove and installing the copper block into the second through groove," includes: S31: The second semi-finished plate, which passes through the outside of the first through groove, forms the second through groove, and the copper block is installed into the second through groove.

5. The packaging method for automotive-grade chips as described in claim 4, characterized in that, Step S31 includes: S311: Perform pattern transfer on the second semi-finished board; etch away the copper foil above the position of the first copper pillar in the second wiring layer-chip, the second wiring layer-third wiring layer, and the fifth wiring layer-fourth wiring layer to form a first etched window; etch away the copper foil above the position of the copper block to form a second etched window, wherein the second etched window is larger than the copper block on one side. S312: The second semi-finished plate is machined using an automatic optical alignment milling machine to create the second through slot, which is larger than the copper block on one side. S313: A high-temperature second adhesive tape is applied to the surface of the fifth wiring layer; S314: Place the copper block into the second through slot; S315: Create a selective via-plugging film, with a light-shielding area within 100μm of the outer edge of the copper block on the film, and the rest of the board area set as a light-transmitting area; S316: Use the film prepared in step S315 to make a selective plugging screen plate, wherein the area within 100μm from the outer edge of the copper block on the screen plate is the oil-feeding area, and the remaining area is set as the oil-blocking area; S317: Selective vacuum sealing resin is applied to the second semi-finished board. The gap between the copper block and the second through groove on the second semi-finished board is filled with sealing resin, and then baked at 180°C for 1 hour to allow the resin to completely cure. S318: Remove the high-temperature second tape from the surface of the fifth wiring layer, and smooth out the excess resin protrusions on the surface of the second wiring layer and / or the fifth wiring layer by using a resin removal grinding plate.

6. The packaging method for automotive-grade chips as described in claim 5, characterized in that, The first etched window is circular; the second etched window is L-shaped or T-shaped.

7. The packaging method for automotive-grade chips as described in claim 6, characterized in that, There are three copper blocks and three second through slots; the three copper blocks and the three second through slots correspond one-to-one; two of the copper blocks are L-shaped and one of the copper blocks is T-shaped.

8. The packaging method for automotive-grade chips as described in claim 5, characterized in that, The number of power modules is 12, and the number of first through slots is 12; the 12 power modules and the 12 first through slots correspond one-to-one.

9. The packaging method for automotive-grade chips as described in claim 5, characterized in that, The second etched window is 150 μm larger than the copper block on one side.

10. The packaging method for automotive-grade chips as described in claim 5, characterized in that, The second through slot is 60 μm larger on one side than the copper block on one side.

11. The packaging method for automotive-grade chips as described in claim 1, characterized in that, Step S4 includes: S41: A first blind via is processed between the second and third wiring layers and between the fifth and fourth wiring layers inside the first etched window, and a first copper pillar that is thermally connected to the power module is filled in the first blind via. S42: The sidewalls of the second wiring layer, the fifth wiring layer, and the second semi-finished board after surface treatment are browned; S43: Only retain the browning film on the sidewall of the second semi-finished plate; S44: Fill the surface line spacing of the fifth wiring layer with resin; S45: The second semi-finished board is baked in two stages.

12. The packaging method for automotive-grade chips as described in claim 11, characterized in that, The diameter of the first copper pillar is 230 μm.

13. The packaging method for automotive-grade chips as described in claim 11, characterized in that, Step S41 includes: S411: The second semi-finished board is laser-drilled, and the first blind hole is processed on the copper surface of the embedded power module and the chip position using a laser drilling machine; S412: The second semi-finished board passes through the degumming line to remove drilling debris from the first blind hole and roughen the exposed plugging resin surface; S413: Electroplating is performed on the second semi-finished board to fill the first blind hole, forming the first copper pillar, and the copper sheet of the second semi-finished board is connected to the copper block.

14. The packaging method for automotive-grade chips as described in claim 13, characterized in that, The diameter of the first blind hole is 230 μm.

15. The packaging method for automotive-grade chips as described in claim 14, characterized in that, The first blind hole is formed by stacking multiple sub-blind holes with a diameter of 60μm.

16. The packaging method for automotive-grade chips as described in claim 15, characterized in that, Within the same circle, the sub-blind holes overlap by 40% with each other, and in adjacent circles, the sub-blind holes overlap by 25% with each other.

17. The packaging method for automotive-grade chips as described in claim 1, characterized in that, The preparation of the first wiring layer and the sixth wiring layer in step S4 includes: S46, Plasma treatment is performed on the second wiring layer and the fifth wiring layer. Multiple layers of semi-cured resin sheets and a layer of copper foil are stacked on the surface of the second wiring layer and pressed together to form the first wiring layer. A single-sided copper-clad high thermal conductivity insulating film is arranged on the surface of the fifth wiring layer and pressed together to form the sixth wiring layer. S47, a second blind hole is processed between the first wiring layer and the second wiring layer, and the second blind hole is filled by electroplating to form the second copper pillar. The first wiring layer and the sixth wiring layer are surface treated to form a third semi-finished board. The third semi-finished board is then processed to form the finished product.

18. The packaging method for automotive-grade chips as described in claim 17, characterized in that, The diameter of the first copper pillar and / or the second copper pillar is 230 μm; the center-to-center distance between adjacent first copper pillars is 350 μm, and / or the center-to-center distance between adjacent second copper pillars is 350 μm.

19. The packaging method for automotive-grade chips as described in claim 17, characterized in that, The thickness-to-diameter ratio of the first blind hole and / or the second blind hole is less than 1.

20. The packaging method for automotive-grade chips as described in claim 1, characterized in that, It also includes: a heat sink; the heat sink is thermally connected to the sixth wiring layer.

21. The packaging method for automotive-grade chips as described in claim 1, characterized in that, The heat-dissipating copper base has a cavity, and the chip is fixed on the inner wall of the cavity by a first sintered silver layer; there is a first heat dissipation path and / or a second heat dissipation path between the chip and the heat sink; The components that conduct heat sequentially in the first heat dissipation path are: chip, first sintered silver layer, heat dissipation copper base, first copper pillar on the fourth wiring layer and the fifth wiring layer, copper layer of the fifth wiring layer, high thermal conductivity material of the fifth wiring layer and the sixth wiring layer, copper layer of the sixth wiring layer, second sintered silver layer, and heat sink; The components that conduct heat in sequence on the second heat dissipation path are: chip, first sintered silver layer, heat dissipation copper base, first copper pillar on the second wiring layer and the third wiring layer, copper layer of the second wiring layer, copper block, copper layer of the fifth wiring layer, high thermal conductivity material of the fifth wiring layer and the sixth wiring layer, copper layer of the sixth wiring layer, second sintered silver layer, and heat sink.

22. The packaging method for automotive-grade chips as described in claim 1, characterized in that, The dielectric thickness of the first wiring layer-second wiring layer, the second wiring layer-third wiring layer, the fourth wiring layer-fifth wiring layer, and the fifth wiring layer-sixth wiring layer is 200 μm.

23. The packaging method for automotive-grade chips as described in claim 1, characterized in that, The distance between adjacent power modules in the X and Y directions is 2mm; and / or the distance between the power module and the copper block in the X and Y directions is 2mm.

24. The packaging method for automotive-grade chips as described in claim 5, characterized in that, The resin in step S317 is a high heat-resistant pore-sealing resin with a Tg value of 170°C.

25. The packaging method for automotive-grade chips as described in claim 24, characterized in that, The copper block was embedded using a vacuum-sealed resin-filling process.

26. The packaging structure of an automotive-grade chip, characterized in that, include: Core board, power module, copper block, first wiring layer, second wiring layer, third wiring layer, fourth wiring layer, fifth wiring layer and sixth wiring layer; The first wiring layer, the second wiring layer, the third wiring layer, the fourth wiring layer, the fifth wiring layer, and the sixth wiring layer are respectively disposed on the core board; the core board, the third wiring layer, and the fourth wiring layer form a first semi-finished board; the first semi-finished board has a first through slot, and the power module is installed in the first through slot; the power module includes: a chip and a heat-dissipating copper base, and the chip is disposed on the heat-dissipating copper base; the core board, the third wiring layer, the fourth wiring layer, the second wiring layer, and the fifth wiring layer form a second semi-finished board; the second semi-finished board has a second through slot, and the copper block is installed in the second through slot; the power module and the copper block are thermally connected, and / or the sixth wiring layer is thermally connected to the power module and the copper block respectively.

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