Integration of dry development and etch processes for EUV patterning in single processing chamber

Abstract

The process condition management facilitates the combination of dry development and etching in a single processing chamber; a baking step after dry development is not required during semiconductor manufacturing. A method and apparatus for rapidly drastically reducing processing chamber pressure allows hot dry development and O2 flash processing or hot dry development and plasma hard mask tapping operations to be performed without wafer transfer.

Description

By incorporating references

[0001] The PCT application forms are filed together with this specification as part of this application. Each application identified in the concurrently filed PCT application forms that claims a benefit or priority under this application is incorporated herein by reference in its entirety for all purposes. Background Technology

[0002] The fabrication of semiconductor devices (such as integrated circuits) is a multi-step process involving photolithography. Typically, this process involves depositing material on a wafer and patterning the material using photolithography to form structural features of the semiconductor device (such as transistors and circuits). Typical photolithography steps include: preparing a substrate; applying a photoresist, for example by spin coating; exposing the photoresist in the desired pattern, such that the exposed areas of the photoresist are more or less dissolved in a developer solution; developing the photoresist pattern by applying a developer solution to remove the exposed or unexposed areas of the photoresist; and subsequent processing to create features on the areas of the substrate where the photoresist has been removed, such as by etching or material deposition.

[0003] The development of semiconductor design has both created a demand for and been driven by the ability to create smaller features on semiconductor substrate materials. One challenge in fabricating devices with such small features is the reliable and repeatable creation of photomasks with sufficient resolution. Current photolithography processes typically use 193nm ultraviolet (UV) light to expose the photoresist. The fact that the wavelength of the light is significantly larger than the desired feature size to be produced on the semiconductor substrate presents inherent problems. Achieving feature sizes smaller than the light wavelength requires the use of sophisticated resolution enhancement techniques, such as multipatterning. Therefore, there is significant interest and research effort in developing photolithography techniques using shorter wavelengths of light (e.g., extreme ultraviolet radiation (EUV)) ranging from 10nm to 15nm (e.g., 13.5nm).

[0004] However, EUV lithography can present challenges, including low power output, light loss during patterning, and metal cross-contamination caused by outgassing. Therefore, improvements to EUV photoresist processes are still needed to more efficiently manufacture materials with the desired properties.

[0005] The background description provided herein is for the purpose of presenting the general context of this disclosure. The work of the currently designated inventors, within the scope described in this background section and in the various aspects of the specification that could not be identified as prior art at the time of filing, neither expressly nor impliedly acknowledges that it is prior art to this disclosure. Summary of the Invention

[0006] This disclosure relates to methods and apparatus for integrating dry development and post-dry development processes into a single processing chamber. This integration increases throughput and reduces wafer handling; it improves the efficiency of semiconductor manufacturing through higher wafer productivity and better lithography control. Post-dry development processes using plasma etching can be performed in the same processing chamber as dry development; post-dry development baking to control venting is eliminated. In some instances, O2 flash evaporation or pattern transfer can be used in conjunction with dry development in a single processing chamber.

[0007] Therefore, in a first aspect, the present invention covers an apparatus for integrating dry development and etching semiconductor processes into a single processing chamber. In some embodiments, the apparatus includes: one or more processing chambers; one or more pressure regulating devices; one or more pumps fluidly coupled to the pressure regulating devices; a plasma processing system; one or more gas inlets leading to the processing chambers and associated flow control hardware; and a controller having at least one processor and a memory, wherein the at least one processor and the memory are communicatively connected to each other, the at least one processor is at least operatively connected to the associated flow control hardware, and the memory stores computer-executable instructions for controlling the at least one processor to at least control the associated flow control hardware to: perform thermal dry development in the processing chamber at a first pressure; perform plasma dry development and etching in the same processing chamber at a second pressure lower than the first pressure; change the pressure in the same processing chamber from the first pressure to the second pressure within ten seconds or less; and maintain one or more process parameters consistent.

[0008] In some embodiments, the one or more pressure regulating devices include a pressure control valve assembly.

[0009] In some implementations, the pressure control valve assembly includes a throttle valve.

[0010] In some implementations, the one or more pumps include roughing pumps and turbo pumps.

[0011] In some implementations, the first pressure is five to one hundred and fifty times higher than the second pressure.

[0012] In some implementations, the one or more process parameters include pumping, gas delivery, or a combination of pumping and gas delivery.

[0013] In a second aspect, the present invention covers an apparatus for processing metal photoresist containing photoresist. In some embodiments, the apparatus includes: one or more processing chambers; one or more pressure regulating devices; one or more pumps fluidly coupled to the pressure regulating devices; one or more gas inlets leading to the processing chambers and associated flow control hardware; a plasma processing system; and a controller having at least one processor and a memory, wherein the at least one processor and the memory are communicatively connected to each other, the at least one processor is at least operatively connected to the associated flow control hardware, and the memory stores computer-executable instructions for controlling the at least one processor to at least control the associated flow control hardware to: perform thermal dry development at a first pressure in the processing chamber; perform plasma dry development and etching at a second pressure lower than the first pressure in the same processing chamber; regulate the pressure in the same processing chamber from the first pressure to the second pressure within ten seconds or less; and after plasma dry development and etching, return the pressure in the same processing chamber from the second pressure to the first pressure within twenty seconds or less; and maintain one or more process parameters consistent.

[0014] In some implementations, the plasma processing system includes a radio frequency power amplifier.

[0015] In some implementations, the radio frequency power amplifier operates continuously or in pulses.

[0016] In a third aspect, the present invention covers a method for processing a semiconductor substrate. In some embodiments, the method includes: providing a patterned photoresist on a semiconductor substrate in a processing chamber; thermally drying the patterned photoresist with a process gas at a first pressure to form a thermally dried patterned photoresist; and plasma drying developing the thermally dried patterned photoresist and etching it with an etchant at a second pressure to form a patterned substrate; wherein the thermal drying, plasma drying, and etching are performed in the same processing chamber; wherein prior to etching, the processing chamber changes from the first pressure to the second pressure in ten seconds or less, and returns to the first pressure in twenty seconds or less after etching; and wherein the patterned photoresist is a metal-containing photoresist.

[0017] In some implementations, the first pressure is about 200 to 500 millitors, while the second pressure is about 20 to 50 millitors.

[0018] In some embodiments, the metal-containing photoresist includes photopatterned EUV-sensitive organometallic oxides, photopatterned EUV-sensitive metal oxides, or thin-film EUV photoresists containing organometallic materials.

[0019] In some implementations, the optically patterned EUV-sensitive metal oxide includes tin oxide.

[0020] In some implementations, tin release from the tin oxide is mitigated.

[0021] In some implementations, the method further includes selective metal deposition.

[0022] In some embodiments, the etching includes exposure to etchant plasma.

[0023] In some embodiments, the etchant plasma comprises a hard mask opening gas.

[0024] In some embodiments, the gas used to open the hard mask includes carbonyl sulfide, oxygen, carbon dioxide, nitrogen, hydrogen, or combinations thereof.

[0025] In some implementations, the gas used to open the hard mask includes oxygen plasma.

[0026] In some implementations, the duration of exposure to oxygen plasma is from about 0.5 seconds to about 4 seconds.

[0027] These and other aspects are further described below with reference to the accompanying drawings. Attached Figure Description

[0028] Figure 1 A flowchart is presented for the conventional process of depositing, developing, and treating photoresist.

[0029] Figure 2A-2C This is a cross-sectional schematic diagram showing multiple processing stages including photoresist development and treatment.

[0030] Figure 3 An exemplary process flow diagram is presented, showing the entire process of applying photoresist to a post-development substrate in a single processing chamber according to certain disclosed embodiments.

[0031] Figure 4 An exemplary method flowchart is presented, which combines dry development and etching steps in the same processing chamber according to certain disclosed embodiments.

[0032] Figure 5 Presents another exemplary method flowchart that combines dry development and etching steps in the same processing chamber and includes selective metal deposition, according to certain disclosed embodiments.

[0033] Figure 6A schematic diagram of an exemplary processing station, according to certain disclosed embodiments, for maintaining an environment suitable for photoresist development, photoresist treatment, and / or etching operations is provided.

[0034] Figure 7 Schematic diagrams are provided of exemplary multi-station processing tools suitable for carrying out the photoresist development, photoresist treatment, and / or etching operations described herein, according to certain disclosed embodiments.

[0035] Figure 8 A schematic cross-sectional view is shown of an exemplary inductively coupled plasma device used to implement certain embodiments and operations described herein, according to certain publicly disclosed embodiments.

[0036] Figure 9 A semiconductor processing cluster tool architecture suitable for implementing the processes described herein, according to certain publicly available embodiments, is illustrated, which has a vacuum integrated deposition and patterning module that interfaces with a vacuum delivery module. Detailed Implementation

[0037] In the following description, numerous specific details are set forth to provide a thorough understanding of the presented embodiments. The disclosed embodiments may be practiced without some or all of these specific details. In other instances, well-known process operations are not described in detail to avoid unnecessarily obscuring the disclosed embodiments. Although the disclosed embodiments are described in conjunction with these specific embodiments, it should be understood that this is not intended to limit the disclosed embodiments. definition

[0038] As used herein, the term “about” is understood to include a slight increase and / or decrease relative to the value, which does not significantly affect the expected parameter function of the value. In some cases, “about” covers + / - 10% of any of the values. As used herein, this term modifies any of the values, a range of values, or the endpoints of one or more ranges.

[0039] As used herein, the terms “top,” “bottom,” “upper,” “lower,” “above,” and “below” are used to provide relative relationships between structures. The use of these terms does not indicate or require that a particular structure must be located in a specific position within the apparatus.

[0040] The implementations disclosed below describe the deposition of material on a substrate (e.g., a wafer, substrate, or other workpiece). Workpieces can have various shapes, sizes, and materials. In this application, the terms "semiconductor wafer," "wafer," "substrate," "wafer substrate," and "partially fabricated integrated circuit" are used interchangeably. Those skilled in the art will understand that the term "partially fabricated integrated circuit" can refer to a silicon wafer during any of the many stages of integrated circuit fabrication on which it is carried out. Wafers or substrates used in the semiconductor device industry typically have diameters of 200 mm, 300 mm, or 450 mm. Unless otherwise stated, the processing details described herein (e.g., flow rate, power level, etc.) relate to processing a 300 mm diameter substrate or a processing chamber configured to process a 300 mm diameter substrate and can be appropriately scaled up for substrates or chambers of other sizes as needed. Besides semiconductor wafers, other workpieces that can be used in the implementations disclosed herein include a variety of articles of manufacture, such as printed circuit boards and the like. The methods and apparatus can be used to manufacture semiconductor devices, displays, LEDs, solar panels, and the like.

[0041] As used in this article, the phrase “at least one of A, B and C” should be understood to mean logic using the non-exclusive logic “or” (A or B or C), and should not be understood to mean “at least one A, at least one B and at least one C”.

[0042] As used herein, the term "photoresist" and its derivatives refer to photosensitive materials used in processes such as photolithography, photoetching, or photoengraving to form patterned coatings on surfaces. The solubility of a photoresist material relative to a developer solution changes when exposed to certain wavelengths of light. Photoresist layers can consist of positive (exposed areas become soluble) or negative (exposed areas become insoluble) photoresist materials. Introduction and Background

[0043] This disclosure generally relates to the field of semiconductor processing. In particular, it relates to post-development processing of photoresists (including metal-containing photoresists). Such metal- and / or metal oxide-containing photoresists can be processed after development and before pattern transfer to alter their chemical, physical, and / or optical properties. Photoresist processing enhances the performance of the photoresist. For example, photoresist processing can reduce dose-to-size (DtS), reduce light-to-weight ratio (LWR), increase line density (CD), improve resistivity, reduce tin or other element release, and / or reduce defects / line breaks.

[0044] Thin film patterning in semiconductor processing is often a crucial step in semiconductor manufacturing. Patterning involves photolithography. In conventional photolithography (e.g., 193nm photolithography), photoresist is exposed to photons in selective regions defined by a photomask, thereby inducing a chemical reaction in the exposed photoresist and creating a chemical contrast that can be used in the development step to remove certain portions of the photoresist, forming a pattern. This pattern is then printed onto a photosensitive photoresist film. The patterned and developed photoresist film can then be used as an etching mask to transfer the pattern onto an underlying film composed of metals, oxides, etc.

[0045] Advanced technology nodes (as defined by the International Technology Roadmap for Semiconductors) include 22nm, 16nm, and others. In the 16nm node, for example, the width of vias or lines in a damascene structure is typically no greater than about 30nm. Scaling of features on advanced semiconductor integrated circuits (ICs) and other devices drives lithography techniques to improve resolution.

[0046] Extreme ultraviolet (EUV) lithography extends the technology by moving to imaging source wavelengths smaller than those achievable with conventional lithography methods. EUV sources with wavelengths of approximately 10–20 nm or 11–14 nm (e.g., 13.5 nm) can be used in advanced lithography tools (also known as scanners). EUV radiation is strongly absorbed in a wide range of solid and fluid materials, including quartz and water vapor, and therefore operates in a vacuum.

[0047] EUV lithography uses EUV resist, which is patterned to form a mask for etching the underlying layer. The EUV resist can be a polymer-based chemically amplified resist (CAR), produced via a liquid-based spin coating technique. An alternative to CAR is a directly photopatternable metal oxide film, such as those available from Inpria Corp. (Corvallis, OR) and described in, for example, U.S. Patent Publications Nos. US2017 / 0102612, US 2016 / 0216606, and US2016 / 0116839, which are incorporated herein by reference, at least because they disclose photopatternable metal oxide films. Such films can be produced by spin coating or dry vapor deposition. Metal oxide films can be directly patterned in a vacuum environment via EUV exposure (i.e., without the use of a separate photoresist), providing a patterning resolution of less than 30 nm (sub-30 nm). Examples include U.S. Patent No. 9,996,004, granted June 12, 2018, entitled "EUV PHOTOPATTERNING OF VAPOR-DEPOSITED METAL OXIDE-CONTAINING HARDMASKS," and / or International Patent Application PCT / US19 / 31618, filed May 9, 2019, entitled "METHODS FOR MAKING EUVPATTERNABLE HARD MASKS," with International Publication No. WO2019 / 217749. These disclosures relate at least to the composition, deposition, and patterning of directly photo-patternable metal oxide films to form EUV resist masks, and are incorporated herein by reference. Typically, patterning involves exposing a resist to EUV radiation to form a light pattern in the resist, and then removing a portion of the resist according to the light pattern by development to form a mask.

[0048] Directly photomable EUV or DUV resists may consist of or contain metals and / or metal oxides mixed within an organic component. Metals / metal oxides can enhance EUV or DUV photon absorption, generate secondary electrons, and / or exhibit greater etch selectivity relative to the underlying film stack and device layers. These resists have been developed using wet (solvent) methods, which require moving the wafer to a developer track to expose it to the developing solvent, followed by baking. Such resists can also be developed using dry methods or a combination of wet and dry methods, as described herein.

[0049] Generally, a resist can be used as a positive or negative resist by controlling its chemical properties and / or the solubility or reactivity of the developer. It would be advantageous to have EUV or DUV resists that can be used as either negative or positive resists.

[0050] While the following description may focus on techniques related to EUV processes, such techniques can also be applied to other next-generation lithography technologies. A variety of radiation sources can be used, including EUV (typically around 13.5 nm), DUV (deep UV, typically in the 248 nm or 193 nm range of excimer laser sources), X-rays (including EUV at lower energy levels within the X-ray range), and electron beams (including a wide energy range).

[0051] This disclosure relates to post-development processing of photoresists. Photoresists containing metals or metal oxides can be deposited using wet or dry methods. Photoresists containing metals or metal oxides may have high absorption of EUV radiation, allowing the photoresist to be patterned by EUV exposure to form exposed and unexposed areas. After selectively removing the exposed or unexposed areas of the photopatterned photoresist containing metals or metal oxides through development, the developed photoresist can be processed. Such processing may include one or more of the following operations: (i) thermal annealing, (ii) plasma exposure, (iii) reactive gas exposure, and (iv) selective deposition of a protective layer. Such processing can achieve one or more of the following advantages: reduced defect rate, reduced LWR, reduced DtS, reduced efflux (e.g., tin efflux), increased resistivity, and increased line density (CD), thus improving the performance of the photoresist containing metals or metal oxides during etching.

[0052] This document refers in detail to specific embodiments of this disclosure. Examples of specific embodiments are shown in the accompanying drawings. While this disclosure will be described in conjunction with these specific embodiments, it should be understood that it is not intended to limit this disclosure to such specific embodiments. Rather, it is intended to cover alternatives, modifications, and equivalents that may fall within the spirit and scope of this disclosure. In the following description, numerous specific details are set forth to provide a thorough understanding of this disclosure. This disclosure may be practiced without some or all of these specific details. In other instances, well-known process operations are not described in detail so as not to unnecessarily obscure this disclosure.

[0053] Figure 1A flowchart illustrating the steps of a conventional method for depositing, developing, and treating photoresist is presented. In block 102 of process 100, a photoresist layer is deposited. This can be a dry deposition process (e.g., vapor deposition) or a wet deposition process (e.g., spin coating). In one embodiment, a metal-containing precursor is deposited as a solution using a liquid-based spin coating technique. In another embodiment, the metal-containing precursor is deposited in vapor phase using a dry technique (e.g., chemical vapor deposition).

[0054] Photoresist films can be deposited on a substrate. Such films can be deposited using wet or dry deposition processes, wherein a metal-containing precursor (e.g., a tin-containing precursor, as described herein) is provided near the substrate. In one embodiment, the metal-containing precursor is deposited as a solution using a liquid-based spin-coating technique. In another embodiment, the metal-containing precursor is deposited in vapor phase using a dry technique (e.g., chemical vapor deposition). While this disclosure typically shows tin-containing precursors, other metal atoms may also be used.

[0055] The layers and films described herein may include those having a high light absorption cross section (e.g., equal to or greater than 1 × 10⁻⁶). 7 cm 2 Elements (e.g., metal or nonmetal atoms) per mol. Such elements can be provided by depositing one or more precursors to provide the imaging layer.

[0056] In some embodiments, the membrane is a radiation-sensitive membrane (e.g., an EUV-sensitive membrane). This membrane can also be used as an EUV resist, as further described herein. In certain embodiments, the layer or membrane may include one or more ligands (e.g., EUV-unstable ligands) that can be removed, cleaved, or crosslinked by radiation (e.g., EUV or DUV radiation).

[0057] The precursor can provide a radiation-sensitive patternable film (or a patterned radiation-sensitive film or a photo-patternable film). Such radiation may include EUV radiation, DUV radiation, or UV radiation, which is provided by irradiating through a patterned mask, and is therefore patterned radiation. The film itself can be altered by exposure to such radiation, making the film radiation-sensitive or photosensitive. In a particular embodiment, the precursor is an organometallic compound containing at least one metal center.

[0058] The precursor may have any useful amount and type of ligands. In some embodiments, the ligands may be characterized by their ability to react in the presence of a counter-reactant or in the presence of patterned radiation. For example, the precursor may include a ligand that reacts with the counter-reactant, which may introduce bonds (e.g., -O- bonds) between metal centers. In another instance, the precursor may include a ligand that is eliminated in the presence of patterned radiation.

[0059] The precursor may include a highly patterned radiation absorption cross section (e.g., equal to or greater than 1 × 10⁻⁶). 7 cm 2 The metal or metalloid or atom (with an EUV absorption cross-section of / mol) is a metal or metalloid or atom. In some embodiments, M is tin (Sn), bismuth (Bi), tellurium (Te), cesium (Cs), antimony (Sb), indium (In), molybdenum (Mo), hafnium (Hf), iodine (I), zirconium (Zr), iron (Fe), cobalt (Co), nickel (Ni), copper (Cu), zinc (Zn), silver (Ag), platinum (Pt), and lead (Pb).

[0060] In certain embodiments, the precursor includes tin. Non-limiting tin precursors include SnF2, SnH4, SnBr4, SnCl4, SnI4, tetramethyltin (SnMe4), tetraethyltin (SnEt4), trimethyltin chloride (SnMe3Cl), dimethyltin dichloride (SnMe2Cl2), methyltin trichloride (SnMeCl3), tetraallyltin, tetravinyltin, hexaphenylditin(IV) (Ph3Sn-SnPh3, where Ph is phenyl), sec-butyldiphenyltin (SnBu2Ph2), trimethyl(phenyl)tin (SnMe3Ph), and trimethyl(phenyl)tin (SnB2Ph2). (Alkynyl)tin, tricyclohexyltin hydride, tert-butyltin hydride (SnBu3H), sec-butyltin diacetate (SnBu2(CH3COO)2), tin acetylacetonate (II)(Sn(acac)2)), tert-butylethoxytin (SnBu3(OEt)), sec-butyldimethoxytin (SnBu2(OMe)2), tert-butylmethoxytin (SnBu3(OMe)), tert-butoxytin (IV)(Sn(t-BuO)4), n-butyltributoxytin (Sn(n-Bu)(t-BuO)3), tetra(dimethylamino)tin (S n(NMe2)4), tetra(ethylmethylamino)tin (Sn(NMeEt)4), tetra(diethylamino)tin (IV)(Sn(NEt2)4), (dimethylamino)trimethyltin (IV)(Sn(Me)3(NMe2), Sn(i-Pr)(NMe2)3, Sn(n-Bu)(NMe2)3, Sn(s-Bu)(NMe2)3, Sn(i-Bu)(NMe2)3, Sn(t-Bu)(NMe2)3, Sn(t-Bu)2(NMe2)2, Sn(t-Bu)(N Et2)3, Sn(tbba), Sn(II)(1,3-bis(1,1-dimethylethyl)-4,5-dimethyl-(4R,5R)-1,3,2-diazastannolidin-2-ylidene)(Sn(II)(1,3-bis(1,1-dimethylethyl)-4,5-dimethyl-(4R,5R)-1,3,2-diazastannolidin-2-ylidene)), or bis[bis(trimethylsilyl)amino]tin(Sn[N(SiMe3)2]2).

[0061] Exemplary deposition techniques (e.g., for films) include any of those described herein, such as ALD (e.g., thermal ALD and plasma-enhanced ALD), spin-coating deposition, PVD including PVD co-sputtering, CVD (e.g., PE-CVD or LP-CVD), sputtering deposition, electron beam deposition including electron beam co-evaporation, etc., or combinations thereof, such as ALD having CVD components, such as discontinuous ALD processes where the precursor and the relative reactant are separated in time or space.

[0062] Further description of the deposition as a precursor and method applicable to the EUV photoresist film of this disclosure can be found in International Application No. PCT / US19 / 31618, published as International Publication No. WO 2019 / 217749, filed May 9, 2019, entitled "METHODS FOR MAKING EUV PATTERNABLE HARD MASKS". In addition to the precursors and relative reactants, the film may also include optional materials to modify the chemical or physical properties of the film, such as to modify the film's sensitivity to EUV or enhance its resistance. Such optional materials may be introduced, for example, by doping during vapor phase formation prior to film deposition on the substrate, during film deposition on the substrate, and / or after film deposition. In some embodiments, a mild, remote H2 plasma may be introduced to, for example, replace some Sn-L bonds with Sn-H, which can enhance the reactivity of the resist under EUV. In other implementations, CO2 can be introduced to replace some Sn-O bonds with Sn-CO3 bonds, which can make it more resistant to wet development.

[0063] Various atoms present in the precursors and / or relative reactants can be provided within the capping layer, which in turn is disposed on any useful layer or structure. The capping layer can be of any useful thickness (e.g., any thickness described herein, including from about 0.1 nm to about 5 nm).

[0064] Furthermore, two or more different precursors may be used within each layer (e.g., a film or a capping layer). For example, two or more of any of the metallic precursors described herein may be used to form an alloy. Other exemplary EUV-sensitive materials, processing methods, and apparatus are described in U.S. Patent No. 9,996,004; International Patent Publication No. WO2020 / 102085; and International Patent Publication No. WO2019 / 217749, the entire contents of each of which are incorporated herein by reference.

[0065] In block 104 of process 100, the back-side surface or bevel of the substrate may optionally be cleaned, and / or edge beads of photoresist deposited in previous steps may be removed. Such cleaning or removal steps may be used to remove particles that may be present after the photoresist layer has been deposited. Removal steps may include processing the wafer with a wet metal oxide (MeOx) edge bead removal (EBR) step.

[0066] In block 106 of process 100, post-coating baking (PAB) or post-coating treatment may optionally be performed. Such treatments can improve the resistance of the unexposed material to aqueous or non-aqueous solutions. In another example, such treatments can increase the chemical composition difference (or contrast) between the unexposed and exposed areas, thus requiring a PAB operation. In another example, such treatments can decrease the chemical composition difference (or contrast) between the unexposed and exposed areas, thus eliminating the need for a PAB operation. In yet another example, PAB is used to remove residual moisture from the layer to form a hardened resist film. PAB may involve some combination of heat treatment, chemical exposure, and / or moisture to increase the EUV sensitivity of the film, thus reducing the EUV dose required to develop the pattern in the film. In a particular embodiment, the PAB step is performed at a temperature greater than about 100°C or at a temperature between about 100°C and about 200°C or between about 100°C and about 250°C. In other embodiments, the PAB step is performed at a temperature between about 190°C and about 350°C in the absence of O-containing gas. In another example, post-coating treatment includes exposing the membrane to an inert gas or CO2, which may optionally include cooling or heating. Using an inert gas provides a metal-oxygen-metal composition, while using CO2 provides a metal carbonate composition within the membrane.

[0067] In block 108 of process 100, the film is exposed to EUV radiation to form a pattern. Generally, EUV exposure causes a change in the chemical composition of the film, resulting in an etch-selective contrast that can be used to remove a portion of the film. Such a contrast can provide a positive resist, as described herein. However, it should be understood that EUV exposure can alternatively cause a contrast that allows unexposed areas to be selectively removed. Such a contrast can provide a negative resist, as described herein. EUV exposure may include, for example, exposure in a vacuum environment with wavelengths in the range of about 10 nm to about 20 nm (e.g., about 13.5 nm in a vacuum environment).

[0068] In block 110 of process 100, the exposed film is subjected to post-exposure baking (PEB), thereby further removing residual moisture, promoting chemical condensation within the film, or increasing the etch selectivity contrast of the exposed film; or post-processing the film in any useful manner. In one example, such processing reduces the chemical composition difference (or contrast) between unexposed and exposed areas, thus eliminating the need for PEB. In another example, the exposed film may be heat-treated (e.g., at low temperatures and / or optionally in the presence of multiple chemicals) to promote reactivity of the resist within the EUV exposed or unexposed portions upon exposure to a stripper or positive developer (e.g., a halogen-based aqueous acid, such as HCl, HBr, HI, or combinations thereof). In yet another example, the exposed film may be heat-treated (e.g., at low temperatures) to further crosslink ligands within the EUV unexposed portions of the resist, thus providing EUV exposed portions that can be selectively removed upon exposure to a stripper (e.g., a positive developer). In yet another example, PEB is omitted.

[0069] In block 112 of process 100, the photoresist pattern can be developed by positive or negative development. In various development embodiments, unexposed areas are selectively removed (to provide patterning within the negative resist). These steps can be wet processes using one or more developers or developing solutions, followed by optional cleaning (e.g., using deionized water or another solvent) or optional dry operations (e.g., with air or under inert conditions, with optional heat). In a particular embodiment, the development step is a wet process applied to a tin-based film. In other embodiments, the development step is a dry process applied to a tin-based film. For example, dry processes include halide-containing chemicals.

[0070] After frame 112, post-development inspection can be performed. If necessary, rework can be performed by returning to repeat operation 102.

[0071] In block 114 of process 100, the photoresist is treated prior to pattern transfer. This treatment may be a heat treatment, plasma treatment, chemical treatment, selective deposition treatment, or a combination of the foregoing. Heat treatment exposes the photoresist to a high temperature between about 200°C and about 300°C to reduce defect rate and LWR. Plasma treatment exposes the photoresist to plasma, such as direct (in-situ) plasma or remote plasma, to densify the photoresist and reduce LWR. Chemical treatment exposes the photoresist to reactive chemicals, such as halide-based substances (e.g., tungsten hexafluoride) or carbon-containing precursors (e.g., carbon monoxide, organometallic precursors), to improve resistance, reduce outgassing, and increase line CD. Selective deposition treatment exposes the photoresist to chemical precursors to selectively deposit a protective coating on the photoresist to reduce DtS, improve resistance, reduce outgassing, and increase line CD. After development, the photoresist is subjected to any one or more of the aforementioned treatments to improve the performance of the photoresist during pattern transfer.

[0072] In block 116 of process 100, one or more substrate layers are etched using a photoresist mask to perform pattern transfer. These substrate layers are located beneath the photoresist mask and can be removed by photolithographic etching. Pattern transfer etching etches material to a desired depth to form multiple patterned features. In some embodiments, the one or more substrate layers may include amorphous carbon (aC), amorphous silicon (a-Si), tin oxide (e.g., SnO), etc. x ), silicon oxides (e.g., SiO2), silicon nitride oxides (e.g., SiO2) x N y ), silicon carbide (e.g., SiO) x C) Silicon nitrides (e.g., Si3N4), titanium oxides (e.g., TiO2), titanium nitrides (e.g., TiN), tungsten (e.g., W), doped carbon (e.g., W-doped C), tungsten oxides (e.g., WO) x Hafnium oxides (e.g., HfO2), zirconium oxides (e.g., ZrO2), and aluminum oxides (e.g., Al2O3) are used. Any defects or variations in the CD (disc pattern) in the photoresist mask are replicated into the patterned material during pattern transfer etching. Furthermore, poor resistivity adversely affects pattern transfer to the underlying substrate during etching. Post-development processing of the photoresist mask mitigates these problems to ensure successful pattern transfer during pattern transfer etching.

[0073] After pattern transfer, a post-etching inspection can be performed. If necessary, rework can be performed by returning to repeat operation 102.

[0074] Figure 2A-2C A cross-sectional schematic diagram is shown to provide an overview of the multiple processing stages, including photoresist development and treatment. For example... Figure 2A As shown, wafer 200 includes a substrate 202 and a substrate layer 204 to be etched. The patterned structure can include any useful substrate. For example, the wafer can be prepared with a substrate surface having a desired material, the topmost material of which is a layer to which a resist pattern is transferred. Although material selection may vary depending on the level of integration, it is generally desirable to select a material that can be etched with high selectivity (i.e., much faster) than EUV resist or imaging layers.

[0075] In some implementations, the substrate is a hard mask used for photolithographic etching of the underlying semiconductor material. The hard mask can comprise any of a variety of materials, including amorphous carbon (aC), tin oxide (e.g., SnO), etc. x ), silicon oxide (e.g., SiO) x Including SiO2), silicon nitride oxides (e.g., SiO2), etc. x N y ), silicon carbide (e.g., SiO) x C) Silicon nitrides (e.g., Si3N4), titanium oxides (e.g., TiO2), titanium nitrides (e.g., TiN), tungsten (e.g., W), doped carbon (e.g., W-doped C), tungsten oxides (e.g., WO) x Hafnium oxides (e.g., HfO2), zirconium oxides (e.g., ZrO2), and aluminum oxides (e.g., Al2O3) are suitable substrate materials. Suitable substrate materials may include a variety of carbon-based films (e.g., ashingable hard masks (AHMs)) and silicon-based films (e.g., SiO2). x SiC x SiO x C y SiO x N y SiO x C y N z (a-Si:H, polycrystalline Si or SiN), or any other (generally sacrificial) film coated to facilitate patterning processes. For example, the substrate may preferably comprise SnO. x For example, SnO2. In various embodiments, the layer can be 1 nm to 100 nm thick, or 2 nm to 10 nm thick.

[0076] In some embodiments, substrate 204 includes an ashedable hard mask, such as amorphous carbon, spin-coated carbon, or other materials, such as silicon, silicon oxide, silicon nitride, silicon carbide, etc. In some embodiments, substrate 204 may be a layer stack disposed on substrate 202. Wafer 200 further includes a photopatterned metallized EUV resist film 206. For example, photopatterned metallized EUV resist film 206 may be an organometallic layer disposed on substrate 204 to be etched. Photopatterned metallized EUV resist film 206 may have a thickness between about 5 nm and about 50 nm or between about 10 nm and about 30 nm. Photopatterned metallized EUV resist film 206 may be provided in a processing chamber after photopatterning in an EUV scanner and / or after PEB processing. Photopatterned metallized EUV resist film 306 includes a non-EUV exposure area 206a and an EUV exposure area 206b.

[0077] like Figure 2B As shown, the non-EUV exposure area 206a of the photopatterned metal-containing EUV resist film 206 is removed during the development process. Development can be performed using wet or dry development chemicals. When using dry development chemicals, dry development can be performed under excited or unexcited plasma. In some implementations, the dry development chemicals may include halide-containing chemicals. A photoresist mask of the photopatterned metal-containing EUV resist film 206 is formed after development to remove the non-EUV exposure area 206a. Although Figure 2A-2C Negative development is depicted, but it should be understood that positive development may be used alternatively in this disclosure.

[0078] like Figure 2C As shown, a photoresist mask 208 is used to etch a substrate layer 204 to form a recessed feature defined by the photoresist mask 208 in a wafer 200. The wafer 200 undergoes pattern transfer etching, such that the etchant selectively removes the substrate layer 204 relative to the chemically modified photoresist mask 208. Pattern transfer etching can be performed by dry etching or wet etching. For example, dry etching can utilize a fluorine-based plasma etching process or an oxygen-based plasma etching process. Pattern transfer etching can etch through the substrate layer 204 according to the pattern defined by the photoresist mask 208. In some embodiments, the photoresist mask 208 retains or at least substantially retains the enlarged line CD after pattern transfer etching.

[0079] return Figure 1The steps of process 100, as indicated by boxes 112, 114, and 116, are conventionally performed in separate chambers and involve transferring wafers from one processing chamber to the next for subsequent operations. To improve process efficiency and yield, the number of steps and / or chambers for various operations can be reduced using the methods disclosed herein.

[0080] In particular, such as Figure 1 The efficiency of the conventional process 100 shown can be improved by performing the steps indicated by boxes 112 and 116 in the same processing chamber without the need for dry development followed by baking 114. Integration Methods

[0081] As discussed above, this disclosure provides methods for creating films on semiconductor substrates that can be patterned using EUV or other next-generation lithography techniques. Methods include those that generate polymerized organometallic materials using vapor and deposit them onto the substrate. In some embodiments, dry deposition can employ any useful precursor (e.g., metal halides, covering agents, or organometallic agents described herein). In other embodiments, spin-coating formulations can be used. The deposition process may include coating an EUV-sensitive material as a resist film or an EUV-sensitive film.

[0082] These EUV-sensitive films include materials that change upon exposure to EUV, such as losing bulky side-chain ligands bonded to metal atoms. If the unexposed areas comprise dense, MOM-rich materials, EUV-induced degradation can provide intermediates that are more easily removed by positive developers.

[0083] EUV patterning creates regions of film that exhibit physical or chemical changes relative to unexposed areas. These properties can be utilized in subsequent processing, such as dissolving unexposed or exposed areas, or selectively depositing material on exposed or unexposed areas. In some embodiments, under conditions for such subsequent processing, the unexposed film has a hydrophobic surface, while the exposed film has a hydrophilic surface (the hydrophilicity of exposed and unexposed areas is known to be relative). For example, material removal can be achieved by utilizing differences in the film's chemical composition, density, and crosslinking. Removal can be achieved through wet or dry processing, as further described herein.

[0084] The thickness of the EUV patternable film formed on the substrate surface can vary depending on the surface characteristics, the materials used, and the processing conditions. In various embodiments, the film thickness can range from about 0.5 nm to about 100 nm. Preferably, the film has sufficient thickness to absorb most of the EUV light under EUV patterning conditions. For example, the total absorption rate of the resist film can be 30% or less (e.g., 10% or less, 5% or less), allowing sufficient exposure of the resist material at the bottom of the resist film. In some embodiments, the film thickness is 10 nm to 20 nm. Without limiting the mechanism, function, or utility of this disclosure, it is believed that the process of this disclosure can be applied to a variety of substrates. Furthermore, as discussed above, the deposited film can closely conform to surface features, thereby providing the advantage of forming a mask on a substrate (e.g., a substrate with underlying features) without the need for “filling” or otherwise planarizing such features.

[0085] The film can be composed of a metal oxide layer deposited in any useful manner. Such a metal oxide layer can be deposited or coated using any EUV-sensitive material described herein, such as a combination of precursors (e.g., metal-containing precursors, metal halides, covering agents, or organometallic agents) and corresponding reactants. In an exemplary process, a polymerized organometallic material is formed on a substrate surface in the gas phase or in situ to provide a metal oxide layer. The metal oxide layer can be used as a film, an adhesive layer, or a capping layer.

[0086] Generally, the method may include mixing a precursor (e.g., a metal-containing precursor, such as an organometallic agent) vapor stream with an optional relative reactant vapor stream to form a polymeric organometallic material, and depositing the organometallic material onto the surface of a semiconductor substrate. In some embodiments, mixing the precursor with an optional relative reactant can form a polymeric organometallic material. Those skilled in the art will understand that the mixing and deposition aspects of the process can be performed simultaneously in a substantially continuous process.

[0087] In an exemplary continuous CVD process, two or more gas streams (in separate inlet paths) of precursor and optional reactant sources are directed into the deposition chamber of a CVD apparatus, where they mix and react in the gas phase to form aggregated polymeric materials (e.g., formed via metal-oxygen-metal bonds) or films on a substrate. The gas streams can be introduced, for example, using separate injection inlets or dual-chamber nozzles. The apparatus is configured to mix precursor and optional reactant streams within the chamber, thereby allowing the precursor to react with the optional reactants to form polymerized organometallic materials or films (e.g., metal oxide coatings or aggregated polymeric materials, such as those formed via metal-oxygen-metal bonds).

[0088] To deposit metal oxides, CVD processes are typically performed under reduced pressure, for example, from 0.1 Torr to 10 Torr. In some embodiments, the process is performed at pressures from 1 Torr to 2 Torr. The substrate temperature is preferably lower than the temperature of the reaction stream. For example, the substrate temperature can be from 0°C to 250°C, or from ambient temperature (e.g., 23°C) to 150°C.

[0089] To deposit agglomerated polymeric materials, CVD processes are typically performed under reduced pressure, for example, from 10 mTorr to 10 Torr. In some embodiments, the process is performed at 0.5 Torr to 2 Torr. The substrate temperature is preferably equal to or lower than the temperature of the reaction stream. For example, the substrate temperature can be from 0°C to 250°C, or from ambient temperature (e.g., 23°C) to 150°C. In many processes, the deposition of the polymerized organometallic material occurs at a rate inversely proportional to the surface temperature. Without limiting the mechanism, function, or practicality of this technology, it is believed that the products from such gas-phase reactions become larger in molecular weight due to the crosslinking of metal atoms with respect to the reactants, and subsequently condense or otherwise deposit on the substrate. In many embodiments, the steric hindrance of the bulky alkyl groups further prevents the formation of a densely packed network and produces a low-density film with a large porosity.

[0090] A potential advantage of using dry deposition methods is that the composition of the film can be tuned during its growth. In CVD processes, this can be achieved by varying the relative flow rates of the first and second precursors during deposition. Deposition can be carried out at temperatures between 30°C and 200°C and pressures between 0.01 Torr and 100 Torr, but more generally between about 0.1 Torr and 10 Torr.

[0091] Films (e.g., metal oxide coatings formed by metal-oxygen-metal bonds or aggregated polymeric materials) can also be deposited via ALD processes. For example, precursors and optionally, opposing reactants are introduced at separate times, representing ALD cycles. The precursors react on the surface, thereby forming up to one layer of material per cycle. This allows for good control over the uniformity of film thickness across the entire surface. ALD processes are typically performed under reduced pressure (e.g., from 0.1 Torr to 10 Torr). In some embodiments, the process is performed at 1 Torr to 2 Torr. Substrate temperatures can be from 0°C to 250°C, or ambient temperatures (e.g., 23°C to 150°C). The process can be a thermal process, or preferably plasma-assisted deposition.

[0092] Any deposition method described herein can be modified to allow the use of two or more different precursors. In one embodiment, the precursors may comprise the same metal but different ligands. In another embodiment, the precursors may comprise different metal groups. In a non-limiting example, alternating flows of multiple volatile precursors can provide a mixed metal-containing layer, for example, using a metal alkoxide precursor having a first metal (e.g., Sn) and a silane-based precursor having a different second metal (e.g., Te).

[0093] The process described herein can be used to achieve surface modification. In some iterations, precursor vapor can pass through the wafer. The wafer can be heated to provide thermal energy for the reaction to proceed. In some iterations, the heating can be between about 50°C and about 250°C. In some cases, precursor pulses can be used, spaced apart by pumping and / or purging steps. For example, a first precursor can be pulsed between pulses of a second precursor pulse, resulting in ALD or ALD-like growth. In other cases, both precursors can flow simultaneously. Examples of elements that can be used for surface modification include I, F, Sn, Bi, Sb, Te, and oxides or alloys of these compounds.

[0094] The process described in this article can be used to deposit thin metal oxides or metals via ALD or CVD. Examples include tin oxide (SnO). x ), Bismuth oxide (BiO) x ) and Te. After deposition, formula M can be used a R b L c The alkyl-substituted precursor is used to cover the film, as described elsewhere herein. Relative reactants can be used for better ligand removal, and multiple cycles can be repeated to ensure complete saturation of the substrate surface. This surface can then be prepared for deposition of EUV-sensitive films. One possible approach is to generate SnO. x Thin film. Possible chemical methods include growing SnO2 by cycling tetra(dimethylamino)tin with a relative reactant (e.g., water or O2 plasma). After growth, a covering agent can be used. For example, isopropyltris(dimethylamino)tin vapor can be flowed through the surface.

[0095] The deposition process can be performed on any usable surface. As referred to herein, a “surface” is a surface on which the film of this technique will be deposited or which will be exposed to EUV during processing. Such surfaces may be present on a substrate (e.g., on which the film will be deposited) or on the film (e.g., on which a capping layer may be deposited).

[0096] Such underlying morphological features may include areas where material has been removed (e.g., by etching) or where material has been added (e.g., by deposition) prior to the present technical method. Such prior treatment may include the methods of the present technique or other processing methods in an iterative process, thereby forming two or more layers of features on the substrate. Without limiting the mechanism, function, or utility of the present technique, it is believed that in some embodiments, the methods of the present disclosure offer advantages such as the uniformity of the film over the underlying features without “filling” or otherwise planarizing such features, and the ability to deposit films on a wide range of material surfaces. Exposure of materials containing metal resist

[0097] Photoresist films can be exposed to radiation. The photoresist film is exposed to radiation according to the desired pattern to form exposed and unexposed areas. Exposure causes changes in the chemical composition and cross-linking of the photoresist film, resulting in a contrasting etching selectivity that can be used for subsequent development.

[0098] EUV exposure of a membrane can provide an EUV exposure region with activated reaction centers comprising metal atoms (M) (which are generated through EUV-mediated cleavage events). Such reaction centers may include dangling metal bonds, MH groups, cleaved M-ligand groups, dimerized MM bonds, or MOM bridges.

[0099] EUV exposure in a vacuum environment can have wavelengths from about 10 nm to about 20 nm, for example, 10 nm to 15 nm, such as 13.5 nm. Specifically, patterning can provide EUV exposed areas and EUV unexposed areas to form a pattern. In some embodiments, such patterning involves about 1-50 mJ / cm². 2 1-40mJ / cm 2 1-30mJ / cm 2 1-20mJ / cm 2 or 1-10 mJ / cm 2 The radiation dose.

[0100] This disclosure may include patterning using EUV and DUV or electron beams. In such patterning, radiation is focused onto one or more regions of an imaging layer. Exposure may be performed such that the imaging layer includes one or more regions not exposed to radiation. The resulting imaging layer may include multiple exposed and unexposed areas, thereby establishing a pattern consistent with the establishment of other feature patterns of a transistor or semiconductor device, which are formed in subsequent substrate processing by adding or removing material from the substrate. Useful EUV, DUV, and electron beam radiation methods and apparatus herein include methods and apparatus known in the art.

[0101] In some EUV lithography techniques, organic hard masks (e.g., ashedable hard masks made of PECVD amorphous hydride carbon) are patterned using a photoresist process. During photoresist exposure, EUV radiation is absorbed in the resist and the underlying substrate, generating high-energy photoelectrons (e.g., about 100 eV), which in turn generate a series of low-energy secondary electrons (e.g., about 10 eV) that diffuse laterally over several nanometers. These electrons increase the extent of chemical reactions in the resist, thereby enhancing its EUV dose sensitivity. However, the inherently random pattern of secondary electrons is superimposed on the optical image. This unwanted exposure of secondary electrons in the patterned resist leads to decreased resolution, significant line edge roughness (LER), and linewidth variations. These defects are replicated in the material to be patterned during subsequent pattern transfer etching.

[0102] In the various embodiments described herein, deposition (e.g., condensation) processes (e.g., ALD or MOCVD performed in a PECVD tool) can be used to form a thin film containing a metal, such as a photosensitive metal salt or a metal-containing organometallic compound (organometallic compound), which has strong absorption in EUV (e.g., at wavelengths in the 10 nm to 20 nm range), for example at the wavelength of an EUVL light source (e.g., 13.5 nm = 91.8 eV). This film undergoes photodecomposition after EUV exposure, forming a metal mask that serves as a pattern transfer layer during subsequent etching (e.g., in a conductor etching tool).

[0103] Following deposition, the EUV-patternable thin film is patterned by exposure to an EUV beam (in some instances, under a relatively high vacuum). For EUV exposure, the metal-containing film can then be deposited in a chamber integrated with a lithography platform (e.g., a wafer stepper) and transferred under vacuum to prevent reaction before exposure. The strong light absorption of incident photons by ambient gases (e.g., H2O, O2, etc.) and the significantly reduced pressure required for EUVL necessitate integration with lithography tools. In other embodiments, photosensitive metal film deposition and EUV exposure can be performed in the same chamber.

[0104] Photolithography processes may involve one or more baking steps to facilitate the chemical reactions required to create a chemical contrast between the exposed and unexposed areas of the photoresist. For high-volume manufacturing (HVM), such baking steps can be performed on a track, where the wafer is baked on a hot plate at a default temperature under ambient air or, in some cases, under a flow of N2. During these baking steps, more careful control of the baking environment and the introduction of additional reactive gas components into the environment can help to further reduce dosage requirements and / or improve pattern fidelity.

[0105] According to various aspects of this disclosure, applying one or more post-treatments (e.g., post-coat baking (PAB) or another post-coat treatment after deposition, and / or post-exposure baking (PEB), which may be omitted, or another post-exposure treatment) and / or (e.g., post-development baking (PDB) or another post-development treatment after development) to metal- and / or metal oxide-based photoresists can improve the material property differences between exposed and unexposed photoresists, thereby reducing dose-to-size (DtS), improving PR profiles, and improving line edge and width roughness (LER / LWR) after subsequent dry development. Such treatments may involve thermal processes that control temperature, gas environment, and moisture, thus improving dry development performance in subsequent processing. In some instances, remote plasma can be used. In other instances, PAB and / or PEB and / or PDB are not performed.

[0106] In the case of post-coating treatment (e.g., PAB), a thermal process involving controlled temperature (e.g., heating or cooling), a gaseous environment (e.g., air, H2O, CO2, CO, O2, O3, CH4, CH3OH, N2, H2, NH3, N2O, NO, Ar, He, or mixtures thereof), or vacuum, and moisture can be used after deposition and before exposure to modify the composition of the unexposed metal and / or metal oxide photoresist. This modification can enhance the EUV sensitivity of the material and thus achieve lower dose-to-size and edge roughness after exposure and dry development.

[0107] In the case of post-exposure processing (e.g., PEB), the composition of both the unexposed and exposed photoresists can be altered using a thermal process that controls temperature, gas environment (e.g., air, H2O, CO2, CO, O2, O3, CH4, CH3OH, N2, H2, NH3, N2O, NO, Ar, He, or mixtures thereof) or vacuum, and moisture. This alteration can enhance the difference in composition / material properties between the unexposed and exposed photoresists, as well as the difference in etching rates of the dry development etching gases between them. This results in higher etching selectivity. Due to the improved selectivity, a square PR profile with improved surface roughness and / or less photoresist residue / dross can be obtained. In certain embodiments, PEB can be performed in air and optionally in the presence of moisture and CO2. In other embodiments, PEB can be omitted.

[0108] In post-development processing (e.g., post-development baking or PDB), the composition of the unexposed photoresist can be altered using thermal processes that control temperature, gas environment (e.g., air, H2O, CO2, CO, O2, O3, CH4, CH3OH, N2, H2, NH3, N2O, NO, Ar, He, or mixtures thereof) or vacuum (e.g., with UV), and moisture. In certain embodiments, this condition also includes the use of plasma (e.g., comprising O2, O3, Ar, He, or mixtures thereof). This alteration can enhance the hardness of the material, which may be advantageous if the film will be used as a photoresist mask during etching of the underlying substrate.

[0109] In these cases, in alternative implementations, the thermal process can be replaced by a remote plasma process to increase the reactive material, thereby lowering the energy barrier of the reaction and increasing productivity. Remote plasma can generate more reactive free radicals, thus reducing the reaction temperature / time required for processing, thereby increasing productivity.

[0110] Therefore, one or more processes can be applied to modify the photoresist itself to increase the selectivity of dry or wet development. This thermal or radical modification can increase the contrast between the unexposed and exposed materials, thus increasing the selectivity of subsequent development steps. The resulting difference in material properties between the unexposed and exposed materials can be adjusted by modifying process conditions, including temperature, gas flow rate, moisture content, pressure, and / or RF power.

[0111] For wet or dry developing resist films, the processing temperature of PAB or PEB can be varied to adjust and optimize the processing, for example, from about 90°C to 250°C for PAB and from about 170°C to 250°C or higher for PEB.

[0112] In certain embodiments, PAB and / or PEB treatment can be performed at a gas ambient flow rate ranging from 100 sccm to 10,000 sccm, a moisture content ranging from a few percent to up to 100% (e.g., 20%-50%), a pressure between atmospheric pressure and vacuum, and a duration of about 30 seconds to 15 minutes (e.g., about 1 to 2 minutes). In certain embodiments, PEB is omitted.

[0113] Depending on the selectivity requirements / limitations of the semiconductor processing operation, thermal treatments, such as those described herein, can be used to reduce the required EUV dose. Alternatively, if higher selectivity is required and a higher dose is permissible, much higher selectivity can be obtained, with exposures up to 100 times greater than unexposed exposures.

[0114] Other steps may include in-situ measurements, where physical and structural properties (e.g., critical dimensions, film thickness, etc.) can be evaluated during the photolithography process. Modules for implementing in-situ measurements include, for example, modules for scattering measurements, elliptic polarization measurements, downstream mass spectrometry measurements, and / or plasmonic-enhanced downstream optical emission spectroscopy measurements.

[0115] A substrate can be provided in a processing chamber, wherein the substrate is a semiconductor substrate comprising a substrate layer and a post-development photoresist mask above the substrate layer. The substrate layer may be located below the post-development photoresist mask and may include any suitable material to facilitate the patterning process. The substrate layer can be etched with high selectivity relative to the post-development photoresist mask. In some implementations, the substrate layer may include spin-coated carbon (SoC), spin-coated glass (SOG), amorphous carbon (aC), tin oxide (e.g., SnO). x ), silicon (e.g., a-Si), silicon oxide (e.g., SiO2), silicon nitride (e.g., SiO2) x N y ), silicon carbide (e.g., SiO) x C) Silicon nitride (Si3N4), silicon carbide (SiC) x Titanium oxides (e.g., TiO2), titanium nitrides (e.g., TiN), tungsten (e.g., W), doped carbon (e.g., W-doped C), tungsten oxides (e.g., WO3) x Hafnium oxide (HfO2), zirconium oxide (e.g., ZrO2), and aluminum oxide (Al2O3).

[0116] Metallic photoresist can be deposited on a substrate using dry or wet methods. The metallic photoresist can be provided as a positive or negative resist having EUV-exposed and EUV-unexposed areas after EUV exposure. After deposition, the metallic photoresist can be photo-patterned in an EUV lithography chamber (scanner). After exposure and optional PEB processing, the metallic photoresist can be developed to selectively remove portions of the metallic photoresist (e.g., EUV-unexposed areas), thereby forming a patterned photoresist mask over the substrate. In some implementations, the metallic photoresist is a metallic EUV photoresist, wherein the metallic EUV photoresist is an organometallic oxide or an organometallic film. For example, the metallic EUV photoresist may include Sn, O, and C atoms.

[0117] A processing chamber provides an enclosed space for processing the substrate after development. The chamber walls may be made of stainless steel, aluminum, plastic, or other suitable materials. In some embodiments, the chamber walls are coated with an anti-corrosion film, such as a polymer or inorganic coating. The processing chamber may include a substrate support (e.g., a base or electrostatic chuck) on which the substrate is supported. In some embodiments, the processing chamber for post-development processing may be a deposition chamber, a beveled edge and / or back-side cleaning chamber, a PAB processing chamber, a PEB processing chamber, a developing chamber, or an etching chamber. Thus, the processing chamber for post-development processing may be the same chamber used in a previous operation for photoresist treatment, or the same chamber used in a subsequent operation for photoresist treatment, thereby minimizing substrate transfer and reducing exposure to air break between operations. The processing chamber may include one or more heating elements for exposing the substrate to elevated temperatures. In some embodiments, the one or more heating elements may include one or more infrared (IR) lamps or one or more light-emitting diodes (LEDs) located in the substrate support for controlling the substrate temperature. The processing chamber may include one or more gas lines for delivering gases into the processing chamber. For example, the one or more gas lines may include nozzles for supplying reactive gases to a substrate within the processing chamber. In some implementations, the processing chamber may be a plasma generation chamber or a plasma generation chamber that can be coupled to a separate processing chamber. The plasma generation chamber may be an inductively coupled plasma (ICP) reactor, a pressure-coupled plasma (TCP) reactor, or a capacitively coupled plasma (CCP) reactor. In some cases, the processing chamber further includes one or more gas outlets for exhausting gases, which may or may not be coupled to a vacuum pump to maintain the desired pressure within the processing chamber.

[0118] Post-development metallized photoresist masks are treated using one or more of the following operations: (i) thermal annealing of the post-development metallized photoresist mask, (ii) exposure of the post-development metallized photoresist mask to plasma, (iii) exposure of the post-development metallized photoresist mask to one or more reactive gases, and (iv) selective deposition of a protective layer on the post-development metallized photoresist mask. Post-development treatment of the substrate may utilize one or a combination of the aforementioned thermal annealing, plasma, chemical, or selective deposition operations. Post-development treatment improves the performance of metallized photoresist masks during pattern transfer etching. The aforementioned thermal annealing, plasma, chemical, and selective deposition techniques will be discussed in detail below.

[0119] The substrate layer is etched to form recessed features using a post-development metallic photoresist mask. This process can be called pattern transfer or pattern transfer etching. Etching can selectively remove a portion of the substrate layer without removing the post-development metallic photoresist mask. Wet or dry etchants can be used to etch through the portion of the substrate layer exposed by the post-development metallic photoresist mask. The metallic photoresist mask defines a pattern for the features to be etched. The features are etched through the substrate according to the pattern defined by the metallic photoresist mask. After post-development processing, the metallic photoresist mask can have increased line density (CD) and / or improved etch resistance during pattern transfer etching. The features to be etched can maintain or substantially maintain the line density provided by the metallic photoresist mask. In some cases, the metallic photoresist mask can have a reduced defect rate and / or roughness. Therefore, defects and roughness are not transferred to the features formed after pattern transfer etching. Heat treatment

[0120] In some implementations, the substrate can be heat-treated by heating it to an elevated temperature. This heat treatment can be used to reduce defects and roughness in metal-containing photoresist masks prior to pattern transfer etching. Specifically, the heat treatment can improve the chemical contrast in metal-containing photoresist masks by removing dross.

[0121] After wet or dry development, residues or scum may remain on the substrate. These residues or scum may remain in areas of the photoresist mask that were removed by development. Residual residues or scum may include residual etching byproducts adsorbed onto the substrate surface. For example, halogen vapors used in some development chemicals may react with moisture or oxygen to form persistent, difficult-to-remove residual etching byproducts. Wet processing techniques typically employ moisture and / or oxygen, which more readily lead to the formation of scum and residues. In some cases, the residues may contain high metal concentrations or metal oxides (e.g., SnO). x Particles or clusters that may cause chemical contrast loss during pattern transfer and contaminate downstream processing tools.

[0122] After wet or dry development, roughness may form on the sidewalls of the etched features in the developed pattern of the photoresist mask. Some of this may be due to the random or non-optimal Gaussian distribution of light, resulting in partially or fully exposed material in areas where the photoresist should remain unexposed, and vice versa. Furthermore, scum on the sidewalls of the etched features of the photoresist mask may exacerbate the roughness.

[0123] During heat treatment, the substrate may be heated to an elevated temperature between about 50°C and about 500°C, between about 100°C and about 400°C, between about 100°C and about 300°C, or between about 100°C and about 250°C. The substrate may be heated to the elevated temperature using one or more temperature-controlled elements within the processing chamber. The pressure may be maintained between about 0.1 Torr and about 760 Torr, for example, between about 0.1 Torr and about 1 Torr in some cases. The substrate may be exposed to the elevated temperature for a duration between about 1 minute and about 10 minutes, for example, between about 2 minutes and about 5 minutes in some cases. In some implementations, the heat treatment is performed under one or more inert gases. For example, the heat treatment may be performed under nitrogen (N2), helium (He), neon (Ne), argon (Ar), or xenon (Xe) streams. In some implementations, the heat treatment is performed in the atmosphere.

[0124] Higher temperatures during post-development heat treatment may improve deslagging, reduce defect rate, and decrease surface roughness. However, higher temperatures may also lead to a reduction in line density (CD). Higher temperatures during thermal annealing have been observed to cause transverse shrinkage and high-density shrinkage of the photoresist. Reduced line CD results in a higher dose-to-size ratio. Post-development heat treatment may present a trade-off between reducing defect rate and surface roughness and increasing dose-to-size ratio. This limits heat treatment to a desired temperature range and processing duration to optimize the benefits of reduced defect rate and surface roughness while minimizing the increase in dose-to-size ratio. Plasma treatment

[0125] In some implementations, the substrate may be exposed to plasma for post-development processing. Plasma treatment can be used to densify and reduce the roughness of metal-containing photoresist masks before pattern transfer etching. In some cases, plasma treatment can further improve the chemical contrast of metal-containing photoresist masks by removing dross. Plasma treatment can employ plasmas of inert or reactive gaseous substances. Plasma of reactive gaseous substances can chemically react with the metal-containing photoresist mask or selectively deposit a protective film on the metal-containing photoresist mask.

[0126] Plasma exposure can be facilitated by generating plasma in a remote plasma generator or in a processing chamber on a substrate being processed. One or more gases can flow to a plasma generation area, which may be a remote plasma generator or a processing chamber, and ignite the plasma. The plasma generation chamber may be an inductively coupled plasma (ICP), voltage-coupled plasma (TCP), or capacitively coupled plasma (CCP) reactor. Plasma energy is provided to activate one or more gases into ions, radicals, neutral substances, and other plasma-activating substances. Ions, radicals, neutral substances, and other plasma-activating substances can interact with a metal-containing photoresist mask to improve the performance of the metal-containing photoresist mask during pattern transfer etching.

[0127] The one or more gases may include oxygen-containing substances, such as oxygen (O2), carbon dioxide (CO2), and carbon monoxide (CO). Alternatively or additionally, the one or more gases may include halogen-containing substances, such as boron trichloride (BCl3), silicon tetrachloride (SiCl4), tin tetrachloride (SnCl4), tungsten hexafluoride (WF6), and difluoromethane (CH2F2). Alternatively or additionally, the one or more gases may include inert gases, such as nitrogen (N2), helium (He), neon (Ne), argon (Ar), and xenon (Xe). Other gases may include hydrogen (H2), ammonia (NH3), hydrogen halides (HCl, HBr, HF, HI), and various hydrocarbons (C... x H y For example, methane (CH4). In some cases, the plasma can be oxygen-based, nitrogen-based, inert gas-based, and / or carbon-based. In some implementations, the plasma is a remote plasma. In other implementations, the plasma is an in-situ plasma.

[0128] The process conditions for plasma treatment can be adjusted to achieve the desired results. These process conditions include, but are not limited to, plasma power, plasma frequency, plasma exposure time, bias voltage, duty cycle, temperature (e.g., base temperature), pressure (e.g., chamber pressure), and the flow rate of one or more gases. The plasma in operation can be generated at plasma power less than about 6 kW, for example, between about 50 W and about 4000 W, between about 50 W and about 1000 W, or between about 100 W and about 500 W. In some instances, plasma can be provided at low plasma power and high ion energy. The directionality of the plasma can be controlled by bias voltage. In some implementations, a bias voltage between about 1 V and about 500 V, between about 10 V and about 400 V, or between about 30 V and about 300 V can be applied. The plasma treatment can be applied for durations between about 0.5 seconds and about 120 seconds, about 1 second and about 60 seconds, or about 2 seconds and about 40 seconds. Plasma processing allows for adjustable plasma duty cycles to achieve desired results, wherein the RF power supply can deliver plasma at any suitable duty cycle, for example, between about 1% and about 99%, or between about 10% and about 90%. In some embodiments, the chamber pressure can be between about 0.1 Torr and about 760 Torr, or in some cases between about 0.1 Torr and about 1 Torr. In some embodiments, the substrate temperature can be between about 0°C and about 400°C, between about 50°C and about 300°C, or between about 100°C and about 250°C.

[0129] As discussed below, plasma processing can be accompanied by reactive gaseous materials. Plasma containing reactive gaseous materials can initiate chemical reactions in metal-containing photoresist masks to improve mask properties, such as resistivity. Plasma containing reactive gaseous materials can selectively deposit protective films on metal-containing photoresist masks to increase line density (CD) and reduce dose-to-size ratio. Chemical treatment

[0130] In some implementations, the metallized photoresist mask may be exposed to one or more reactive gaseous substances. These reactive gaseous substances may chemically react with the metallized photoresist mask. In fact, some reactive gaseous substances may react with the metallized photoresist mask but not with the substrate layer of the substrate. In some implementations, the reactive gaseous substances may transform the entire or substantially the entire metallized photoresist mask from a first material to a second material. This chemical change in the metallized photoresist mask may alter one or more properties of the mask. In some implementations, the reactive gaseous substances may only transform the exterior of the metallized photoresist mask from the first material to the second material, which may serve as a protective film, as further described below.

[0131] Reactive gas materials can react with metal-containing photoresist masks to increase line density (CD) and reduce dose-to-size. Reactive gas materials can react with metal-containing photoresist masks to reduce roughness (e.g., LWR / LER) or at least maintain the same roughness. Reactive gas materials can densify metal-containing photoresist masks. In some cases, reactive gas materials can react with metal-containing photoresist masks to reduce defect rates (e.g., dross). Additionally, reactive gas materials can reduce outgassing, such as tin outgassing from the metal-containing photoresist mask. In some cases, reactive gas materials can react with metal-containing photoresist masks to enhance the photoresist mask's resistance during subsequent etching operations. For example, reactive gas materials can increase line CD and at least substantially maintain the increased line CD of the photoresist mask after pattern transfer etching.

[0132] Reactive gaseous materials are more reactive with metal-containing photoresists than the underlying substrate. In certain implementations, chemical processing using reactive gaseous materials leverages the chemical properties of the EUV photoresist mask. The EUV photoresist mask can be composed of organometallic oxide films, such as organotin oxide films having Sn, O, and C atoms. The organotin oxide film can consist of a network of Sn-Sn, Sn-H, Sn-C, Sn-OH, Sn-O, Sn-O-Sn, and Sn-OC bonds. Reactive gaseous materials can react with one or more elements of the organotin oxide film through oxidation, reduction, insertion, extraction, or other chemical reaction mechanisms to induce a chemical change within the EUV photoresist mask. In some instances, the reactive gaseous material may include carbon monoxide (CO), where the tin material can catalyze a reaction with CO. Without being limited to any theory, SnOC... x The compound reacts with CO to form a new compound SnOC x (CO) y Chemical reactions cause changes in the EUV photoresist mask, resulting in an increase in line density (CD). Some implementations improve the resistivity of new compounds in the EUV photoresist mask.

[0133] Reactive gaseous substances other than CO can be used to initiate the chemical reaction in EUV photoresist masks. Examples of useful reactive gaseous substances include, but are not limited to, air, water vapor (H2O), hydrogen peroxide (H2O2), carbon dioxide (CO2), oxygen (O2), ozone (O3), methane (CH4), methanol (CH3OH), ethanol (CH3CH2OH), nitrogen (N2), hydrogen (H2), ammonia (NH3), nitrous oxide (N2O), nitric oxide (NO), nitrogen dioxide (NO2), acetylacetone (C5H8O2), formic acid (CH2O2), acetic acid (CH3COOH), hydrogen cyanide (HCN), boron trichloride (BCl3), silicon tetrachloride (SiCl4), chlorine (Cl2), bromine (Br2), hydrogen chloride (HCl), hydrogen bromide (HBr), hydrogen iodide (HI), hydrogen fluoride (HF), fluoromethane (CH3F), difluoromethane (CH2F2), and combinations thereof. In some cases, reactive gaseous substances may include oxygen-containing gases, carbon-containing gases, hydrogen-containing gases, nitrogen-containing gases, halogen-containing gases, or combinations thereof. Other reactive gaseous substances may include metal precursors, such as tungsten hexafluoride (WF6), tin tetrachloride (SnCl4), molybdenum hexafluoride (MoF6), molybdenum dichloride (MoO2Cl2), and molybdenum chloride (MoCl5). Other reactive gaseous substances may include organometallic precursors, such as tetratetra(dimethylamide)tin (Sn(N(CH3)2)4), tetratetra(dimethylamide)hafnium (Hf(N(CH3)2)4), dimethylaluminum ((CH3)2Al), trimethylaluminum ((CH3)3Al), isopropoxytitanium (Ti(OCH(CH3)2)4), and carbonyltungsten (W(CO)2)4. x ), molybdenum carbonyl (Mo(CO)) x ), ruthenium carbonyl (Ru(CO)) x ), carbonyl iron (Fe(CO)) x (and combinations thereof). Therefore, in some cases, reactive gaseous substances may include metal halides or organometallic precursors, such as carbonyl metal precursors. Conventional polymer-based photoresist materials may not react with metal halides or certain organometallic precursors, but the metal-containing or metal oxide-containing photoresist materials of this disclosure may react more readily with metal halides and organometallic precursors. Without being limited by any theory, MO-M' bridges can be formed in the presence of M-OH bonds in organometallic photoresists, where M' originates from a metal precursor (e.g., a metal halide or organometallic precursor).

[0134] Reactive gaseous substances can co-flow with other gases. In some implementations, reactive gaseous substances can co-flow with inert gaseous substances (e.g., helium, neon, argon, or xenon). In some implementations, combinations of reactive gaseous substances can co-flow with each other. As an example, a halogen-containing gas (e.g., boron trichloride) can co-flow with a carbon-containing gas (e.g., methane). In another example, a metallic precursor (e.g., tungsten hexafluoride) can co-flow with a carbon-containing gas (e.g., difluoromethane). Reactive gaseous substances (alone or in combination with other reactive gaseous substances) can transform a photoresist mask into another material or selectively deposit a protective film on a photoresist mask.

[0135] In some implementations, reactive gaseous substances can be supplied to the processing chamber from a gas source fluidly coupled to the processing chamber. The gas source (e.g., a gas tank) can be fluidly coupled to the processing chamber via a gas supply line. The gaseous reactants can be premixed before entering the processing chamber or mixed after entering the processing chamber. In some implementations, the reactive gaseous substances can be generated in situ within the processing chamber. The gaseous reactants can react with each other to form reaction products, which react with a metal-containing photoresist mask to initiate a chemical change. Alternatively, the gaseous reactants can react with one or more chamber components (e.g., metal-based chamber piping) to form reaction products, which react with a metal-containing photoresist mask to initiate a chemical change. The gaseous reactants can be carbon-containing precursors that react with metal chamber components to form organometallic precursors. This reaction can be thermally driven to produce organometallic precursors. For example, carbon monoxide supplied to the processing chamber can react with iron-containing chamber piping to form carbonyl iron (Fe(CO)), which readily reacts with EUV photoresist masks. x This increases the line density (CD) of the EUV photoresist mask. Unrestricted by any theory, carbonyl iron causes iron oxide to deposit on the EUV photoresist mask. In another example, carbon monoxide or carbon dioxide supplied to the processing chamber can react with tungsten-containing chamber lines (e.g., hot wires) to form carbonyl tungsten (W(CO)), which readily reacts with the EUV photoresist mask. x ).

[0136] Chemical treatment of a metallized photoresist mask involving one or more reactive gaseous substances can be used in conjunction with one or both of thermal and plasma treatments. Given that thermal or plasma treatment alone may present advantages and disadvantages, these can be offset by further applying chemical treatment to the metallized photoresist mask. Specifically, chemical treatment can be combined with thermal treatment, causing one or more reactive gaseous substances to flow to the metallized photoresist mask at an elevated temperature. Although elevated temperature may decrease line CD, the one or more reactive gaseous substances can increase the line CD in the metallized photoresist mask. In fact, the increase in line CD caused by the one or more reactive gaseous substances may outweigh the decrease in line CD caused by elevated temperature. This results in a reduced dose-to-size ratio and a decrease in defect rate and roughness in the metallized photoresist mask. In some embodiments, chemical treatment can be combined with plasma treatment, causing free radicals and / or ions of the reactive gaseous substances to flow to the metallized photoresist mask. Free radicals and / or ions can enhance the reactivity of reactive gaseous substances with metal-containing photoresist masks. Metal-containing photoresist masks can be exposed to one or more reactive gaseous substances in plasma, which can alter the chemical composition of the mask and increase line density (CD). This can be achieved without compromising the defects or roughness of the metal-containing photoresist mask. The plasma can be applied at power levels that avoid damaging the substrate.

[0137] Surface or bulk reactions in a metal photoresist mask can be initiated by applying energy to the reaction. Some energy from thermal and / or plasma exposure may be sufficient to initiate a surface or bulk reaction. Accordingly, process conditions (e.g., temperature and plasma power) can be adjusted to achieve the desired results. In some implementations, the substrate temperature during chemical processing with one or more reactive gaseous substances may be between about 0°C and about 400°C, between about 50°C and about 300°C, or between about 100°C and about 250°C. In some implementations, the plasma power during chemical processing with one or more reactive gaseous substances may be less than about 6 kW, between about 50 W and about 4000 W, between about 50 W and about 1000 W, or between about 100 W and about 500 W.

[0138] Other process conditions, such as plasma frequency, exposure time, bias voltage, pressure, and flow rate, can be adjusted to facilitate chemical treatment using one or more reactive gaseous substances. In some implementations, a bias voltage less than about 800V, between about 0V and about 500V, between about 10V and about 400V, or between about 30V and about 300V can be applied. In some implementations, exposure to the one or more reactive gaseous substances can be for durations between about 1 second and about 10 minutes, between about 5 seconds and about 8 minutes, or between about 30 seconds and about 4 minutes. In some implementations, the chamber pressure can be between about 0.1 Torr and about 760 Torr, or in some cases between about 1 mTorr and about 100 mTorr. The first reactive gaseous substance can flow into the treatment chamber at a flow rate between about 1 sccm and about 1000 sccm, between about 2 sccm and about 500 sccm, or between about 5 sccm and about 300 sccm. Optional second reactive gas materials may co-flow into the processing chamber at flow rates between about 5 sccm and about 1000 sccm, between about 10 sccm and about 500 sccm, or between about 20 sccm and about 300 sccm. Optional inert gas materials may co-flow into the processing chamber at flow rates between about 20 sccm and about 2000 sccm, between about 30 sccm and about 1000 sccm, or between about 50 sccm and about 500 sccm. For example, carbon monoxide may flow into the processing chamber at a substrate temperature of about 240°C at a flow rate of about 500 sccm for a duration between about 20 seconds and about 5 minutes. Carbon monoxide may react with the EUV photoresist mask to alter the chemical composition of the EUV photoresist mask. In an alternative example, tungsten hexafluoride may be used instead of carbon monoxide to react with the EUV photoresist mask to alter the chemical composition of the photoresist mask. EUV photoresist masks can exhibit increased resistance during subsequent pattern transfer etching.

[0139] Figure 3 Some implementations of the disclosed method are shown. Figure 3 In the middle, boxes 302-310 indicate the relationship with... Figure 1 The same operation applies to boxes 102-110. The operation in box 312 represents the integrated dry development and pattern transfer (etching) operation, which is performed in a single processing chamber. Operation 312 can replace... Figure 1Operations 112, 114, and 116 are performed in this way. This improves productivity and allows for more effective control of defects, overlays, and CDs. Combining dry development and pattern transfer steps reduces metal outgassing, such as tin outgassing, without the need for additional post-dry development baking in separate processing chambers. Combining dry development and etching in a single chamber is counterintuitive because the process conditions required for each operation are drastically different, especially in terms of pressure. They are conventionally performed in different chambers using different processing tools to practically manage pressure requirements. Thermal processes require high pressure to achieve high etching rates. High partial pressure results in better selectivity. Conversely, for plasma processes, low pressure is required to achieve anisotropic etching. If performed in a single processing chamber, pressure drops of several orders of magnitude must be achieved rapidly over a period of approximately 1 to approximately 10 seconds. Dry development can be performed at pressures of approximately 400 to 500 mTorr; however, etching is performed at pressures of approximately 20 to 50 mTorr. Pressure drops can be achieved rapidly using throttle valves, dedicated pumps, multiple pumps, or by controlling the flow rate of process gas; in approximately ten seconds or less. In some implementations, the pressure drop occurs within 8, 7, 6, 5, 4, 3, or 2 seconds.

[0140] When the metal photoresist is a metal oxide (e.g., tin oxide), metal venting (e.g., tin venting) can be controlled without baking after dry development.

[0141] For the purposes of this disclosure, the term “metal” as used herein shall be understood to mean a conductor with a maximum resistivity of 500 microohm-cm, including metals and conductive metal salts, especially conductive metal nitrides, such as TiN.

[0142] "Tin oxides" in this article refers to tin oxides including Sn x O y Any and all possible stoichiometry, including both integer and non-integer values ​​of x and y. For example, "tin oxide" includes those with the formula SnO. n The term "tin oxides" can include compounds in which 1 ≤ n ≤ 2, where n can be an integer or a non-integer value. "Tin oxides" can include sub-stoichiometric compounds, such as SnO. 1.8 "Tin oxides" also include tin dioxide (SnO2 or tin oxide) and tin monoxide (SnO or tin oxide). "Tin oxides" also include natural and synthetic variants, and any and all crystalline and molecular structures. "Tin oxides" also includes amorphous tin oxides.

[0143] Figure 4 and 5An exemplary method for performing the integrated operations of block 312 is described in more detail. The operations of process 300 may be performed in different sequences and / or using different, fewer, or additional operations. One or more operations of process 300 may be used... Figure 6-9 The process may be performed using any of the aforementioned apparatuses. In some embodiments, the operation of process 300 may be implemented at least in part based on software stored in one or more non-transitory computer-readable media.

[0144] Figure 4 A process 400 for integrating dry development and etching in a single processing chamber is illustrated according to certain disclosed embodiments. Block 410 operates as thermal dry development. As described herein, dry development processes can be used to process films. Non-limiting processes may include those using halides, such as HCl or HBr-based processes. While this disclosure is not limited to any particular theory or operating mechanism, the method is understood to utilize the chemical reactivity of a dry-deposited EUV photoresist film with cleaning chemicals (e.g., HCl, HBr, and BCl3) under vapor or plasma conditions to form volatile products. Such volatile products can be removed by any means (e.g., by treatment with aqueous acids, as described herein). Dry-deposited EUV photoresist films can be removed at etching rates up to 1 nm / s. Rapid removal of dry-deposited EUV photoresist films with these chemicals is suitable for chamber cleaning, backside cleaning, bevel cleaning, and PR development. Although the membrane can be removed by vapor at various temperatures (e.g., HCl or HBr at temperatures above -10°C, or BCl3 at temperatures above 80°C), plasma can also be used to further accelerate or enhance reactivity.

[0145] In thermal developing processes, the substrate is exposed to dry developing chemicals (e.g., Lewis acid) in a vacuum chamber (e.g., an oven). Suitable chambers may include vacuum lines, dry developing hydrogen halide chemical gas lines (e.g., HBr, HCl), and heaters for temperature control. In some embodiments, the interior of the chamber may be coated with an anti-corrosion film, such as an organic polymer or inorganic coating. Such coatings are polytetrafluoroethylene (PTFE), for example, Teflon. TM Such materials can be used in the thermal processes described in this disclosure without the risk of removal due to plasma exposure.

[0146] Dry development process conditions can include reactant flow rates of 100 sccm to 500 sccm (e.g., 500 sccm HBr or HCl), temperatures of -10°C to 120°C (e.g., -10°C), pressures of 1 mTorr to 500 mTorr (e.g., 300 mTorr), and the absence of plasma, with a duration of approximately 10 seconds to 1 minute, depending on the photoresist film and its composition and properties. In some embodiments, the pressure is 400-500 mTorr for 10 to 20 seconds.

[0147] Between boxes 410 and 420, process path 415 represents a rapid pressure change process occurring within the chamber. The required pressure drop is achieved within the processing chamber, allowing high-pressure and low-pressure processes to occur in the same chamber. Pressure changes can be managed using throttle valves, dedicated pumps, multiple pumps, process gas flow control, or a combination of these technologies. If more than one pump is used, one pump can be a roughing pump and another can be a turbopump.

[0148] Following thermal dry development, the operation in box 420 indicates a plasma dry development step using O2 flash treatment. The plasma process includes voltage-coupled plasma (TCP), inductively coupled plasma (ICP), or capacitively coupled plasma (CCP) employing equipment and techniques known in the art. For example, the process can be performed at a pressure >0.5 mTorr (e.g., 1 mTorr to 100 mTorr) and a power level <1000 W (e.g., <500 W). The temperature can be from 30°C to 300°C (e.g., 30°C to 120°C), the flow rate from 100 to 1000 standard cubic centimeters per minute (sccm), for example, about 500 sccm, for a duration from 1 to 3000 seconds (e.g., 10 seconds to 600 seconds).

[0149] In the case where the halide reactant stream consists of hydrogen and halide gases, remote plasma / UV radiation is used to generate radicals from H2 and Cl2 and / or Br2, and the hydrogen and halide radicals flow into the reaction chamber to contact the patterned EUV photoresist on the substrate layer of the wafer. Suitable plasma power can be in the range of 100W to 500W without bias. It should be understood that although these conditions are suitable for some processing reactors, a wide range of process conditions can be used depending on the capacity of the processing reactor.

[0150] The O2 flash evaporation process of box 420 involves delivering a flash gas of oxygen (O2) at 1,000 sccm to 2,000 sccm to the processing chamber. In some embodiments, 100 to 3,000 watts of radio frequency power are delivered at 13.56 MHz to convert the flash gas into plasma. A pressure of 20 mTorr to 100 mTorr is provided. This back-side cleaning process may be referred to as an "O2 flash" operation due to the relatively fast power delivery time (from about 0.5 seconds to about 4 seconds). The O2 flash evaporation operation triggers pattern transfer.

[0151] Following pattern transfer, an optional wet cleaning process 430 can be performed to remove metal oxides and other contaminants. The wet cleaning process is performed after the chamber is opened. For back-side and bevel cleaning processes, vapor and / or plasma can be confined to specific areas of the wafer to ensure that only the back side and bevel are removed, while no film degradation occurs on the front side of the wafer. The removed dry-deposited EUV photoresist film typically consists of Sn, O, and C, but the same cleaning method can be extended to films of other metal oxide photoresists and materials. Furthermore, this method can also be used for film stripping and photoresist rework.

[0152] For wet cleaning, solutions include compounds such as tetramethylammonium hydroxide (TMAH), complexing amines such as ethylenediamine or diethylenetriamine, semi-aqueous fluoride strippers, or diluted hydrofluoric acid strippers. Metal oxides can be removed using acids such as citric acid, acetic acid, octanoic acid, or other organic or inorganic acids. Alternatively, very dilute (i.e., less than 0.1%) peroxide-containing acids, such as a mixture of sulfuric acid and hydrogen peroxide, can also be used. Combinations of any of the above-mentioned wet cleaning agents can also be used.

[0153] Figure 5 An alternative process 500 for integrating dry development and etching in a single processing chamber is illustrated according to certain disclosed embodiments. The operation of block 510 is represented above for… Figure 4 The thermal drying method described in box 410.

[0154] Between boxes 510 and 520, process path 515 represents a rapid pressure change process occurring within the chamber. As described in process path 415 above, the required pressure drop is achieved within the processing chamber, allowing high-pressure and low-pressure processes to occur in the same chamber. Pressure changes can be managed using throttle valves, dedicated pumps, multiple pumps, process gas flow control, or a combination of these technologies. If more than one pump is used, one of the pumps can be a roughing pump and one of the pumps can be a turbopump.

[0155] Following thermal drying development, the operation in frame 520 represents the plasma descaling step and pattern transfer. Descaling refers to undesirable carbon-based materials remaining on the substrate after photolithography, such as footings, stringers, or other forms of undesirable substrate surface roughness. Descaling can be removed using plasma atomic layer etching or thermal methods.

[0156] Operation 530 involves selective deposition of metals. Selective deposition can be used for photoresist repair, such as selective metal oxide deposition on photoresist for photoresist hardening; or to add more selectivity to the photoresist during pattern transfer. Metal oxides used for selective deposition include SnO. x .

[0157] Following selective deposition 530, an optional wet cleaning process 540, similar to the above, can be performed. Figure 4 The operation described in box 430.

[0158] The foregoing description is illustrative in nature and is not intended to limit the scope of this disclosure, its application, or use. The broad teachings of this disclosure can be implemented in various ways. Therefore, while this disclosure contains specific examples, its true scope should not be so limited, as other variations will become apparent upon reading the accompanying drawings, specification, and the following claims. It should be understood that one or more steps of the method may be performed in a different order (or simultaneously) without altering the principles of this disclosure. Furthermore, while the various embodiments are described above as having certain features, any one or more of such features described with respect to any embodiment of this disclosure may be implemented in any other embodiment and / or combined with features of any other embodiment, even if such combination is not explicitly described. In other words, the described embodiments are not mutually exclusive, and substitution of one or more embodiments for each other remains within the scope of this disclosure. Device

[0159] The apparatus of this disclosure is configured for post-development processing of a patterned metallized photoresist mask. The apparatus can be configured for other processing operations, such as deposition, bevel and backside cleaning, post-coating baking, EUV scanning, post-exposure baking, development, etching, and other operations. In some implementations, the apparatus is configured to perform multiple dry operations. In some implementations, the apparatus is configured to perform a combination of wet and dry operations. The apparatus may include a single wafer chamber or multiple stations within the same processing chamber. For multiple stations within the same processing chamber, multiple processing operations (such as the one described in this disclosure) may be performed at different stations within the same processing chamber. In some embodiments, the processing chamber for post-development processing of this disclosure may be in the same chamber as development, in the same chamber as pattern transfer etching, or in the same chamber as both development and pattern transfer etching.

[0160] An apparatus configured for post-development processing includes a processing chamber having a substrate support. The apparatus may include at least one reactive gas source in fluid communication with the processing chamber. The apparatus may include one or more gas lines for delivering one or more reactive gaseous substances. In some embodiments, the one or more reactive gaseous substances may include organic gaseous substances, organometallic gaseous substances, metal-containing gaseous substances, or combinations thereof. In some embodiments, the one or more reactive gaseous substances may include oxygen-containing gases, carbon-containing gases, hydrogen-containing gases, nitrogen-containing gases, halogen-containing gases, or combinations thereof. The one or more reactive gaseous substances may be delivered to the processing chamber via the one or more gas lines to process the post-development metal-containing photoresist mask. The apparatus may include one or more heating elements for temperature control. Such heating elements may be provided in the processing chamber and / or the substrate support. Alternatively, such heating elements may be provided outside the processing chamber. In some implementations, the apparatus may include a plasma source for generating plasma during the processing of the post-development metal-containing photoresist mask. In some implementations, the one or more reactive substances may selectively deposit a protective film on a metallized photoresist mask after development. The device may further include one or more sensors for sensing particle counts, wafer counts, thickness counts, or other parameters for triggering the end of the post-development processing.

[0161] Figure 6A schematic diagram of an exemplary processing station, according to some embodiments, for maintaining an environment suitable for photoresist development, photoresist treatment, and / or etching operations, is provided. For simplicity, processing station 600 is depicted as a standalone processing station having a processing chamber body 602 for maintaining a low-pressure environment. However, it should be understood that multiple processing stations 600 may be contained within a common low-pressure processing tool environment. Furthermore, it should be understood that in some embodiments, one or more hardware parameters of processing station 600 (including those discussed in detail below) may be programmatically adjusted via one or more computer controllers.

[0162] Multiple processing stations 600 can be contained within a common low-voltage processing tool environment. For example, Figure 7 An implementation scheme of the multi-station processing tool 700 is illustrated. In some implementation schemes, one or more hardware parameters of the processing tool 700 (including those discussed in detail below) can be programmatically adjusted by one or more computer controllers 750.

[0163] The processing station can be configured as a module in the cluster tool. Figure 9 A semiconductor process cluster tool architecture with vacuum integrated deposition and patterning modules is described, suitable for implementing the schemes described herein. Such a cluster processing tool architecture may include resist deposition, resist exposure (EUV scanner), resist development, resist reprocessing, and etching modules, as described above and referred to below. Figure 6 and 7 Further description.

[0164] return Figure 6 The processing station 600 is in fluid communication with a reactant delivery system 601a, which delivers process gas to the nozzle 606. The reactant delivery system 601 optionally includes a mixing vessel 604 for mixing and / or regulating the process gas for delivery to the nozzle 606. One or more mixing vessel inlet valves 620 control the introduction of process gas into the mixing vessel 604. In cases where plasma exposure is used, plasma can also be delivered to the nozzle 606 or plasma can be generated in the processing station 600. As mentioned above, non-plasma thermal exposure is advantageous in at least some implementations.

[0165] Figure 6An optional vaporization point 603 is included for vaporizing the liquid reactants to be supplied to the mixing vessel 604. In some implementations, a liquid flow controller (LFC) may be located upstream of the vaporization point 603 to control the mass flow rate of the liquid used for vaporization and delivery to the treatment station 600. For example, the LFC may include a thermal mass flow meter (MFM) located downstream of the LFC. The plunger valve of the LFC can then be adjusted in response to a feedback control signal provided by a proportional-integral-derivative (PID) controller (electrically connected to the MFM).

[0166] Nozzle 606 distributes process gas toward substrate 612. Figure 6 In the illustrated implementation, the substrate 612 is located below the nozzle 606 and is shown placed on the base 608. The nozzle 606 may have any suitable shape and may have any suitable number and arrangement of ports to distribute process gases to the substrate 612.

[0167] In some implementations, the base 608 can be raised or lowered to expose the substrate 612 in the volume 607 between the substrate 612 and the nozzle 606. It should be understood that in some implementations, the base height can be adjusted programmatically via a suitable computer controller. In some implementations, the nozzle 606 can have multiple gas chamber volumes with multiple temperature controls.

[0168] In some implementations, the base 608 can be temperature-controlled via the heater 610. In some implementations, during post-development processing, the base 608 can be heated to temperatures greater than 0°C and up to 300°C, for example, from 50°C to 280°C, such as from about 100°C to 240°C, as described in the disclosed implementations. In some implementations, the heater 610 of the base 608 may include multiple independently controllable temperature control zones.

[0169] Furthermore, in some implementations, pressure control for processing station 600 can be provided by butterfly valve 618. For example, in... Figure 6 In the implementation shown, butterfly valve 618 regulates the vacuum provided by a downstream vacuum pump (not shown). However, in some implementations, pressure control of processing station 600 can also be adjusted by changing the flow rate of one or more gases introduced into processing station 600.

[0170] In some implementations, the position of the nozzle 606 can be adjusted relative to the base 608 to change the volume between the substrate 612 and the nozzle 606. Furthermore, it should be understood that the vertical position of the base 608 and / or the nozzle 606 can be changed by any suitable mechanism within the scope of this disclosure. In some implementations, the base 608 may include a rotation axis for rotating the orientation of the substrate 612. It should be understood that in some implementations, one or more of these exemplary adjustments can be performed programmatically by one or more suitable computer controllers.

[0171] In applications where plasma can be used, such as in sludge removal, processing, or smoothing operations, nozzle 606 and base 608 are electrically connected to a radio frequency (RF) power source 614 and a matching network 616 to power the plasma. In some implementations, the energy of the plasma can be controlled by controlling one or more of the following: the pressure of the processing station, the concentration of the gas, the RF source power, the RF source frequency, and the timing of the plasma power pulses. For example, the RF power source 614 and matching network 616 can operate at any suitable power to form a plasma with the desired free radical composition. Examples of suitable power are up to approximately 1000 W.

[0172] In some implementations, instructions for the computer controller can be provided via input / output control (IOC) sequencing instructions. In one example, instructions for setting conditions for a process stage can be included in the corresponding formulation stage of the process formulation. In some cases, process formulation stages can be arranged sequentially such that all instructions for a process stage are executed concurrently with that process stage. In some implementations, a formulation stage may include instructions for setting one or more reactor parameters. For example, a formulation stage may include instructions for setting the flow rate of an etching gas such as hydrogen halide, and time delay instructions for the formulation stage. In some implementations, the controller may include the following regarding... Figure 7 The controller 750 describes any of the features.

[0173] As mentioned above, one or more processing stations can be included in a multi-station processing tool. Figure 7A schematic diagram of an implementation of a multi-station processing tool 700 is shown, comprising an inbound loading lock 702 and an outbound loading lock 704, one or both of which may contain a remote plasma source. An atmospheric pressure manipulator 706 is configured to move a wafer from a pod loaded via an atmospheric port 710 into the inbound loading lock 702. The wafer is placed on a base 712 within the inbound loading lock 702 by the manipulator 706, the atmospheric port 710 is closed, and the loading lock is evacuated. When the inbound loading lock 702 contains a remote plasma source, the wafer can be exposed to remote plasma processing within the loading lock to treat the silicon nitride surface before being introduced into the processing chamber 714. Additionally, the wafer can also be heated within the inbound loading lock 702, for example, to remove moisture and adsorbed gases. Next, a chamber transfer port 716 leading to the processing chamber 714 is opened, and another manipulator (not shown) places the wafer into a reactor on a base at the first station shown in the reactor diagram for processing. Despite Figure 7 The implementation shown includes load locks, but it should be understood that in some implementations, the wafer can go directly into the processing station.

[0174] The depicted processing room 714 contains 4 processing stations. Figure 7 The implementations shown are numbered 1 to 4. Each station has a heated base (shown as 718 for station 1) and a gas line inlet. It should be understood that in some implementations, each processing station may have different or multiple uses. For example, in some implementations, the processing station may be switchable between dry development and etching process modes. Additionally or alternatively, in some implementations, processing chamber 714 may contain one or more matched pairs of dry development and etching processing stations. Although the depicted processing chamber 714 contains four stations, it is to be understood that a processing chamber according to this disclosure may have any suitable number of stations. For example, in some implementations, the processing chamber may have five or more stations, while in other implementations, the processing chamber may have three or fewer stations.

[0175] Figure 7 One implementation of a wafer handling system 790 for transferring wafers within a processing chamber 714 is depicted. In some implementations, the wafer handling system 790 can transfer wafers between various processing stations and / or between a processing station and a loading lock. It should be understood that any suitable wafer handling system can be employed. Non-limiting examples include wafer turntables and robotic arms for handling wafers. Figure 7An implementation scheme for a system controller 750 (e.g., a system controller) used to control the process conditions and hardware status of the processing tool 700 is also illustrated. The controller 750 may include one or more memory devices 756, one or more mass storage devices 754, and one or more processors 752. The processor 752 may include a CPU or computer, analog and / or digital input / output connections, a stepper motor controller board, etc.

[0176] In some implementations, controller 750 controls all activities of processing tool 700. Controller 750 executes system control software 758, stored in mass storage device 754, loaded into memory device 756, and executed by processor 752. Alternatively, the control logic can be hard-coded in controller 750. Application-specific integrated circuits (ASICs), programmable logic devices (e.g., field-programmable gate arrays, or FPGAs) can be used for these purposes. In the following discussion, whether "software" or "code" is used, functionally equivalent hard-coded logic can be substituted. System control software 758 may contain instructions for controlling the timing, gas mixtures, gas flow rates, chamber and / or station pressures, chamber and / or station temperatures, wafer temperatures, target power levels, RF power levels, substrate pedestals, chuck and / or pedestal positions, and other parameters of a specific process performed by processing tool 700. System control software 758 can be configured in any suitable manner. For example, various processing tool component subroutines or control objects can be written to control the operation of processing tool components used to perform various processing tool processes. The system control software 758 can be coded in any suitable computer-readable programming language.

[0177] In some implementations, the system control software 758 may include input / output control (IOC) sequencing instructions for controlling the various parameters described above. In some implementations, other computer software and / or programs may be employed in conjunction with mass storage devices 754 and / or memory devices 756 associated with the system controller 750. Examples of programs or program segments used for this purpose include substrate positioning programs, process gas control programs, pressure control programs, heater control programs, and plasma control programs.

[0178] The substrate positioning procedure may include program code for a processing tool assembly that loads the substrate onto the base 718 and controls the spacing between the substrate and other parts of the processing tool 700.

[0179] The process gas control program may include code for controlling the composition and flow rate of the process gas and optionally code for directing the gas into one or more processing stations prior to deposition to stabilize the pressure within the processing stations. The pressure control program may include code for controlling the pressure within the processing station by adjusting, for example, throttling valves in the processing station's exhaust system, the airflow into the processing station, etc.

[0180] The heater control program may contain code for controlling the current flowing to the heating unit used to heat the substrate. Alternatively, the heater control program may control the delivery of a heat transfer gas (such as helium) toward the substrate.

[0181] The plasma control program may contain code for setting the RF power level applied to one or more processing electrodes within the processing station, according to the implementation described herein.

[0182] The pressure control program may contain code for maintaining the pressure within the reaction chamber according to the implementation scheme described herein.

[0183] In some implementations, a user interface may be associated with the controller 750. The user interface may include a display screen, a graphical software display of the device and / or processing conditions, and user input devices such as pointing devices, keyboards, touch screens, and microphones.

[0184] In some implementations, the parameters regulated by the system controller 750 relate to process conditions. Non-limiting examples include process gas composition and flow rate, temperature, pressure, plasma conditions (e.g., RF bias power level), etc. These parameters can be provided to the user in the form of a recipe, which can be input using the user interface.

[0185] Signals used for process monitoring can be provided from various processing tool sensors via analog and / or digital input connections of controller 750. Signals used for process control can be output via analog and digital output connections of processing tool 700. Non-limiting examples of processing tool sensors that can be monitored include mass flow controllers, pressure sensors (e.g., pressure gauges), thermocouples, and the like. Appropriately programmed feedback and control algorithms can be used with data from these sensors to maintain process conditions.

[0186] The controller 750 can provide program instructions for performing the above-described deposition process. These program instructions can control various process parameters, such as DC power level, RF bias power level, pressure, and temperature. The instructions can control these parameters to operate the development, cleaning, and / or etching processes according to various implementation schemes described in this invention.

[0187] The controller 750 will typically include one or more memory devices and one or more processors configured to execute instructions so that the device will perform the methods described according to the disclosed implementation. A machine-readable medium containing instructions for controlling the processing operations according to the disclosed implementation may be coupled to the controller 750.

[0188] In some implementations, controller 750 is part of a system, which may be part of the examples described above. Such a system may include semiconductor processing apparatus, which includes one or more processing tools, one or more chambers, one or more platforms for processing, and / or specific processing components (wafer pedestals, gas flow systems, etc.). These systems may be integrated with electronics for controlling their operation before, during, and after the processing of semiconductor wafers or substrates. The electronics may be referred to as a “controller”, which can control various components or sub-components of one or more systems. Depending on the processing conditions and / or system type, controller 750 may be programmed to control any process disclosed herein, including the delivery of processing gases, temperature settings (e.g., heating and / or cooling), pressure settings, vacuum settings, power settings, radio frequency (RF) generator settings, RF matching circuit settings, frequency settings, flow rate settings, fluid delivery settings, position and operation settings, wafer transfer tools and other transfer tools, and / or loading locks that are connected to or docked with a specific system.

[0189] In a broad sense, the controller 750 can be defined as an electronic device having various integrated circuits, logic, memory, and / or software for receiving instructions, issuing instructions, controlling operations, enabling cleaning operations, enabling endpoint measurements, etc. Integrated circuits may include chips in the form of firmware storing program instructions, digital signal processors (DSPs), chips defined as application-specific integrated circuits (ASICs), and / or one or more microprocessors or microcontrollers that execute program instructions (e.g., software). Program instructions may be instructions sent to the controller in the form of various individual settings (or program files), which define operating parameters for performing a specific process on or for a semiconductor wafer or system. In some implementations, the operating parameters may be part of a recipe defined by a process engineer to complete one or more processing steps during the fabrication of one or more layers, materials, metals, oxides, silicon, silicon dioxide, surfaces, circuits, and / or wafer dies.

[0190] In some implementations, controller 750 may be part of or coupled to a computer integrated with, coupled to, or otherwise networked to the system, or a combination thereof. For example, controller 750 may be in the “cloud” or be all or part of a fab host system, allowing remote access to wafer processing. The computer may enable remote access to the system to monitor the current progress of manufacturing operations, examine the history of past manufacturing operations, examine trends or performance criteria of multiple manufacturing operations, change parameters of the current process, set processing steps to follow the current process, or start a new process. In some examples, a remote computer (e.g., a server) may provide process recipes to the system via a network (which may include a local network or the Internet). The remote computer may include a user interface that enables input or programming of parameters and / or settings, which are then sent from the remote computer to the system. In some examples, the controller receives instructions in the form of data specifying parameters for each processing step to be performed during one or more operations. It should be understood that the parameters may be specific to the type of process to be performed and the type of tool to which the controller is configured to interface with or control the tool. Therefore, as described above, a controller can be distributed, for example, by comprising one or more discrete controllers networked together and operating toward a common purpose (such as the process and control described herein). An example of a distributed controller for such a purpose is one or more integrated circuits on-site communicating with one or more integrated circuits remotely (e.g., at the platform level or as part of a remote computer), which together control the process on-site.

[0191] Exemplary systems may include, but are not limited to, plasma etching chambers or modules, deposition chambers or modules, rotary rinsing chambers or modules, metal plating chambers or modules, cleaning chambers or modules, chamfering edge etching chambers or modules, physical vapor deposition (PVD) chambers or modules, chemical vapor deposition (CVD) chambers or modules, ALD chambers or modules, atomic layer etching (ALE) chambers or modules, ion implantation chambers or modules, track chambers or modules, EUV lithography chambers (scanners) or modules, developing chambers or modules, and any other semiconductor processing systems that may be associated with or used for the manufacture and / or preparation of semiconductor wafers.

[0192] As described above, depending on one or more processing steps to be performed by the tool, the controller may communicate with one or more other tool circuits or modules, other tool components, cluster tools, other tool interfaces, adjacent tools, neighboring tools, tools located throughout the plant, a host computer, another controller, or tools used in the transport of materials to and from the tool location and / or loading port in the semiconductor manufacturing plant.

[0193] An ICP reactor is described herein, which may be suitable for etching operations in certain implementations. Although an ICP reactor is described herein, it should be understood that a capacitively coupled plasma reactor may also be used in some implementations.

[0194] Figure 8 A schematic cross-sectional view of an inductively coupled plasma device 800 is shown, which is suitable for implementing certain implementation schemes or aspects of implementation schemes, such as dry development, post-development processing, and / or etching. In other implementation schemes, other tools or tool types with the capability to perform the dry development, post-development processing, and / or etching processes described herein may be used.

[0195] The inductively coupled plasma device 800 includes a main processing chamber 824, structurally defined by a chamber wall 801 and a window 811. The chamber wall 801 may be made of stainless steel, aluminum, or plastic. The window 811 may be made of quartz or other dielectric materials. An optional internal plasma grid 850 divides the main processing chamber into an upper sub-chamber 802 and a lower sub-chamber 803. In most implementations, the plasma grid 850 can be removed, thereby utilizing the chamber space formed by both sub-chambers 802 and 803. A chuck 817 is positioned in the lower sub-chamber 803 near its bottom inner surface. The chuck 817 is configured to receive and hold a semiconductor wafer 819 on which etching and deposition processes are performed. The chuck 817 may be an electrostatic chuck used to support the wafer 819 when it is present. In some implementations, an edge ring (not shown) surrounds the chuck 817 and has an upper surface that is substantially coplanar with the top surface of the wafer 819 (when the wafer is present above the chuck 817). The chuck 817 also includes electrostatic electrodes for clamping and releasing the wafer 819. Filters and DC clamping power sources (not shown) may be provided for this purpose. Other control systems may also be provided for lifting the wafer 819 away from the chuck 817. The chuck 817 can be charged with an RF power supply 823. The RF power supply 823 is connected to a matching circuit 821 via a connector 827. The matching circuit 821 is connected to the chuck 817 via a connector 825. In this way, the RF power supply 823 is connected to the chuck 817. In various implementations, the bias power supply of the electrostatic chuck may be set to approximately 50V, or a different bias power supply depending on the processing performed according to the disclosed implementation. For example, the bias power supply can be between about 20V and about 100V, or between about 30V and about 150V.

[0196] The element used for plasma generation includes a coil 833 positioned above window 811. In some implementations, the coil is not used. The coil 833 is made of a conductive material and includes at least one full turn. Figure 8The example of coil 833 shown includes three turns. The cross-section of coil 833 is shown with symbols; coils with the "X" symbol extend rotatably into the page, while coils with the "●" symbol extend rotatably out of the page. The elements for plasma generation also include an RF power supply 841 configured to provide RF power to coil 833. Generally, RF power supply 841 is connected to matching circuit 839 via connector 845. Matching circuit 839 is connected to coil 833 via connector 843. In this way, RF power supply 841 is connected to coil 833. An optional Faraday shield 849 is positioned between coil 833 and window 811. Faraday shield 849 can be held in a spaced-apart relationship relative to coil 833. In some implementations, Faraday shield 849 is positioned directly above window 811. In some implementations, Faraday shield 849 is between window 811 and chuck 817. In some implementations, the Faraday shield 849 and the coil 833 are not kept separate. For example, the Faraday shield 849 may be directly below the window 811 without gaps. Each of the coil 833, the Faraday shield 849, and the window 811 is configured to be substantially parallel to each other. The Faraday shield 849 prevents metal or other substances from depositing on the window 811 of the processing chamber 824.

[0197] Process gases can flow into the processing chamber through one or more main gas inlets 860 located in the upper sub-chamber 802 and / or through one or more side gas inlets 870. Similarly, although not explicitly shown, similar gas inlets can be used to supply process gases to the capacitively coupled plasma processing chamber. A vacuum pump, such as a single-stage or two-stage dry mechanical pump and / or turbomolecular pump 840, can be used to extract process gases from the processing chamber 824 and maintain pressure within the processing chamber 824. For example, this vacuum pump can be used to vent the lower sub-chamber 803 during purging operations. Valve-controlled conduits can be used to fluidly connect the vacuum pump to the processing chamber 824 to selectively control the application of the vacuum environment provided by the vacuum pump. This can be done using closed-loop controlled flow-limiting devices such as throttle valves (not shown) or pendulum valves (not shown) during plasma processing. Similarly, a vacuum pump and valves that are controlled and fluidly connected to the capacitively coupled plasma processing chamber can also be used. The wide range of pressures that can be modulated in the combined dry development and etching processing chamber can be achieved using a variable speed vacuum system, a throttle valve, by adjusting the process gas flow rate, or by using two pressure regulation systems.

[0198] During operation of apparatus 800, one or more process gases may be supplied through gas inlets 860 and / or 870. In some implementations, process gases may be supplied only through the main gas inlet 860 or only through the side gas inlet 870. In some cases, the gas inlets shown in the figure may be replaced by more complex gas inlets, such as one or more nozzles. The Faraday shield 848 and / or optional grid 850 may include internal channels and orifices that allow process gases to be delivered to the processing chamber 824. One or both of the Faraday shield 848 and optional grid 850 may serve as nozzles for delivering process gases. In some implementations, a liquid vaporization and delivery system may be located upstream of the processing chamber 824, such that once a liquid reactant or precursor is vaporized, the vaporized reactant or precursor is introduced into the processing chamber 824 through gas inlets 860 and / or 870.

[0199] Radio frequency (RF) power is supplied from RF power supply 841 to coil 833 to allow RF current to flow through coil 833. The RF current flowing through coil 833 generates an electromagnetic field around coil 833. This electromagnetic field generates an induced current within upper sub-chamber 802. The generated ions and free radicals interact physically and chemically with wafer 819 to etch features of the wafer and selectively deposit layers on wafer 819.

[0200] If a plasma grid 850 is used such that both an upper sub-chamber 802 and a lower sub-chamber 803 exist, an induced current acts on the gas present in the upper sub-chamber 802 to generate an electron-ion plasma in the upper sub-chamber 802. An optional internal plasma grid 850 limits the amount of hot electrons in the lower sub-chamber 803. In some implementations, the device 800 is designed and operated such that the plasma present in the lower sub-chamber 803 is an "ion-ion" plasma.

[0201] Both the upper electron-ion plasma and the lower ion-ion plasma can contain both cations and anions, but the ion-ion plasma will have a greater anion-to-cation ratio. Volatile etching and / or deposition byproducts can be removed from the lower sub-chamber 803 via port 822. The chuck 817 disclosed herein can operate in a temperature range ranging from about 10°C to about 250°C. This temperature will depend on the processing operation and specific formulation.

[0202] When installed in a cleanroom or manufacturing plant, device 800 can be coupled to facilities (not shown). Such facilities include piping that provides process gases, vacuum, temperature control, and environmental particulate control. These facilities are coupled to device 800 when installed in the target manufacturing plant. Additionally, device 800 can be coupled to a transfer chamber, allowing a robot to use typical automated transfer of semiconductor wafers into and out of device 800.

[0203] In some implementations, controller 830 (which may include one or more physical or logic controllers) controls some or all of the operation of processing chamber 824. Controller 830 may include one or more memory devices and one or more processors. In some implementations, device 800 includes a switching system for controlling flow rate and duration when performing the disclosed implementations. In some implementations, device 800 may have a switching time of up to about 500 ms or up to about 750 ms. The switching time may depend on the flowing chemical substance, formulation selection, reactor architecture, and other factors.

[0204] In some implementations, controller 830 is part of the system, and may be a part of the example above. Several aspects of controller 830 have been described above.

[0205] EUVL patterning can be performed using any suitable tool commonly referred to as a scanner. EUVL patterning tools can be standalone devices for moving a substrate in and out to perform the deposition and etching described herein. Alternatively, as described below, EUVL patterning tools can be modules on a larger, multi-part tool.

[0206] Figure 9 A semiconductor process cluster tool architecture 900 is described, featuring vacuum-integrated deposition, patterning, and processing modules that interface with vacuum transfer modules, suitable for implementing the processes described herein. The arrangement of transfer modules for “transferring” wafers between multiple storage devices and processing modules can be referred to as a “cluster tool architecture” system. Depending on the specific process requirements, the deposition, patterning, and processing modules are vacuum-integrated. Other modules (e.g., for etching) may also be included on this cluster.

[0207] The vacuum transfer module (VTM) 938 interfaces with four processing modules 920a-920d, each optimized to perform various manufacturing processes. As an example, processing modules 920a-920d can be used to perform deposition, vaporization, ELD, dry development, cleaning, etching, processing, stripping, and / or other semiconductor processes. For example, module 920a can be an ALD reactor operable to perform the non-plasma-based thermal atomic layer deposition described herein. Module 920b can be a PECVD tool. It should be understood that the figures are not necessarily drawn to scale.

[0208] Gas chambers 942 and 946 (also known as loading chambers or transfer modules) interface with the VTM938 and patterning module 940. This tooling architecture allows workpieces (such as semiconductor substrates or wafers) to be transferred under vacuum so as not to react before exposure. The integration of the deposition module with the lithography tooling is facilitated by the fact that EUVL requires significantly reduced pressures, given the strong optical absorption of incident photons by ambient gases (such as H2O, O2, etc.).

[0209] As described above, this integrated architecture is only one possible implementation of the tools used to perform the aforementioned processes. These processes can also be implemented using more conventional standalone EUVL scanners and deposition reactors, either independently or integrated as modules with other tools (e.g., etching, stripping, etc.) within a cluster architecture, as shown in the reference [reference]. Figure 9 The aforementioned (but without an integrated patterning module).

[0210] Gas lock 942 can be an "output" load lock, referring to the transfer of substrate from VTM 938 used by deposition module 920a to patterning module 940, while gas lock 946 can be an "input" load lock, referring to the transfer of substrate from patterning module 940 back to VTM 938. Input gas lock 946 can also serve as a joint to the outside of the tool for substrate entry and exit. Each processing module has a facet that interfaces with VTM 938. For example, deposition processing module 920a has facet 936. Within each facet, sensors (e.g., sensors 1-18 shown in the figure) are used to detect the passage of wafer 926 as it moves between corresponding stations. Patterning module 940 and gas locks 942, 946 may similarly be fitted with additional facets and sensors (not shown).

[0211] The main VTM robot 922 transfers wafers 926 between modules (including gas locks 942 and 946). In one implementation, robot 922 has one arm, while in another, it has two arms, each with an end effector 924 to pick up and transport wafers (e.g., wafer 926). A front-end robot 944 is used to transfer wafers 926 from output gas lock 942 to patterning module 940 and from patterning module 940 to input gas lock 946. The front-end robot 944 can also transfer wafers 926 between the input loading lock and the tool exterior for substrate loading and unloading. Because the input gas lock module 946 is adaptable to environments between atmospheric and vacuum, wafers 926 can move between these two pressure environments without damage.

[0212] It should be noted that EUVL tools typically operate under higher vacuum compared to deposition tools. If this is the case, it is desirable to increase the vacuum environment of the substrate during transfer between the deposition and EUVL tools to allow the substrate to be degassed before entering the patterning tool. The output gas lock 942 provides this functionality by maintaining the transferred wafer at a lower pressure (not exceeding the pressure in the patterning module 940) for a period of time and evacuating any off-gassing, ensuring that the optical components of the patterning module 940 are not contaminated by off-gassing from the substrate. A suitable pressure for the output off-gas lock is no more than 1E-8 Torr.

[0213] In some implementations, controller 950 (which may include one or more physical or logical controllers) controls some or all of the operations of the cluster tools and / or their separate modules. It should be noted that the controller may be local to the cluster architecture, located outside the cluster architecture on a manufacturing floor, or located remotely and connected to the cluster architecture via a network. Controller 950 may include one or more memory devices and one or more processors. The processor may include a central processing unit (CPU) or computer, analog and / or digital input / output connections, stepper motor control boards, and other similar components. Multiple instructions for implementing appropriate control operations are executed on the processor. These instructions may be stored on a memory device connected to the controller or provided via a network. In some implementations, the system controller executes system control software.

[0214] System control software may include timing instructions for any aspect of the operation of a control tool or module, specifying the application and scale. The system control software can be configured in any suitable manner. For example, various processing tool component subroutines or control objects can be written to control the operation of processing tool components required to implement various processing tool programs. The system control software can be coded in any suitable computer-readable programming language. In some implementations, the system control software includes input / output control (IOC) sequence instructions to control the various parameters described above. For example, each stage of a semiconductor manufacturing process may include one or more instructions executed by the controller. For example, instructions for setting process conditions for condensation, deposition, vaporization, patterning, and / or etching stages may be included in the corresponding formulation stages.

[0215] In various implementations, an apparatus for post-development processing is provided. This apparatus may include a processing chamber for patterning, processing, deposition, and etching, and a controller including instructions for post-development processing of the patterned photoresist mask. The instructions may include encoding for processing the developed patterned metallic photoresist mask in the processing chamber. Such processing may include thermal treatment, plasma treatment, chemical treatment, or selective deposition of a protective layer on the patterned metallic photoresist mask.

[0216] It should be noted that the computer controlling wafer movement can be local to the cluster architecture, located outside the cluster architecture on a manufacturing floor, or located remotely and connected to the cluster architecture via a network. (The above text is about...) Figure 6 , Figure 7 or Figure 8 The controller described by either of these is available Figure 9 This can be achieved using tools within the framework. Further implementation schemes

[0217] The apparatus and processes described herein can be used in conjunction with photolithographic patterning tools or processes, for example, for the fabrication or manufacture of semiconductor devices, displays, LEDs, photovoltaic panels, etc. Typically, although not necessarily, these apparatus and processes will be used together or operated in a common manufacturing facility. Photolithographic patterning of a film typically involves some or all of the following steps, each step enabling multiple feasible tools: (1) applying a photoresist to a workpiece, i.e., a substrate, using a spin coater or spray coater; (2) curing the photoresist using a hot plate or oven or a UV curing tool; (3) exposing the photoresist to visible light or ultraviolet or X-rays using a tool such as a wafer stepper; (4) developing the photoresist to selectively remove the photoresist and thereby pattern it using a tool such as a wet cleaning station; (5) transferring the photoresist pattern onto the underlying film or workpiece using a dry or plasma-assisted etching tool; and (6) removing the photoresist using a tool such as an RF or microwave plasma stripper. in conclusion

[0218] In the preceding description, several specific details have been set forth to provide a thorough understanding of the presented implementation scheme. The disclosed implementation scheme may be practiced without some or all of these specific details. In other instances, known process operations are not described in detail to avoid unnecessarily obscuring the disclosed implementation scheme. Although the disclosed implementation scheme is described in conjunction with specific implementation schemes, it should be understood that it is not intended to limit the disclosed implementation scheme.

[0219] While the above embodiments have been described in detail to a certain extent for clarity of understanding, it will be apparent that certain variations and modifications may be made within the scope of the appended claims. It should be noted that there are many alternative processes, systems, and apparatuses for implementing the embodiments of the invention. Therefore, the embodiments of the invention should be considered illustrative rather than restrictive, and are not limited to the details given herein.

[0220] The following claims are provided to further illustrate certain embodiments of this disclosure. This disclosure is not necessarily limited to these embodiments.

Claims

1. An apparatus for integrating dry developing and etching semiconductor processes into a single processing chamber, comprising: One or more processing chambers; One or more pressure regulating devices; One or more pumps, which are fluidly coupled to the pressure regulating device; Plasma processing system; One or more gas inlets leading to the processing chamber and associated flow control hardware; as well as The controller has at least one processor and memory, wherein The at least one processor and the memory are communicatively connected to each other. The at least one processor is operatively connected to the associated flow control hardware, and the memory stores computer-executable instructions for controlling the at least one processor to at least control the associated flow control hardware to: Thermal drying development is performed in the processing chamber at a first pressure. Plasma dry development and etching are performed in the same processing chamber at a second pressure lower than the first pressure. The pressure in the same processing chamber is changed from the first pressure to the second pressure in ten seconds or less; as well as To keep one or more process parameters consistent.

2. The apparatus of claim 1, wherein the one or more pressure regulating devices include a pressure control valve assembly.

3. The apparatus of claim 2, wherein the pressure control valve assembly includes a throttle valve.

4. The apparatus of claim 1, wherein the one or more pumps comprise a roughing pump and a turbo pump.

5. The apparatus of claim 4, wherein the first pressure is five to one hundred and fifty times higher than the second pressure.

6. The apparatus of claim 1, wherein the one or more process parameters include pumping, gas delivery, or a combination of pumping and gas delivery.

7. An apparatus for processing a metallic photoresist, comprising: One or more processing chambers; One or more pressure regulating devices; One or more pumps, which are fluidly coupled to the pressure regulating device; One or more gas inlets leading to the processing chamber and associated flow control hardware; Plasma processing system; as well as The controller has at least one processor and memory, wherein The at least one processor and the memory are communicatively connected to each other. The at least one processor is operatively connected to the associated flow control hardware, and the memory stores computer-executable instructions for controlling the at least one processor to at least control the associated flow control hardware to: Thermal drying development is performed in the processing chamber at a first pressure. Plasma dry development and etching are performed in the same processing chamber at a second pressure lower than the first pressure. The pressure in the same processing chamber is adjusted from the first pressure to the second pressure in ten seconds or less. as well as After plasma dry development and etching, the pressure in the same processing chamber is returned from the second pressure to the first pressure within twenty seconds or less. as well as To keep one or more process parameters consistent.

8. The apparatus of claim 7, wherein the plasma processing system comprises a radio frequency power amplifier.

9. The apparatus of claim 8, wherein the radio frequency power amplifier operates continuously or in pulses.

10. A method for processing a semiconductor substrate, comprising: A patterned photoresist is provided on a semiconductor substrate in a processing chamber; The patterned photoresist is thermally dried and developed using process gas under a first pressure to form a thermally dried patterned photoresist. as well as Under a second pressure, the patterned resist after thermal dry development is subjected to plasma dry development and etched with an etchant to form a patterned substrate; The thermal dry development, plasma dry development, and etching are all performed in the same processing chamber. Prior to etching, the processing chamber transitions from the first pressure to the second pressure within ten seconds or less, and returns to the first pressure within twenty seconds or less after etching; and The patterned photoresist is a metal-containing photoresist.

11. The method of claim 10, wherein the first pressure is about 200 mTorr to 500 mTorr, and the second pressure is about 20 mTorr to 50 mTorr.

12. The method of claim 10, wherein the metal-containing photoresist comprises photopatterned EUV-sensitive organometallic oxide, photopatterned EUV-sensitive metal oxide, or a thin-film EUV resist containing an organometallic film.

13. The method of claim 12, wherein the optically patterned EUV-sensitive metal oxide comprises tin oxide.

14. The method of claim 13, wherein tin release from the tin oxide is mitigated.

15. The method of claim 10, further comprising selective metal deposition.

16. The method of claim 10, wherein the etching comprises exposure to etchant plasma.

17. The method of claim 16, wherein the etchant plasma comprises a hard mask aperture gas.

18. The method of claim 17, wherein the hard mask aperture gas comprises carbonyl sulfide, oxygen, carbon dioxide, nitrogen, hydrogen, or a combination thereof.

19. The method of claim 18, wherein the hard mask aperture gas comprises oxygen plasma.

20. The method of claim 19, wherein the duration of exposure to the oxygen plasma is from about 0.5 seconds to about 4 seconds.

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