Wafer manufacturing method and device

By optimizing the etching parameters in the alkaline wet etching process, the problem of copper contamination during wafer manufacturing was solved, improving device performance and yield.

CN120977870APending Publication Date: 2025-11-18XIAN ESWIN MATERIAL TECHNOLOGY CO LTD
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Patent Information

Application Number
CN202511025878.5
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2025-07-24
Publication Date
2025-11-18

AI Technical Summary

Technical Problem

In the wafer manufacturing process, copper contamination in alkaline wet etching is difficult to control effectively, leading to a decrease in device performance and a reduction in yield.

Method used

By optimizing the etching parameters of silicon wafers in the alkaline wet etching process, especially the combination of etching temperature and concentration, the optimal solution for bulk copper residue was determined, thereby reducing copper contamination.

Benefits of technology

This effectively reduces the amount of residual copper on the wafer, improving device performance and yield.

✦ Generated by Eureka AI based on patent content.

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Abstract

The invention provides a wafer manufacturing method and device, and particularly relates to the technical field of semiconductors. In order to solve the technical problem that appropriate etching parameters are difficult to determine due to the fact that body copper pollution and etching parameters have a complex nonlinear relation in a re-etching process of crystal ingot fragments in an alkaline environment, the method comprises the following steps: testing test data in which a body copper residual test value is reduced and then increased along with the increase of an etching temperature value; therefore, the optimal solution of the body copper residual quantity adjusted based on the etching temperature is within the change range of the etching parameters, and the optimal solution of the body copper residual quantity can be approximately obtained by combining body copper residual test values under different etching concentrations. The alkaline wet etching process is optimized through the etching parameters corresponding to the optimal solution, so that the bulk copper residual quantity of the prepared wafer can be reduced, and the wafer has better device performance.
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Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of semiconductor technology, and in particular to a wafer manufacturing method and device. BACKGROUND

[0002] A wafer is a basic material for manufacturing semiconductor integrated circuits, usually made of high-purity single crystal silicon, in the form of a circular thin sheet. In semiconductor technology, semiconductor devices can be formed by doping, selective etching, stacking, and other processing of wafers.

[0003] Wafers can be prepared based on silicon ingots (or other crystal ingots), and in the process of preparing wafers, copper ions can be introduced, resulting in bulk copper contamination of the wafers. Therefore, how to reduce copper contamination in the wafer manufacturing process is a technical problem that needs to be solved by those skilled in the art. SUMMARY

[0004] Therefore, the embodiments of the present application provide a wafer manufacturing method and device, which optimizes the etching parameters of the silicon wafer in the alkaline wet etching process, thereby reducing the copper contamination formed by the alkaline wet etching.

[0005] In a first aspect, the present application provides a wafer manufacturing method, the manufacturing method comprising: determining preparation requirements of a silicon wafer in an alkaline wet etching process, wherein the preparation requirements at least include a target etching amount of the silicon wafer in the alkaline wet etching process. Determining a target etching parameter from a plurality of etching parameters based on a bulk copper residual test value of the target etching amount, wherein the etching parameter includes a combination of an etching temperature value and an etching concentration value, there is at least one first test data group in the bulk copper residual test values of the plurality of etching parameters, and the etching concentration value of the first test data group is the same and the bulk copper residual test value decreases first and then increases with the increase of the etching temperature value. Performing the alkaline wet etching process on the silicon wafer based on the target etching parameter to form a wafer.

[0006] In a second aspect, the present application provides an electronic device, comprising a processor and a memory for storing instructions executable by the processor. Wherein the processor is configured to execute the instructions to implement the wafer manufacturing method of the first aspect.

[0007] In view of the technical problem that there is a complex nonlinear relationship between bulk copper pollution and etching parameters in the re-etching process of ingot slicing in an alkaline environment, which leads to difficulty in determining suitable etching parameters, the application tests the test data that the bulk copper residual test value decreases first and then increases with the increase of etching temperature value, so that the optimal solution of the bulk copper residual amount adjusted based on the etching temperature is within the change range of the etching parameters, and then the optimal solution of the bulk copper residual amount can be approximately obtained in combination with the bulk copper residual test value under different etching concentrations. The etching parameters corresponding to the optimal solution are used to optimize the alkaline wet etching process, so that the bulk copper residual amount of the prepared wafer is reduced, and the device has better performance. BRIEF DESCRIPTION OF DRAWINGS

[0008] In order to more clearly illustrate the technical solutions of the embodiments of the present application, the drawings needed in the embodiments will be briefly introduced as follows. It should be understood that the following drawings only show some embodiments of the present application, and therefore should not be regarded as a limitation on the scope. For those skilled in the art, other related drawings can also be obtained without creative labor.

[0009] Figure 1 is a schematic diagram of a wafer manufacturing process shown by some embodiments of the present application.

[0010] Figure 2 is an exemplary flowchart of a wafer manufacturing method shown by some embodiments of the present application.

[0011] Figure 3 is a schematic table of process test data shown by some embodiments of the present application.

[0012] Figure 4 is an exemplary flowchart of a target etching parameter determination method shown by some embodiments of the present application.

[0013] Figure 5 is an exemplary flowchart of a candidate etching parameter determination method shown by some embodiments of the present application.

[0014] Figure 6 is a system module schematic diagram of an electronic device shown by some embodiments of the present application. DETAILED DESCRIPTION

[0015] The technical solutions in the embodiments of the present application will be described clearly and completely in combination with the drawings in the embodiments of the present application. Obviously, the described embodiments are only some of the embodiments of the present application, not all the embodiments. Based on the embodiments in the present application, all other embodiments obtained by those skilled in the art without creative labor are within the scope of protection of the present application.

[0016] SUMMARY

[0017] In actual production, the wafer is generally prepared from a silicon ingot through multiple etching processes. The aforementioned alkaline wet etching process is often used as an etching process with a large etching amount (denoted as heavy etching process), and then a grinding process, a light etching process, and a cleaning process are often performed subsequently.

[0018] In addition, to distinguish between raw materials and finished products in the wafer preparation process, the wafer in this application can refer to the finished product after the preparation process, and the wafer is referred to as a silicon wafer during the preparation process.

[0019] To further illustrate the foregoing process, the application also provides a schematic diagram of a wafer manufacturing process. Figure 1 ).

[0020] As shown in Figure 1 , the wafer manufacturing process can include a rough machining process, a heavy etching process, a double-sided grinding process, a light etching process, and a cleaning process performed in sequence.

[0021] The rough machining process can refer to a process of preparing a silicon wafer from a silicon ingot. When forming a silicon wafer, defects are often formed at the slicing site, and the slicing is then peeled off from the silicon ingot based on the defects (such as ultrasonic peeling, laser peeling, etc.). The heavy etching process can be a wet etching process based on an alkaline environment, mainly used for etching a large size to form the general shape of the wafer (in the current process, 25 um of silicon needs to be etched in the heavy etching process). The double-sided grinding process is generally used to further shape the wafer, and is generally performed in the form of mechanical grinding. The light etching process is generally implemented based on a wet etching process, and is mainly used to remove surface damage caused by the foregoing processes (especially the double-sided grinding process). The cleaning process is mainly used to remove process residues to ensure the cleanliness of the wafer for subsequent processing. For example, based on the foregoing wafer preparation process, the processed wafer can be subjected to subsequent preparation to form a semiconductor device.

[0022] During the formation of the wafer (especially the heavy etching process), copper contamination is very easy to form. The copper contamination refers to the phenomenon that unintended copper ions or copper-containing particles are left on the surface or inside of the wafer during the wafer preparation process. Copper, as a heavy metal contaminant, has a significant negative impact on the performance of the wafer and the yield of the device. For example, when the wafer is prepared as a semiconductor device based on a PN junction, copper ions penetrate into the PN junction region, resulting in an increase in reverse leakage current and reducing the reliability of the device.

[0023] In the foregoing forming, the re-etching process (i.e., a wet etching process based on an alkaline environment, denoted as an alkaline wet etching process) tends to form the foregoing copper contamination. Among them, the wear of the processing equipment or the impurities of the chemical reagent (such as trace impurities in KOH solution) can cause the copper element to be contained in the etching reagent, and the copper element to adhere to the wafer surface and diffuse into the silicon during the etching process.

[0024] In the alkaline wet etching process, the most important process parameters (also denoted as etching parameters) are etching concentration and etching temperature. Through multiple tests, the present application finds that the foregoing process parameters and the foregoing copper contamination tend to present a complex nonlinear relationship of mutual influence, thereby making it difficult to determine suitable process parameters to reduce copper contamination. Among them, the copper contamination of the wafer can be described by the bulk copper residual amount, which is described in PPT (Parts Per Trillion) or PPB (Parts Per Billion), wherein the present application selects PPT as the description unit, which means that there is 1 part (copper) in every trillion parts of matter (i.e., 10 -12 ).

[0025] In view of the technical problem that the bulk copper contamination and the etching parameters in the re-etching process of the ingot slicing in the alkaline environment have a relatively complex nonlinear relationship, thereby making it difficult to determine suitable etching parameters, the present application tests the test data that the bulk copper residual test value decreases first and then increases with the increase of the etching temperature value, so that the optimal solution of the bulk copper residual amount adjusted based on the etching temperature is within the change range of the etching parameters, and then the optimal solution of the bulk copper residual amount can be approximately obtained in combination with the bulk copper residual test value under different etching concentrations. By optimizing the alkaline wet etching process through the etching parameters corresponding to the foregoing optimal solution, the bulk copper residual amount of the prepared wafer can be reduced, thereby having better device performance.

[0026] The wafer manufacturing method and device provided by the present application will be described in detail below with reference to the accompanying drawings.

[0027] Exemplary method of manufacturing a wafer:

[0028] To further illustrate the wafer manufacturing method provided by the present application, the present application also provides an exemplary flowchart of a wafer manufacturing method (P200). Figure 2 ). Among them, Figure 2 The flowchart P200 shown in the figure can be executed by an electronic device which can have a processor and a memory, by executing P200 to determine the target etching parameters of the alkaline wet etching process, and then sending a control signal to the wafer preparation execution device (such as an etching device) to execute the alkaline wet etching process and the subsequent links based on the target etching parameters.

[0029] As shown in Figure 2 , P200 can include the following steps:

[0030] S210, determining a preparation requirement of the silicon wafer in the alkaline wet etching process.

[0031] S220, determining a target etching parameter from the plurality of etching parameters based on the target etching amount and the bulk copper residue test value.

[0032] S230, performing the alkaline wet etching process on the silicon wafer based on the target etching parameter to form a wafer.

[0033] In the foregoing S210, the silicon wafer can refer to a structure peeled off from a silicon ingot through a rough machining process. The structure can be used to perform the alkaline wet etching process to achieve preliminary shaping of the shape and remove surface defects caused by the foregoing silicon wafer process.

[0034] The preparation requirement can refer to a performance requirement (such as a bulk copper residue amount requirement) of a wafer prepared based on the silicon wafer or a process requirement (such as an etching amount requirement, an etching rate requirement, an etching time requirement, etc.) of the silicon wafer in a preparation process (such as the alkaline wet etching process). Among them, the preparation requirement can at least include a target etching amount of the silicon wafer in the alkaline wet etching process. In addition, the preparation requirement can also present as an etching time requirement, an etching rate requirement, etc.

[0035] Considering that the expected value of the bulk copper residue value of the wafer is 0, in this application, etching parameters with low bulk copper residue amount will be selected as much as possible. In some embodiments, the foregoing preparation requirement can also include a threshold condition of the bulk copper residue amount as the target of the etching parameter optimization iteration.

[0036] In some embodiments, the foregoing preparation requirement is generally pre-configured. For example, for a 12-inch wafer, the target etching amount in the alkaline wet etching process generally presents as 25um. In some embodiments, the foregoing preparation requirement can also be adjusted based on the actual wafer preparation task, that is, the target etching amount of the silicon wafer in the alkaline wet etching process can be determined based on the size parameter of the silicon wafer. Then, based on the target etching amount, the etching rate threshold condition or other preparation requirements (such as the etching time threshold condition, etc.) are determined.

[0037] The plurality of etching parameters based on the bulk copper residue test value of the target etching amount can also be understood as a plurality of process test data determined based on different etching parameters for wafer preparation and bulk copper parameter test on the prepared wafer. Among them, the etching parameter generally presents as a combination of etching temperature value and etching concentration value.

[0038] In determining the foregoing process test data, the wafer after completion of preparation can generally be tested. That is, the wafer preparation process can be performed based on different etching parameters of the alkaline wet etching process, and the bulk copper residual amount test can be performed after the completion of the cleaning process to determine the bulk copper residual test value under the corresponding process parameters. Alternatively, the bulk copper residual amount test can also be performed on the silicon wafer after the alkaline wet etching process (but generally also needs to remove the surface residue and clean).

[0039] It should be noted that the foregoing multiple sets of etching parameters based on the bulk copper residual test value based on the target etching amount generally refers to at least the etching process of the target etching amount in the test process. For new etching amount different preparation requirements, there may be no actual test. Then it can be deduced based on the existing etching data. In addition, the etching process can also be based on different etching amounts to perform multiple experiments on the same etching parameters to analyze the timing bulk copper accumulation of different etching amounts.

[0040] In some embodiments, to avoid the influence of other process parameters on the foregoing test process, the process after alkaline wet etching can be performed using the same parameters. The silicon wafer used in the foregoing bulk copper residual test value determination process can be configured as a continuous silicon wafer, that is, a continuous silicon ingot is continuously formed from the same silicon ingot based on the same preparation parameters to avoid errors caused by silicon wafer processes.

[0041] The foregoing process can construct process test data, but in actual testing, considering that the influence of etching temperature and etching concentration on bulk copper residual is nonlinear, purposeless data acquisition often occurs at the level of obtaining process test data, so it is not possible to determine whether the obtained process test data can contain the optimal solution in theory.

[0042] In view of this, the present application analyzes the mechanism of bulk copper residual:

[0043] ①At the etching temperature level, during the increase of the etching temperature, the copper ion activity and the etching reaction speed will increase, and the higher the copper ion activity, the easier it is to form bulk copper residual, and the faster the etching reaction speed, the shorter the deposition time of copper ions, which will make it more difficult to form bulk copper residual. Therefore, during the increase of the etching temperature, the copper ion activity and the etching reaction speed will compete to form a nonlinear relationship between the temperature and the bulk copper residual.

[0044] ②At the etching concentration level, as the etching concentration increases, the ion amount of copper ions generally increases, and the etching reaction speed generally increases first and then decreases, thereby directly forming a nonlinear relationship between the concentration and the bulk copper residual.

[0045] And the foregoing two nonlinear relationships will further affect each other, thereby making it very difficult to predict the bulk copper residual corresponding to the etching parameters, and it is also difficult to determine which data should be tested.

[0046] To solve the foregoing problems, the application decouples the foregoing influencing factors when constructing test data, and determines the inflection point when two parameters change, thereby ensuring that the test data set covers the "theoretical optimal solution (i.e., the process parameter with the lowest bulk copper residual amount)".

[0047] Among them, there is an optimal solution in the etching concentration level, and for the influence of the foregoing etching temperature level, considering that the bulk copper residual amount in the application is expected to be a lower value, the foregoing inflection point can be characterized as a U-shaped relationship in the function level, i.e., with the change of a certain parameter, the bulk copper residual amount (i.e., the bulk copper residual test value) first decreases and then increases.

[0048] Therefore, in constructing test data, a certain etching parameter can be selected to fix another etching parameter, and when the etching parameter appears the foregoing U-shaped relationship, it can be determined that the inflection point of the influence of the etching parameter on the bulk copper is nearby. Among them, if the U-shaped relationship is not formed, the value of the fixed etching parameter can be considered to be changed. Specifically, considering that the influence of the foregoing etching temperature on the bulk copper residual is more complex, the U-shaped relationship of the etching temperature and the bulk copper residual amount can be constructed first.

[0049] The test data determined based on the foregoing test process can form at least one first test data group, so that the etching concentration value of the first test data group is the same and the bulk copper residual test value first decreases and then increases with the increase of the etching temperature value.

[0050] To further illustrate the related conditions of the foregoing test data, the application also provides a schematic table of process test data. Among them, each data in the table is the actual test result of a 12-inch wafer under the requirement of 25um etching amount based on KOH etching environment.

[0051] As shown in Figure 3 As shown in Table 1 (i.e., the schematic table), for constant concentration (for example, 35%), the bulk copper residual amounts at etching temperatures of 75℃, 85℃, and 95℃ are 22ppt, 18ppt, and 28ppt, respectively, which shows a U-shaped relationship of first decreasing and then increasing.

[0052] Similar to the foregoing first test data group, the test data can also form at least one second test data group, and the change of the etching concentration and the change of the bulk copper residual amount in the second test data group can also show a U-shaped relationship. Considering the etching rate requirement, the concentration selected in the application is a high value, which directly shows the positive correlation data. If a lower concentration (such as 15%) is included, it will also theoretically show a U-shaped relationship.

[0053] The aforementioned target etching parameter can refer to an etching parameter determined based on a plurality of sets of process test data and satisfying a preparation requirement. For example, when performing the aforementioned S220, an optimal solution (generally represented as an etching parameter with the lowest bulk copper residual amount) can be directly determined from the test data.

[0054] In some embodiments, the aforementioned preparation requirement can include an etching rate threshold condition, and when determining the target etching parameter, at least one candidate etching parameter satisfying the etching rate threshold condition can be determined based on a plurality of sets of process test data, and then a candidate etching parameter with the lowest bulk copper residual amount is determined from the at least one candidate etching parameter and configured as the target etching parameter.

[0055] The process of determining the target etching parameter from the candidate etching parameter can be a theoretical calculation (such as selecting an etching parameter with the lowest bulk copper residual amount therefrom) or an actual test (i.e., testing the actual value of the bulk copper residual to determine an etching parameter actually providing the lowest bulk copper residual amount). For more information about the actual test, please refer to Figure 4 and the related description thereof.

[0056] Based on the aforementioned test data, when the alkaline wet etching process is configured as a potassium hydroxide etching, the target etching parameter can be preferably configured as: the etching concentration is configured as 25%, and the etching temperature is configured as 85°C.

[0057] In the aforementioned S430, when performing the alkaline wet etching process based on the target etching parameter, the process can be performed based on the conventional process of the wet etching process. That is, the temperature and the concentration are generally controlled constantly based on feedback. After the aforementioned wet etching process, a silicon wafer finishing process can be continuously performed, which generally includes a double-sided grinding process, a light etching process, and a cleaning process.

[0058] Thus, based on the wafer manufacturing method provided by the foregoing, by testing the test data that the bulk copper residual test value decreases first and then increases with the increase of the etching temperature value, the optimal solution of the bulk copper residual amount adjusted based on the etching temperature is within the variation range of the etching parameter, and then the optimal solution of the bulk copper residual amount can be approximately obtained in combination with the bulk copper residual test value under different etching concentrations. By optimizing the alkaline wet etching process through the etching parameter corresponding to the aforementioned optimal solution, the bulk copper residual amount of the prepared wafer can be reduced, and thus the device has better performance.

[0059] Exemplary method of determining etching parameters:

[0060] Figure 4 is an exemplary flowchart of a method for determining a target etching parameter according to some embodiments of the present application.

[0061] As shown in Figure 4 , the flow P400 can include the following steps:

[0062] S410, determining at least one group of test wafers.

[0063] S420, for a target wafer in the at least one group of test wafers, performing an alkaline wet etching process based on a corresponding candidate etching parameter, determining a target wafer bulk copper residual actual value to determine a bulk copper residual actual value of each test wafer.

[0064] S430, determining a target etching parameter based on the bulk copper residual actual value of each test wafer.

[0065] In the foregoing S410, the test wafers are similar to the foregoing wafers used to test the bulk copper residual test value, i.e., the test wafer segments are continuously formed from the same silicon ingot. The continuous silicon ingot segments are at least 5 wafers in the actual test. The number of test wafers in the foregoing S410 can correspond to the candidate etching parameters (generally, multiple wafers are needed to test one parameter), so that the candidate etching parameters have corresponding test wafers for testing.

[0066] In the foregoing S420, the process is similar to the foregoing description, and generally the re-etching process, double-sided polishing process, light etching process, and cleaning process can be performed before the bulk copper detection to determine the actual residual amount. The target wafer in the foregoing S420 can be any of the test wafers, and each test wafer can be processed based on the description of the target wafer in S420 to determine the bulk copper residual actual value of each test wafer.

[0067] In the foregoing S430, considering that the candidate etching parameters and the test wafers have as many one-to-one relationships as possible, the bulk copper residual actual value of the test wafers can be determined by statistical processing (such as removing outliers and then averaging) to determine the bulk copper residual actual value of the candidate etching parameters. Then, the optimal target etching parameter is determined based on the bulk copper residual actual value of the candidate etching parameters.

[0068] Considering that the foregoing process can involve the requirement of etching rate, the etching rate can be further screened when the foregoing S430 is performed to ensure that the target etching parameter meets the corresponding preparation requirements.

[0069] Further, if the preparation requirements do not include the screening condition of etching rate, the determination of the candidate etching parameter can be based only on the bulk copper residual amount. Considering that a longer etching time tends to increase the bulk copper residual amount, a lower bulk copper residual amount may indicate a generally faster etching rate.

[0070] Further, considering the construction cost of the test parameters, when the actual test is performed, the determined candidate etching parameters can not be limited to the results that have been tested, but can also be based on the existing test data to determine a more optimal etching parameter based on the existing data.

[0071] To further describe the process, the present application also provides an exemplary flowchart of a candidate etching parameter determination method. Figure 5 ).

[0072] As shown in Figure 5 , the flow P500 can include the following steps:

[0073] S510, determining at least one first etching parameter satisfying the etching rate threshold condition from the etching parameters corresponding to the copper residue test values.

[0074] S520, determining at least one second etching parameter from the bulk copper residue fitting function based on the etching rate threshold condition.

[0075] The foregoing S510 can be generally based on existing test data, and the candidate etching parameters determined thereby can be based on the first etching parameters, which will not be described herein.

[0076] The foregoing S520 can perform parameter fitting based on existing test data, thereby constructing a copper residue fitting function of the reaction etching parameters and the copper residue. The bulk copper residue fitting function is constructed based on the bulk copper residue test values and the etching parameters corresponding thereto, and is used to determine a bulk copper residue estimated value of the etching parameters. The bulk copper residue estimated value of the second etching parameter is less than the bulk copper residue measured value corresponding to the first etching parameter.

[0077] In the tests of the foregoing S510 and S520, parameter fitting is actually performed to save the cost of performing tests. The data interval of the test data for fitting is generally larger (e.g., greater than the minimum interval controllable by the execution device), for example, the etching temperature interval of the test data for fitting can be 5°C, and the etching concentration interval can be 5%.

[0078] In some embodiments, the data for fitting can also be selected layer by layer, i.e., based on the foregoing Figure 3 As shown in the data

[0079] When fitting is performed based on the foregoing bulk copper residue fitting function, the interval of the input process parameters can be smaller relative to the data interval of the test data for fitting (e.g., consistent with the minimum interval controllable by the execution device, exemplarily, the etching temperature interval can be 2°C, and the etching concentration interval can be 1%), thereby outputting the bulk copper residue estimated values (denoted as estimated bulk copper residue) of each etching parameter without actual testing.

[0080] And for effective testing of the subsequent process, the second etching parameter can be determined based on the estimated bulk copper residue, so that the estimated bulk copper residue of the second etching parameter is less than the bulk copper residue corresponding to the first etching parameter.

[0081] Considering the aforementioned etching rate threshold condition, when determining the second etching parameter, it can be ensured that the etching rate thereof meets the etching rate threshold condition. Further, considering that the relationship between etching temperature and etching concentration and etching rate is relatively simple, when determining the second etching parameter, the etching parameter range that meets the etching rate threshold condition can be determined first. Then at least one second etching parameter is determined from the etching parameter range through the bulk copper residue fitting function.

[0082] Considering that the second etching parameter determined in the foregoing is actually only a fitting value, and the relationship between the etching parameter and the bulk copper residue is relatively complex and difficult to fit, after determining the second etching parameter, a third etching parameter group can be constructed between the second etching parameter and the first etching parameter to reflect the process conditions between the first etching parameter and the second etching parameter.

[0083] That is, after the foregoing S520, P500 can further include the following steps:

[0084] S530, for a target second etching parameter in the at least one second etching parameter, determining a target first etching parameter from the at least one first etching parameter, which has the smallest etching parameter difference with the target second etching parameter.

[0085] S540, determining at least one group of third etching parameters based on the etching parameter difference between the target second etching parameter and the target first etching parameter.

[0086] In the foregoing S530, the target second etching parameter can be selected from the second etching parameters, which can be optional, so that all second etching parameters perform the processes of S530 and S540. It can also be a special selection, only for a few second etching parameters with the least bulk copper residue, further reducing the workload and cost of testing.

[0087] The target first etching parameter can be the first etching parameter closest to the target second etching parameter, so as to construct an intermediate test experiment between the target second etching parameter and the target first etching parameter, thereby reducing the amount of experiments.

[0088] In the foregoing S540, the third etching parameter can be an etching parameter located between the target second etching parameter and the target first etching parameter. It is generally determined based on the specific values of the etching parameters of the target second etching parameter and the target first etching parameter, and specifically can be constructed between the target second etching parameter and the target first etching parameter based on the data interval of the test data fitted in the foregoing, so as to perform high-precision testing in the area where the optimal solution is most likely to appear.

[0089] Therefore, based on the test process shown in P500, the optimal solution of the bulk copper residual amount can be further determined through double testing of the true value and the fitting value, while the actual accuracy of the test process is greater than the test accuracy of the test data, thereby further providing the possibility of the optimal solution of the bulk copper and reducing the test amount and test cost required in high-precision testing.

[0090] In some embodiments, it is also possible that the cumulative rate of copper contamination over time also forms a nonlinear relationship under different etching parameters. For example, for etching of 25um, the optimal solution for etching of 0-15um and etching of 15um-25um can be different etching parameters.

[0091] In the foregoing test process, data can also be recorded based on unit etching amount, wherein the unit etching amount can be calibrated based on etching time or based on etching amount. That is, the process test data of the bulk copper residual amount is recorded continuously based on unit etching amount. The corresponding target etching parameters can include a plurality of continuous combinations of etching parameters based on unit etching amount. Corresponding to this case, the foregoing test process can also include candidate etching parameters in which the etching parameters change during etching.

[0092] Exemplary electronic device:

[0093] The application also provides an electronic device, as shown in the accompanying drawings. Figure 6 The electronic device 600 provided by the application includes a memory 610, a processor 620, and an input / output interface 630. The memory 610, the processor 620, and the input / output interface 630 are connected through an internal connection path. The memory 610 is used to store instructions, the processor 620 is used to execute the instructions stored in the memory 610 to control the input / output interface 630 to receive input data and information, output operation results, and the like (such as sending to a wafer processing device).

[0094] It should be understood that in the embodiments of the application, the processor 620 can adopt a general central processing unit (CPU), a microprocessor, an application specific integrated circuit (ASIC), or one or more integrated circuits, for executing related programs to implement the technical solutions provided by the embodiments of the application.

[0095] The memory 610 can include read-only memory and random access memory, and provide instructions and data to the processor 620. A portion of the processor 620 can also include non-volatile random access memory. For example, the processor 620 can also store device type information.

[0096] In the implementation process, each step of the above method can be completed by integrated logic circuits of hardware in the processor 620 or instructions in the form of software. The wafer manufacturing method disclosed in combination with the embodiments of the present application can be directly embodied as hardware processor execution completion, or executed by a combination of hardware and software modules in the processor. The software module can be located in a random access memory, a flash memory, a read-only memory, a programmable read-only memory, an electrically erasable programmable memory, a register, or other mature storage media in the art. The storage medium is located in the memory 610, and the processor 620 reads the information in the memory 610, and combines the hardware to complete the steps of the above method. To avoid repetition, it will not be described in detail here. The present application also provides a computer program product, including computer programs / instructions. When the computer program / instructions in the computer program product provided by the present application is executed by the processor, the wafer manufacturing method provided by the present application can be realized.

[0097] Further, in the actual process, the foregoing electronic device 600 can record and analyze the results processed by the process equipment as a separate computing device, so as to provide appropriate process parameters. The foregoing electronic device 600 can also be integrated in the process equipment to directly provide corresponding process parameters.

[0098] It should be understood that the term "and / or" herein is only a description of the association relationship of the associated objects, which means that there can be three relationships, for example, A and / or B, which can represent the three cases of A alone, A and B together, and B alone. In addition, the character " / " herein generally represents that the front and rear associated objects are in an "or" relationship.

[0099] It should be understood that in various embodiments of the present application, the size of the sequence number of the above processes does not mean the order of execution, and the execution order of the processes should be determined by its function and inherent logic, and should not constitute any limitation on the implementation process of the embodiments of the present application.

[0100] In several embodiments provided in the present application, it should be understood that the disclosed system, device and method can be implemented in other manners. For example, the division of the above-described device embodiment is only a logical function division, and there can be another division manner for actual implementation, for example, multiple units or components can be combined or integrated into another system, or some features can be ignored or not executed. In addition, the displayed or discussed mutual couplings or direct couplings or communication connections between different functions can be indirect couplings or communication connections through some interfaces, devices or units, and can be in electrical, mechanical or other forms.

[0101] The units described as separate components can or can not be physically separate, and the components shown as units can or can not be physical units, i.e., can be located in one place, or can be distributed on multiple network units. Part or all of the units can be selected according to actual needs to achieve the purpose of the embodiment.

[0102] In addition, each functional unit in the various embodiments of the present application can be integrated in one processing unit, or each unit can exist physically, or two or more units can be integrated in one unit.

[0103] In the above embodiments, all or part of the embodiments can be implemented by software, hardware, firmware or any combination thereof. When implemented by software, all or part of the embodiments can be implemented in the form of a computer program product. The computer program product includes one or more computer instructions. When the computer program instructions are loaded and executed on a computer, all or part of the processes or functions described in the embodiments of the present application are generated. The computer can be a general-purpose computer, a special-purpose computer, a computer network, a network device, a user equipment, a core network device, an operation administration and maintenance (OAM) or other programmable devices. The computer instructions can be stored in a computer readable storage medium or transmitted from one computer readable storage medium to another computer readable storage medium, for example, the computer instructions can be transmitted from one website, computer, server or data center to another website, computer, server or data center through wired (for example, coaxial cable, optical fiber, digital subscriber line (DSL)) or wireless (for example, infrared, wireless, microwave, etc.) manner. The computer readable storage medium can be any available medium that can be read by a computer or a data storage device such as a server, data center, etc. integrated with one or more available media sets. The available media can be a magnetic medium (for example, floppy disk, hard disk, magnetic tape), an optical medium (for example, digital video disc (DVD)) or a semiconductor medium (for example, solid state disk (SSD)) and the like. The computer readable storage medium can be a volatile or non-volatile storage medium, or can include both volatile and non-volatile storage media.

[0104] The above description is merely a specific implementation of the present application, but the protection scope of the present application is not limited thereto. Any person skilled in the art can easily think of changes or replacements within the technical range disclosed in the present application, which should be covered within the protection scope of the present application. Therefore, the protection scope of the present application should be subject to the protection scope of the claims.

Claims

1. A method of manufacturing a wafer, characterized by, The manufacturing method comprises: determining preparation requirements of a silicon wafer in an alkaline wet etching process, wherein the preparation requirements at least include a target etching amount of the silicon wafer in the alkaline wet etching process; determining a target etching parameter from a plurality of etching parameters based on a bulk copper residue test value of the target etching amount, wherein the etching parameter comprises a combination of an etching temperature value and an etching concentration value, there is at least a first test data group in the bulk copper residue test values of the plurality of etching parameters, the etching concentration value of the first test data group is the same and the bulk copper residue test value decreases first and then increases with the increase of the etching temperature value; performing the alkaline wet etching process on the silicon wafer based on the target etching parameter to form a wafer.

2. The production method according to claim 1, characterized by The preparation requirements include an etching rate threshold condition, and the determining of the target etching parameter from the plurality of etching parameters comprises: determining at least one candidate etching parameter from the etching parameters corresponding to the bulk copper residue test value, wherein the etching rate of the candidate etching parameter satisfies the etching rate threshold condition; determining the target etching parameter based on the candidate etching parameter with the minimum bulk copper residue test value in the at least one candidate etching parameter.

3. The production method according to claim 2, characterized by The determining of the target etching parameter based on the candidate etching parameter with the minimum bulk copper residue value in the at least one candidate etching parameter comprises: determining a group of test silicon wafers, wherein each silicon wafer in the group of test silicon wafers is continuously formed from the same silicon ingot, and the test silicon wafer corresponds to the candidate etching parameter; for a target silicon wafer in the group of test silicon wafers, performing the alkaline wet etching process based on the corresponding candidate etching parameter to determine a bulk copper residue actual value of the target silicon wafer, so as to determine the bulk copper residue actual value of each test silicon wafer; determining the target etching parameter based on the bulk copper residue actual value corresponding to each candidate etching parameter.

4. The production method according to claim 2, wherein The determining of the at least one candidate etching parameter from the etching parameters corresponding to the bulk copper residue test value comprises: determining at least one first etching parameter from the etching parameters corresponding to the bulk copper residue test value, wherein the etching rate of the first etching parameter satisfies the etching rate threshold condition; determining at least one second etching parameter from the bulk copper residue fitting function based on the etching rate threshold condition, wherein the bulk copper residue fitting function is constructed based on the bulk copper residue test value and the etching parameter corresponding thereto, is used to determine a bulk copper residue estimated value corresponding to the etching parameter, and the bulk copper residue estimated value of the second etching parameter is smaller than the bulk copper residue measured value corresponding to the first etching parameter.

5. The production method according to claim 4, wherein The determining of the at least one second etching parameter from the bulk copper residue fitting function based on the etching rate threshold condition comprises: determining an etching parameter range satisfying the etching rate threshold condition; determining at least one second etching parameter from the etching parameter range through the bulk copper residue fitting function.

6. The production method according to claim 4, wherein The determining of the at least one first etching parameter satisfying the etching rate threshold condition based on the process test data corresponding to the plurality of etching parameters further comprises: For a target second etching parameter in the at least one second etching parameter, determine a target first etching parameter from the at least one first etching parameter, which has the smallest etching parameter difference with the target second etching parameter; Determine at least one group of third etching parameters based on the etching parameter difference between the target second etching parameter and the target first etching parameter, wherein the parameter value of the third etching parameter is between the target second etching parameter and the target first etching parameter.

7. The production method according to claim 2, wherein The determination of the preparation requirement of the silicon wafer in the alkaline wet etching process includes: Determine the target etching amount of the silicon wafer in the alkaline wet etching process based on the size parameter of the silicon wafer; Determine the etching rate threshold condition based on the target etching amount.

8. The production method according to claim 1, characterized by The bulk copper residual test value of the plurality of groups of etching parameters has at least one group of third test data groups, wherein the third test data group includes bulk copper residual test values under different etching amounts of the same etching parameter; The target etching parameter includes a plurality of etching parameters based on the continuous combination of the target etching amount.

9. The production method according to claim 1, characterized by The alkaline wet etching process is configured as a potassium hydroxide etching, and the etching concentration of the target etching parameter is configured as 25%, and the etching temperature is configured as 85℃.

10. An electronic device, comprising: The electronic device includes: at least one processor; and a memory connected in communication with the at least one processor; wherein the memory stores a computer program executable by the at least one processor, and the computer program is executed by the at least one processor to enable the at least one processor to execute the wafer manufacturing method of any one of claims 1-9.