A multi-channel analog and digital signal acquisition system

Abstract

This invention provides a multi-channel analog-to-digital signal acquisition system, comprising: a channel selection module for selecting and switching multiple analog signals and digital signals using an analog switch chip, and inputting the selected signal into a multi-channel analog-to-digital converter for sampling; an analog-to-digital conversion module for configuring key parameters of the multi-channel analog-to-digital converter and designing the circuit; a processing and control module for performing data processing and communication tasks using a microcontroller and configuring a real-time operating system for task scheduling; a communication module for real-time data transmission and display with a host computer using a standardized interface and selecting an appropriate communication protocol for communication and testing; and a power management module for configuring a highly integrated power management chip, designing low-power strategies, and performing real-time monitoring and management. This invention significantly improves the quality, efficiency, and accuracy of the acquired data, enhances system performance and compatibility, and promotes the intelligent development of the system.

Description

Technical Field

[0001] This invention relates to the field of electronic and automation equipment technology, and in particular to a multi-channel analog and digital signal acquisition system. Background Technology

[0002] Digital and analog signal acquisition are two different signal acquisition methods, used to process different types of signals respectively. Multichannel digital and analog signal acquisition refers to the technology of simultaneously acquiring multiple digital signals (such as the high and low levels of switches and sensors) and multiple analog signals (such as continuous signals like temperature, pressure, and flow) using a single acquisition system. Compared to ordinary acquisition systems, multichannel digital and analog signal acquisition technology is suitable for various applications requiring the monitoring of multiple sensors or signals, such as industrial automation, environmental monitoring, and building intelligence. An effective multichannel acquisition system can improve system efficiency, flexibility, and maintainability, while reducing costs and space requirements.

[0003] However, existing multi-channel digital and analog signal acquisition systems mainly suffer from the following drawbacks: 1) When multiple channels acquire data simultaneously, the large data volume may lead to system congestion, causing latency issues and affecting real-time performance and response speed; 2) Different types of transmitters and actuators may have compatibility issues, and many systems require complex configuration when expanding with new devices; 3) Multi-channel acquisition needs to process multiple signals, increasing the complexity of data processing, including signal calibration, conversion, and processing logic. Therefore, this invention proposes a multi-channel analog and digital signal acquisition system to address the shortcomings of multi-channel digital and analog signal acquisition. Summary of the Invention

[0004] To overcome the shortcomings of existing technologies, the purpose of this invention is to provide a multi-channel analog and digital signal acquisition system that significantly improves the quality, efficiency, and accuracy of acquired data, enhances system performance and compatibility, and promotes the intelligent development of the system.

[0005] To achieve the above objectives, the present invention provides the following solution: a multi-channel analog / digital signal acquisition system, comprising:

[0006] The channel selection module is used to select and switch multiple analog signals and switch quantities using analog switch chips, and then input the selected signal into a multi-channel analog-to-digital converter for sampling.

[0007] An analog-to-digital conversion module is used to configure the key parameters of the multi-channel analog-to-digital converter and to perform circuit design.

[0008] The processing and control module is used to perform data processing and communication tasks using the microcontroller, and to configure the real-time operating system for task scheduling.

[0009] The communication module is used to transmit and display data in real time with the host computer via serial port, I2C or SPI, and to select the appropriate communication protocol for communication and testing to achieve system stability and real-time performance.

[0010] The power management module is used to configure highly integrated power management chips, design low-power strategies, and perform real-time monitoring and management.

[0011] Optionally, the channel selection module includes:

[0012] The anti-interference optimization unit is used to identify interference sources and perform noise characteristic analysis. Based on the identification and analysis results, the interference is shielded and isolated. Then, the anti-interference optimization algorithm is used to process the signal interference and introduces redundancy and compensation mechanisms to recover the data.

[0013] An analog switch chip selection unit is used to select an analog switch chip with multiple inputs and low crosstalk and configure its parameters to obtain the analog switch chip; the parameters include the number of switch channels, signal type, switching frequency, and power consumption;

[0014] The microcontroller control unit is used to select a microcontroller with GPIO pins and ADC conversion capabilities. It uses the high and low level configuration of the GPIO pins to control the channel selection of the analog switch chip, and then uses timers or interrupt control methods to update the pin status to realize signal switching. After each signal switching, a sampling command is sent to collect and process data.

[0015] The circuit management unit is used to connect the switching circuit, control pin circuit, and power supply and ground connections.

[0016] Optionally, the anti-interference optimization unit includes:

[0017] The identification subunit is used to identify and record potential interference sources in different signal sources to obtain interference information, and to analyze and evaluate the interference information in combination with the device's operating status and the surrounding environment to obtain the impact value of the interference information on signal quality.

[0018] The analysis subunit is used to measure the spectral characteristics of background noise and signal noise using an oscilloscope or spectrum analyzer to obtain the noise amplitude, frequency distribution, and intensity of its impact on the signal.

[0019] The hardware design subunit is used to separate signal lines from power lines using shielded cables or metal shells to reduce electromagnetic interference, implement shielding measures for sensitive signal loops and connecting lines, and introduce opto-isolation technology to prevent the transmission of interference signals.

[0020] The anti-interference algorithm optimization subunit is used to implement the adaptive filtering algorithm and dynamically adjust the filtering parameters based on the identification and analysis results of the identification subunit and the analysis subunit to filter out interference signals. At the same time, through the comparison of multiple signals, cross-validation is used to judge and remove noise and abnormal data.

[0021] The redundancy and compensation subunit is used to introduce redundant channels to maintain the integrity and accuracy of other channels, and to introduce data compensation algorithms to achieve self-repair of erroneous data.

[0022] Optional, the analog-to-digital conversion module includes:

[0023] An ADC chip selection unit is used to select a multi-channel ADC chip with high resolution and sampling rate, and to confirm the input range, number of channels and key parameters of the multi-channel ADC chip. It also checks the crosstalk, gain error, bias error and built-in reference voltage of the multi-channel ADC chip to achieve a simplified design of the multi-channel ADC chip.

[0024] The circuit design unit is used to connect the outputs of multiple analog signal sources to the input of the ADC, and introduces signal conditioning circuits, decoupling capacitors and clock signals between the outputs and inputs to enhance and clean the input signals.

[0025] Optionally, the processing and control module includes:

[0026] The data acquisition unit is used to initialize the analog switch chip and the multi-channel ADC chip, and to design timers and external interrupt services to trigger data acquisition tasks; the external interrupt service realizes a fast response to switch inputs or ADC conversion through external interrupts;

[0027] The data processing unit is used to perform data calculations, logical analysis, and latency optimization on the collected data, completing the processing of complexity and completeness.

[0028] The communication task unit is used to select a communication protocol that supports bidirectional communication and to package and transmit the processed data in real time via serial port or network.

[0029] The system configuration unit is used to set the task stack size, priority, timers and semaphores, and to process tasks based on preset task schedules, and to monitor, optimize and adjust performance based on task execution.

[0030] The data acquisition unit, the data processing unit, the communication task unit, and the system configuration unit are respectively set to execute concurrently in different threads.

[0031] Optionally, the data processing unit includes:

[0032] The data buffer subunit is used to introduce a circular buffer and real-time timestamps for caching and identifying real-time data, and to set sampling priorities according to the criticality of the data to reduce redundant data.

[0033] The batch processing subunit is used to summarize and statistically analyze data from adjacent time periods. Once the number of data to be analyzed reaches a preset value, the data is written to the database sequentially according to its priority to reduce the number of write operations.

[0034] The data integrity subunit is used to perform sampling checks on each piece of data and to perform data verification and data completion based on the check results.

[0035] The complexity processing subunit is used to automatically calibrate and normalize the signal, and then perform signal conversion and logic simplification based on the processed signal to reduce signal complexity.

[0036] Optionally, the data integrity subunit includes an integrity storage strategy and a data processing and retransmission strategy;

[0037] The integrity storage strategy includes a first buffer for data acquisition, a second buffer for data processing and storage, multiple storage partitions set based on time, a hash value for verifying whether data has been tampered with or corrupted, and a backfill mechanism for periodically sampling and checking cached and stored data; the first buffer, the second buffer, and the storage partitions operate simultaneously.

[0038] The data processing and retransmission strategy includes a failure retransmission mechanism for retransmitting unacknowledged data and a data correction mechanism for checking and correcting corrupted data.

[0039] Optionally, the complexity processing subunit includes a signal calibration strategy, a signal conversion strategy, and a logic simplification strategy;

[0040] The signal correction strategy includes an automatic sensor calibration mechanism for adjusting sensor output values, a normalization mechanism for unifying the range of sensor output signals, and a data quick retrieval mechanism for setting calibration coefficients in the database.

[0041] The signal conversion strategy is used to build a conversion algorithm library to achieve deep conversion of various signal forms;

[0042] The logic simplification strategy includes a data flow diagram to display the entire data processing process, an abstraction layer mechanism to decouple the logic layer from the upper application layer, and a driving mechanism to implement event-driven processing logic.

[0043] Optionally, the communication module is also used to convert the data format into JSON or structured format before sending the data, so that the host computer can complete the parsing.

[0044] Optionally, the low-power strategy includes a dynamic voltage regulation mechanism for adjusting the input voltage according to the system load, a sleep mechanism for implementing standby mode, and an event idle mechanism for shutting down unnecessary module events during the acquisition interval.

[0045] This invention discloses the following technical effects by providing a multi-channel analog and digital signal acquisition system:

[0046] 1. Flexibility: By using analog switching chips and combining them with microcontroller control, the system efficiently and flexibly achieves signal selection and acquisition, and enables the switching of multiple analog quantities and switching signals. This ensures that the required input signal can be quickly selected for sampling when needed, providing reliable support for subsequent data processing.

[0047] 2. Anti-interference optimization: This invention effectively improves the stability and accuracy of data acquisition through operations such as identifying interference signals, analyzing noise, optimizing hardware design, optimizing anti-interference algorithms, and redundancy and compensation, ensuring reliable operation in various complex environments. The combination of multiple methods ultimately achieves high-accuracy data acquisition, providing a reliable basis for subsequent analysis and decision-making.

[0048] 3. Efficient Data Processing: This invention improves system response speed and performance by setting buffers, timestamps, and multi-threaded processing, resolving data congestion and latency issues. It reduces processing complexity and development / maintenance difficulty through automatic calibration, normalization, signal conversion, and logic transformation, thereby enhancing system processing capacity and operational efficiency. Furthermore, it minimizes data loss and omissions through sampling checks, data verification, and completion, ensuring data integrity. The combined effect of these multiple methods significantly improves data quality.

[0049] 4. Low power consumption: This invention integrates a power management chip to ensure optimal power consumption of the system under different loads, thereby reducing overall costs.

[0050] 5. Compatibility and scalability: By using standardized interfaces and selecting a unified and compatible communication protocol, the system can be flexibly adapted, improving its flexibility and scalability. This also reduces the complexity for users when integrating new devices and improves the overall availability of the system.

[0051] The technical solution of the present invention will be further described in detail below with reference to the accompanying drawings and embodiments. Attached Figure Description

[0052] To more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the drawings used in the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0053] Figure 1 This is a schematic diagram of the system architecture provided in an embodiment of the present invention;

[0054] Figure 2 A schematic diagram of the processing and control module provided in an embodiment of the present invention;

[0055] Figure 3 This is a schematic diagram of a data processing unit provided in an embodiment of the present invention. Detailed Implementation

[0056] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0057] To make the above-mentioned objects, features and advantages of the present invention more apparent and understandable, the present invention will be further described in detail below with reference to the accompanying drawings and specific embodiments.

[0058] like Figure 1 As shown, the present invention provides a multi-channel analog / digital signal acquisition system, comprising:

[0059] 1. A channel selection module, used to select and switch multiple analog signals and switching quantities using an analog switch chip, and then input the selected signal into a multi-channel analog-to-digital converter for sampling. The channel selection module includes:

[0060] 1.1 Anti-interference optimization unit

[0061] The system is used to identify interference sources and perform noise characteristic analysis. Based on the identification and analysis results, the interference is shielded and isolated. Then, an anti-interference optimization algorithm is used for signal interference processing, and redundancy and compensation mechanisms are introduced for data recovery. The anti-interference optimization unit includes:

[0062] 1.11 Identification Subunit

[0063] This is used to identify and record potential interference sources (including motors, transformers, wireless signal devices, environmental noise, etc.) in different signal sources to obtain interference information. The interference information is then analyzed and evaluated in conjunction with the device's operating status and the surrounding environment to obtain the impact value of the interference information on signal quality.

[0064] 1.12 Analysis Subunit

[0065] It is used to measure the spectral characteristics of background noise and signal noise using tools such as oscilloscopes or spectrum analyzers, to obtain the amplitude, frequency distribution and intensity of the noise's impact on the signal, which helps to develop targeted filtering strategies.

[0066] 1.13 Hardware Design Subunit

[0067] Electromagnetic shielding: Shielding measures are taken for sensitive signal circuits and connecting lines. Shielded cables or metal shells are used to separate signal lines from power lines to reduce the induction of electromagnetic interference and achieve shielding of sensitive signal circuits and connecting lines.

[0068] Isolation design: In circuit design, opto-isolation, transformer isolation and other technologies are used to ensure that interference signals cannot be directly transmitted to the acquisition module.

[0069] Additionally, improving the grounding system can reduce the "ground" effect by implementing grounding management and designing an impedance grounding system to ensure all devices and transmitters use a unified ground. Optimizing cabling, through a reasonable physical layout, ensures sufficient distance between signals and interference sources, and avoids running signal lines and power lines parallel to each other to prevent crosstalk. Differential signal transmission designs can be used to enhance interference resistance.

[0070] 1.14 Anti-interference algorithm optimization subunit

[0071] This is used to implement an adaptive filtering algorithm and dynamically adjust the filtering parameters based on the identification and analysis results of the identification subunit and the analysis subunit to filter out interference signals. At the same time, by comparing multiple signals and using cross-validation, the acquisition results of multiple sensors are compared to determine and eliminate noise and abnormal data.

[0072] In addition, a dynamic adjustment mechanism can be designed to adjust the acquisition strategy, increase the sampling frequency, or reconfigure the filtering method based on the collected real-time data and monitoring feedback, in order to cope with sudden signal interference.

[0073] 1.15 Redundancy and Compensation Subunit

[0074] This is used to introduce redundant channels, so that even if one signal channel fails, the other channels can still maintain integrity and accuracy; it also introduces data compensation algorithms to self-repair erroneous data caused by noise during the acquisition process, such as interpolation methods to fill in missing data points.

[0075] 1.2 Analog Switch Chip Selection Unit

[0076] This is used to select and configure the parameters of an analog switch chip with multiple inputs and low crosstalk to obtain an analog switch chip; the parameters include the number of switch channels, signal type, switching frequency, and power consumption.

[0077] For example, ensure that the selected chip has the following characteristics: providing at least 16 channel selection capabilities; low on-resistance and low distortion to ensure signal integrity; and suitable operating voltage range and power consumption requirements. Channel configuration examples: the CD4051 can be configured as 8 channels, while two such chips can be combined to achieve 16-channel selection.

[0078] 1.3 Microcontroller Control Unit

[0079] This is used to select a microcontroller with GPIO pins and ADC conversion capabilities. The high and low levels of the GPIO pins are used to control the channel selection of the analog switch chip. The pin status is updated using timers or interrupt control methods to achieve signal switching. After each signal switching, a sampling command is sent to collect and process data.

[0080] 1.4 Circuit Management Unit

[0081] Connection switch circuit: For each sensor that needs to be acquired, connect the corresponding output to the input port of the multiplexer. Connect the output of the multiplexer to the input of the ADC (Analog-to-Digital Converter) to acquire the selected signal;

[0082] Control pin circuitry: Depending on the selected switching IC, control pins (selection pins) need to be connected. These pins are typically connected to a microcontroller, which uses these pins to select the desired input signal. Example: If using an 8-channel MUX, three selection control pins might be required (2^3 = 8).

[0083] Power supply and grounding connection: Ensure that the power supply and grounding connection of the multiplexer switch is correct to ensure that the switch works properly.

[0084] 2. Analog-to-digital converter module, used to configure the key parameters of the multi-channel analog-to-digital converter and perform circuit design; the analog-to-digital converter module includes:

[0085] 2.1 ADC Chip Selection Unit

[0086] This process is used to select multi-channel ADC chips with high resolution and sampling rate, and to confirm the input range, number of channels, and key parameters of the multi-channel ADC chip. It also involves checking the crosstalk, gain error, bias error, and built-in reference voltage of the multi-channel ADC chip to achieve characteristic analysis and simplified design of the multi-channel ADC chip.

[0087] When selecting and evaluating ADC chips, consider consulting datasheets, assessing application characteristics, comparing different ADCs, and requesting and testing samples to make a final selection.

[0088] Key parameters of a high-performance ADC include: sampling rate, resolution, number of channels, conversion time, input range and bandwidth, signal-to-noise ratio (SNR), and total harmonic distortion (THD).

[0089] 2.2 Circuit Design Unit

[0090] Connect the outputs of multiple analog signal sources to the input channels of the ADC to ensure that the connection of each channel does not cause signal interference.

[0091] Between the input and output: Introduce signal conditioning circuitry (e.g., amplifiers, filters) to enhance and clean the input signal to suit the ADC's input range. Add decoupling capacitors to filter and stabilize the output voltage, ensuring a stable power supply signal under varying loads and improving overall performance. Select an external oscillator of appropriate frequency or provide a clock signal via a microcontroller to ensure the ADC has a stable clock signal for operation.

[0092] 3. Processing and control module, such as Figure 2 As shown, this is used to perform data processing and communication tasks using a microcontroller, and to configure a real-time operating system for task scheduling; the processing and control module includes:

[0093] 3.1 Data Acquisition Unit

[0094] The system is used to initialize the analog switch chip and the multi-channel ADC chip, and to design timers and external interrupt services to trigger data acquisition tasks. The external interrupt service enables a fast response to switch inputs or ADC conversions through external interrupts, ensuring efficient and rapid acquisition of real-time signals.

[0095] 3.2 Data Processing Unit

[0096] like Figure 3 As shown, the data processing unit is used to perform data calculations, logical analysis, and latency optimization on the collected data, completing the processing of complexity and completeness; the data processing unit includes:

[0097] 3.21 Data Buffer Subunit

[0098] This is used to introduce a circular buffer and real-time timestamps for caching and identifying real-time data, and to set sampling priorities based on the criticality of the data to reduce redundant data.

[0099] A circular buffer caches the collected real-time data. When the buffer reaches a certain capacity, the data is written to the backend processing module, enabling efficient data acquisition while ensuring that the buffer does not overflow.

[0100] Real-time timestamps are used to attach a timestamp to each piece of collected data, enabling accurate identification of when the data occurred during subsequent data processing and storage.

[0101] Retain important data: Priority sampling, sampling data according to a pre-set priority, and sampling critical data instantaneously, rather than sampling all signals at the same frequency, reducing unnecessary redundant data.

[0102] 3.22 Batch Processing Subunit

[0103] This is used to summarize and statistically analyze data from adjacent time periods. Once the amount of data to be analyzed reaches a preset value, it is written to the database sequentially according to data priority, thereby reducing the number of write operations and improving response speed.

[0104] 3.23 Data Integrity Subunit

[0105] This is used to sample and check each piece of data, and to perform data verification and data completion based on the check results; the data integrity subunit includes an integrity storage strategy and a data processing and retransmission strategy.

[0106] The integrity storage strategy includes a first buffer for data acquisition, a second buffer for data processing and storage, multiple storage partitions set based on time, a hash value for verifying whether data has been tampered with or corrupted, and a backfill mechanism for periodically sampling and checking cached and stored data; the first buffer, the second buffer, and the storage partitions operate simultaneously.

[0107] The data processing and retransmission strategy includes a failure retransmission mechanism for retransmitting unacknowledged data and a data correction mechanism for checking and correcting corrupted data.

[0108] 3.24 Complexity Processing Subunit

[0109] This unit is used to automatically calibrate and normalize signals, and then perform signal transformation and logic simplification based on the processed signals to reduce signal complexity. The complexity processing subunit includes signal calibration strategies, signal transformation strategies, and logic simplification strategies.

[0110] The signal correction strategy includes an automatic sensor calibration mechanism for adjusting sensor output values, a normalization mechanism for standardizing the range of sensor output signals, and a data retrieval mechanism for setting calibration coefficients in the database. The automatic calibration mechanism calibrates the sensor periodically or at system startup using an algorithm, comparing it with known standard signals to adjust the sensor output values ​​and ensure accuracy.

[0111] The signal conversion strategy is used to build a conversion algorithm library to achieve deep conversion of various signal forms, reducing the complexity of writing or modifying a large amount of code when adding new devices.

[0112] The logic simplification strategy includes a data flow diagram to illustrate the entire data processing workflow (the entire process of sensor data from acquisition, conversion to processing and output), an abstraction layer mechanism to decouple the logic layer from the upper-level application, and a driving mechanism to implement event-driven processing logic. The data flow diagram helps developers and maintenance personnel understand and manage signal flow; the abstraction layer mechanism simplifies application complexity; and the driving mechanism ensures that data processing is performed on demand, only processing when a specific input event is received, avoiding unnecessary resource waste.

[0113] 3.3 Communication Task Unit

[0114] Used to select a communication protocol that supports bidirectional communication, and to package and transmit the processed data in real time via serial port or network; ensuring the real-time performance and integrity of data transmission.

[0115] 3.4 System Configuration Unit

[0116] Used to set task stack size, priority, timers and semaphores, and to process tasks based on preset task schedules, and to monitor, optimize and adjust performance based on task execution.

[0117] The data acquisition unit, the data processing unit, the communication task unit, and the system configuration unit are respectively set to execute concurrently in different threads.

[0118] 4. Communication module, used to transmit and display data in real time with the host computer via serial port, I2C or SPI, and to select the appropriate communication protocol for communication and testing to achieve system stability and real-time performance.

[0119] The communication module is also used to convert the data format into JSON or structured format before sending the data, so that the host computer can complete the parsing.

[0120] 5. Power Management Module: This module is used to configure highly integrated power management chips, design low-power strategies, and perform real-time monitoring and management.

[0121] The low-power strategy includes a dynamic voltage regulation mechanism for adjusting the input voltage according to the system load, a sleep mechanism for implementing standby mode, and an event idle mechanism for shutting down unnecessary module events during the acquisition interval.

[0122] Furthermore, by using appropriate current / voltage monitoring circuits, the system's power consumption can be monitored in real time, and the monitoring data can be fed back to the host computer via serial or other communication methods for analysis of power consumption improvement directions. This effectively integrates power management chips, optimizing power consumption in multi-channel acquisition systems for analog and digital signals under different loads, thus reducing overall costs.

[0123] Therefore, by providing a multi-channel analog and digital signal acquisition system, this invention significantly improves the quality, efficiency, and accuracy of the acquired data, enhances system performance and compatibility, and promotes the intelligent development of the system.

[0124] The various embodiments in this specification are described in a progressive manner, with each embodiment focusing on the differences from other embodiments. The same or similar parts between the various embodiments can be referred to each other.

[0125] This document uses specific examples to illustrate the principles and implementation methods of the present invention. The descriptions of the above embodiments are only for the purpose of helping to understand the method and core ideas of the present invention. Furthermore, those skilled in the art will recognize that, based on the ideas of the present invention, there will be changes in the specific implementation methods and application scope. Therefore, the content of this specification should not be construed as a limitation of the present invention.

Claims

1. A multi-channel analog / digital signal acquisition system, characterized in that, include: The channel selection module is used to select and switch multiple analog signals and switch quantities using analog switch chips, and then input the selected signal into a multi-channel analog-to-digital converter for sampling. An analog-to-digital conversion module is used to configure the key parameters of the multi-channel analog-to-digital converter and to perform circuit design. The processing and control module is used to perform data processing and communication tasks using the microcontroller, and to configure the real-time operating system for task scheduling. The processing and control module includes: The data acquisition unit is used to initialize the analog switch chip and the multi-channel ADC chip, and to design timers and external interrupt services to trigger data acquisition tasks; the external interrupt service realizes a fast response to switch inputs or ADC conversion through external interrupts; A data processing unit is used to perform data calculations, logical analysis, and latency optimization on the collected data, completing the processing of complexity and completeness; the data processing unit includes: The data buffer subunit is used to introduce a circular buffer and real-time timestamps for caching and identifying real-time data, and to set sampling priorities according to the criticality of the data to reduce redundant data. The batch processing subunit is used to summarize and statistically analyze data from adjacent time periods. Once the number of data to be analyzed reaches a preset value, the data is written to the database sequentially according to its priority to reduce the number of write operations. The data integrity subunit is used to perform sampling checks on each piece of data and to perform data verification and data completion based on the check results; the data integrity subunit includes an integrity storage strategy and a data processing and retransmission strategy; The integrity storage strategy includes a first buffer for data acquisition, a second buffer for data processing and storage, multiple storage partitions set based on time, a hash value for verifying whether data has been tampered with or corrupted, and a backfill mechanism for periodically sampling and checking cached and stored data; the first buffer, the second buffer, and the storage partitions operate simultaneously. The data processing and retransmission strategy includes a failure retransmission mechanism for retransmitting unacknowledged data and a data correction mechanism for checking and correcting corrupted data. The complexity processing subunit is used to automatically calibrate and normalize the signal, and then perform signal transformation and logic simplification based on the processed signal to reduce signal complexity; the complexity processing subunit includes a signal calibration strategy, a signal transformation strategy, and a logic simplification strategy; The signal correction strategy includes an automatic sensor calibration mechanism for adjusting sensor output values, a normalization mechanism for unifying the range of sensor output signals, and a data quick retrieval mechanism for setting calibration coefficients in the database. The signal conversion strategy is used to build a conversion algorithm library to achieve deep conversion of various signal forms; The logic simplification strategy includes a data flow diagram for displaying the entire data processing process, an abstraction layer mechanism for decoupling the logic layer from the upper application layer, and a driving mechanism for implementing event-driven processing logic. The communication task unit is used to select a communication protocol that supports bidirectional communication and to package and transmit the processed data in real time via serial port or network. The system configuration unit is used to set the task stack size, priority, timers and semaphores, and to process tasks based on preset task schedules, and to monitor, optimize and adjust performance based on task execution. The data acquisition unit, the data processing unit, the communication task unit, and the system configuration unit are respectively set to execute concurrently in different threads; The communication module is used to transmit and display data in real time with the host computer via serial port, I2C or SPI, and to select the appropriate communication protocol for communication and testing to achieve system stability and real-time performance. The power management module is used to configure highly integrated power management chips, design low-power strategies, and perform real-time monitoring and management.

2. The multi-channel analog / digital signal acquisition system according to claim 1, characterized in that, The channel selection module includes: The anti-interference optimization unit is used to identify interference sources and perform noise characteristic analysis. Based on the identification and analysis results, the interference is shielded and isolated. Then, the anti-interference optimization algorithm is used to process the signal interference and introduces redundancy and compensation mechanisms to recover the data. An analog switch chip selection unit is used to select an analog switch chip with multiple inputs and low crosstalk and configure its parameters to obtain the analog switch chip; the parameters include the number of switch channels, signal type, switching frequency, and power consumption; The microcontroller control unit is used to select a microcontroller with GPIO pins and ADC conversion capabilities. It uses the high and low level configuration of the GPIO pins to control the channel selection of the analog switch chip, and then uses timers or interrupt control methods to update the pin status to realize signal switching. After each signal switching, a sampling command is sent to collect and process data. The circuit management unit is used to connect the switching circuit, control pin circuit, and power supply and ground connections.

3. The multi-channel analog / digital signal acquisition system according to claim 2, characterized in that, The anti-interference optimization unit includes: The identification subunit is used to identify and record potential interference sources in different signal sources to obtain interference information, and to analyze and evaluate the interference information in combination with the device's operating status and the surrounding environment to obtain the impact value of the interference information on signal quality. The analysis subunit is used to measure the spectral characteristics of background noise and signal noise using an oscilloscope or spectrum analyzer, and to obtain the amplitude, frequency distribution and intensity of the noise's impact on the signal. The hardware design subunit is used to separate signal lines from power lines using shielded cables or metal shells to reduce electromagnetic interference, implement shielding measures for sensitive signal loops and connecting lines, and introduce opto-isolation technology to prevent the transmission of interference signals. The anti-interference algorithm optimization subunit is used to implement the adaptive filtering algorithm and dynamically adjust the filtering parameters based on the identification and analysis results of the identification subunit and the analysis subunit to filter out interference signals. At the same time, through the comparison of multiple signals, cross-validation is used to judge and remove noise and abnormal data. The redundancy and compensation subunit is used to introduce redundant channels to maintain the integrity and accuracy of other channels, and to introduce data compensation algorithms to achieve self-repair of erroneous data.

4. The multi-channel analog / digital signal acquisition system according to claim 3, characterized in that, The analog-to-digital conversion module includes: An ADC chip selection unit is used to select a multi-channel ADC chip with high resolution and sampling rate, and to confirm the input range, number of channels and key parameters of the multi-channel ADC chip. It also checks the crosstalk, gain error, bias error and built-in reference voltage of the multi-channel ADC chip to achieve a simplified design of the multi-channel ADC chip. The circuit design unit is used to connect the outputs of multiple analog signal sources to the input of the ADC, and introduces signal conditioning circuits, decoupling capacitors and clock signals between the outputs and inputs to enhance and clean the input signals.

5. A multi-channel analog / digital signal acquisition system according to claim 4, characterized in that, The communication module is also used to convert the data format into JSON or structured format before sending the data, so that the host computer can complete the parsing.

6. A multi-channel analog / digital signal acquisition system according to claim 5, characterized in that, The low-power strategy includes a dynamic voltage regulation mechanism for adjusting the input voltage according to the system load, a sleep mechanism for implementing standby mode, and an event idle mechanism for shutting down unnecessary module events during the acquisition interval.

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