Package structure

Abstract

The invention discloses a packaging structure. The packaging structure comprises a plurality of lead frames, and each lead frame is provided with a concave part and a solid crystal face. The packaging structure also comprises an insulating part which covers the lead frame and is filled between the concave part of the lead frame and the lead frame. The insulating part defines an accommodating space and is provided with a plurality of openings, and the openings expose the solid crystal face of the lead frame. The packaging structure further comprises a photoelectric element and packaging glue. The photoelectric element is arranged in the containing space and electrically connected with the solid crystal face of the lead frame, and the packaging adhesive is arranged in the containing space and covers the photoelectric element.

Description

TECHNICAL FIELD

[0001] The present application relates to a packaging structure, and more particularly to a packaging structure containing optoelectronic elements. BACKGROUND

[0002] With the development of optoelectronic technology, optoelectronic elements have been widely applied in various electronic devices. For example, semiconductor materials containing group III and group V elements can be applied to various optoelectronic elements, such as light-emitting chips (e.g., light-emitting diodes or laser diodes), light-absorbing chips (e.g., photodetectors or solar cells), or power elements (e.g., switches or rectifiers), which can be used in the fields of lighting, medical treatment, display, vehicle, communication, sensing, power system, etc. Although the existing optoelectronic elements have generally met various needs, they are not satisfactory in all aspects, and further improvement is still needed. SUMMARY

[0003] In embodiments of the present application, the packaging structure contains a plurality of lead frames and an insulating portion, the lead frames have recessed portions and die attach surfaces, and the insulating portion fills the recessed portions and has a plurality of openings that can expose the die attach surfaces, so that when the optoelectronic element is bonded with the lead frames, the conductive members (e.g., metal solder) can be confined within the fixed area, thereby the electrodes of the optoelectronic element and the lead frames can be completely bonded, which effectively improves the bonding strength and reduces heat accumulation.

[0004] According to some embodiments of the present application, a packaging structure is provided. The packaging structure contains a substrate, the substrate contains a plurality of lead frames, each of the lead frames has a recessed portion and a die attach surface. The substrate also contains an insulating portion, the insulating portion covers the lead frames and fills between the recessed portions of the lead frames and the lead frames. The insulating portion defines a receiving space and has a plurality of openings, the openings expose the die attach surfaces of the lead frames. The packaging structure further contains an optoelectronic element and an encapsulation adhesive, the optoelectronic element is disposed in the receiving space and electrically connected with the die attach surfaces of the lead frames, and the encapsulation adhesive is disposed in the receiving space and covers the optoelectronic element. BRIEF DESCRIPTION OF DRAWINGS

[0005] The embodiments of the present application will be described below with reference to the accompanying drawings. It should be noted that various features are not drawn to scale and are only intended to illustrate the example. In fact, the size of the elements can be enlarged or reduced to clearly show the technical features of the embodiments of the present application.

[0006] Figure 1 is a partial cross-sectional view of a packaging structure according to some embodiments of the present application;

[0007] Figure 2 is a partial top view of a packaging structure according to some embodiments of the present application;

[0008] Figure 3is a partial plan view of a lead frame according to some embodiments of the present application;

[0009] Figure 4 is a partial plan view of a die-bonding surface and an insulating portion of a lead frame according to some embodiments of the present application;

[0010] Figure 5 is an enlarged view of a lead frame and an insulating portion according to some embodiments of the present application.

[0011] Symbol explanation:

[0012] 100: package structure

[0013] 10: substrate

[0014] 12: lead frame

[0015] 12B: conductive member

[0016] 12F: die-bonding surface

[0017] 12R: recessed portion

[0018] 14: insulating portion

[0019] 14S: accommodation space

[0020] 14T: opening

[0021] 14C: connecting surface

[0022] 14P: protruding surface

[0023] 40: optoelectronic element

[0024] 40N, 40P: electrode

[0025] 40S: semiconductor stack

[0026] 50: encapsulation

[0027] A-A': line

[0028] D1: depth

[0029] D12F: distance

[0030] h: distance

[0031] t, T12B: thickness

[0032] W14C, W14P: width DETAILED DESCRIPTION

[0033] The following detailed description is presented in terms of a number of different embodiments so that a thorough understanding can be attained. Descriptions of well-known elements can be presented in terms of functional summary form. Details of these well-known elements are well known in the art and need not be presented here. The description of the embodiments is not meant to limit the scope of the application. For example, if an embodiment of the application describes a first feature formed over or on a second feature, it is intended that the embodiment encompass both the first feature formed directly over or on the second feature, as well as the first feature formed indirectly over or on the second feature with intervening features present between the first and second features.

[0034] It should be understood that additional operations can be performed before, between, or after the operations described herein, and in other embodiments of the method, some of the operations can be replaced or omitted.

[0035] Furthermore, where spatially relative terms are used, such as "beneath", "below", "lower", "above", "upper", and the like, they are used for ease of describing the aspects of the figures only and to aid in the understanding of the spatial relationship between the various elements of the device as shown in the figures. These spatially relative terms are not to be construed as limiting the scope of the device to a specific orientation, as the device can be oriented in different directions and the described aspects will function in any orientation.

[0036] In the description, the word "substantially" is used to describe a qualitative property, namely, that a given value or range of values is approximately true. In some embodiments, the word "substantially" can be interpreted to mean within 20% of a given value or range of values, or within 10%, or within 5%, or within 3%, or within 2%, or within 1%, or within 0.5%. In the description, given numerical values are approximate unless otherwise stated. In the absence of the word "substantially", the given numerical value can be interpreted as exact.

[0037] Unless otherwise defined, all terms (including technical and scientific terms) used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this disclosure belongs. It will be further understood that terms, such as those defined in commonly used dictionaries, should be interpreted as having a meaning that is consistent with their meaning in the context of the relevant art and the present disclosure, and will not be interpreted in an overly literal or overly formal sense unless expressly so defined herein.

[0038] The different embodiments disclosed below can make use of the same reference numerals and / or letters. These repeated use of reference numerals and / or letters is for the purpose of simplifying and clarifying the different embodiments discussed.

[0039] Figure 1is a partial cross-sectional view of the package structure 100 according to some embodiments of the present application. Figure 2 is a partial top view of the package structure 100 according to some embodiments of the present application. For example, Figure 1 may be a cross-sectional view taken along the line A-A' of Figure 2 but embodiments of the present application are not limited thereto. It should be noted that, for the sake of brevity, Figure 1 and Figure 2 some components of the package structure 100 have been omitted. In addition, Figure 1 and Figure 2 may not correspond to each other completely.

[0040] Referring to Figure 1 and Figure 2 , in some embodiments, the package structure 100 includes a substrate 10, an optoelectronic element 40, and an encapsulation 50. Specifically, the optoelectronic element 40 and the encapsulation 50 are disposed on the substrate 10, and the encapsulation 50 covers the optoelectronic element 40.

[0041] In some embodiments, the substrate 10 includes a plurality of lead frames 12 and an insulating portion 14 covering the lead frames 12 and defining a receiving space 14S. Specifically, each lead frame 12 has a recess 12R and a die bonding surface 12F, and the insulating portion 14 covers the plurality of lead frames 12 and fills in the recesses 12R and between adjacent lead frames 12. The insulating portion 14 has a plurality of openings 14T, each exposing a corresponding die bonding surface 12F.

[0042] In some embodiments, the lead frames 12 can include a conductive material, such as a metal, a similar material, or a combination thereof, but embodiments of the present application are not limited thereto. For example, the metal can be gold (Au), nickel (Ni), platinum (Pt), palladium (Pd), iridium (Ir), titanium (Ti), chromium (Cr), tungsten (W), aluminum (Al), copper (Cu), a similar material, an alloy thereof, or a combination thereof, but embodiments of the present application are not limited thereto.

[0043] In some embodiments, the insulating portion 14 can include an insulating material, such as polyimide (PI), epoxy, silicone, another suitable material, or a combination thereof. In some embodiments, a filler can be added to the insulating material of the insulating portion 14 to make the insulating portion 14 have a light-reflecting or light-absorbing effect. The filler can be titanium oxide (TiO x ), silicon oxide (SiO xCarbon black, colored pigments, other suitable materials, or combinations thereof. The insulating portion 14 can be formed by coating, molding, other suitable methods, or combinations thereof, but the embodiments of the present invention are not limited thereto.

[0044] like Figure 1 As shown, in some embodiments, the ratio of the depth D1 of the recess 12R of the leadframe 12 to the thickness t of the leadframe 12 is substantially between 1 / 3 and 1 / 2. Here, the thickness t of the leadframe 12 can be defined as the maximum thickness of the leadframe 12 in the normal (vertical) direction. This ratio makes it easier to fully fill the recess 12R with components subsequently formed therein, such as the insulating portion 14, to prevent moisture from entering. Furthermore, the recess 12R formed by wet etching can have a smooth surface, which can prevent the components subsequently formed in the recess 12R from accumulating gas at the bottom during the filling process and creating voids, effectively preventing contaminants from the outside of the package structure 100 from entering the interior through the voids and causing contamination.

[0045] like Figure 1 and Figure 2 As shown, in some embodiments, the optoelectronic element 40 is disposed within the accommodating space 14S and electrically connected to the die-bonding surface 12F of the lead frame 12. In some embodiments, the optoelectronic element 40 includes a light-emitting element, a light-receiving element, or a logic element. For example, the light-emitting element may include a light-emitting diode (LED) or a laser diode (LD), the light-receiving element may include a photodiode (PD), and the logic element may include a phototransistor (photo transistor) or a photointegrated circuit (photo IC). In some embodiments, the optoelectronic element 40 includes a semiconductor stack 40S and a plurality of electrodes 40P, 40N, the electrodes 40P, 40N being located on the same side of the semiconductor stack 40S and connected to the die-bonding surface 12F of the lead frame 12 via a conductive element 12B. For example, electrodes 40P and 40N may have one or more metal bumps, and conductive element 12B may contain metal solder (which may contain metal particles and flux). The bumps of electrodes 40P and 40N may be connected to the die bond surface 12F of lead frame 12 by the metal solder, but the embodiments of the present invention are not limited thereto.

[0046] In some embodiments, the die-bonding surface 12F of the leadframe 12 is located within the orthographic projection of the optoelectronic element 40 onto the leadframe 12. In other words, the die-bonding surface 12F of the leadframe 12 is completely underneath the optoelectronic element 40. In addition, in some embodiments, the top-view area of the electrode 40P or 40N of the optoelectronic element 40 can be substantially the same as the top-view area of the die-bonding surface 12F of the leadframe 12, although embodiments of the present application are not limited thereto.

[0047] In some embodiments, the semiconductor stack 40S can comprise a semiconductor material, such as silicon, germanium, nitride, phosphide, arsenide, other suitable materials, or combinations thereof. In some embodiments, when the optoelectronic element 40 is a light-emitting element, the optoelectronic element 40 can emit visible light or non-visible light as desired. For example, the visible light can be violet, blue, green, red, or the like, and the non-visible light can be ultraviolet or far-infrared light, although embodiments of the present application are not limited thereto.

[0048] The electrodes 40P, 40N can comprise a conductive material, such as a metal, a nitride, an oxide, similar materials, or combinations thereof, although embodiments of the present application are not limited thereto. For example, the metal can be gold (Au), nickel (Ni), platinum (Pt), palladium (Pd), iridium (Ir), titanium (Ti), chromium (Cr), tungsten (W), aluminum (Al), copper (Cu), similar materials, alloys thereof, or combinations thereof, the nitride can comprise titanium nitride (TiN), and the oxide can comprise indium tin oxide (ITO) or indium zinc oxide (IZO), although embodiments of the present application are not limited thereto.

[0049] In some embodiments, the encapsulation 50 is disposed within the accommodation space 14S and covers the optoelectronic element 40. For example, the encapsulation 50 can be formed as a hemispherical encapsulation and completely encapsulates the optoelectronic element 40, although embodiments of the present application are not limited thereto. In some embodiments, the encapsulation 50 can comprise a wavelength conversion substance, such as a phosphor or a quantum dot (QD), although embodiments of the present application are not limited thereto.

[0050] Figure 3 FIG. 1C is a partial top view of the leadframe 12 according to some embodiments of the present application. As shown in FIG. 1C, the die-bonding surface 12F is an island-like conductive surface in some embodiments. For example, a wet etching process can be performed on a conductive metal sheet to create the recess 12R and form one or more die-bonding surfaces 12F. Figure 1 As shown in FIG. 1C, the die-bonding surface 12F is an island-like conductive surface in some embodiments. For example, a wet etching process can be performed on a conductive metal sheet to create the recess 12R and form one or more die-bonding surfaces 12F. Figure 3 As shown in FIG. 1C, the die-bonding surface 12F is an island-like conductive surface in some embodiments. For example, a wet etching process can be performed on a conductive metal sheet to create the recess 12R and form one or more die-bonding surfaces 12F.

[0051] Figure 4 FIG. 1D is a partial top view of the die-bonding surface 12F of the leadframe 12 and the insulating portion 14 according to some embodiments of the present application. Please refer to FIG. 1A and FIG. 1D simultaneously. Figure 1 As shown in FIG. 1D, the die-bonding surface 12F is an island-like conductive surface in some embodiments. For example, a wet etching process can be performed on a conductive metal sheet to create the recess 12R and form one or more die-bonding surfaces 12F. Figure 4In some embodiments, the insulating portion 14 further comprises a plurality of connecting surfaces 14C, each of which is adjacent to a corresponding opening 14T. That is, each of the connecting surfaces 14C is adjacent to the die-bonding surface 12F exposed by the corresponding opening 14T. In some embodiments, at least one of the connecting surfaces 14C surrounds the corresponding die-bonding surface 12F in a top view (e.g., the top view shown in FIG. 6). Figure 4

[0052] Figure 5 FIG. 7 shows a (partially cross-sectional) enlarged view of the lead frame 12 and the insulating portion 14 according to some embodiments of the present application. In some embodiments, a protruding surface 14P is further included between two adjacent die-bonding surfaces 12F. Specifically, two adjacent connecting surfaces 14C are included between two adjacent die-bonding surfaces 12F, and the protruding surface 14P is located between the two adjacent connecting surfaces 14C. That is, the connecting surfaces 14C are located between the protruding surface 14P and the die-bonding surface 12F. In some embodiments, the connecting surfaces 14C are substantially coplanar with the die-bonding surface 12F of the lead frame 12. In the present embodiment, the protruding surface 14P is connected to the die-bonding surface 12F through the connecting surfaces 14C, but embodiments of the present application are not limited thereto.

[0053] In some embodiments, the sum of the widths of the protruding surface 14P and the connecting surfaces 14C in the horizontal direction (i.e., width W14C + width W14P + width W14C) is less than or equal to the distance D12F between two adjacent lead frames 12. If the sum of the widths of the protruding surface 14P and the connecting surfaces 14C in the horizontal direction (i.e., width W14C + width W14P + width W14C) is greater than the distance D12F between two adjacent lead frames 12, it can cause the photoelectric element 40 to be not flat after being pressed when the photoelectric element 40 is mounted on the lead frame 12, and in turn cause the solder on both sides of the photoelectric element 40 to be not flat, resulting in uneven heat conduction, heat concentration, and other undesirable phenomena.

[0054] In addition, in some embodiments, the ratio of the distance h (see FIG. 7) between the highest point of the protruding surface 14P and the die-bonding surface 12F of the lead frame 12 in the normal (vertical) direction to the thickness T12B (see FIG. 7) of the conductive part 12B in the normal (vertical) direction is substantially between 1 / 3 and 1. Figure 5 Figure 1

[0055] In embodiments of the present application, the insulating portion 14 surrounds and covers the lead frame 12 to form a reflective cup, and exposes the island-shaped conductive plane (i.e., the die-bonding surface 12F) of the lead frame 12 at the bottom of the reflective cup to fix the photoelectric element 40. The area of the exposed island-shaped conductive plane (i.e., the die-bonding surface 12F) can be close to the area of the electrodes 40N, 40P of the photoelectric element 40. In a cross-sectional view (e.g., the cross-sectional view shown in FIG. 8), the area of the exposed island-shaped conductive plane (i.e., the die-bonding surface 12F) is substantially equal to the area of the electrodes 40N, 40P of the photoelectric element 40. Figure 1 Figure 5 ​​​​In a cross-sectional view (for example, as shown in FIG. 2), the insulation portion 14 between the die-bonding surfaces 12F has a protruding surface 14P higher than the die-bonding surfaces 12F and the connecting surface 14C. The protruding surface 14P is separated from the die-bonding surfaces 12F, and the two are connected by the connecting surface 14C. The connecting surface 14C is parallel to the die-bonding surfaces 12F.

[0056] The protruding surface 14P can, for example, limit the flux in the solder to the die-bonding surfaces 12F during reflow soldering, so that the flux does not cause the metal particles to fuse and connect to each other, resulting in electrical short-circuiting and product failure. In addition, because the solder is limited to the die-bonding surfaces 12F, the flux can effectively wet the electrodes 40N, 40P of the optoelectronic element 40 and the die-bonding surfaces 12F, so that the molten metal after the metal particles fuse can completely join the electrodes 40N, 40P and the die-bonding surfaces 12F, and the distribution of the solidified metal after the metal cools is more uniform.

[0057] In a top view (for example, as shown in FIG. 3), the die-bonding surfaces 12F of the lead frame 12 are surrounded by the connecting surface 14C of the insulation portion 14, and the connecting surface 14C is substantially conformal to the die-bonding surfaces 12F. If the optoelectronic element 40 is misaligned when mounted on the lead frame 12, the connecting surface 14C of the insulation portion 14 can serve as a buffer area to prevent the die-bonding surfaces 12F from being covered by the protruding surface 14P of the insulation portion 14, which would reduce the size of the die-bonding surfaces 12F and affect the bonding range of the molten solder. Figure 4

[0058] In summary, the embodiments of the present application expose the plurality of die-bonding surfaces conformally in the accommodation space through the plurality of openings of the insulation portion of the substrate, so that the exposed conductive area is approximately equal to the electrode area of the optoelectronic element, and the solder is concentrated between the electrodes of the optoelectronic element and the die-bonding surfaces, thereby improving the die-bonding yield and heat dissipation efficiency. In addition, the embodiments of the present application also limit the flowability of the solder during die bonding by providing the protruding surface between adjacent die-bonding surfaces, thereby reducing the probability of element failure due to electrical conduction.

[0059] The components of the above-described embodiments are summarized so that those of ordinary skill in the art can better understand the concepts of the embodiments of the present application. Those of ordinary skill in the art should understand that they can design or modify other manufacturing processes and structures based on the embodiments of the present application to achieve the same purposes and / or advantages as the embodiments described herein. Those of ordinary skill in the art should also understand that such equivalent structures do not deviate from the spirit and scope of the present application, and they can make various changes, substitutions, and replacements without departing from the spirit and scope of the present application. Therefore, the scope of protection of the present application is defined by the appended claims. In addition, although the present application has been disclosed with several preferred embodiments as above, it is not intended to limit the present application.

[0060] ​Reference throughout this specification to features, advantages, or similar language does not mean that all of the features and advantages that can be achieved in accordance with the present application should be or are implemented in any single embodiment of the application. Rather, language referring to the features and advantages is understood to mean that a specific feature, advantage, or characteristic described in connection with an embodiment is included in at least one embodiment of the application. Thus, discussions of features and advantages, and similar language, throughout this specification may, but do not necessarily, represent that the described feature, advantage, or characteristic is required in every implementation of the application.

[0061] Furthermore, the described features, advantages, and characteristics of the application can be combined in any suitable manner in one or more embodiments. One skilled in the relevant art will recognize, in light of the description herein, that the application can be practiced without one or more of the specific features or advantages of a particular embodiment. In other instances, additional features and advantages can be recognized in certain embodiments that can not be present in all embodiments of the application.

Claims

1. A packaging structure, comprising: The substrate includes: Multiple leadframes, each of which has a recess and a die-bonding surface; and An insulating portion covers the conductor frames and fills the recesses between the conductor frames and the conductor frames, wherein the insulating portion defines an accommodating space and has a plurality of openings that expose the die bond surfaces of the conductor frames; Optoelectronic components are disposed within the accommodating space and electrically connected to the die-bonding surfaces of the lead frames; and Encapsulating adhesive is placed within the accommodating space and covers the optoelectronic element.

2. The packaging structure of claim 1, wherein the die-bonding surfaces of the lead frames are located within the orthographic projection of the optoelectronic element onto the lead frames.

3. The packaging structure of claim 1, wherein the depth of the recess is in a ratio of 1 / 3 to 1 / 2 to the thickness of each lead frame.

4. The encapsulation structure of claim 1, wherein the insulating portion includes a plurality of connecting surfaces, the connecting surfaces being adjacent to the corresponding openings, and in a top view, the connecting surfaces surrounding the corresponding die-bonding surfaces.

5. The packaging structure of claim 4, wherein, in cross-section, at least one of the connecting surfaces and at least one of the die-bonding surfaces are coplanar.

6. The packaging structure of claim 4, wherein in cross-section, a protruding surface is provided between two adjacent die-bonding surfaces, and a connecting surface is provided between the protruding surface and the two adjacent die-bonding surfaces.

7. The packaging structure of claim 6, wherein the protruding surface is connected to the two adjacent die-bonding surfaces via the connecting surfaces.

8. The packaging structure of claim 6, wherein in the cross-section, the sum of the widths of the protruding surfaces and the connecting surfaces in the horizontal direction is less than or equal to the distance between two adjacent die-bonding surfaces.

9. The packaging structure of claim 6, wherein the optoelectronic element includes a semiconductor stack and a plurality of electrodes, the electrodes being located on the same side of the semiconductor stack and connected to the die-bonding surfaces of the lead frames respectively through a plurality of conductive elements.

10. The packaging structure of claim 9, wherein the ratio of the distance between the highest point of the protrusion and the die-bonding surfaces in the vertical direction to the thickness of the conductive elements in the vertical direction is between 1 / 3 and 1.

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