Method for manufacturing nitride semiconductor substrate

Abstract

The present disclosure provides a method for manufacturing a nitride semiconductor substrate capable of improving crystallinity. This method for manufacturing a nitride semiconductor substrate has: a step for forming a first nitride semiconductor layer containing aluminum on a substrate at a first temperature; changing the temperature of the substrate and the first nitride semiconductor layer to a second temperature higher than the first temperature; and forming a second nitride semiconductor layer including aluminum over the first nitride semiconductor layer at the second temperature, a first V / III ratio for the supply amount of the group V element and the supply amount of the group III element in the step of forming the first nitride semiconductor layer is greater than a second V / III ratio for the supply amount of the raw material of the group V element and the supply amount of the raw material of the group III element in the step of forming the second nitride semiconductor layer.

Description

Technical Field

[0001] This disclosure relates to a method for manufacturing a nitride semiconductor substrate. Background Technology

[0002] In semiconductor devices such as gallium nitride (GaN)-based high electron mobility transistors (HEMTs), nitride semiconductor substrates are used. These substrates include a silicon carbide (SiC) substrate and a nucleation layer such as an aluminum nitride (AlN) layer, on which a semiconductor layer such as a channel layer is formed.

[0003] Existing technical documents

[0004] Patent documents

[0005] Patent Document 1: Japanese Patent Application Publication No. 2021-073702

[0006] Patent Document 2: Japanese Patent Publication No. 2020-530939

[0007] Patent Document 3: Japanese Patent Application Publication No. 2018-206928

[0008] From the perspective of electrical properties such as electron mobility, it is desirable for the semiconductor layer to have good crystallinity. In conventional semiconductor devices, good crystallinity on the upper surface is achieved by forming a thick semiconductor layer. On the other hand, in recent years, with the increase in the operating speed of semiconductor devices such as HEMTs, heat generation has increased. Therefore, the demand for improving the crystallinity of nitride semiconductor substrates is constantly increasing, such as achieving good crystallinity even when the semiconductor layer is formed thin to improve the heat dissipation of the semiconductor device. Summary of the Invention

[0009] The purpose of this disclosure is to provide a method for manufacturing a nitride semiconductor substrate that can improve crystallinity.

[0010] The method for manufacturing a nitride semiconductor substrate disclosed herein includes the following steps: forming a first nitride semiconductor layer comprising aluminum on a substrate at a first temperature; changing the temperature of the substrate and the first nitride semiconductor layer to a second temperature higher than the first temperature; and forming a second nitride semiconductor layer comprising aluminum on the first nitride semiconductor layer at the second temperature, wherein a first V / III ratio of the amount of group V elements supplied to the amount of group III elements supplied in the step of forming the first nitride semiconductor layer is greater than a second V / III ratio of the amount of group V elements supplied to the amount of group III elements supplied in the step of forming the second nitride semiconductor layer.

[0011] Invention Effects

[0012] According to this disclosure, the crystallinity of nitride semiconductor substrates can be improved. Attached Figure Description

[0013] Figure 1 This is a diagram showing the changes in temperature and flow rate of raw material gas in the manufacturing method of the nitride semiconductor substrate according to the first embodiment.

[0014] Figure 2 This is a cross-sectional view (one of the first embodiments) showing a method for manufacturing a nitride semiconductor substrate.

[0015] Figure 3 This is a cross-sectional view (second one) showing a method for manufacturing a nitride semiconductor substrate according to the first embodiment.

[0016] Figure 4 This is a diagram showing how the temperature and the flow rate of the raw material gas change in the manufacturing method of the nitride semiconductor substrate according to the second embodiment.

[0017] Figure 5 This is a diagram showing the changes in temperature and flow rate of raw material gas in the manufacturing method of the nitride semiconductor substrate according to the third embodiment.

[0018] Figure 6 This is a cross-sectional view showing a HEMT manufactured using a nitride semiconductor substrate.

[0019] Explanation of reference numerals in the attached figures:

[0020] 1: Nitride semiconductor substrate; 10: Substrate; 20: Semiconductor laminate; 21: First AlN layer; 22: Second AlN layer; 23: Channel layer; 24: Barrier layer; 25: Cap layer; 30: Insulating film; 30D, 30G, 30S: Openings; 40D, 40S: Recesses; 42D, 42S: Regenerated layers; 44D: Drain electrode; 44S: Source electrode; 50: Gate electrode; 55: Two-dimensional electron gas. Detailed Implementation

[0021] [Description of embodiments of this disclosure]

[0022] First, the implementation plan disclosed herein will be listed for illustration.

[0023] [1] A method for manufacturing a nitride semiconductor substrate according to one aspect of the present disclosure includes the following steps: forming a first nitride semiconductor layer containing aluminum on a substrate at a first temperature; changing the temperature of the substrate and the first nitride semiconductor layer to a second temperature higher than the first temperature; and forming a second nitride semiconductor layer containing aluminum on the first nitride semiconductor layer at the second temperature, wherein a first V / III ratio of the amount of group V elements supplied to the amount of group III elements supplied in the step of forming the first nitride semiconductor layer is greater than a second V / III ratio of the amount of group V elements supplied to the amount of group III elements supplied in the step of forming the second nitride semiconductor layer.

[0024] By making the first V / III ratio greater than the second V / III ratio and the second temperature higher than the first temperature, the first nitride semiconductor layer can be formed more densely than the second nitride semiconductor layer, and atomic migration is more likely to occur during the formation of the second nitride semiconductor layer compared to the formation of the first nitride semiconductor layer. Furthermore, as the temperature changes from the first temperature to the second temperature, the atoms constituting the first nitride semiconductor layer undergo thermal diffusion, improving the flatness of the upper surface of the first nitride semiconductor layer. At this time, trenches sometimes locally form in the first nitride semiconductor layer due to steps included in the substrate. However, even if trenches form, atomic migration is readily achieved during the formation of the second nitride semiconductor layer, filling the trenches through the second nitride semiconductor layer. As a result, good crystallinity is obtained in the second nitride semiconductor layer.

[0025] [2] In [1], the first nitride semiconductor layer and the second nitride semiconductor layer may also be aluminum nitride layers. In this case, the first nitride semiconductor layer and the second nitride semiconductor layer are easily and stably formed.

[0026] [3] In [1] or [2], the first temperature may be 600°C or higher and 1000°C or lower, and the second temperature may be 1000°C or higher and 1200°C or lower. When the first temperature is 600°C or higher, it is easier to form the first nitride semiconductor layer; when the first temperature is lower than 1000°C, atomic migration is less likely to occur during the formation of the first nitride semiconductor layer. Furthermore, when the second temperature is 1000°C or higher, atomic migration is easier to occur during the formation of the second nitride semiconductor layer; and when the second temperature is lower than 1200°C, it is easier to form the first and second nitride semiconductor layers in the same furnace without opening to the atmosphere.

[0027] [4] In any of [1] to [3], the difference between the second temperature and the first temperature may be 100°C or more. In this case, the first nitride semiconductor layer is easily formed densely, and the second nitride semiconductor layer is easily formed with good crystallinity.

[0028] [5] In any of [1] to [4], the first pressure in the furnace during the process of forming the first nitride semiconductor layer may be higher than the second pressure in the furnace during the process of forming the second nitride semiconductor layer. In this case, the first nitride semiconductor layer is easily formed densely, and the second nitride semiconductor layer is easily formed with good crystallinity.

[0029] [6] In any of [1] to [5], the total thickness of the first nitride semiconductor layer and the second nitride semiconductor layer may be 50 nm or less. By making the total thickness 50 nm or less, it is easy to transfer heat from the semiconductor layer formed on the second nitride semiconductor layer to the substrate.

[0030] [7] In any of [1] to [6], the second nitride semiconductor layer may also be thicker than the first nitride semiconductor layer. In this case, it is easier to fill the trench formed in the first nitride semiconductor layer through the second nitride semiconductor layer.

[0031] [8] In any of [1] to [7], the thickness of the first nitride semiconductor layer may be 3 nm or more and 20 nm or less, and the thickness of the second nitride semiconductor layer may be 5 nm or more and 30 nm or less. By making the thickness of the first nitride semiconductor layer 20 nm or less and the thickness of the second nitride semiconductor layer 30 nm or less, it is easier to transfer heat from the semiconductor layer formed on the second nitride semiconductor layer to the substrate. On the other hand, it is not easy to form a first nitride semiconductor layer with a thickness of less than 3 nm. Furthermore, when the thickness of the second nitride semiconductor layer is less than 5 nm, it may be difficult to fill the trench formed in the first nitride semiconductor layer.

[0032] [9] In any of [1] to [8], the step of changing the temperature of the substrate and the first nitride semiconductor layer to the second temperature may include the following steps: changing the temperature of the substrate and the first nitride semiconductor layer to a third temperature higher than the second temperature; and changing the temperature of the substrate and the first nitride semiconductor layer from the third temperature to the second temperature. In this case, at the third temperature, the thermal diffusion of atoms constituting the first nitride semiconductor layer becomes more active, and the flatness of the upper surface of the first nitride semiconductor layer is further improved.

[0033]

[10] In [9], the third temperature may also be above 1100°C and below 1300°C. When the third temperature is above 1100°C, it is easier to make the thermal diffusion of the atoms constituting the first nitride semiconductor layer active. When the third temperature is below 1300°C, it is easier to form the first nitride semiconductor layer and the second nitride semiconductor layer in the same furnace without opening to the atmosphere.

[0034]

[11] In any of [1] to

[10] , it is also possible to have the following step between the step of changing the temperature of the substrate and the first nitride semiconductor layer to the second temperature and the step of forming the second nitride semiconductor layer: maintaining the temperature of the substrate and the first nitride semiconductor layer at the second temperature without forming the second nitride semiconductor layer. In this case, during the period of maintaining the second temperature, atoms undergo thermal diffusion, and the flatness of the upper surface of the first nitride semiconductor layer is further improved.

[0035]

[12] In any of [1] to

[11] , the substrate may also be a silicon carbide substrate. In this case, the first nitride semiconductor layer and the second nitride semiconductor layer are easily formed with good crystallinity.

[0036] [Details of the embodiments of this disclosure]

[0037] The embodiments of this disclosure will be described in detail below, but this disclosure is not limited thereto. It should be noted that in this specification and drawings, constituent elements with substantially the same functional configuration may sometimes omit repeated descriptions by using the same reference numerals.

[0038] (First Implementation)

[0039] The first embodiment will be described. The first embodiment relates to a method for manufacturing a nitride semiconductor substrate. Figure 1 This is a diagram showing the changes in temperature and flow rate of raw material gas in the manufacturing method of the nitride semiconductor substrate according to the first embodiment. Figure 2 and Figure 3 This is a cross-sectional view showing a method for manufacturing a nitride semiconductor substrate according to the first embodiment.

[0040] In the first embodiment, during the period from time t0 to time t11, such as Figure 2As shown, a first aluminum nitride (AlN) layer 21 is formed on a substrate 10. The substrate 10 is, for example, a silicon carbide (SiC) substrate. When the substrate 10 is a SiC substrate, the first AlN layer 21 is formed on the silicon (Si) polar surface of the substrate 10. The first AlN layer 21 can be formed, for example, by metal-organic chemical vapor deposition (MOCVD). When forming the first AlN layer 21, as... Figure 1 As shown, the temperature of the substrate 10 is set to a first temperature T1, and the pressure inside the furnace is set to a first pressure P1. For example, the first temperature T1 is 600°C or higher and 1000°C or lower, and the first pressure P1 is 10 kPa or higher and 40 kPa or lower. Furthermore, trimethylaluminum (TMA) is used as the raw material for aluminum (Al), a group III element, and ammonia (NH3) is used as the raw material for nitrogen (N), a group V element. For example, when forming the first AlN layer 21, the flow rates F31 of TMA and F51 of NH3 are adjusted according to the size of the furnace, so that the first V / III ratio of the N supply (moles) to the Al supply (moles) is 5000 or higher and 20000 or lower. The first AlN layer 21 is an example of a first nitride semiconductor layer.

[0041] The formation of the first AlN layer 21 is completed by stopping the supply of TMA to the furnace at time t11. The thickness of the first AlN layer 21 is, for example, 3 nm or more and 20 nm or less. Next, during the period from time t11 to time t12, the temperature of the substrate 10 and the first AlN layer 21 is changed from a first temperature T1 to a second temperature T2. The second temperature T2 is higher than the first temperature T1. During the period from time t11 to time t12, the pressure inside the furnace is reduced from a first pressure P1 to a second pressure P2, and the flow rate of NH3 is reduced from flow rate F51 to flow rate F52. For example, the second temperature T2 is 1000°C or more and 1200°C or less, and the second pressure P2 is 3 kPa or more and 30 kPa or less. Furthermore, the supply of TMA remains stopped. Therefore, no AlN layer is formed during the period from time t11 to time t12.

[0042] Next, the formation of the second AlN layer 22 begins by restarting the supply of TMA to the furnace at time t12. Furthermore, the formation of the second AlN layer 22 is completed by stopping the supply of TMA to the furnace at time t13. That is, as... Figure 3As shown, during the period from time t12 to time t13, a second AlN layer 22 is formed on top of the first AlN layer 21. The thickness of the second AlN layer 22 is, for example, 5 nm or more and 30 nm or less. The second AlN layer 22 can be formed, for example, by MOCVD. When forming the second AlN layer 22, the temperature of the substrate 10 and the first AlN layer 21 is set to a second temperature T2, and the pressure inside the furnace is set to a second pressure P2. For example, when forming the second AlN layer 22, the flow rates of TMA F31 and NH3 F52 are adjusted according to the size of the furnace so that the second V / III ratio of the N supply (moles) to the Al supply (moles) is 2000 or less. From a migration viewpoint, a low second V / III ratio is preferred. For example, it can be 50 or less, or 1 or less. The first V / III ratio is greater than the second V / III ratio. The second AlN layer 22 is an example of a second nitride semiconductor layer. The value of the flow rate F31 of the TMA when forming the second AlN layer 22 can be the same as the value of the flow rate F31 of the TMA when forming the first AlN layer 21.

[0043] In this way, a nitride semiconductor substrate 1 comprising a substrate 10, a first AlN layer 21, and a second AlN layer 22 can be manufactured.

[0044] In the first embodiment, the first V / III ratio is greater than the second V / III ratio. For example, the first AlN layer 21 is formed at a first temperature T1 of 600°C or higher and below 1000°C, and the second AlN layer 22 is formed at a second temperature T2 of 1000°C or higher and below 1200°C. Therefore, the first AlN layer 21 can be formed more densely than the second AlN layer 22, and atomic migration is more likely to occur when forming the second AlN layer 22 compared to when forming the first AlN layer 21. Furthermore, when the temperature changes from the first temperature T1 to the second temperature T2, the atoms constituting the first AlN layer 21 undergo thermal diffusion, and the flatness of the upper surface of the first AlN layer 21 is improved. At this time, sometimes grooves caused by steps included in the substrate 10 are locally generated in the first AlN layer 21. However, even if grooves are generated, atomic migration is still likely to occur when forming the second AlN layer 22. The grooves are filled by the second AlN layer 22. As a result, good crystallinity is achieved in the second AlN layer 22, and good flatness is obtained on the upper surface of the second AlN layer 22. Therefore, by using the second AlN layer 22 as a nucleation layer, a semiconductor layer with good crystallinity, even when thin, can be formed on the nitride semiconductor substrate 1. Moreover, by thinning the semiconductor layer, the heat dissipation of semiconductor devices such as HEMTs that include the semiconductor layer can be improved.

[0045] By setting the first temperature T1 to 600°C or higher, the first AlN layer 21 is easily formed. By setting the first temperature T1 to below 1000°C, atomic migration is less likely to occur during the formation of the first AlN layer 21, making it easier to form a dense first AlN layer 21. Furthermore, by setting the second temperature T2 to 1000°C or higher, atomic migration is easier to occur during the formation of the second AlN layer 22, making it easier to fill the grooves created in the first AlN layer 21 through the second AlN layer 22. By setting the second temperature T2 to 1200°C or lower, the first AlN layer 21 and the second AlN layer 22 can be easily formed in the same furnace without being exposed to the atmosphere. The first temperature T1 can be 650°C or higher and 850°C or lower. The second temperature T2 can be 1050°C or higher and 1150°C or lower.

[0046] By making the difference between the second temperature T2 and the first temperature T1 greater than 100°C, the first AlN layer 21 can be formed densely, and the second AlN layer 22 can be formed with good crystallinity. The difference between the second temperature T2 and the first temperature T1 can be greater than 250°C or greater than 300°C.

[0047] By making the first pressure P1 higher than the second pressure P2, it is easier to form a dense first AlN layer 21 and a second AlN layer 22 with good crystallinity.

[0048] By making the total thickness of the first AlN layer 21 and the second AlN layer 22 less than 50 nm, heat can be easily transferred from the semiconductor layer formed on the second AlN layer 22 to the substrate 10. The total thickness can be less than 40 nm or less, or less than 30 nm. Furthermore, by making the second AlN layer 22 thicker than the first AlN layer 21, it is easier to fill the trench formed on the first AlN layer 21 through the second AlN layer 22.

[0049] For example, the thickness of the first AlN layer 21 is 3 nm or more and 20 nm or less, and the thickness of the second AlN layer 22 is 5 nm or more and 30 nm or less. By making the thickness of the first AlN layer 21 less than 20 nm and the thickness of the second AlN layer 22 less than 30 nm, it is easy to transfer heat from the semiconductor layer formed on the second AlN layer 22 to the substrate 10. On the other hand, it is not easy to form a first AlN layer 21 with a thickness of less than 3 nm. Furthermore, when the thickness of the second AlN layer 22 is less than 5 nm, it may be difficult to fill the trenches formed in the first AlN layer 21.

[0050] By making the substrate 10 a silicon carbide substrate with a high thermal conductivity, a first AlN layer 21 and a second AlN layer 22 are formed on the substrate 10 in a relatively thin manner, thereby making it easier to further improve heat dissipation.

[0051] (Second Implementation)

[0052] Next, the second embodiment will be described. The second embodiment differs from the first embodiment mainly in the manner of temperature change between the formation of the first AlN layer 21 and the formation of the second AlN layer 22. Figure 4 This is a diagram showing how the temperature and the flow rate of the raw material gas change in the manufacturing method of the nitride semiconductor substrate according to the second embodiment.

[0053] In the second embodiment, during the period from time t0 to time t21, a first AlN layer 21 is formed on the substrate 10 (see reference). Figure 2 The first AlN layer 21 is formed under the same conditions as in the first embodiment.

[0054] The formation of the first AlN layer 21 is completed by stopping the supply of TMA to the furnace at time t21. Then, from time t21 to time t22, the temperature of the substrate 10 and the first AlN layer 21 is changed from a first temperature T1 to a third temperature T3. The third temperature T3 is higher than the second temperature T2. For example, the third temperature T3 is 1100°C or higher and 1300°C or lower. Next, from time t22 to time t23, the temperature of the substrate 10 and the first AlN layer 21 is maintained at the third temperature T3. The time from time t22 to time t23 is, for example, 1 minute or more and 60 minutes or less. Then, from time t23 to time t24, the temperature of the substrate 10 and the first AlN layer 21 is changed from the third temperature T3 to the second temperature T2. During the period from time t21 to time t24, the pressure inside the furnace is reduced from the first pressure P1 to the second pressure P2, and the flow rate of NH3 is reduced from flow rate F51 to flow rate F52. Furthermore, the supply of TMA remains stopped. Therefore, no AlN layer is formed during the period from time t21 to time t24.

[0055] Next, the formation of the second AlN layer 22 begins by restarting the supply of TMA to the furnace at time t24. Furthermore, the formation of the second AlN layer 22 is completed by stopping the supply of TMA to the furnace at time t25. That is, during the period from time t24 to time t25, the second AlN layer 22 is formed on top of the first AlN layer 21 (see reference). Figure 3 The second AlN layer 22 is formed under the same conditions as in the second embodiment.

[0056] In this way, a nitride semiconductor substrate 1 can be manufactured.

[0057] In the second embodiment, between the formation of the first AlN layer 21 and the formation of the second AlN layer 22, the temperature of the first AlN layer 21 is set to a third temperature T3, which is higher than the second temperature T2. Therefore, the thermal diffusion of Al and N atoms constituting the first AlN layer 21 becomes more active, and the flatness of the upper surface of the first AlN layer 21 is further improved. Consequently, good crystallinity is obtained through the second AlN layer 22, and good flatness is achieved on the upper surface of the second AlN layer 22.

[0058] By setting the third temperature T3 above 1100°C, the thermal diffusion of atoms constituting the first AlN layer 21 becomes more active. By setting the third temperature T3 below 1300°C, the first AlN layer 21 and the second AlN layer 22 can be formed easily in the same furnace without being exposed to the atmosphere. The third temperature T3 can be above 1150°C and below 1250°C.

[0059] (Third Implementation)

[0060] Next, the third embodiment will be described. The third embodiment differs from the first embodiment mainly in the manner of temperature change between the formation of the first AlN layer 21 and the formation of the second AlN layer 22. Figure 5 This is a diagram showing the changes in temperature and flow rate of raw material gas in the manufacturing method of the nitride semiconductor substrate according to the third embodiment.

[0061] In the third embodiment, during the period from time t0 to time t31, a first AlN layer 21 is formed on the substrate 10 (see reference). Figure 2 The first AlN layer 21 is formed under the same conditions as in the first embodiment.

[0062] The formation of the first AlN layer 21 is completed by stopping the supply of TMA to the furnace at time t31. Then, from time t31 to time t32, the temperature of the substrate 10 and the first AlN layer 21 is changed from a first temperature T1 to a second temperature T2. Next, from time t32 to time t33, the temperature of the substrate 10 and the first AlN layer 21 is maintained at the second temperature T2. The time from time t32 to time t33 is, for example, more than 1 minute and less than 60 minutes. During the time from time t31 to time t33, the pressure inside the furnace is reduced from a first pressure P1 to a second pressure P2, and the flow rate of NH3 is reduced from flow rate F51 to flow rate F52. Furthermore, the supply of TMA remains stopped. Therefore, no AlN layer is formed during the time from time t31 to time t33.

[0063] Next, the formation of the second AlN layer 22 begins by restarting the supply of TMA to the furnace at time t33. Furthermore, the formation of the second AlN layer 22 is completed by stopping the supply of TMA to the furnace at time t34. That is, during the period from time t33 to time t34, the second AlN layer 22 is formed on top of the first AlN layer 21 (see reference). Figure 3 The second AlN layer 22 is formed under the same conditions as in the second embodiment.

[0064] In this way, a nitride semiconductor substrate 1 can be manufactured.

[0065] In the third embodiment, during the period from time t32 to time t33 between the formation of the first AlN layer 21 and the formation of the second AlN layer 22, the temperature of the first AlN layer 21 is maintained at a second temperature T2. Therefore, the thermal diffusion time of the Al and N atoms constituting the first AlN layer 21 is prolonged, and the flatness of the upper surface of the first AlN layer 21 is further improved. Consequently, better crystallinity is obtained through the second AlN layer 22, and a better flatness is achieved on the upper surface of the second AlN layer 22.

[0066] (HEMT)

[0067] Next, an example of a HEMT manufactured using a nitride semiconductor substrate 1 will be described. Figure 6 This is a cross-sectional view showing a HEMT manufactured using a nitride semiconductor substrate 1.

[0068] like Figure 6 As shown, the HEMT2 manufactured using a nitride semiconductor substrate 1 includes: a substrate 10, a semiconductor laminate 20, an insulating film 30, a gate electrode 50, a source electrode 44S, and a drain electrode 44D.

[0069] The semiconductor stack 20 has a first AlN layer 21, a second AlN layer 22, a channel layer 23, a barrier layer 24, a cap layer 25, a regeneration layer 42S, and a regeneration layer 42D.

[0070] A channel layer 23 is located above the second AlN layer 22. The channel layer 23 is, for example, an undoped gallium nitride (GaN) layer. A barrier layer 24 is located above the channel layer 23. The barrier layer 24 is, for example, an n-type AlGaN layer. A two-dimensional electron gas (2DEG) 55 exists near the upper surface of the channel layer 23. A cap layer 25 is located above the barrier layer 24. The cap layer 25 is, for example, an n-type GaN layer.

[0071] A recess 40S for the active electrode and a recess 40D for the drain electrode are formed in a portion of the cap layer 25, the barrier layer 24, and the channel layer 23. The recesses 40S and 40D penetrate the cap layer 25 and the barrier layer 24 and enter the channel layer 23. The channel layer 23 is exposed from the recesses 40S and 40D.

[0072] An insulating film 30 is located above the cap layer 25. The insulating film 30 is, for example, a silicon nitride (SiN) film. An opening 30S for the active electrode and an opening 30D for the drain electrode are formed on the insulating film 30. The opening 30S is connected to the recess 40S, and the opening 30D is connected to the recess 40D.

[0073] The regenerated layer 42S lies above the channel layer 23 within the recess 40S and the opening 30S. The regenerated layer 42D lies above the channel layer 23 within the recess 40D and the opening 30D. The regenerated layers 42S and 42D are, for example, n-type GaN layers. The resistivity of the regenerated layers 42S and 42D is lower than that of the channel layer 23.

[0074] The source electrode 44S is located on top of the regenerated layer 42S, and the drain electrode 44D is located on top of the regenerated layer 42D. The source electrode 44S is in direct contact with the regenerated layer 42S, and the drain electrode 44D is in direct contact with the regenerated layer 42D. The source electrode 44S is in ohmic contact with the regenerated layer 42S, and the drain electrode 44D is in ohmic contact with the regenerated layer 42D.

[0075] An opening 30G for a gate is formed in the insulating film 30. The opening 30G is located between the openings 30S and 30D. The gate electrode 50 is disposed on the insulating film 30, passes through the opening 30G, and makes a Schottky contact with the semiconductor stack 20.

[0076] In such a HEMT2, a channel layer 23, a barrier layer 24, and a cap layer 25 with good crystallinity, even when thin, can be formed on the second AlN layer 22. For example, when the channel layer 23 is a GaN layer with a Miller index of (002) on the upper surface and a thickness of 200 nm, the half-width of the X-ray rocking curve (XRC) on the upper surface of the channel layer 23 can be less than 200 arcsec.

[0077] In this disclosure, the first nitride semiconductor layer and the second nitride semiconductor layer are not limited to aluminum nitride layers. The composition of the first nitride semiconductor layer can be In... X1 Al Y1 Ga 1－X1－Y1 N (0≤X1<1, 0<Y1≤1, 0<X1+Y1≤1) represents the second nitride semiconductor layer. X2 Al Y2 Ga 1－X2－Y2N(0≤X2<1、0<Y2≤1、0<X2+Y2≤1) represents the first and second nitride semiconductor layers. However, when the first and second nitride semiconductor layers are aluminum nitride layers, it is easy to form the first and second nitride semiconductor layers stably.

[0078] Here, the experiments conducted by the inventors will be described. In these experiments, four samples, No.1, No.2, No.3, and No.4, were prepared.

[0079] In Samples No. 1 and No. 2, following the second embodiment, a first AlN layer 21 and a second AlN layer 22 were formed on the SiC substrate 10, followed by a GaN layer. The thickness of the first AlN layer 21 was set to 10 nm, and the thickness of the second AlN layer 22 was set to 10 nm. In Sample No. 1, the thickness of the GaN layer was set to 200 nm, and in Sample No. 2, the thickness of the GaN layer was set to 400 nm. Furthermore, the first temperature T1 was set to 700 °C, the third temperature T3 was set to 1100 °C, and the second temperature T2 was set to 1000 °C.

[0080] In samples No. 3 and No. 4, the substrate temperature was set to 1100℃, and an AlN layer with a thickness of 20 nm was formed on the SiC substrate, followed by a GaN layer. In sample No. 3, the GaN layer thickness was set to 200 nm, and in sample No. 4, the GaN layer thickness was set to 400 nm.

[0081] Then, the half-width of the X-ray rocking curves of the upper surface of the GaN layer for each of the samples No. 1, No. 2, No. 3, and No. 4 was measured. The Miller index of the upper surface of the GaN layer was (002). The results are shown in Table 1.

[0082] [Table 1]

[0083] Sample GaN layer thickness (nm) Half-width (arsec) No.1 200 192 No.2 400 207 No. 3 200 550 No. 4 400 407

[0084] As shown in Table 1, in sample No. 2, the half-width is 207 arcsec, and in sample No. 4, the half-width is 407 arcsec, indicating good crystallinity. However, due to the 400 nm thickness of the GaN layer, heat dissipation may be low. In sample No. 3, the GaN layer thickness is 200 nm, thus the heat dissipation is higher compared to samples No. 2 and No. 4, but the half-width is 550 arcsec, indicating low crystallinity. In contrast, in sample No. 1, the GaN layer thickness is 200 nm, and the half-width is 192 arcsec. Therefore, sample No. 1 exhibits good crystallinity and high heat dissipation in the GaN layer.

[0085] The embodiments have been described in detail above, but this disclosure is not limited to specific embodiments. Various modifications and alterations can be made within the scope of the claims.

Claims

1. A method for manufacturing a nitride semiconductor substrate, comprising the following steps: A first aluminum nitride semiconductor layer is formed on a substrate at a first temperature; The temperature of the substrate and the first nitride semiconductor layer is changed to a second temperature higher than the first temperature; and A second aluminum-containing semiconductor layer is formed on top of the first nitride semiconductor layer at the second temperature. The first V / III ratio of the supply of group V elements to the supply of group III elements in the process of forming the first nitride semiconductor layer is greater than the second V / III ratio of the supply of group V raw materials to the supply of group III raw materials in the process of forming the second nitride semiconductor layer.

2. The method for manufacturing a nitride semiconductor substrate according to claim 1, wherein, The first nitride semiconductor layer and the second nitride semiconductor layer are aluminum nitride layers.

3. The method for manufacturing a nitride semiconductor substrate according to claim 1 or 2, wherein, The first temperature is above 600℃ and below 1000℃. The second temperature is above 1000°C and below 1200°C.

4. The method for manufacturing a nitride semiconductor substrate according to claim 1 or 2, wherein, The difference between the second temperature and the first temperature is more than 100°C.

5. The method for manufacturing a nitride semiconductor substrate according to claim 1 or 2, wherein, The first pressure inside the furnace during the process of forming the first nitride semiconductor layer is higher than the second pressure inside the furnace during the process of forming the second nitride semiconductor layer.

6. The method for manufacturing a nitride semiconductor substrate according to claim 1 or 2, wherein, The total thickness of the first nitride semiconductor layer and the second nitride semiconductor layer is less than 50 nm.

7. The method for manufacturing a nitride semiconductor substrate according to claim 1 or 2, wherein, The second nitride semiconductor layer is thicker than the first nitride semiconductor layer.

8. The method for manufacturing a nitride semiconductor substrate according to claim 1 or 2, wherein, The thickness of the first nitride semiconductor layer is 3 nm or more and 20 nm or less. The thickness of the second nitride semiconductor layer is greater than 5 nm and less than 30 nm.

9. The method for manufacturing a nitride semiconductor substrate according to claim 1 or 2, wherein, The process of changing the temperature of the substrate and the first nitride semiconductor layer to the second temperature includes the following steps; The temperature of the substrate and the first nitride semiconductor layer is changed to a third temperature that is higher than the second temperature; as well as The temperature of the substrate and the first nitride semiconductor layer is changed from the third temperature to the second temperature.

10. The method for manufacturing a nitride semiconductor substrate according to claim 9, wherein, The third temperature is above 1100℃ and below 1300℃.

11. The method for manufacturing a nitride semiconductor substrate according to claim 1 or 2, wherein, Between the step of changing the temperature of the substrate and the first nitride semiconductor layer to the second temperature and the step of forming the second nitride semiconductor layer, there is the following step: maintaining the temperature of the substrate and the first nitride semiconductor layer at the second temperature without forming the second nitride semiconductor layer.

12. The method for manufacturing a nitride semiconductor substrate according to claim 1 or 2, wherein, The substrate is a silicon carbide substrate.

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