Capacitive current-based IGBT gate thimble failure detection method in MMC

Abstract

The invention relates to a capacitance current-based IGBT gate thimble failure detection method in an MMC, and belongs to the technical field of power electronic equipment detection. The method comprises the following steps: establishing an MMC simulation model, and extracting a capacitor voltage and a switching signal of each sub-module; calculating capacitance current according to the capacitance voltage; comparing the capacitance current with a preset current threshold value; when the capacitance current is smaller than the current threshold value, it is judged that direct connection occurs to the IGBT, and at least one fault accumulation index is calculated and comprises accumulated direct connection time or accumulated instantaneous direct connection energy; comparing the fault accumulation index with a fault threshold value, wherein the fault threshold value comprises a time threshold value or an energy threshold value; when the accumulated direct connection time is larger than a time threshold value or the accumulated instantaneous direct connection energy is larger than an energy threshold value, it is judged that IGBT grid ejector pin failure happens to the sub-module; and when it is judged that the IGBT fails, the specific IGBT which fails is positioned according to the sub-module switching signal at the moment.

Description

Technical Field

[0001] This invention belongs to the field of power electronic equipment testing technology, and relates to a method for detecting IGBT gate pin failure in MMC based on capacitance current. Background Technology

[0002] Modular multilevel converters (MMCs) are core components of modern flexible direct current transmission (VSC-HVDC) systems. With their high output level count, low harmonic content, low switching losses, easy system expansion, and fault tolerance, MMCs have found widespread application in renewable energy grid integration, asynchronous grid interconnection, and urban power supply.

[0003] The basic building blocks of a power converter system (MC) are numerous cascaded submodules. Each submodule typically contains several insulated-gate bipolar transistor (IGBT) power devices and corresponding diodes. IGBTs, as key switching elements in the submodules, are primarily packaged in two forms: soldered and press-fit. Press-fit IGBTs, due to their unique packaging structure, offer advantages such as strong double-sided heat dissipation, large rated current capacity, excellent thermal cycling resistance, and a tendency to exhibit short-circuit failure mode in case of a fault. These advantages significantly improve the operational reliability and power density of the converter, making them widely used in flexible DC transmission projects requiring high reliability. However, precisely because of their crucial role, the failure of press-fit IGBTs directly threatens the safe and stable operation of the entire transmission system. Therefore, developing effective and timely failure detection technologies for press-fit IGBT devices in MMC submodules is of paramount importance for ensuring power system safety.

[0004] Typically, the lifecycle failure modes of IGBT devices can be divided into three stages: early failure, accidental failure, and aging failure. Currently, existing research and diagnostic techniques for IGBT failure mainly focus on the aging failure stage, such as open-circuit or short-circuit faults caused by bond wire fatigue fracture or solder layer delamination. However, research on the early failure stage is relatively limited. Early failure usually occurs in the initial stage of equipment commissioning, and its root cause lies in potential defects introduced during device manufacturing, such as microscopic defects in materials, minor deviations in manufacturing processes, and contamination or defects during packaging. These potential defects rapidly develop and deteriorate when the device is subjected to the combined effects of initial electrical and thermal stresses, potentially leading to sudden and catastrophic failures.

[0005] In the packaging structure of press-fit IGBTs, the gate spring pin is a critical mechanical and electrical connection component responsible for accurately transmitting the gate drive signal to the IGBT chip. In the early failure stage, this spring pin may experience stress relaxation due to manufacturing defects or assembly stress. This relaxation leads to poor contact between the gate and the chip, resulting in a significant increase in the gate's equivalent resistance. This increased gate resistance directly affects the IGBT's switching characteristics, leading to prolonged turn-on and turn-off times.

[0006] During normal operation of the MMC half-bridge submodule, the IGBTs of the upper and lower bridge arms alternately turn on and off. If one IGBT experiences an abnormally prolonged switching time due to a gate pin failure, the two IGBTs may not have had time to fully turn off or on during the switching process, resulting in a brief bridge arm shoot-through. This shoot-through causes a momentary short circuit in the submodule's energy storage capacitor through the two IGBTs, generating a large instantaneous current. However, because this shoot-through time caused by the switching delay is extremely short (typically on the order of microseconds), the resulting peak current may not yet reach the operating threshold and response time requirements set by traditional overcurrent protection devices, making it impossible for the protection system to effectively identify and isolate the fault. Under such repeated, undetected instantaneous short-circuit current impacts, the devices will be accelerated to deteriorate, potentially evolving into permanent short-circuit or open-circuit faults, posing a serious threat to the safe operation of the system.

[0007] Therefore, while existing technologies have yielded considerable research on detecting IGBT aging failures, there is a lack of effective and targeted online detection methods for specific failure modes in the early stages of press-fit IGBTs caused by stress relaxation of the gate spring pins—namely, the risk of instantaneous shoot-through in submodules due to increased gate resistance and prolonged switching time. Achieving accurate detection of such early failures has significant engineering value and practical implications for preventing serious failures in MMC systems and improving overall operational stability and reliability. Summary of the Invention

[0008] In view of this, the purpose of this invention is to provide a method for detecting gate pin failure in IGBTs in MMC based on capacitance current, which combines device failure feature analysis and feature extraction methods to achieve gate pin failure detection in IGBT devices of MMC submodules.

[0009] To achieve the above objectives, the present invention provides the following technical solution:

[0010] Option 1:

[0011] A method for detecting IGBT gate pin failure in MMC based on capacitance current, specifically including the following steps:

[0012] S1: Build an MMC simulation model based on non-ideal devices and extract the capacitor voltage and switching signal of each sub-module;

[0013] S2: Calculate the submodule capacitor current based on the submodule capacitor voltage obtained in step S1;

[0014] S3: Compare the calculated submodule capacitor current with a preset current threshold; when the capacitor current is less than the current threshold, it is determined that the upper and lower IGBTs in the submodule have shot-through, and at least one fault accumulation index is calculated according to the preset diagnostic logic. The fault accumulation index includes the cumulative shot-through time and the cumulative instantaneous shot-through energy.

[0015] S4: Compare the cumulative fault index with the corresponding preset fault threshold, which includes a time threshold and an energy threshold; when the cumulative shoot-through time is greater than the time threshold, or the cumulative instantaneous shoot-through energy is greater than the energy threshold, it is determined that the submodule has experienced IGBT gate pin failure.

[0016] S5: When a failure is detected, the specific IGBT that failed is located based on the submodule switching signal at that moment.

[0017] Furthermore, in step S2, the formula for calculating the capacitor current of the submodule is:

[0018]

[0019] Among them, i c_ac (t) represents the capacitor current of the submodule, which is the actual value of the capacitor current; C is the capacitance value of the i-th submodule, t a The sampling period for the capacitor voltage is v. ci (t) represents the capacitor voltage of the i-th submodule.

[0020] Furthermore, in step S3, the method for calculating the cumulative through time is as follows: when i c_ac (t)<i ch At that time, the total number of sampling points A corresponding to the voltage of the current value c And use this to calculate the cumulative through time t thr for:

[0021] t thr =(A c -1)·t a

[0022] Among them, i ch The preset current threshold is a negative value.

[0023] Furthermore, in step S3, the method for calculating the cumulative instantaneous through energy is as follows: when i c_ac (t)<i chAt that time, the cumulative direct-current energy E released by the capacitor thr For: E thr =∑|v ci (t)·i c_ac (t)|·t a .

[0024] Furthermore, in step S4, the energy threshold E H The calculation formula is:

[0025]

[0026] Where k is a coefficient greater than zero, V r This is the rated value of the capacitor voltage of the submodule.

[0027] Furthermore, in step S5, the method for locating the specific IGBT that has failed is as follows: when the submodule is a half-bridge structure containing an upper switch and a lower switch, if a failure is determined, the submodule switching signal at the current moment is extracted.

[0028] If the switch signal is 0, which means the instruction is for the lower switch to be turned on and the upper switch to be turned off, then it is determined that the gate pin of the upper switch has failed.

[0029] If the switch signal is 1, which means the upper switch is turned on and the lower switch is turned off, then it is determined that the lower switch has a gate pin failure.

[0030] Option 2:

[0031] A fault detection system for a modular multilevel converter (MMC) includes:

[0032] The signal acquisition unit is used to acquire the capacitor voltage and switching signal of at least one sub-module in the MMC in real time;

[0033] The processing unit is connected to the signal acquisition unit and is configured to perform the method as described in Scheme 1 to detect and locate the failure of the IGBT gate pin of the submodule.

[0034] Option 3: A computer-readable storage medium having a computer program stored thereon, which, when executed by a processor, implements the method of Option 1.

[0035] The beneficial effects of this invention are as follows:

[0036] (1) High diagnostic accuracy and strong real-time performance: The method of this invention determines the failure status of IGBT by monitoring the capacitor current of the submodule. When the capacitor current is less than a preset negative threshold, combined with the shoot-through time or shoot-through energy exceeding the threshold, the IGBT gate pin failure can be determined. Simulation results show that the method of this invention can quickly and accurately diagnose IGBT gate pin failure, with a diagnosis time of only a few milliseconds, significantly improving the real-time performance and accuracy of the diagnosis.

[0037] (2) No additional hardware required, broad application prospects: The method of this invention utilizes the inherent capacitor voltage information of the MMC submodule to calculate the capacitor current, thus eliminating the need for additional sensors. Furthermore, it eliminates the need for complex mathematical models, reducing implementation complexity and cost. This makes the method economical and universally applicable in practical applications, with broad application prospects.

[0038] In summary, the method of the present invention provides an efficient, accurate and easy-to-implement failure detection scheme for IGBT gate pins in MMC submodules, which can effectively improve the operational reliability and maintenance efficiency of MMC systems.

[0039] Other advantages, objectives, and features of the invention will be set forth in part in the description which follows, and in part will be apparent to those skilled in the art from the following examination, or may be learned from practice of the invention. The objectives and other advantages of the invention can be realized and obtained through the following description. Attached Figure Description

[0040] To make the objectives, technical solutions, and advantages of the present invention clearer, the preferred embodiments of the present invention will be described in detail below with reference to the accompanying drawings, wherein:

[0041] Figure 1 This invention provides a flowchart for determining the failure of an IGBT gate pin.

[0042] Figure 2 A simulation diagram for diagnosing the gate pin failure of the upper switch T1 in the upper bridge arm SM1;

[0043] Figure 3 Simulation diagram for diagnosing gate pin failure of the lower switch T2 in the upper bridge arm SM2. Detailed Implementation

[0044] The following specific examples illustrate the implementation of the present invention. Those skilled in the art can easily understand other advantages and effects of the present invention from the content disclosed in this specification. The present invention can also be implemented or applied through other different specific embodiments, and various details in this specification can be modified or changed based on different viewpoints and applications without departing from the spirit of the present invention. It should be noted that the illustrations provided in the following embodiments are only schematic representations of the basic concept of the present invention. Unless otherwise specified, the following embodiments and features can be combined with each other.

[0045] Example 1:

[0046] Please see Figure 1 This embodiment provides a method for detecting IGBT gate pin failure in an MMC submodule based on capacitor current, specifically including the following steps:

[0047] S1: Build an MMC simulation model based on non-ideal devices using the Simscape component library in Simulink, and extract the capacitor voltage v of each sub-module. ci (t) and the switching signal S of each submodule wi (t). The formula for the submodule switching signal is as follows:

[0048]

[0049] Where T1 is the upper switch transistor of the half-bridge submodule and T2 is the lower switch transistor.

[0050] S2: Based on the submodule capacitor voltage obtained in step S1, calculate the submodule capacitor current as the actual value i of the capacitor current. c_ac (t), the calculation formula is as follows:

[0051]

[0052] Where C is the capacitance value of each submodule, and t a is the sampling period for the capacitor voltage.

[0053] S3: Set the current threshold i ch This is a negative value. If the capacitor current of the submodule is less than the threshold, it is considered that the upper and lower IGBTs in the submodule have shot-through. Since each sampling point of the capacitor voltage corresponds to a capacitor current value, the total number of capacitor voltage sampling points when shot-through occurs is calculated starting from the first time the capacitor current value is less than the threshold. That is, when i c_ac (t)<i ch The total number of sampling points A corresponding to the voltage of the current value c And use this to calculate the total through time t. thr Simultaneously calculate in i c_ac(t)<i ch At that time, the total instantaneous direct energy E released by the capacitor thr The specific formula is as follows:

[0054] t thr =(A c -1)·t a

[0055] E thr =∑|v ci (t)·i c_ac (t)|·t a

[0056] S4: Set the time threshold t H With energy threshold E H When the pass-through time t of the submodule thr >t H Or direct energy E thr >E H If the IGBT gate pin fails, it is determined that a failure has occurred in the corresponding submodule, and the submodule switching signal S at the current moment is extracted. wi (t), if it equals 0, then the upper switch is determined to have a gate pin failure; if it equals 1, then the lower switch is determined to have a gate pin failure. The formula for calculating the specified energy threshold is:

[0057]

[0058] Where k is a coefficient greater than zero, V r This is the rated value of the capacitor voltage of the submodule.

[0059] Example 2:

[0060] A non-ideal MMC simulation model based on IGBT components was built in Matlab / Simulink. The gate resistance of the IGBT was increased to simulate the gate pin failure scenario. The current threshold i was set. ch Set to -300, failure threshold t H Set to 3us, E H Set to 19.2J. If the upper switch fails, the failure signal is set to 1. If the lower switch fails, the failure signal is set to 2.

[0061] The gate pin of the upper switch T1 in the first submodule SM1 of the upper bridge arm fails. The proposed method is used to determine the failure, and the determination result is as follows. Figure 2 As shown, the failure time was 0.13s, the failure diagnosis time was 0.1341s, and the total time taken was 4.1ms.

[0062] Example 3:

[0063] The lower switch T2 of the upper bridge arm SM2 is set to experience a gate pin failure. A failure determination is performed, and the result is as follows: Figure 3 As shown, the failure time was 0.13s, the failure diagnosis time was 0.1339s, and the total time taken was 3.9ms.

[0064] The simulation experiments above demonstrate that the method of this invention can effectively diagnose IGBT gate pin failures in MMC submodules, with fast judgment speed and high diagnostic accuracy.

[0065] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention and are not intended to limit it. Although the present invention has been described in detail with reference to preferred embodiments, those skilled in the art should understand that modifications or equivalent substitutions can be made to the technical solutions of the present invention without departing from the spirit and scope of the present invention, and all such modifications or substitutions should be covered within the scope of the claims of the present invention.

Claims

1. A method for detecting IGBT gate pin failure in an MMC based on capacitance current, characterized in that, The method includes the following steps: S1: Build an MMC simulation model based on non-ideal devices and extract the capacitor voltage and switching signal of each sub-module; S2: Calculate the submodule capacitor current based on the submodule capacitor voltage obtained in step S1; S3: Compare the calculated submodule capacitor current with a preset current threshold; when the capacitor current is less than the current threshold, it is determined that the upper and lower IGBTs in the submodule have shot-through, and at least one fault accumulation index is calculated according to the preset diagnostic logic. The fault accumulation index includes the cumulative shot-through time and the cumulative instantaneous shot-through energy. S4: Compare the cumulative fault index with the corresponding preset fault threshold, which includes a time threshold and an energy threshold; when the cumulative shoot-through time is greater than the time threshold, or the cumulative instantaneous shoot-through energy is greater than the energy threshold, it is determined that the submodule has experienced IGBT gate pin failure. S5: When a failure is detected, the specific IGBT that failed is located based on the submodule switching signal at that moment.

2. The method for detecting IGBT gate pin failure in MMC based on capacitance current according to claim 1, characterized in that, In step S2, the formula for calculating the capacitor current of the submodule is: Among them, i c_ac (t) represents the capacitor current of the submodule, which is the actual value of the capacitor current; C is the capacitance value of the i-th submodule, t a The sampling period for the capacitor voltage is v. ci (t) represents the capacitor voltage of the i-th submodule.

3. The method for detecting IGBT gate pin failure in MMC based on capacitance current according to claim 2, characterized in that, In step S3, the cumulative through time is calculated as follows: when i c_ac (t)<i ch At that time, the total number of sampling points A corresponding to the voltage of the current value c And use this to calculate the cumulative through time t thr for: t thr =(A c -1)·t a Among them, i ch The preset current threshold is a negative value.

4. The method for detecting IGBT gate pin failure in MMC based on capacitance current according to claim 3, characterized in that, In step S3, the method for calculating the cumulative instantaneous through energy is as follows: when i c_ac (t)<i ch At that time, the cumulative direct-current energy E released by the capacitor thr For: E thr =∑|v ci (t)·i c_ac (t)|·t a .

5. The method for detecting IGBT gate pin failure in MMC based on capacitance current according to claim 1, characterized in that, In step S4, the energy threshold E H The calculation formula is: Where k is a coefficient greater than zero, V r This is the rated value of the capacitor voltage of the submodule.

6. The method for detecting IGBT gate pin failure in MMC based on capacitance current according to claim 1, characterized in that, In step S5, the method for locating the specific IGBT that has failed is as follows: when the submodule is a half-bridge structure containing an upper switch and a lower switch, if a failure is determined, the submodule switching signal at the current moment is extracted. If the switch signal is 0, which means the instruction is for the lower switch to be turned on and the upper switch to be turned off, then it is determined that the gate pin of the upper switch has failed. If the switch signal is 1, which means the upper switch is turned on and the lower switch is turned off, then it is determined that the lower switch has a gate pin failure.

7. A fault detection system for a modular multilevel converter, characterized in that, include: The signal acquisition unit is used to acquire the capacitor voltage and switching signal of at least one sub-module in the MMC in real time; The processing unit is connected to the signal acquisition unit and is configured to perform the method as described in any one of claims 1 to 6 to detect and locate the failure of the IGBT gate pin of the submodule.

8. A computer-readable storage medium having a computer program stored thereon, which, when executed by a processor, implements the method as described in any one of claims 1 to 6.

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