Insertion detection circuit, insertion detection method and portable energy storage device

Abstract

The embodiment of the invention provides an insertion detection circuit, an insertion detection method and portable energy storage equipment. The insertion detection circuit comprises a voltage sampling module which is configured to generate a corresponding reference voltage according to the voltage of a power supply pin of an interface, and the reference voltage output in the current period is obtained by carrying out preset voltage reduction processing on the voltage of the power supply pin collected in the previous period; and the voltage comparison module is configured to output a first electric signal to indicate that the external equipment is not detected to be connected to the interface when the reference voltage is smaller than the voltage of the power supply pin, and output a second electric signal to indicate that the external equipment is detected to be connected to the interface when the reference voltage is larger than the voltage of the power supply pin. According to the invention, the drop speed of the voltage of the power supply pin can be identified, different connection situations can be effectively distinguished, and the reliability and accuracy of an insertion detection result are improved.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of electronic circuit, and particularly relates to an insertion detection circuit, an insertion detection method and a portable energy storage device. BACKGROUND

[0002] Among many electronic devices, insertion detection is a technology closely related to user experience. When an external device is correctly inserted into an interface of an electronic device through a connection cable or the like, the electronic device can timely identify and trigger corresponding control logic, so as to realize low-power state wake-up and power management and the like.

[0003] With the rapid evolution of the interface of the electronic device and the connection cable technology, in actual use, the insertion detection method used by the traditional interface may not be well compatible with the design features of the connection cable under the new technology, resulting in an unexpected insertion detection result error and the like, affecting the use experience of the electronic device. SUMMARY

[0004] Embodiments of the present application provide an insertion detection circuit, an insertion detection method and a portable energy storage device, aiming at solving the problems existing in the prior art insertion detection.

[0005] In a first aspect, an insertion detection circuit is provided. The insertion detection circuit comprises: a voltage sampling module, the voltage sampling module having a sampling end and a reference voltage output end, the sampling end being connected with a power supply pin of an interface, and being configured to generate a corresponding reference voltage according to the voltage of the power supply pin and output at the reference voltage output end; wherein the reference voltage output in a current period is obtained by performing a preset voltage reduction processing on the voltage of the power supply pin collected in a previous period; and a voltage comparison module, the voltage comparison module having a first comparison input end, a second comparison input end and a detection signal output end, the first comparison input end being connected with the power supply pin, the second comparison input end being connected with the reference voltage output end of the voltage sampling unit, and the voltage comparison module being configured to output a first electrical signal when the reference voltage is less than the voltage of the power supply pin, and output a second electrical signal when the reference voltage is greater than the voltage of the power supply pin; wherein the first electrical signal indicates that no external device is connected to the interface; and the second electrical signal indicates that an external device is connected to the interface.

[0006] The insertion detection circuit can identify the voltage drop speed of the power supply pin through the voltage sampling module and the voltage comparison module, and effectively distinguish different connection situations accordingly. For example, when only a connection cable is inserted into the interface without connecting an actual load device, the insertion detection circuit can identify and distinguish the situation that the voltage of the power supply pin drops relatively slowly, and output a first electrical signal through the voltage comparison module, indicating that no device insertion is detected, thereby avoiding the problem of incorrect insertion detection results.

[0007] In combination with the first aspect, in a possible implementation manner, the voltage sampling module comprises: a first voltage reduction unit connected with the power supply pin, configured to apply a preset negative voltage offset to the voltage of the power supply pin to generate a first output voltage; and a first sample-and-hold unit connected with the first voltage reduction unit, configured to collect the first output voltage of the current period and output the first input voltage collected in the previous period as the reference voltage of the current period.

[0008] The voltage sampling module determines the judgment standard of the voltage drop speed of the power supply pin through the voltage offset and the period length, can simply and effectively judge whether the voltage of the power supply pin appears a rapid drop, and is further used to distinguish whether an external device is connected to the interface, thereby improving the adaptability of the insertion detection.

[0009] In combination with the first aspect, or any of the above possible implementation manners of the first aspect, in another possible implementation manner, the first voltage reduction unit comprises: a resistor and a first current source; and the first sample-and-hold unit comprises: a first switch, a second switch, a third switch, a fourth switch, a first capacitor and a second capacitor; wherein one end of the resistor is connected with the power supply pin, the other end of the resistor is connected with the source end of the first current source, the sink end of the first current source is connected to a reference ground, and the first output voltage is formed at a common connection node between the resistor and the source end of the first current source; one end of the first capacitor is connected with the common connection node through the first switch, and is connected with the second comparison input end through the third switch; the other end of the first capacitor is connected to the reference ground; one end of the second capacitor is connected with the common connection node through the second switch, and is connected with the second comparison input end through the fourth switch; and the other end of the second capacitor is connected to the reference ground.

[0010] With reference to the first aspect, or any possible implementation of the first aspect, in a possible implementation, the voltage sampling module comprises: a second sample-and-hold unit, connected with the supply pin, configured to collect the voltage of the supply pin in a current period and output the voltage of the supply pin collected in a previous period; and a second voltage reduction unit, connected with the second sample-and-hold unit, configured to apply a preset negative voltage offset to the voltage of the supply pin collected in the previous period output by the second sample-and-hold unit, to generate a second output voltage as the reference voltage in the current period.

[0011] With reference to the first aspect, or any possible implementation of the first aspect, in a possible implementation, the second sample-and-hold unit comprises: a fifth switch, a sixth switch, a seventh switch, an eighth switch, a third capacitor, and a fourth capacitor; and the second voltage reduction unit comprises: a bias voltage source and a voltage follower; one end of the third capacitor is connected with the supply pin through the fifth switch and connected with a first input end of the voltage follower through the sixth switch; the other end of the third capacitor is connected to a reference ground; one end of the fourth capacitor is connected with the supply pin through the seventh switch and connected with the first input end of the voltage follower through the eighth switch; the other end of the fourth capacitor is connected to the reference ground; and an output end of the voltage follower is connected with a second input end of the voltage follower through the bias voltage source, so that a voltage of the output end of the voltage follower and a voltage of the first input end maintain a preset negative voltage offset.

[0012] With reference to the first aspect, or any possible implementation of the first aspect, in a possible implementation, the voltage sampling module comprises: a third sample-and-hold unit, connected with the supply pin, configured to collect a first pin voltage of the supply pin in a current period and output a second pin voltage in a previous period; and a third voltage reduction unit, connected with the third sample-and-hold unit, configured to process the second pin voltage at a preset discharging speed, to generate a third output voltage that decreases in proportion to time as the reference voltage.

[0013] The voltage sampling module generates a corresponding reference voltage by making the previously collected supply pin voltage decrease at a preset voltage decrease speed, and uses the preset voltage decrease speed as a judgment standard for judging whether the voltage of the supply pin decreases rapidly. This implementation is simple and effectively improves the adaptability of the insertion detection.

[0014] With reference to the first aspect or any possible implementation manner of the first aspect, in a further possible implementation manner, the third sample-and-hold unit comprises a ninth switch, a tenth switch, an eleventh switch, a twelfth switch, a fifth capacitor and a sixth capacitor; the third voltage reduction unit comprises a second current source, a third current source, a thirteenth switch and a fourteenth switch; one end of the fifth capacitor is connected to the power supply pin through the ninth switch and connected to the source end of the second current source through the tenth switch; the other end of the fifth capacitor is connected to a reference ground; one end of the sixth capacitor is connected to the power supply pin through the eleventh switch and connected to the source end of the third current source through the twelfth switch; the other end of the sixth capacitor is connected to the reference ground; the source end of the second current source is further connected to the second comparison input end through the thirteenth switch; the sink end of the second current source is connected to the reference ground; the source end of the third current source is further connected to the second comparison input end through the fourteenth switch; and the sink end of the third current source is connected to the reference ground.

[0015] In a second aspect, the embodiments of the present application further provide a portable energy storage device. The portable energy storage device comprises a device main body provided with at least one interface; and the plug-in detection circuit as described above, which is connected to the power supply pin of the interface.

[0016] In a third aspect, the embodiments of the present application provide a plug-in detection method. The plug-in detection method comprises: acquiring a power supply voltage of a power supply pin of an interface; judging whether a falling speed of the power supply voltage of the power supply pin meets a preset standard according to power supply voltages acquired at different time points; and determining that an external device is connected to the interface when the falling speed meets the preset standard.

[0017] With reference to the third aspect, in a possible implementation manner, the judging whether the falling speed of the power supply voltage of the power supply pin meets the preset standard according to the power supply voltages acquired at different time points specifically comprises: performing a preset voltage reduction processing on a first power supply voltage acquired at a previous time point to obtain a reference voltage at a current time point; comparing a second power supply voltage acquired at the current time point with the reference voltage at the current time point; and determining that the falling speed meets the preset standard when the reference voltage at the current time point is greater than the second power supply voltage; wherein the voltage reduction processing comprises: subtracting a preset voltage threshold from the first power supply voltage to generate the reference voltage; or generating the reference voltage according to the first power supply voltage at a preset voltage falling speed.

[0018] The related device provided in the second aspect and the plug-in detection method provided in the third aspect have the beneficial effects of the technical solution of the first aspect, which will not be described herein again. BRIEF DESCRIPTION OF DRAWINGS One or more embodiments are illustrated by way of example in the figures that form a part of this patent document, and which demonstrate aspects of the embodiments. In the drawings:

[0019] Figure 1 Typical application scenarios of the insertion detection provided by the embodiments of the present application; Figure 2 A schematic diagram of the insertion detection of a typical USB-A type interface; Figure 3 A schematic diagram of a connection cable with a built-in electronic marker chip; Figure 4 A schematic diagram of the voltage change of the power supply pin of the USB-A type interface when the connection cable with the built-in electronic marker chip is connected to the USB-A type interface; Figure 5 A schematic diagram of the insertion detection circuit provided by the embodiments of the present application; Figure 6 A schematic diagram of the voltage sampling module provided by the embodiments of the present application; Figure 7 A schematic diagram of the first voltage reduction unit provided by the embodiments of the present application; Figure 8 A schematic diagram of the voltage sampling module provided by the embodiments of the present application; Figure 6 A schematic diagram of the running process of the voltage sampling module shown in A schematic diagram of the voltage sampling module provided by the embodiments of the present application; Figure 9 A schematic diagram of the running process of the voltage sampling module shown in A schematic diagram of the voltage sampling module provided by the embodiments of the present application; Figure 10 A schematic diagram of the running process of the voltage sampling module shown in A schematic diagram of the voltage sampling module provided by the embodiments of the present application; Figure 11 A schematic diagram of the running process of the voltage sampling module shown in Figure 10 A schematic diagram of the voltage sampling module provided by the embodiments of the present application; A schematic diagram of the running process of the voltage sampling module shown in Figure 12 A schematic diagram of the voltage sampling module provided by the embodiments of the present application; A schematic diagram of the running process of the voltage sampling module shown in Figure 13 A schematic diagram of the voltage sampling module provided by the embodiments of the present application; A schematic diagram of the running process of the voltage sampling module shown in Figure 14 A schematic diagram of the voltage sampling module provided by the embodiments of the present application; Figure 13 A schematic diagram of the running process of the voltage sampling module shown in A schematic diagram of the voltage sampling module provided by the embodiments of the present application; Figure 15 A schematic diagram of the running process of the voltage sampling module shown in A schematic diagram of the voltage sampling module provided by the embodiments of the present application; Figure 16 A method flowchart of the insertion detection method provided by the embodiments of the present application; A method flowchart of the insertion detection method provided by the embodiments of the present application;Figure 17 For Figure 16 The method flow chart of step S502 is shown. DETAILED DESCRIPTION For the purpose of facilitating the understanding of the present application, the present application will be described in more detail below in conjunction with the accompanying drawings and specific embodiments. It should be noted that when an element is described as "fixed to" another element, it can be directly on the other element or one or more intervening elements can be present therebetween. When an element is described as "connected to" another element, it can be directly connected to the other element or one or more intervening elements can be present therebetween. The terms "upper", "lower", "inner", "outer", "bottom", and the like as used in the present specification indicate the orientation or positional relationship shown in the drawings, and are merely for the purpose of facilitating the description of the present application and simplifying the description, and are not intended to indicate or imply that the device or element referred to must have a particular orientation, be constructed and operated in a particular orientation, and therefore cannot be understood as limiting the present application. In addition, the terms "first", "second", "third", and the like are merely for the purpose of description and cannot be understood as indicating or implying relative importance.

[0020] Unless otherwise defined, all technical and scientific terms used in the present specification have the same meaning as commonly understood by one of ordinary skill in the art to which the present application belongs. The terms used in the present specification are merely for the purpose of describing specific embodiments of the present application and are not intended to limit the present application. The term "and / or" used in the present specification includes any and all combinations of one or more of the associated listed items.

[0021] In addition, the technical features involved in the different embodiments of the present application described below can be combined with each other as long as there is no conflict.

[0022] Figure 1 A typical application scenario of the insertion detection provided by the embodiments of the present application is shown. Exemplarily, Figure 1 A situation of using a portable energy storage device to supplement the power of a mobile intelligent terminal is shown. As Figure 1 shown, the application scenario includes a mobile terminal 10, a connection cable 20, and a portable energy storage device 30.

[0023] The mobile terminal 10 is an electronic device (for example, a smart phone, a tablet computer, a smart watch, or a wireless earphone, etc.) integrated with one or more functions such as integrated communication, calculation, and data processing. It runs on the power stored by itself and has a standardized charging interface (for example, a USB interface or a Lightning interface) to help supplement the power. Exemplarily, Figure 1 A smart phone with a USB-C type charging interface is shown in

[0024] The connection cable 20 is a transmission medium for establishing electrical connection between two or more devices. Its ends are provided with standardized connectors that can be inserted into compatible interfaces to establish electrical connection, achieving functions such as power transmission or data communication. Figure 1 As shown in FIG. 1, one end of the connection cable 20 is a USB-C connector P1, and the other end is a USB-A connector P2.

[0025] The portable energy storage device 30 is a miniaturized power storage and power supply device that can supplement power for various mobile terminals. Its housing is provided with any suitable structure and shape according to actual needs, and inside the housing is provided with an energy storage module (such as a lithium-ion battery, a lithium polymer battery, or other rechargeable battery) of a specific capacity, a charge and discharge management circuit for controlling the charge and discharge process, and an information display unit for displaying state information such as the percentage of remaining power and the charge and discharge state, as well as one or more standardized input / output interfaces. As shown in FIG. 2, the housing is generally square, and the portable energy storage device 30 has a USB-A interface 31. Figure 1

[0026] In actual use, the user establishes a power transmission path between the mobile terminal 10 and the portable energy storage device 30 by inserting the USB-C connector P1 of the connection cable 20 into the mobile terminal 10 and inserting the USB-A connector P2 of the connection cable 20 into the USB-A interface 31 of the portable energy storage device 30, so that the portable energy storage device 30 supplements power for the mobile terminal 10.

[0027] In order to improve the user experience, the portable energy storage device 30 is usually provided with a function called "insertion detection". It can detect whether the mobile terminal 10 is connected to the interface 31 through the connection cable 20 (hereinafter referred to as "device insertion") by changes in interface electrical signals, and automatically activate the discharge function to supplement power for the mobile terminal 10 when device insertion is detected.

[0028] When using the aforementioned USB-A interface, insertion detection is achieved by determining whether the voltage VBUS of the power supply pin VBUS of the interface 31 is lower than a set voltage threshold Vth. As shown in FIG. 3, the voltage VBUS of the power supply pin VBUS is maintained at a relatively high voltage level when not inserted, and when the mobile device is inserted (at time t1), the voltage VBUS of the power supply pin VBUS is quickly pulled down due to charge sharing and resistance pull-down. Therefore, insertion detection is performed by detecting whether the voltage VBUS of the power supply pin VBUS is lower than the set voltage threshold Vth. BUS Figure 2 BUS BUS BUS ​​​​​​

[0029] In order to adapt to and meet the needs of large current charging, many connection cables 20 are internally provided with electronic marking chips for identifying the rated current, voltage, transmission rate and other key parameters of the cable itself, so as to avoid device damage or charging safety hazards caused by cable mismatch.

[0030] The foregoing detection method of detecting whether the voltage of the power supply pin VBUS is lower than the set reference voltage cannot reliably provide the insertion detection result when the connection cable with the electronic marking chip 21 is used.

[0031] As shown in Figure 3 , the electronic marking chip 21 in the connection cable 20 is usually powered by the power supply pin VBUS, and its current-voltage characteristic is close to that of the inserted mobile terminal. Therefore, as shown in Figure 4 , when the connection cable 20 is inserted into the interface 31 alone, and the other end of the connection cable 20 is not connected to other mobile terminals (at time t2), the voltage V BUS of the power supply pin VBUS will gradually decrease due to the access of the electronic marking chip 21. When the voltage V BUS of the power supply pin VBUS gradually decreases to below the set voltage threshold Vth, the portable energy storage device 30 will mistakenly think that the device insertion is detected. Such unreliable insertion detection result will cause inconvenience in use.

[0032] For example, when the user first inserts the connector P1 of the connection cable 20 into the interface 31 of the portable energy storage device 30, the electronic marking chip 21 of the connection cable 20 itself will cause the voltage V BUS of the power supply pin VBUS to decrease (at time t2). When the voltage V BUS of the power supply pin VBUS decreases to below the set voltage threshold Vth, the portable energy storage device 30 will mistakenly detect the device insertion and activate the discharging function.

[0033] After the discharging function is activated, the portable energy storage device 30 will also monitor the discharging process through other detection mechanisms. If there is still no actual load access (for example, the output current is always small) after a period of time, the portable energy storage device 30 will enter the unresponsive state of suspending discharging based on the control strategy considerations of saving loss and discharging safety, etc.

[0034] After the portable energy storage device 30 enters the inoperable state, even if the user continues to insert the connector P2 of the connection cable 20 into the mobile terminal 10, the portable energy storage device 30 cannot be woken up and the charging function cannot be activated. Therefore, when the user does not quickly insert the connector P2 of the connection cable 20 into the mobile terminal 10 within the aforementioned time period (i.e., the interval between the time t2 and the time t1 exceeds the time period), the user has to pull out the connector P1 of the connection cable 20 from the portable energy storage device 30 and perform the connector insertion operation again to wake up the portable energy storage device 30.

[0035] In the process of implementing the present application, the applicant found that the voltage drop of the power supply pin VBUS caused by the connection cable 20 inserted into the interface alone (hereinafter referred to as case 1) and the connection cable 20 connected with the mobile terminal 10 inserted into the interface (hereinafter referred to as case 2) has different voltage change rates.

[0036] Please continue to refer to Figure 2 and Figure 4 In case 1, the voltage VBUS of the power supply pin VBUS drops slowly, and the voltage change slope is relatively stable and gentle. In case 2, the voltage of the power supply pin VBUS drops sharply, and the voltage change slope is large. BUS

[0037] Therefore, based on the voltage change rate or slope of the power supply pin VBUS, the case 1 and the case 2 can be well distinguished, and false and unreliable insertion detection results can be avoided.

[0038] The present application is exemplarily described in the scenario of the connection cable 20 inserted into the USB-A type interface. Based on the same inventive idea as described above, the voltage change rate of the power supply pin VBUS can also be applied to the insertion detection of other electronic devices or interfaces of other types to achieve similar effects, and is not limited to the USB-A type interface.

[0039] Figure 5 The block diagram of the insertion detection circuit provided for the embodiment of the present application is shown in FIG. 4. As shown in FIG. 4, the insertion detection circuit 40 includes a voltage sampling module 41 and a voltage comparison module 42. Figure 5

[0040] The voltage sampling module 41 is a functional circuit for collecting the voltage of the power supply pin VBUS and generating a corresponding reference voltage. It has a sampling end 41a connected with the power supply pin VBUS and a reference voltage output end 41b outputting the reference voltage.

[0041] ​​In the present embodiment, the voltage sampling module 41 is provided with the function of holding or storing the sampled voltage, and the reference voltage output at present is obtained by preset voltage reduction processing on the voltage of the power supply pin collected at the previous time.

[0042] In other words, the voltage sampling module 41 collects the voltage of the power supply pin and generates the corresponding reference voltage periodically. In the two periods with the time sequence, the reference voltage output at the current period is obtained according to the voltage of the power supply pin VBUS collected at the previous period.

[0043] The voltage comparison module 42 is a functional circuit capable of comparing the size of two input voltages and outputting different electrical signals according to the comparison result. It has a first comparison input end 42a, a second comparison input end 42b and a detection signal output end 42c for outputting an indication signal.

[0044] The first comparison input end 42a is connected with the power supply pin VBUS, and the second comparison input end 42b is connected with the reference voltage output end of the voltage sampling unit, so that the detection signal output end 42c outputs an indication signal corresponding to the comparison result between the reference voltage and the voltage of the power supply pin VBUS.

[0045] In the present application, for the convenience of description, the indication signal output when the reference voltage is less than the voltage of the power supply pin is referred to as the "first electrical signal", and the indication signal output when the reference voltage is greater than the voltage of the power supply pin is referred to as the "second electrical signal". The specific implementation of the first electrical signal and the second electrical signal can be determined according to the actual needs, such as high-level signal or low-level signal, which is not limited here.

[0046] As described above, the reference voltage output at present is the expected value generated by preset voltage reduction processing on the voltage of the power supply pin collected at the previous time. Therefore, the comparison result between the voltage of the power supply pin at present and the expected value reflects the difference between the actual voltage drop speed of the power supply pin and the reduction speed of the preset voltage reduction processing between the previous time and the present time.

[0047] Specifically, when the voltage of the power supply pin at present is greater than the reference voltage, it indicates that the actual voltage drop speed of the power supply pin is slower (compared with the reduction speed of the preset voltage reduction processing), that is, the external device is not connected to the interface. On the contrary, when the voltage of the power supply pin at present is greater than the reference voltage, it indicates that the actual voltage drop speed of the power supply pin is faster (compared with the reduction speed of the preset voltage reduction processing), that is, the external device has been connected to the interface.

[0048] Figure 6 The schematic diagram of the voltage sampling module 41 provided in the present embodiment. In some embodiments, as shown in FIG. 4, the voltage sampling module 41 is composed of a voltage holding unit 411 and a voltage reduction unit 412.Figure 6 As shown, the voltage sampling module 41 comprises a first voltage reduction unit 411 and a first sample-and-hold unit 412.

[0049] The first voltage reduction unit 411 is a functional unit capable of applying a certain voltage offset. The first voltage reduction unit 411 is connected with the supply pin VBUS, so as to apply a preset negative voltage offset to the voltage of the supply pin, generating a first output voltage.

[0050] The first sample-and-hold unit 412 is a functional unit for realizing voltage sampling and holding. It is connected with the first voltage reduction unit 411, and outputs the first input voltage collected in the previous period as the reference voltage in the current period while collecting and holding the first output voltage in the current period. In other words, the first sample-and-hold unit 412 can collect voltage data at a previous time and output it at a current time after a certain period of time.

[0051] Specifically, as shown in Figure 7 The first voltage reduction unit 411 comprises a resistor R1 and a first current source Ib1.

[0052] One end of the resistor R1 is connected with the supply pin VBUS, the other end of the resistor R1 is connected with the source end of the first current source Ib1, and the sink end of the first current source Ib1 is connected to the reference ground GND. Thus, the common connection node N1 between the resistor R1 and the source end of the first current source Ib1 forms the first output voltage VBUS-ΔV.

[0053] In actual application, the voltage offset ΔV generated by the first voltage reduction unit 411 is adjusted by changing the current of the first current source Ib1 or the resistance value of the resistor R1, so that it is at a preset value.

[0054] Alternatively, other voltage reduction circuits capable of applying a stable negative voltage offset ΔV can also be applied, without being limited to Figure 7 as shown.

[0055] Specifically, please continue to refer to Figure 6 The first sample-and-hold unit 412 comprises a first switch S1, a second switch S2, a third switch S3, a fourth switch S4, a first capacitor C1 and a second capacitor C2. One end of the first capacitor C1 is connected with the common connection node N1 through the first switch S1, and is connected with the second comparison input end 42b through the third switch S3, and the other end of the first capacitor C1 is connected to the reference ground GND.

[0056] One end of the second capacitor C2 is connected to the common connection node N1 through the second switch S2, and is connected to the second comparison input end 42b through the fourth switch S4; the other end of the second capacitor C2 is connected to the reference ground GND.

[0057] In actual application, as shown in Figure 8 , the first switch S1 and the fourth switch S4 are synchronously controlled by the first switch signal signal1, and the second switch S2 and the third switch S3 are synchronously controlled by the second switch signal signal2. Through the alternate closing / opening of the first switch S1, the second switch S2, the third switch S3 and the fourth switch S4, the voltage is periodically collected and held.

[0058] Exemplarily, in the first switch signal signal1 and the second switch signal signal2, the high level represents that the switch is closed, and the low level represents that the switch is opened. Taking the time-adjacent periods T1, T2 and T3 as examples for description: In the period T2, the first switch S1 and the fourth switch S4 are opened, and the second switch S2 and the third switch S3 are closed. At this time, the first capacitor C1 holds the first output voltage VBUS T1 -ΔV as the reference voltage V ref , and the second capacitor C2 collects the first output voltage VBUS T2 -ΔV of the current period T2.

[0059] With the time axis moving to the period T3, the first switch S1 and the fourth switch S4 are closed again, and the second switch S2 and the third switch S3 are opened again. At this time, the second capacitor C2 outputs the first output voltage VBUS T2 -ΔV of the previous period T2 as the reference voltage V ref , and the first capacitor C1 collects and holds the first output voltage VBUS T3 -ΔV of the current period T3.

[0060] Figure 9 Exemplarily, the reference voltage V ref and the voltage V BUS of the power supply pin V BUS vary with time. Wherein, t2 is the time when one of the connectors of the cable 20 is inserted into the interface, and t1 is the time when the other connector of the cable 20 is connected with the external device.

[0061] As shown in Figure 9 , between t2 and t1, the voltage V BUS of the power supply pin decreases at a slower speed, and after t2, the voltage V BUS of the power supply pin decreases at a faster speed. Correspondingly, the reference voltage V refBetween times t2 and t1, the rate of decrease is greater than the voltage V of the power supply pin. BUS It is always less than the voltage V of the power supply pin at the same time. BUS After time t2, the voltage V of the power supply pin drops rapidly. BUS It will be less than the reference voltage V ref In this situation, the voltage comparison module 42 can output a corresponding electrical signal to indicate that the external device is connected to the interface.

[0062] In this embodiment, the aforementioned negative voltage offset ΔV and cycle length (i.e., switching frequency) jointly determine the expected value of the voltage drop rate. With the same cycle length, a larger negative voltage offset ΔV indicates a larger expected voltage drop rate, while with the same negative voltage offset ΔV, a longer cycle length indicates a smaller expected voltage drop rate.

[0063] Based on the needs of practical applications, the expected value of the voltage drop rate is adjusted by adjusting the negative voltage offset ΔV and the cycle length so that it can distinguish the voltage drop rate difference between two cases: when the connecting cable 20 is inserted into the interface alone and when the other end of the connecting cable 20 is connected to the mobile terminal 10. For example, the expected value of the voltage drop rate is made to be between the voltage drop rates in these two cases.

[0064] The circuit structure of this embodiment is simple, and it can detect the voltage drop rate (i.e., voltage change slope) using only a small number of components. The overall power consumption and implementation cost are low, and it has good application prospects.

[0065] Figure 10 This is a schematic diagram of a voltage sampling module 41 provided according to another embodiment of this application. In some embodiments, such as Figure 10 As shown, the voltage sampling module includes a second sample and hold unit 413 and a second voltage reduction unit 414.

[0066] The second sample-and-hold unit 413 is a functional unit for voltage sampling and holding. It is connected to the power supply pin VBUS, and while acquiring and holding the voltage of the power supply pin in the current cycle, it outputs the voltage of the power supply pin acquired in the previous cycle. In other words, the second sample-and-hold unit 413 outputs the voltage of the power supply pin acquired at a previous moment.

[0067] The second voltage reduction unit 414 is a functional unit capable of applying a specific voltage offset. It is connected to the second sample-and-hold unit 413, thereby applying a negative voltage offset to the voltage of the power supply pin acquired in a previous cycle, generating a second output voltage as a reference voltage for the current cycle. This negative voltage offset cycles between multiple discrete values.

[0068] Specifically, please continue to refer to Figure 10 The second sample-and-hold unit 413 includes a fifth switch S5, a sixth switch S6, a seventh switch S7, an eighth switch S8, a third capacitor C3, and a fourth capacitor C4. The second voltage reduction unit 414 includes a bias voltage source 4141 and a voltage follower 4142.

[0069] One end of the third capacitor C3 is connected to the power supply pin VBUS through the fifth switch S5 and to the first input terminal - of the voltage follower 4142 through the sixth switch S6. The other end of the third capacitor C3 is connected to the reference ground GND.

[0070] One end of the fourth capacitor C4 is connected to the power supply pin VBUS through the seventh switch S7 and to the first input terminal - of the voltage follower 4142 through the eighth switch S8. The other end of the fourth capacitor C4 is connected to the reference ground GND.

[0071] The output terminal out of the voltage follower 4142 is connected to the second input terminal + of the voltage follower through the bias voltage source 4141, so that a preset negative voltage offset is maintained between the voltage of the output terminal out of the voltage follower 4142 and the voltage of the first input terminal.

[0072] Specifically, please continue to refer to Figure 10 The bias voltage ΔV of the bias voltage source 4141 is controlled by a digital-to-analog converter DAC to cycle between a plurality of discrete values. For example, the digital-to-analog converter DAC increments the bias voltage ΔV to the next discrete value when it receives a level change of the clock signal CLK each time, and returns to the smallest discrete value after reaching the largest discrete value, forming a periodic cycle. In actual application, similar to the control mode of the first sample-and-hold unit 412 described above, the fifth switch S1 and the eighth switch S8 are synchronously controlled by a third switch signal signal3, and the sixth switch S6 and the seventh switch S7 are synchronously controlled by a fourth switch signal signal4. In each period, the bias voltage ΔV is set to cycle between 1 voltage unit, 2 voltage units, and 3 voltage units.

[0073] Among the adjacent three periods T1, T2, and T3, as shown in Figure 11 In period T2, the fifth switch S1 and the eighth switch S8 are closed, and the sixth switch S6 and the seventh switch S7 are open. At this time, the third capacitor C3 collects and holds the voltage VBUS T2 of the power supply pin in the current period T2, and the fourth capacitor C4 outputs the voltage VBUS T1A preset negative voltage bias ΔV is injected into the bias voltage source 4141 between the output terminal out and the second input terminal + of the voltage follower 4142, thereby adjusting the output terminal of the voltage follower 4142 to VBUS. T1 -ΔV, as the reference voltage V ref .

[0074] During cycle T3, switches S1 and S8 are open, while switches S6 and S7 are closed. At this time, capacitor C4 collects and maintains the voltage VBUS of the power supply pin during the current cycle T3. T3 The third capacitor C3 outputs the voltage VBUS of the power supply pin, which is acquired and held in the previous cycle T2. T2 To the first input terminal of voltage follower 4142.

[0075] Similarly, a preset negative voltage bias ΔV is injected into the bias voltage source 4141 positioned between the output terminal out of the voltage follower 4142 and the second input terminal +, so that the output terminal VBUS of the voltage follower 4142 is adjusted. T2 -ΔV, as the reference voltage V ref .

[0076] Figure 12 An example is shown with reference voltage V. ref With power supply pin V BUS The signal waveform changes over time. Here, time t2 is the moment when one connector of the connecting cable 20 is inserted into the interface, and time t1 is the moment when the other connector of the connecting cable 20 is connected to the external device.

[0077] like Figure 12 As shown, the voltage V of the power supply pin is between time t2 and t1. BUS The voltage decreases at a slower rate, and after time t2, the voltage V on the power supply pin... BUS It then decreases at a relatively rapid rate. Correspondingly, the reference voltage V... ref Between times t2 and t1, the rate of decrease is greater than the voltage V of the power supply pin. BUS It is always less than the voltage V of the power supply pin at the same time. BUS After time t2, the voltage V of the power supply pin drops rapidly. BUS It will be less than the reference voltage V ref In this situation, the voltage comparison module 42 can output a corresponding electrical signal to indicate that the external device is connected to the interface.

[0078] Figure 13 This is a schematic diagram of a voltage sampling module 41 provided in another embodiment of this application. In some embodiments, such as Figure 13As shown, the voltage sampling module 41 includes a third sampling and holding unit 415 and a third voltage reducing unit 416.

[0079] The third sampling and holding unit 415 is a functional unit for realizing voltage sampling and holding. It is connected with the power supply pin VBUS, and outputs the second pin voltage of the previous period while collecting the first pin voltage of the current period.

[0080] The third voltage reducing unit 416 is a functional unit for linearly decaying voltage. It is connected with the third sampling and holding unit 415 to process the second pin voltage output by the third sampling and holding unit 415 at a preset discharge speed, and generate a third output voltage that decreases in proportion to time as a reference voltage.

[0081] Specifically, please continue to refer to Figure 13 The third sampling and holding unit includes a ninth switch S9, a tenth switch S10, an eleventh switch S11, a twelfth switch S12, a fifth capacitor C5, and a sixth capacitor C6. The third voltage reducing unit 416 includes a second current source Ib2, a third current source Ib3, a thirteenth switch S13, and a fourteenth switch S14.

[0082] One end of the fifth capacitor C5 is connected with the power supply pin VBUS through the ninth switch S9, and is connected with the source end of the second current source Ib2 through the tenth switch S10; the other end of the fifth capacitor C5 is connected to the reference ground GND.

[0083] One end of the sixth capacitor C6 is connected with the power supply pin VBUS through the eleventh switch S11, and is connected with the source end of the third current source Ib3 through the twelfth switch S12; the other end of the sixth capacitor C6 is connected to the reference ground GND.

[0084] The source end of the second current source Ib2 is also connected with the second comparison input end 42b through the thirteenth switch S13; the sink end of the second current source Ib2 is connected to the reference ground GND; the source end of the third current source Ib3 is also connected with the second comparison input end 42b through the fourteenth switch S14; the sink end of the third current source Ib3 is connected to the reference ground GND.

[0085] In actual application process, the ninth switch S1, the twelfth switch S12, and the fourteenth switch S14 are synchronously controlled by the fifth switch signal signal5, and the tenth switch S10, the eleventh switch S11, and the thirteenth switch S13 are synchronously controlled by the sixth switch signal signal6.

[0086] In the three adjacent periods T1, T2, and T3, as Figure 14As shown, during period T2, switches S1 (ninth), S12 (twelfth), and S14 (fourteenth) are closed, while switches S10 (tenth), S11 (eleventh), and S13 (thirteenth) are open. At this time, capacitor C5 collects and maintains the voltage VBUS of the power supply pin during the current period T2. T2 The sixth capacitor C6 outputs the voltage VBUS of the power supply pin, which is acquired and held in the first cycle T1. T1 The voltage VBUS of this power supply pin T1 Under the influence of the third current source Ib3, the current decreases linearly with time, forming a reference voltage V provided to the second comparison input terminal 42b. ref .

[0087] During cycle T3, switches S1 (ninth), S12 (twelfth), and S14 (fourteenth) are open, while switches S10 (tenth), S11 (eleventh), and S13 (thirteenth) are closed. At this time, capacitor C6 collects and maintains the voltage VBUS of the power supply pin during the current cycle T3. T3 The fifth capacitor C5 outputs the voltage VBUS of the power supply pin, which is acquired and held in the previous cycle T2. T2 The voltage VBUS of this power supply pin T1 Under the influence of the second current source Ib2, the current decreases linearly with time, forming a reference voltage V provided to the second comparison input terminal 42b. ref .

[0088] Figure 15 An example is shown with reference voltage V. ref With power supply pin V BUS The signal waveform changes over time. Here, time t2 is the moment when one connector of the connecting cable 20 is inserted into the interface, and time t1 is the moment when the other connector of the connecting cable 20 is connected to the external device.

[0089] like Figure 15 As shown, the voltage V of the power supply pin is between time t2 and t1. BUS The voltage decreases at a slower rate, and after time t2, the voltage V on the power supply pin... BUS It then decreases at a relatively rapid rate. Correspondingly, between times t2 and t1, the reference voltage V... ref The rate of decrease is greater than the voltage V of the power supply pin. BUS It is always less than the voltage V of the power supply pin at the same time. BUS After time t2, the voltage V of the power supply pin drops rapidly. BUS It will be less than the reference voltage V ref In this situation, the voltage comparison module 42 can output a corresponding electrical signal to indicate that the external device is connected to the interface.

[0090] Based on the insertion detection circuit provided by the embodiments of the present application, the present application further provides a portable energy storage device. The portable energy storage device comprises a device main body and the insertion detection circuit according to one or more of the above embodiments.

[0091] The device main body is provided with at least one interface. The interface conforms to a specific standard and is connected to a connector plug of the same standard to quickly and conveniently establish an electrical connection. The insertion detection circuit is connected to the power supply pin of the interface, and the insertion detection is performed by detecting the voltage change rate of the power supply pin to determine whether an external device (for example, the mobile terminal 10 described above) is connected to the portable energy storage device through the connecting cable 20.

[0092] Figure 16 The method flowchart of the insertion detection method provided by the embodiments of the present application. When the insertion detection method is performed by the portable energy storage device described above, a reliable insertion detection result can be provided. As shown in Figure 16 The insertion detection method comprises the following steps: S501, obtaining the power supply voltage of the power supply pin of the interface.

[0093] The "power supply voltage" refers to the voltage level on the power supply pin. The obtaining operation is performed multiple times in time, periodically according to the set frequency, so as to obtain the change of the power supply voltage in a certain time period.

[0094] S502, determining whether the drop speed of the power supply voltage of the power supply pin meets the preset standard according to the power supply voltages obtained at different times. If yes, step S503 is performed, and if no, step S504 is performed.

[0095] By periodically performing step S501, the power supply voltages at multiple different times in time sequence can be obtained, and the drop speed of the power supply voltage can be calculated accordingly.

[0096] The "preset standard" is a standard preset by the technician to measure the speed of voltage drop. It is based on the needs of actual application and adopts a corresponding representation, including but not limited to the average drop speed and the absolute value of voltage drop per unit time.

[0097] S503, determining that the external device is connected to the interface.

[0098] S504, determining that the external device is not connected to the interface.

[0099] When the preset criterion is satisfied, it indicates that the power supply voltage of the power supply pin has a rapid drop (i.e., the drop speed is very fast). Therefore, it can be determined that the external device (e.g., the aforementioned mobile terminal) has been connected to the interface, and further other operations (e.g., activating the discharging function) are performed. Otherwise, it is confirmed that no external device is connected at this time, and the monitoring is continued.

[0100] In some embodiments, as shown in FIG. 5, the aforementioned judging step S502 specifically includes: Figure 17 S5021, performing a preset voltage reduction processing on the first power supply voltage obtained at the previous time to obtain a reference voltage at the current time.

[0101] The "previous time" and the "current time" are a set of relative concepts in time, representing two time points in time order in front and time order behind.

[0102] The "voltage reduction processing" refers to processing the current voltage to make it change negatively. Based on different voltage drop speed expression methods, the voltage reduction processing has a corresponding processing method.

[0103] Specifically, when the absolute value of the voltage drop within a unit time is used to represent the drop speed of the power supply voltage, the voltage reduction processing is to generate the required reference voltage by subtracting a preset voltage threshold from the first power supply voltage.

[0104] Alternatively, when the average drop speed is used to represent the drop speed of the power supply voltage, the voltage reduction processing can be to generate the reference voltage according to the first power supply voltage at a preset voltage drop speed. In other words, the first power supply voltage is reduced according to the preset voltage drop speed to obtain the corresponding reference voltage.

[0105] S5022, judging whether the second power supply voltage obtained at the current time is greater than the reference voltage at the current time. If yes, step S5023 is performed, and if no, step S5024 is performed.

[0106] S5023, determining that the drop speed does not satisfy the preset criterion.

[0107] S5024, determining that the drop speed satisfies the preset criterion.

[0108] The reference voltage at the current time calculated and obtained by performing the aforementioned step S5021 represents the expected value of the power supply voltage at this time. When the second power supply voltage is greater than the reference voltage, it indicates that the voltage drop speed of the power supply pin at this time does not exceed the expected value, and there is no rapid drop of the voltage. Otherwise, it indicates that the voltage drop speed of the power supply pin at this time exceeds the expected value, and there is a rapid drop of the voltage (i.e., the preset criterion is satisfied, and the device insertion is detected). ​

[0109] Finally, it should be noted that the above examples are only used to illustrate the technical solutions of the present application, and are not intended to limit them; under the idea of the present application, the technical features in the above examples or different examples can also be combined, the steps can be implemented in any order, and there are many other changes of different aspects of the present application as described above, which are not provided in detail for simplicity; although the present application has been described in detail with reference to the foregoing examples, those skilled in the art should understand that the technical solutions recorded in the foregoing examples can still be modified, or some technical features can be replaced by equivalents; and these modifications or replacements do not make the essence of the corresponding technical solutions deviate from the scope of the technical solutions of the embodiments of the present application.

Claims

1. An insertion detection circuit, characterized by, The application relates to a voltage sampling module, a voltage comparison module and a detection signal output module. The voltage sampling module has a sampling end and a reference voltage output end, the sampling end is connected with a power supply pin of an interface, and the voltage sampling module is configured to generate a corresponding reference voltage according to the voltage of the power supply pin and output the reference voltage at the reference voltage output end. The reference voltage output in a current period is obtained by performing preset voltage reduction processing on the voltage of the power supply pin collected in a previous period. The voltage comparison module has a first comparison input end, a second comparison input end and a detection signal output end, the first comparison input end is connected with the power supply pin, and the second comparison input end is connected with the reference voltage output end of the voltage sampling unit. The voltage comparison module is configured to output a first electric signal when the reference voltage is smaller than the voltage of the power supply pin, and output a second electric signal when the reference voltage is greater than the voltage of the power supply pin. The first electric signal indicates that no external device is connected to the interface, and the second electric signal indicates that an external device is connected to the interface.

2. The insertion detection circuit of claim 1, wherein, The voltage sampling module comprises: A first voltage reduction unit connected with the power supply pin and configured to apply a preset negative voltage offset to the voltage of the power supply pin to generate a first output voltage. A first sample-and-hold unit connected with the first voltage reduction unit and configured to collect the first output voltage in a current period and output the first input voltage collected in a previous period as the reference voltage in the current period.

3. The insertion detection circuit of claim 2, wherein, The first voltage reduction unit comprises a resistor and a first current source, and the first sample-and-hold unit comprises a first switch, a second switch, a third switch, a fourth switch, a first capacitor and a second capacitor. One end of the resistor is connected with the power supply pin, the other end of the resistor is connected with the source end of the first current source, the sink end of the first current source is connected to a reference ground, and the first output voltage is formed at a common connection node between the resistor and the source end of the first current source. One end of the first capacitor is connected with the common connection node through the first switch and connected with the second comparison input end through the third switch, and the other end of the first capacitor is connected to the reference ground. One end of the second capacitor is connected with the common connection node through the second switch and connected with the second comparison input end through the fourth switch, and the other end of the second capacitor is connected to the reference ground.

4. The insertion detection circuit of claim 1, wherein, The voltage sampling module comprises: A second sample-and-hold unit connected with the power supply pin and configured to collect the voltage of the power supply pin in a current period and output the voltage of the power supply pin collected in a previous period. A second voltage reduction unit connected with the second sample-and-hold unit and configured to apply a negative voltage offset to the voltage of the power supply pin collected in the previous period output by the second sample-and-hold unit to generate a second output voltage as the reference voltage in the current period. The negative voltage offset is cyclically changed among a plurality of preset discrete values.

5. The insertion detection circuit of claim 4, wherein, The second sample-and-hold unit comprises a fifth switch, a sixth switch, a seventh switch, an eighth switch, a third capacitor and a fourth capacitor; and the second voltage reduction unit comprises a bias voltage source and a voltage follower. One end of the third capacitor is connected to the power supply pin through the fifth switch and to a first input end of the voltage follower through the sixth switch; and the other end of the third capacitor is connected to a reference ground. One end of the fourth capacitor is connected to the power supply pin through the seventh switch and to the first input end of the voltage follower through the eighth switch; and the other end of the fourth capacitor is connected to the reference ground. An output end of the voltage follower is connected to a second input end of the voltage follower through the bias voltage source; and the bias voltage source provides a voltage offset cyclically changed among a plurality of preset discrete values.

6. The insertion detection circuit of claim 1, wherein, The voltage sampling module comprises: A third sample-and-hold unit connected to the power supply pin and configured to collect a first pin voltage of the power supply pin in a current period and output a second pin voltage in a previous period; A third voltage reduction unit connected to the third sample-and-hold unit and configured to process the second pin voltage at a preset discharging speed to generate a third output voltage decreasing in proportion to time as the reference voltage.

7. The insertion detection circuit of claim 6, wherein, The third sample-and-hold unit comprises a ninth switch, a tenth switch, an eleventh switch, a twelfth switch, a fifth capacitor and a sixth capacitor; and the third voltage reduction unit comprises a second current source, a third current source, a thirteenth switch and a fourteenth switch. One end of the fifth capacitor is connected to the power supply pin through the ninth switch and to a source end of the second current source through the tenth switch; and the other end of the fifth capacitor is connected to a reference ground. One end of the sixth capacitor is connected to the power supply pin through the eleventh switch and to a source end of the third current source through the twelfth switch; and the other end of the sixth capacitor is connected to the reference ground. The source end of the second current source is also connected to the second comparison input end through the thirteenth switch; and a sink end of the second current source is connected to the reference ground. The source end of the third current source is also connected to the second comparison input end through the fourteenth switch; and a sink end of the third current source is connected to the reference ground.

8. A portable energy storage device, characterized by It comprises: A device body provided with at least one interface, and The plug-in detection circuit according to any one of claims 1-7 is connected to a power supply pin of the interface.

9. An insertion detection method, characterized by, It comprises: Obtaining a power supply voltage of a power supply pin of an interface; According to the power supply voltages obtained at different time points, determining whether a descending speed of the power supply voltage of the power supply pin meets a preset standard; When the descending speed meets the preset standard, determining that an external device is connected to the interface.

10. The insertion detection method of claim 9, wherein, The method comprises the following steps: acquiring a first supply voltage at a previous moment; acquiring a second supply voltage at a current moment; judging whether a descending speed of the supply voltage of the supply pin satisfies a preset standard according to the supply voltage acquired at different moments; and determining that the descending speed of the supply voltage of the supply pin satisfies the preset standard when the reference voltage at the current moment is greater than the second supply voltage. The method comprises the following steps: acquiring a first supply voltage at a previous moment; acquiring a second supply voltage at a current moment; judging whether a descending speed of the supply voltage of the supply pin satisfies a preset standard according to the supply voltage acquired at different moments; and determining that the descending speed of the supply voltage of the supply pin satisfies the preset standard when the reference voltage at the current moment is greater than the second supply voltage. The method comprises the following steps: acquiring a first supply voltage at a previous moment; acquiring a second supply voltage at a current moment; judging whether a descending speed of the supply voltage of the supply pin satisfies a preset standard according to the supply voltage acquired at different moments; and determining that the descending speed of the supply voltage of the supply pin satisfies the preset standard when the reference voltage at the current moment is greater than the second supply voltage. The voltage reduction processing comprises: subtracting a preset voltage threshold from the first supply voltage to generate the reference voltage; or The voltage reduction processing comprises: subtracting a preset voltage threshold from the first supply voltage to generate the reference voltage; or ​

Images