A wideband on-chip radio frequency rectifier

By improving the two-stage LC matching network and wide second harmonic shaping technology, the impedance matching and power conversion efficiency problems of traditional RF rectifiers in multi-frequency environments are solved, achieving high-efficiency rectification over a wide bandwidth and improving the rectifier's bandwidth and rectification efficiency.

CN121000075BActive Publication Date: 2025-12-23NANJING UNIV OF POSTS & TELECOMM
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Patent Information

Application Number
CN202511508880.8
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2025-10-22
Publication Date
2025-12-23
Estimated Expiration
2045-10-22

AI Technical Summary

Technical Problem

Traditional RF rectifiers are designed for narrowband, making them difficult to adapt to multi-band and dynamically changing RF environments. Furthermore, they suffer from low impedance matching and power conversion efficiency over wide bandwidths, as well as poor process compatibility.

Method used

An improved two-stage LC matching network and a wide second harmonic shaping network are adopted to achieve impedance matching and harmonic shaping through lumped parameter elements. Combined with the MOSFET rectifier network, a fully integrated wideband on-chip RF rectifier is constructed.

Benefits of technology

It achieves efficient impedance matching and high power conversion efficiency in the 2.1GHz~7.6GHz frequency band, reduces the physical size of the circuit, improves the bandwidth and rectification efficiency of the rectifier, and suppresses reverse leakage current.

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Abstract

The application discloses a broadband on-chip radio frequency rectifier, which comprises a microwave source, a balun, an impedance matching network, a broadband second harmonic shaping network, a rectifier network and a load, the input end of the impedance matching network is differentially connected with the microwave source through the balun, the output end is connected with the input end of the rectifier network, the rectifier network is connected with the load, one end of the broadband second harmonic shaping network is connected with the rectifier network, and the other end is grounded. The impedance matching network is realized by on-chip lumped parameter components, is composed of three inductors and three capacitors in a two-stage LC structure, the rectifier network is realized by a MOS tube, and the broadband second harmonic shaping network is composed of three inductors and two capacitors. The application improves the traditional two-stage LC matching network, simultaneously adopts a novel broadband second harmonic shaping network, realizes the broadband second harmonic shaping of the rectifier by connecting a harmonic expansion network in series on the second harmonic shaping network, suppresses the reverse leakage current, and improves the rectifier efficiency.
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Description

TECHNICAL FIELD

[0001] The present application relates to the field of radio frequency circuit, in particular to a wideband on-chip radio frequency rectifier. BACKGROUND

[0002] Radio frequency (RF) energy harvesting technology utilizes electromagnetic waves in the environment (such as Wi-Fi, cellular signals, broadcast signals, etc.) to power low-power electronic devices, and has important applications in the fields of Internet of Things (IoT), Wireless Sensor Networks (WSNs) and wearable devices. The radio frequency rectifier is the core module of this technology, which is responsible for converting alternating radio frequency signals into direct current voltage.

[0003] Traditional radio frequency rectifiers usually adopt narrowband design, only work efficiently at specific frequency points (such as 900MHz or 2.4GHz), and are difficult to adapt to multi-band and dynamically changing radio frequency environments. Therefore, wideband radio frequency rectifiers have become a research hotspot, which need to achieve efficient energy conversion in a wide frequency range (such as 400MHz~6GHz). However, wideband design faces the following challenges:

[0004] Impedance matching design: the input impedance of different frequency bands differs greatly, and a wideband matching network (such as a distributed LC structure or a nonlinear matching technique) needs to be used to reduce the reflection loss S11 and the insertion loss S21.

[0005] Wide dynamic range: the power range of radio frequency signals under different environments is usually wide (-30dBm~30dBm), and the rectifier needs to maintain a high power conversion efficiency (PCE) under a wide input power.

[0006] Process compatibility: to realize on-chip integration, standard CMOS process needs to be used, and dependence on discrete components (such as large inductance or variable capacitance) needs to be avoided. SUMMARY

[0007] The present application aims to at least partially solve the technical problems in the related art.

[0008] The present application aims to at least partially solve the technical problems in the related art.

[0009] In order to achieve the above-mentioned purpose, the application provides a wideband on-chip radio frequency rectifier, comprising a microwave source, a balun, an impedance matching network, a wide second harmonic shaping network, a rectifier network and a load, the input end of the impedance matching network is differentially connected with the microwave source through the balun, the output end is connected with the input end of the rectifier network, the rectifier network is connected with the load, one end of the wide second harmonic shaping network is connected with the rectifier network, and the other end is grounded; wherein the impedance matching network is realized by on-chip lumped parameter components, and is composed of three inductors and three capacitors in a two-stage LC structure, the rectifier network is realized by MOS tubes, and the wide second harmonic shaping network is composed of three inductors and two capacitors.

[0010] Preferably, the impedance matching network is composed of three inductors and three capacitors, the microwave source is converted into a differential input signal through the balun, is firstly connected with capacitors C1 and C3 on the differential branch, the capacitor C1 is connected with inductors L1, L2 and capacitor C2, the capacitor C3 is connected with inductor L2, L3 and capacitor C2, the inductor L2 and the capacitor C2 are connected across the differential branch, and the inductors L1 and L3 are connected to the rectifier network at the other end.

[0011] Preferably, the rectifier network comprises two direct-current isolation capacitors Crf and a full-differential cross-coupled rectifier, the input ends of the two direct-current isolation capacitors Crf are differentially connected with the impedance matching network, the output ends are differentially connected with the full-differential cross-coupled rectifier, and the output end of the full-differential cross-coupled rectifier is connected with the load.

[0012] Preferably, the full-differential cross-coupled rectifier is composed of four MOS tubes, an NMOS tube M1 and a PMOS tube M2 form a pair, an NMOS tube M3 and a PMOS tube M4 form another pair, the source and the drain of each pair of MOS tubes are connected, wherein the drain of the NMOS tube is grounded, the source of the other PMOS tube is connected with the load as the output end, and the gate ends of the two pairs of MOS tubes are connected with the positive and negative poles of the differential signal respectively.

[0013] Preferably, the load comprises a pass filter CL and a direct-current load RL, the pass filter CL is a grounded capacitor, the input end is connected with the output end of the full-differential cross-coupled rectifier and the direct-current load RL, and the other end is grounded.

[0014] Preferably, the wide second harmonic shaping network is composed of a second harmonic shaping network and a harmonic expansion network in series, one end of the harmonic expansion network is connected with the second harmonic shaping network, and the other end is grounded; the other end of the second harmonic shaping network is connected with the source of the NMOS tube in series.

[0015] Preferably, the harmonic expansion network is composed of an inductor L6 and a capacitor C5 in series, and is connected with another inductor L5 in parallel.

[0016] Preferably, the second harmonic shaping network is composed of an inductor L4 and a capacitor C4 in parallel, and resonates at the second harmonic frequency.

[0017] Preferably, one end of the microwave source is connected to a matching network through a balun to become a differential signal, and the other end is grounded, and the internal resistance is 50Ω.

[0018] Beneficial effects: the present application matches the input impedance of the circuit to the impedance of the microwave source in the frequency band range of 2.1GHz~7.6GHz through the wideband impedance matching technology, effectively increases the working bandwidth and rectification efficiency of the rectifier, and through the impedance transformation of the two-stage LC matching network, a larger frequency bandwidth can be matched, and the rectification efficiency is improved; the matching network is entirely composed of lumped parameters, which greatly reduces the physical size of the rectification circuit; the wide second harmonic shaping network can realize harmonic shaping in a wide frequency band range without affecting the rectifier, suppress reverse leakage current, and improve the rectifier efficiency. BRIEF DESCRIPTION OF DRAWINGS

[0019] Figure 1 is the circuit structure diagram of the wideband on-chip radio frequency rectifier proposed in the present application.

[0020] Figure 2 is the simulation rectification efficiency diagram when the input power is 0dBm in the embodiment of the present application.

[0021] Figure 3 is the simulation diagram of the input impedance Zin of the wide second harmonic shaping network in the embodiment of the present application.

[0022] Figure 4 is the simulation diagram of the gate-source voltage VGS after the second harmonic shaping in the embodiment of the present application.

[0023] In the figure: C1, C2, C3, L1, L2, L3 are impedance matching networks, Crf is a direct current blocking capacitor, M1, M2, M3, M4 are differential cross-coupled rectifiers, CL is a through filter, RL is a direct current load, L4, L5, L6, C4, C5 are wide second harmonic shaping networks. DETAILED DESCRIPTION

[0024] In order to make the purpose, technical scheme and advantages of the present application clearer, the technical scheme in the present application will be described clearly and completely below in combination with the drawings in the present application. Obviously, the described embodiments are part of the embodiments of the present application, not all the embodiments, and they should not be understood as limiting the present application. Based on the embodiments in the present application, all other embodiments obtained by those skilled in the art without creative labor belong to the scope of protection of the present application. In the description of the present application, it should be understood that the terms used are only for the purpose of description, and cannot be understood as indicating or implying relative importance.

[0025] The following will be combined Figures 1-4This invention describes a wideband on-chip radio frequency rectifier.

[0026] Example 1: As Figure 1 As shown, this embodiment provides a wideband on-chip RF rectifier, including: a microwave source, a balun, an impedance matching network, a wide second harmonic shaping network, a rectifier network, and a load. The input terminal of the impedance matching network is differentially connected to the microwave source after passing through the balun, and the output terminal is connected to the input terminal of the rectifier network. The rectifier network is connected to the load. One end of the wide second harmonic shaping network is connected to the rectifier network, and the other end is grounded. The impedance matching network is implemented using on-chip lumped parameter elements, consisting of a two-stage LC structure composed of three inductors and three capacitors. The rectifier network is implemented using MOSFETs, and the wide second harmonic shaping network consists of three inductors and two capacitors.

[0027] One end of the microwave source is converted into a differential signal by a balun and connected to a matching network, while the other end is grounded, with an internal resistance of 50Ω.

[0028] The impedance matching network consists of three inductors and three capacitors. The microwave source is converted into a differential input signal by a balun. On the differential branch, it is first connected to capacitors C1 and C3. Capacitor C1 is connected to inductors L1 and L2 and capacitor C2. Capacitor C3 is connected to inductors L2 and L3 and capacitor C2. Inductor L2 and capacitor C2 are connected across the differential branch. The other ends of inductors L1 and L3 are connected to the rectifier network.

[0029] The rectifier network includes two DC blocking capacitors CRF and a fully differential cross-coupled rectifier. The input terminals of the two DC blocking capacitors CRF are differentially connected to the impedance matching network, and their output terminals are differentially connected to the differential cross-coupled rectifier. The output terminal of the differential cross-coupled rectifier is connected to the load. The differential cross-coupled rectifier consists of four MOSFETs: NMOS transistor M1 and PMOS transistor M2 are paired, and NMOS transistor M3 and PMOS transistor M4 are paired. The source and drain of each pair of MOSFETs are connected together. The drain of the NMOS transistor is grounded, and the source of the other PMOS transistor serves as the output terminal connected to the load. The gate terminals of the two pairs of MOSFETs are connected to the positive and negative terminals of the differential signal, respectively.

[0030] The load includes a pass filter CL and a DC load. The pass filter CL is a grounded capacitor. Its input is connected to the output of the differential cross-coupled rectifier and the DC load RL, and its other end is grounded.

[0031] The wide second harmonic shaping network consists of a second harmonic shaping network and a harmonic extension network connected in series. The harmonic extension network is composed of an inductor L6 and a capacitor C5 connected in series, and another inductor L5 connected in parallel. The second harmonic shaping network is composed of an inductor L4 and a capacitor C4 connected in parallel, resonating at the second harmonic frequency. One end of the harmonic extension network is connected to the second harmonic shaping network, and the other end is grounded; the other end of the second harmonic shaping network is connected in series with the source of the NMOS transistor.

[0032] Brief working principle of the present application: a fully integrated passive matching network on-chip dual-band rectifier is used, by improving the two-stage LC matching network, the matching impedance is reasonably distributed to achieve wide-band impedance matching. The rectifier is composed of MOS tubes, and a wide second harmonic shaping network is added, which is connected in series with the source of the NMOS tube of the rectifier, providing a wide frequency range of second harmonic shaping effect, suppressing the reverse leakage current and improving the PCE under high input power. The rectifier circuit is highly integrated, which greatly reduces the physical size.

[0033] The present application improves the traditional two-stage LC matching network, and proposes an effective wide-band impedance matching network, which can complete the wide-band impedance matching only by using three capacitive elements and three inductive elements, making up for the disadvantage of low efficiency of wide-band rectification. The first-stage LC network in the matching network reduces the input impedance of the rectifier, and the second-stage LC network increases the impedance to match the internal resistance of the signal source. The wide second harmonic shaping technology is adopted, which makes up for the narrow-band disadvantage of the previous second harmonic shaping by adding harmonic expansion technology, and can realize second harmonic shaping in a wide frequency range, which is beneficial to widening the dynamic range under high input power.

[0034] The rectifier circuit of the present application is simulated by TSMC 28nm process, and the circuit operating frequency is 2.1GHz~7.6GHz under 0dbm input power.

[0035] Figure 2 The simulation rectification efficiency of the rectifier circuit under different frequencies when the input power is 0dBm is given, and it can be seen from the figure that the rectifier efficiency reaches 30% in the frequency range of 2.1GHz~7.6GHz; the rectification efficiency is greater than 50% in the frequency range of 2.5GHz~6.8GHz

[0036] Figure 3 The simulation diagram of the input impedance Zin of the wide second harmonic shaping network is given, and it can be seen from the figure that the harmonic shaping network realizes a high second harmonic impedance in a wide frequency range.

[0037] Figure 4 The MOS tube gate-source voltage waveform after second harmonic shaping is given, and it can be seen from the figure that the harmonic shaping effect is obvious.

[0038] Finally, it should be pointed out that: the above examples are only used to illustrate the technical solutions of the present application, and not to limit them; although the present application has been described in detail with reference to the foregoing examples, those skilled in the art should understand that: it can still modify the technical solutions recorded in the foregoing examples, or make equivalent replacement for part of the technical features; and these modifications or replacements do not make the essence of the corresponding technical solutions deviate from the spirit and scope of the technical solutions of the embodiments of the present application.

Claims

1. A wideband on-chip radio frequency rectifier, characterized by, The application relates to a microwave source, a balun, an impedance matching network, a wide second harmonic shaping network, a rectifier network and a load, wherein the input end of the impedance matching network is differentially connected with the microwave source through the balun, the output end of the impedance matching network is connected with the input end of the rectifier network, and the output end of the rectifier network is connected with the load. The impedance matching network is realized by using on-chip lumped parameter elements, and is composed of three inductors L1-L3 and three capacitors C1-C3 to form a two-stage LC structure; the microwave source is converted into a differential input signal through the balun; one end of the differential input signal is connected with one end of the capacitor C1; the other end of the capacitor C1 is connected with one end of the inductor L1, one end of the inductor L2 and one end of the capacitor C2; the other end of the capacitor C3 is connected with the other end of the inductor L2, one end of the inductor L3 and the other end of the capacitor C2; and the other ends of the inductors L1 and L3 are respectively connected with two input ends of the rectifier network. The rectifier network comprises two DC blocking capacitors Crf and a differential cross-coupled rectifier composed of NMOS tubes M1 and M3 and PMOS tubes M2 and M4; the NMOS tube M1 and the PMOS tube M2 form a pair, the NMOS tube M3 and the PMOS tube M4 form another pair, the source end of each pair of MOS tubes is connected with the source end of the other pair of MOS tubes, the drain end of the PMOS tube M2 and the PMOS tube M4 is connected with the load as an output end, and the gate end of the two pairs of MOS tubes is respectively connected with the positive pole and the negative pole of the differential signal. The wide second harmonic shaping network is composed of a second harmonic shaping network and a harmonic expansion network in series; the inductor L4 and the capacitor C4 are connected in parallel to form the second harmonic shaping network, which resonates at the second harmonic frequency; the inductor L6 and the capacitor C5 form a series circuit which is connected in parallel with the inductor L5 to form the harmonic expansion network; one end of the second harmonic shaping network is connected with the drain end of the NMOS tubes M1 and M3 in the rectifier network, the other end of the second harmonic shaping network is connected with one end of the harmonic expansion network, and the other end of the harmonic expansion network is grounded. The input end of the two DC blocking capacitors Crf of the rectifier network is differentially connected with the impedance matching network, the output end of the two DC blocking capacitors Crf is differentially connected with the differential cross-coupled rectifier, and the output end of the differential cross-coupled rectifier is connected with the load.

2. The wideband on-chip RF rectifier of claim 1, wherein, The load comprises a pass filter CL and a DC load RL; the pass filter CL is a grounding capacitor, the input end of the pass filter CL is connected with the output end of the differential cross-coupled rectifier and one end of the DC load RL, and the other end is grounded.

3. The wideband on-chip RF rectifier of claim 2, wherein, One end of the microwave source is connected with the impedance matching network through the balun to form a differential signal, and the other end is grounded, and the internal resistance is 50 ohms.

4. The wideband on-chip RF rectifier according to any of claims 1-3, characterized in that, ​

Citation Information

Patent Citations

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