Multilayer circuit board and manufacturing method thereof

Abstract

The invention discloses a multilayer circuit board and a manufacturing method thereof, and the manufacturing method comprises the steps: providing N sub-boards and N-1 second prepregs, N being an integer greater than 1; the daughter board comprises a plurality of core boards and first prepregs located among the core boards; the daughter board further comprises a first through hole; stacking each sub-board and a second prepreg, and placing an adhesive blocking film between the first through hole and the second prepreg to enable the adhesive blocking film to cover the first through hole; and laminating the daughter board and the second prepreg. By adopting the technical scheme, the problem of glue overflow of the crimping hole can be solved.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of circuit board manufacturing, and in particular to a multilayer circuit board and a manufacturing method thereof. BACKGROUND

[0002] An artificial intelligence (AI) backboard is a core hardware foundation for constructing a large-scale AI computing system, mainly solving the high-speed interconnection problem between high-performance graphics processing unit (GPU) clusters, and can realize a bandwidth of 900 GB / s, a delay 20 times lower than that of a peripheral component interconnect express (PCIe), and transmission of three 4K movies per second. The application scene training Conners' Continuous Performance Test 3rd Edition (CPT-3) in the past needs months, and now only takes a few weeks after realizing cluster interconnection using the AI backboard. The main functions of the AI backboard include eliminating communication bottlenecks, creating aggregated computing power, virtualizing super-large memory, accelerating distributed training, and constructing a scalable foundation.

[0003] The AI backboard is mainly a multilayer board composed of multiple sub-boards, forming a Z-axis interconnection core AI backboard, and the adjacent sub-boards are connected through vias and copper paste; however, the position of the pressure contact hole is only bonded by a prepreg, and the flowability of the prepreg is very large and uncontrollable, which easily causes the pressure contact hole to be filled with glue overflow, so that the electronic components cannot be inserted into the pressure contact hole.

[0004] Therefore, how to solve the problem of glue overflow of the pressure contact hole has become a technical problem to be solved at present. SUMMARY

[0005] The present application provides a multilayer circuit board and a manufacturing method thereof to solve the problem of glue overflow of the pressure contact hole.

[0006] According to an aspect of the present application, a manufacturing method of a multilayer circuit board is provided, comprising:

[0007] providing N sub-boards and N-1 second prepregs, N being an integer greater than 1; the sub-boards comprising a plurality of core boards and first prepregs between the core boards; the sub-boards further comprising first vias;

[0008] stacking the sub-boards and the second prepregs, and placing a glue-blocking film between the first vias and the second prepregs, so that the glue-blocking film covers the first vias;

[0009] The sub-plate and the second semi-cured sheet are pressed together.

[0010] Optionally, at the same temperature, the flowability of the resist film is less than that of the second prepreg.

[0011] Optionally, the resist film includes a TPI material.

[0012] Optionally, the resist film comprises PI material;

[0013] Before placing the resist film between the first through-hole and the second semi-cured sheet, the method further includes:

[0014] Plasma activation treatment is performed on the surface of the resist film near the first through hole, and / or plasma activation treatment is performed on the surface of the resist film near the second prepreg.

[0015] Optionally, the provided N sub-boards include conductive vias; of the 2N first outer conductive layers of the N sub-boards, two are second outer conductive layers and 2N-2 are second inner conductive layers; the 2N-2 second inner conductive layers constitute N-1 adjacent conductive groups;

[0016] The sub-boards and the second prepreg are stacked, and a resist film is placed between the first through-hole and the second prepreg, so that the resist film covers the first through-hole, including:

[0017] The resist film and the second prepreg are respectively bonded to the surface of one of the second inner conductive layers in N-1 adjacent conductive groups.

[0018] A blind hole is formed on the second prepreg above the conductive via to expose the conductive via;

[0019] The blind vias are plugged with copper paste.

[0020] All the sub-boards and the second prepreg are stacked together, and the resist film is placed between the first through hole and the second prepreg.

[0021] Optionally, N sub-boards are provided, including:

[0022] Provide multiple core boards and multiple first prepregs to fabricate and form the first inner layer circuitry of each of the sub-boards, and brown the first inner layer circuitry;

[0023] The core board and the first prepreg are stacked and pressed together to obtain each of the sub-boards. The sub-boards are processed using the POFV process to form the conductive vias. Then, the first outer layer circuit of each of the sub-boards is fabricated and formed.

[0024] Solder resist treatment is applied to the first outermost layer circuit located on the outermost side of the multilayer circuit board.

[0025] Optionally, the distance between the edge of the resist film and the blind hole of the adjacent second semi-cured sheet is greater than or equal to 1 mm.

[0026] Optionally, the thickness of the resist film is greater than or equal to 5 μm and less than or equal to 60 μm.

[0027] Optionally, the distance between the edge of the resist film and the first through-hole it covers is greater than or equal to 2 mm.

[0028] According to another aspect of the present invention, a multilayer circuit board is provided, which is manufactured using the method for manufacturing a multilayer circuit board as described in any embodiment of the present invention.

[0029] The technical solution of this invention, by placing a resist film between the first through hole and the second prepreg on the sub-board before lamination, can prevent the resin of the second prepreg from flowing into the first through hole during the lamination process, thus solving the technical problem of resin overflow in the lamination hole and completely solving the insurmountable problem of electronic component installation; at the same time, it can also solve the problem of resin overflow in copper-free through holes, preventing resin from overflowing from the through holes and contaminating the surface.

[0030] It should be understood that the description in this section is not intended to identify key or essential features of the embodiments of the present invention, nor is it intended to limit the scope of the invention. Other features of the invention will become readily apparent from the following description. Attached Figure Description

[0031] To more clearly illustrate the technical solutions in the embodiments of the present invention, the accompanying drawings used in the description of the embodiments will be briefly introduced below. Obviously, the accompanying drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0032] Figure 1 This is a schematic diagram of the structure of a multilayer circuit board in the prior art;

[0033] Figure 2 This is a physical image of a multilayer circuit board in the prior art;

[0034] Figure 3 This is a flowchart illustrating a method for manufacturing a multilayer circuit board according to an embodiment of the present invention;

[0035] Figure 4 This is a structural schematic diagram of the fabrication process of a multilayer circuit board provided in an embodiment of the present invention;

[0036] Figure 5This is a physical image of a multilayer circuit board provided in an embodiment of the present invention;

[0037] Figure 6 This is a schematic diagram of a multilayer circuit board provided in an embodiment of the present invention. Detailed Implementation

[0038] To enable those skilled in the art to better understand the present invention, the technical solutions of the present invention will be clearly and completely described below with reference to the accompanying drawings of the embodiments of the present invention. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort should fall within the scope of protection of the present invention.

[0039] It should be noted that the terms "first," "second," etc., in the specification, claims, and accompanying drawings of this invention are used to distinguish similar objects and are not necessarily used to describe a specific order or sequence. It should be understood that such data can be interchanged where appropriate so that the embodiments of the invention described herein can be implemented in orders other than those illustrated or described herein. Furthermore, the terms "comprising" and "having," and any variations thereof, are intended to cover a non-exclusive inclusion; for example, a process, method, system, product, or apparatus that comprises a series of steps or units is not necessarily limited to those steps or units explicitly listed, but may include other steps or units not explicitly listed or inherent to such processes, methods, products, or apparatus.

[0040] Figure 1 This is a schematic diagram of the structure of a multilayer circuit board in the prior art. Figure 2 This is a physical image of a multilayer circuit board in the prior art, for reference. Figure 1 and Figure 2 A multilayer circuit board can be formed by laminating multiple sub-boards 010 including crimp holes CH. Adjacent sub-boards 010 are bonded together by a second prepreg 122. However, the second prepreg 122 has high fluidity during high-pressure lamination, which may block the crimp holes CH or even overflow onto the surface of the multilayer circuit board.

[0041] To address the aforementioned technical problems, embodiments of the present invention provide a method for manufacturing a multilayer circuit board, comprising: providing N sub-boards and N-1 second prepregs, where N is an integer greater than 1; the sub-boards include multiple core boards and a first prepreg located between the core boards; the sub-boards also include first through holes; stacking the sub-boards and second prepregs, and placing a resist film between the first through holes and the second prepregs to cover the first through holes; and pressing the sub-boards and second prepregs together.

[0042] By adopting the above technical solution, a resist film is placed between the first through hole and the second prepreg on the sub-board before lamination. This resist film can prevent the resin of the second prepreg from flowing into the first through hole during the lamination process, thus solving the technical problem of resin overflow in the lamination hole and completely solving the insurmountable problem of electronic component installation. At the same time, it can also solve the problem of resin overflow in copper-free through holes, preventing resin from overflowing from the through holes and contaminating the surface.

[0043] The above is the core idea of ​​this invention. Based on the embodiments of this invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this invention. The technical solutions in the embodiments of this invention will be clearly and completely described below with reference to the accompanying drawings.

[0044] Figure 3 This is a flowchart illustrating a method for manufacturing a multilayer circuit board according to an embodiment of the present invention. Figure 4 This is a structural schematic diagram of the fabrication process of a multilayer circuit board provided in an embodiment of the present invention, for reference. Figure 3 and Figure 4 The production method includes:

[0045] S110. Provide N sub-boards and N-1 second prepregs, where N is an integer greater than 1; the sub-boards include multiple core boards and a first prepreg located between the core boards; the sub-boards also include a first through hole.

[0046] The first through-hole 100 penetrates both sides of the entire sub-board 010, and is not filled with insulating materials such as resin. In one embodiment, the first through-hole 100 includes a crimp hole CH and / or a copper-free through-hole PH. The crimp hole CH has a copper layer 001 inside and on the surface near the hole, while the copper-free through-hole PH does not have a copper layer 001 inside and on the surface near the hole. The crimp hole CH is used to insert components, and the component pins can be inserted into the crimp hole CH by mechanical pressure to achieve electrical connection. The copper-free through-hole PH can be used as a pin hole for precise positioning before the core boards of the sub-board 010 are pressed together, and also for precise positioning and mechanical fixation during processing.

[0047] The second semi-cured sheet 122 is mainly composed of resin and reinforcing materials such as fiberglass cloth. During the high-temperature pressing process, the resin of the second semi-cured sheet 122 can be converted from a semi-cured state to a molten and flowing state to bond adjacent sub-plates 010.

[0048] It is understandable that the second prepreg 122 and the first prepreg in the sub-board 010 ( Figure 2 The positions of the second semi-cured sheet 122 and the first semi-cured sheet (not shown in the figure) are different; the materials of the second semi-cured sheet 122 and the first semi-cured sheet can be the same or different, and the embodiments of the present invention do not limit this.

[0049] S120. Stack the sub-boards and the second prepreg, and place a resist film between the first through hole and the second prepreg so that the resist film covers the first through hole.

[0050] For example, all sub-boards 010 are placed in a preset order, with a second semi-cured sheet 122 placed between adjacent sub-boards 010, and an adhesive resist film 300 placed between adjacent sub-boards 010 and the second semi-cured sheet 122, so that the adhesive resist film 300 is partially attached to the side surface of the sub-board 010 near the second semi-cured sheet 122, covering the first through hole 100.

[0051] In an optional embodiment, at the same temperature, the flowability of the resist film 300 is less than that of the second prepreg 122. For example, the resist film 300 can be a no-flow PP sheet, and the second prepreg 122 can be a high-speed flowing PP sheet with a low dielectric constant required for the electrical performance of the multilayer circuit board or specified by the user. This can ensure reliability and solve the problem of adhesive overflow in the first through-hole 100.

[0052] In another embodiment, the adhesive barrier film 300 includes a thermoplastic polyimide (TPI) material. The TPI material has a low coefficient of thermal expansion (CTE) and a high glass transition temperature (TG), resulting in better dimensional stability and making it suitable for different temperature variations, such as a TG above 170°C and a Z-axis coefficient of thermal expansion below 3%.

[0053] In another embodiment, the resist film 300 comprises a polyimide (PI) material; before placing the resist film 300 between the first through-hole 100 and the second prepreg 122, the method further includes: performing plasma activation treatment on the surface of the resist film 300 near the first through-hole 100, and / or performing plasma activation treatment on the surface of the resist film 300 near the second prepreg 122. If the resist film 300 comprises a PI material, has a TG of 80°C, and possesses high-temperature resistance sufficient for three-stage lamination, plasma activation treatment of the surface of the resist film 300 is required to prevent delamination and delamination.

[0054] S130, press-fit plate and second semi-cured sheet.

[0055] For example, when the sub-board 010 and the second prepreg 122 are laminated, the resist film 300 remains between the first through hole 100 of the sub-board 010 and the second prepreg 122. The resist film 300 is only partially attached to the side of the sub-board 010 closest to the second prepreg 122. After lamination, the resist film 300 does not need to be removed. The resist film 300 can prevent the resin of the second prepreg 122 from flowing to the first through hole 100 during the lamination process. The multilayer circuit board provided in this embodiment of the invention, such as... Figure 5 As shown, the first through hole 100 was not blocked by resin, and the surface of the multilayer circuit board was not contaminated by resin.

[0056] In addition, the pin length of the electronic components inserted into the crimping hole CH is generally within 4mm, and the thickness of the daughter board 010 is generally close to 5mm. Therefore, as long as there is no excess glue on a daughter board 010, the crimping of electronic components can be completed.

[0057] In this embodiment of the invention, by placing a resist film between the first through hole and the second prepreg on the sub-board before lamination, the resist film can prevent the resin of the second prepreg from flowing into the first through hole during the lamination process, thus solving the technical problem of resin overflow in the lamination hole and completely solving the insurmountable problem of electronic component installation; at the same time, it can also solve the problem of resin overflow in copper-free through holes, preventing resin from overflowing from the through holes and contaminating the surface.

[0058] Optional, continue to refer to Figure 4 The provided N sub-boards 010 include conductive vias TH; the N sub-boards have 2N first outer conductive layers ( Figure 4 In the diagram (not shown), two are second outer conductive layers, and 2N-2 are second inner conductive layers; the 2N-2 second inner conductive layers constitute N-1 adjacent conductive groups. Sub-boards 010 and second prepregs 122 are stacked, and a resist film 300 is placed between the first through-hole 100 and the second prepreg 122 to cover the first through-hole 100. This includes: attaching the resist film 300 and the second prepreg 122 to the surface of one of the second inner conductive layers in each of the N-1 adjacent conductive groups; forming a blind via BH on the second prepreg 122 above the conductive through-hole TH to expose the conductive through-hole TH; plugging the blind via BH with copper paste; stacking all sub-boards 010 and second prepregs 122, and placing the resist film 300 between the first through-hole 100 and the second prepreg 122.

[0059] Sub-board 010 can be composed of multiple core boards ( Figure 4(Not shown in the image) The core board is formed by pressing together the substrate layer and conductive layers located on one side or opposite sides of the substrate layer. The conductive layer located on the outside of the sub-board 010 is the first outer conductive layer, and the conductive layer located on the inside of the sub-board 010 is the first inner conductive layer. After all the sub-boards 010 are pressed together to form the mother board, the first outer conductive layer located on the outside of the mother board is the second outer conductive layer, and the first outer conductive layer located on the inside of the mother board is the second inner conductive layer. Adjacent conductive groups refer to two adjacent second inner conductive layers after all the sub-boards 010 are pressed together to form the mother board. After pressing together to form the mother board, the two adjacent second inner conductive layers are bonded together by the second prepreg 122.

[0060] The conductive via TH penetrates both sides of the entire sub-board 010, and a copper layer 001 is provided inside the conductive via TH and on the surface near the hole. In one embodiment, the conductive via TH is also filled with insulating materials such as resin 002. In another embodiment, the upper and lower surfaces of the conductive via TH are also provided with electroplated copper caps 003.

[0061] For example, a complete multilayer circuit board includes seventy-eight conductive layers (LC1, ..., LC78) and three sub-boards 010, each including twenty-six conductive layers. From top to bottom, the first sub-board 011 may include the first to the twenty-sixth conductive layers (LC1, ..., LC26), the second sub-board 012 may include the twenty-seventh to the fifty-second conductive layers (LC27, ..., LC52), and the third sub-board 013 may include the fifty-third to the seventy-eighth conductive layers (LC53, ..., LC78). The first, twenty-sixth, twenty-seventh, fifty-twoth, fifty-threeth, and seventy-eighth conductive layers (LC1, LC26, LC27, LC52, LC53, and LC78) are all first outer conductive layers, and the remaining conductive layers are all first inner conductive layers; the first and seventy-eighth conductive layers (LC1 and LC78) are also second outer conductive layers, and the twenty-sixth, twenty-seventh, fifty-twoth, and fifty-threeth conductive layers (LC26, LC27, LC52, and LC53) are also second inner conductive layers; the twenty-sixth and twenty-seventh conductive layers (LC26 and LC27) form adjacent conductive groups, and the fifty-second and fifty-third conductive layers (LC52 and LC53) form adjacent conductive groups.

[0062] In one embodiment, before stacking the sub-boards 010 and the second prepreg 122, a resist film 300 can be first bonded to the surfaces of the 27th conductive layer LC27 and the 53rd conductive layer LC53 to cover the first through-hole 100. Then, the second prepreg 122 is pre-pressed onto the surfaces of the 27th conductive layer LC27 and the 53rd conductive layer LC53. Next, the second prepreg 122 is processed using a laser to form a blind via BH, exposing the conductive through-hole TH located below the second prepreg 122. Using a screen printing process, copper paste 004 is screen-printed at the location of the blind via BH to plug the blind via BH, and the copper paste 004 in the blind via BH is pre-cured. Then, a resist film 300 is bonded to the surfaces of the 26th conductive layer LC26 and the 52nd conductive layer LC52 to cover the first through-hole 100, and all sub-boards 010 and the second prepreg 122 are stacked.

[0063] During lamination, the second inner conductive layer with the second prepreg 122 attached can be bonded to another second inner conductive layer in the same adjacent conductive group through the second prepreg 122. This allows the electroplated copper cap 003 of the second inner conductive layer located below the second prepreg 122 to be electrically connected to the electroplated copper cap 003 of the second inner conductive layer in the same adjacent conductive group through the copper paste of the blind hole BH, thereby realizing Z-axis interconnection between different sub-boards 010. At the same time, the resist film 300 can block the resin of the second prepreg 122 from flowing to the first through hole 100, so as to avoid the first through hole 100 being blocked.

[0064] In other alternative embodiments, the bonding of the resist film 300 to the surfaces of the 27th conductive layer LC27 and the 53rd conductive layer LC53 and the bonding of the resist film 300 to the surfaces of the 26th conductive layer LC26 and the 52nd conductive layer LC52 can be performed in the same process.

[0065] Based on the above embodiments, N sub-boards are provided, including: providing multiple core boards and multiple first prepregs; fabricating and forming the first inner layer circuitry of each sub-board, and browning the first inner layer circuitry; stacking the core boards and first prepregs and pressing them together to obtain each sub-board; processing the sub-board 010 using the POFV process to form conductive vias TH; and then fabricating and forming the first outer layer circuitry of each sub-board; and performing solder resist treatment on the first outermost layer circuitry located on the multilayer circuit board.

[0066] For example, continuing with a complete multilayer circuit board including seventy-eight conductive layers (LC1, ..., LC78), and each sub-board 010 including twenty-six conductive layers, the first inner layer circuit is fabricated and browned on the second to twenty-fifth conductive layers (LC2, ..., LC25), the twenty-eighth to fifty-first conductive layers (LC28, ..., LC51), and the fifty-fourth to seventy-seventh conductive layers (LC54, ..., LC77). At this time, the first, twenty-sixth, twenty-seventh, fifty-second, fifty-third, and seventy-eighth conductive layers (LC1, LC26, LC27, LC52, LC53, LC78) have not yet been fabricated and formed into conductive circuits. After stacking the core board and the first prepreg and laminating them to obtain each sub-board 010, the POFV process is used: drilling, copper plating, electroplating, resin plugging, and electroplating to form conductive vias TH. Then, the first outer layer circuit is fabricated and browned on the first, twenty-sixth, twenty-seventh, fifty-twoth, fifty-threeth, and seventy-eighth conductive layers (LC1, LC26, LC27, LC52, LC53, and LC78). Finally, only the first and seventy-eighth conductive layers (LC1 and LC78) are subjected to solder mask treatment. The solder mask treatment can protect the first conductive layer LC1 and the seventy-eighth conductive layer LC78 from damage during the lamination of the motherboard.

[0067] Based on the above embodiments, the distance L1 between the edge of the resist film 300 and the blind hole BH of the adjacent second semi-cured sheet 122 is greater than or equal to 1 mm.

[0068] For example, during the lamination process, the resist film 300 has low fluidity and hardly deforms. If the distance L1 between the resist film 300 and the blind via BH of the second prepreg 122 is too small, the spacing between two adjacent sub-boards 010 near the blind via BH will be limited, which may affect the soldering of the copper paste 004 in the blind via BH to the adjacent sub-board 010. By setting the distance L1 between the edge of the resist film 300 and the blind via BH of the adjacent second prepreg 122 to be greater than or equal to 1 mm, the distance L1 between the resist film 300 and the blind via BH can be increased, avoiding the resist film 300 and the blind via BH being too close, which would cause the resist film 300 to affect the soldering of the copper paste 004 in the blind via BH to the adjacent sub-board 010.

[0069] Optional, continue to refer to Figure 4 The thickness D1 of the resist film 300 is greater than or equal to 5μm and less than or equal to 60μm. In this way, while achieving effective resisting, the thickness of the resist film 300 can be reduced to minimize the impact on the welding of the copper paste 004 and the adjacent sub-board 010.

[0070] Optional, continue to refer to Figure 4The distance L2 between the edge of the resist film 300 and the first through hole 100 it covers is greater than or equal to 2 mm. This increases the contact area between the resist film 300 and the sub-board 010, preventing it from being squeezed off by the resin. It can effectively prevent the adhesive from being squeezed off during pressing, and prevent the resin of the second semi-cured sheet 122 from flowing into the first through hole 100.

[0071] Based on the above embodiments, the shape of the resist film 300 can be different from the shape of the first through hole 100 it covers. For example, when the first through hole 100 is square, the shape of the resist film 300 covering the first through hole 100 can be circular; when the first through hole 100 is circular, the shape of the resist module covering the first through hole 100 can be square. In this way, while ensuring that the distance L2 between the edge of the resist film 300 and the first through hole 100 is greater than or equal to 2mm, the contact area between the resist film 300 and the sub-board 010 in some areas can be increased as much as possible, further improving the resisting effect.

[0072] Based on the same inventive concept, embodiments of the present invention also provide a multilayer circuit board. Figure 6 This is a schematic diagram of a multilayer circuit board provided in an embodiment of the present invention, such as... Figure 6 As shown, the multilayer circuit board is formed by laminating multiple sub-boards 010 and second prepreg 122. A resist film 300 is provided between the first through hole 100 of the sub-board 010 and the second prepreg 122, so that the first through hole 100 of the sub-board 010 is not blocked by the resin of the second prepreg 122, which is beneficial to the subsequent electrical assembly and / or mechanical assembly of the multilayer circuit board.

[0073] The multilayer circuit board provided in the embodiments of the present invention can be manufactured using the multilayer circuit board manufacturing method provided in any embodiment of the present invention. It has the functional modules and beneficial effects of the multilayer circuit board manufacturing method provided in the embodiments of the present invention. For contents not described in detail in the embodiments of the multilayer circuit board, please refer to the description of the multilayer circuit board manufacturing method above, and will not be repeated here. Similarly, the multilayer circuit board manufacturing method provided in the embodiments of the present invention can be used to manufacture the multilayer circuit board provided in any embodiment of the present invention. It has the corresponding technical features and beneficial effects of the multilayer circuit board. For contents not described in detail in the embodiments of the multilayer circuit board manufacturing method, please refer to the description of the multilayer circuit board above, and will not be repeated here.

[0074] Note that the above description is merely a preferred embodiment of the present invention and the technical principles employed. Those skilled in the art will understand that the present invention is not limited to the specific embodiments described herein, and various obvious changes, readjustments, and substitutions can be made without departing from the scope of protection of the present invention. Therefore, although the present invention has been described in detail through the above embodiments, the present invention is not limited to the above embodiments, and may include many other equivalent embodiments without departing from the concept of the present invention, the scope of which is determined by the scope of the appended claims.

Claims

1. A method for manufacturing a multilayer circuit board, characterized in that, include: The system provides N sub-boards and N-1 second prepreg sheets, where N is an integer greater than 1; each sub-board includes multiple core boards and a first prepreg sheet located between the core boards; the sub-board also includes a first through hole; Each of the sub-boards and the second semi-cured sheet are stacked, and a resist film is placed between the first through hole and the second semi-cured sheet so that the resist film covers the first through hole; The sub-plate and the second semi-cured sheet are pressed together.

2. The method for manufacturing a multilayer circuit board according to claim 1, characterized in that, At the same temperature, the flowability of the resist film is less than that of the second prepreg.

3. The method for manufacturing a multilayer circuit board according to claim 1, characterized in that, The resist film includes TPI material.

4. The method for manufacturing a multilayer circuit board according to claim 1, characterized in that, The resist film comprises PI material; Before placing the resist film between the first through-hole and the second semi-cured sheet, the method further includes: Plasma activation treatment is performed on the surface of the resist film near the first through hole, and / or plasma activation treatment is performed on the surface of the resist film near the second prepreg.

5. The method for manufacturing a multilayer circuit board according to claim 1, characterized in that, The provided N sub-boards include conductive vias; of the 2N first outer conductive layers of the N sub-boards, two are second outer conductive layers and 2N-2 are second inner conductive layers; the 2N-2 second inner conductive layers constitute N-1 adjacent conductive groups; The sub-boards and the second prepreg are stacked, and a resist film is placed between the first through-hole and the second prepreg, so that the resist film covers the first through-hole, including: The resist film and the second prepreg are respectively bonded to the surface of the second inner conductive layer in one of N-1 adjacent conductive groups; A blind hole is formed on the second prepreg above the conductive via to expose the conductive via; The blind vias are plugged with copper paste. All the sub-boards and the second prepreg are stacked together, and the resist film is placed between the first through hole and the second prepreg.

6. The method for manufacturing a multilayer circuit board according to claim 5, characterized in that, Provide N sub-boards, including: Provide multiple core boards and multiple first prepregs to fabricate and form the first inner layer circuitry of each of the sub-boards, and brown the first inner layer circuitry; The core board and the first prepreg are stacked and pressed together to obtain each of the sub-boards. The sub-boards are processed using the POFV process to form the conductive vias. Then, the first outer layer circuit of each of the sub-boards is fabricated and formed. Solder resist treatment is applied to the first outermost layer circuit located on the outermost side of the multilayer circuit board.

7. The method for manufacturing a multilayer circuit board according to claim 5, characterized in that, The distance between the edge of the resist film and the blind hole of the adjacent second semi-cured sheet is greater than or equal to 1 mm.

8. The method for manufacturing a multilayer circuit board according to claim 1, characterized in that, The thickness of the resist film is greater than or equal to 5 μm and less than or equal to 60 μm.

9. The method for manufacturing a multilayer circuit board according to claim 1, characterized in that, The distance between the edge of the resist film and the first through hole it covers is greater than or equal to 2 mm.

10. A multilayer circuit board, characterized in that, The multilayer circuit board is manufactured using the method described in any one of claims 1-9.

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